6-4 cpu-registers, effective address general registers vs segment registers computer studies (al)

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8088 Registers Data group General purpose registers: AX. BX. CS. DX Each 16-bit long AH-AL, BH-BL, CH-CL, DH-DL (8 bit access) AH: high order byte, AL: low order byte Uses: hold operands and temporary results Special purpose registers (e.g. dedicated for special I/O)

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6-4 CPU-Registers, effective address

General registers vs Segment registersComputer Studies (AL)

Reference SEG3460

High level programming versus assembly programming (supplementary notes)

80x86組合語言 , p2-2 – 2-20

8088 Registers Data group

General purpose registers: AX. BX. CS. DX Each 16-bit long AH-AL, BH-BL, CH-CL, DH-DL (8 bit access) AH: high order byte, AL: low order byte Uses: hold operands and temporary results Special purpose registers (e.g. dedicated for special

I/O)

8088 Registers Pointer and Index Group

SP (Stack pointer) BP (Base pointer) SI (Source Index) DI (Destination Index) IP (Instruction Pointer) ~ (PC)

8088 Registers Pointer and Index Group

Must be accessed in 16 bits as a whole Uses: Memory Pointers

With their contents interpreted as addresses of data/location

E.g. [SI] means content of SI stores the address of the location or data of interest.

IP points to the next instruction

8088 Registers Status and Control Flags (we learn 6 out of

9) OF (overflow) ZF (Zero Flag) PF (Parity Flag) CF (Carry Flag) AF (Auxiliary Carry Flag) SF (Sign Flag)

Example of status registers0101 0100 0011 10010100 0101 0110 1010

1001 1001 1010 0011

+

SF=1, ZF=0, PF=1, CF=0, AF=1, OF=1

Segment memory Every byte has an address. 20 bit address bus

2 power 20 = 1048576 bytes = 1 Mb In 8088, each memory access is 8-bit wide,

thus 2 bytes = 2 memory accesses. 1 word = 2 bytes = 16 bits = 65536 (max)

It implies the max. addressable memory = 64k. How to break the limit?

Offset, segment and physical address 1 MB = 16 x 64k memory 16 bit address = offset (位移 ) within a segment =

logical address 101100111111111 1011001111111110000 (offset)

Physical address = Segment address + logical address.

Logical address relate to which segment. The value of the logical address is stored in the segment

registers. (refer to the supplementary notes, Fig. 2.1)

Example IP: next instruction

0000000100000000 CS: code segment register

B3FFh (h = hex) Physical Address = CS:IP = CSx16 + IP

1011 0011 1111 1111 00000000 0001 0000 0000+

1011 0100 0000 1111 0000(B 4 0 F 0)

(20-bit)

Where segments allocated? Anywhere in memory. Segments are overlapping.

Refer to 80x86 reference notes.

Why use segment? Relocation Save 4 bits, yet can still have 20-bit

address

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