2008-06-03 rev: 1 · jhxxx m/b la-4241p schematic 0.4 cover page b tuesday, june 03, 2008 149...
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cover Page
B
1 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cover Page
B
1 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cover Page
B
1 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Intel Penryn Processor with Cantiga + DDRII + ICH9M
JHXXX Schematics Document
REV: 1.0
Compal Confidential
(With nVIDIA MXM/B)
2008-06-03
12/21 Add PJP1 for DCIN Cable on 45 LevelOne for 14W DCIN , PN: DC301001Y00Another for 15W DCIN , PN: DC301001V00
05/20 Add DAZ PCB Panel P/N
ZZZ1
PCB14WDAZ@
ZZZ1
PCB14WDAZ@
PJP1
15W_DCIN15W_45@
PJP1
15W_DCIN15W_45@
ZZZ9
LS-4242P15WDA@
ZZZ9
LS-4242P15WDA@
ZZZ2
PCB15WDAZ@
ZZZ2
PCB15WDAZ@
ZZZ10
LS-4243P15WDA@
ZZZ10
LS-4243P15WDA@
ZZZ11
LS-4244P15WDA@
ZZZ11
LS-4244P15WDA@
ZZZ12
LS-4245P15WDA@
ZZZ12
LS-4245P15WDA@
ZZZ13
LS-4246P15WDA@
ZZZ13
LS-4246P15WDA@
ZZZ3
LA-4241P14WDA@
ZZZ3
LA-4241P14WDA@
ZZZ4
LS-4243P14WDA@
ZZZ4
LS-4243P14WDA@
ZZZ5
LS-4244P14WDA@
ZZZ5
LS-4244P14WDA@
ZZZ6
LS-4249P14WDA@
ZZZ6
LS-4249P14WDA@
PJP1
14W_DCIN14W_45@
PJP1
14W_DCIN14W_45@
ZZZ8
LA-4241P15WDA@
ZZZ8
LA-4241P15WDA@
hexa
inf@
hotm
ail.co
m
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Block Diagrams
B
2 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Block Diagrams
B
2 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Block Diagrams
B
2 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
page 35 page 34 page 40
CHARGER
page 39SCREW
page 35
USB I/O Conn.CIRLID SW
Fan Controlpage 4
Compal ConfidentialModel Name : JHXXX
X4 mode
page 25
HDMI
USB
S-ATA
Power On/Off CKT.
File Name : LA-4241P
Touch Pad
page 40
CRT
LPC BUS
page 36
uFCBGA-1329
3.3V 24.576MHz/48Mhz
H_A#(3..35)
Card Reader
H_D#(0..63)
page 29
JMB385
page 19
MDC 1.5Conn
page 37
Int.KBD
page 34
PCI-Express
BANK 0, 1, 2, 3
USB conn x3TO I/O/B
667/800MHz
ALC268
DMI
page 26
DC/DC Interface CKT.
Intel Penryn Processor
3.3V 48MHz
FSB
S-ATA ODDConn.
RJ45
Clock GeneratorICS9LPRS387
page 32
Power Circuit DC/DC
page 18
uPGA-478 Package
page 35
200pin DDRII-SO-DIMM X2
page 41
Intel CantigaDual Channel
BIOS
page 4
1.8V DDRII 533/667
page 4,5,6
page 33
HDA Codec
page 16
Memory BUS(DDRII)
BGA-676HD Audio
page 24
page 7,8,9,10,11,12,13
Intel ICH9-M
Thermal Sensor
page 14,15
page 20,21,22,23
page 34
ENE KB926
port 0
Audio AMP3 in 1socket
LAN(GbE)RTL8111C/8102E
page 28
New CardSocket
MINI Card x3
CMOS Camera
WLAN,TV-Tuner Robson
PCI-Express
ADT7421
RTC CKT.page 21
LCD Conn.
page 33
Function/B
page 24
S-ATA HDDConn.
MXM II VGA/BBluetoothConnpage 17
page 31
page 30
page 26
page 41,42,43,45 46,47,48
LVDS
page 40
Finger PrintConn
page 44
Debug port
page 8
GMCH HDA
Power USB/B
TPM
page 40LED
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Notes List
B
3 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Notes List
B
3 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Notes List
B
3 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
ON
SLP_S3#SLP_S1#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGHHIGH
LOW
LOW
LOW
LOW LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
OFFOFF
OFF
OFFON
ON
OFF
OFFOFFON
ON*ON
ON
+CPU_CORE
1.5V switched power railOFF
OFFON
Voltage Rails
+5VS
1.8V switched power rail+1.8VS
+1.5VS
RTC power+RTCVCC
0.9V switched power rail for DDR terminator+0.9VS ( Actual +0.9V )
OFFOFFON
3.3V switched power rail5V always on power rail
3.3V always on power rail
Adapter power supply (19V)
+1.05VS
1.8V power rail for DDR
+3VALW
B+VIN
S5
+1.8V
+5VALW
S3S1
+3VS
ONON*ONVSB always on power rail+VSB
5V switched power rail
1.05V switched power rail
Core voltage for CPUAC or battery power rail for power circuit.
ONOFFON
ONON
ON
DescriptionPower Plane
N/A N/A N/AN/AN/AN/A
ON OFFON
ON
ON
OFFON*
SIGNAL
Address1001 100X b0001 011X b
EEPROM(24C16/02)
1010 010XbDDR DIMM11010 000XbDDR DIMM0
1101 001Xb
ICH9M SM Bus address
Address
Address
Clock Generator(ICS9LPRS325AKLFT_MLF72)
Device
ADI ADM1032
1010 000X b
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
NVIDIA NB8X
JHL91 ( 11@ ) R360 R355R360
JHT00 ( 00@ )
R357JHL90 ( 10@ )
ID1
JHT01 ( 01@ )R361
ID0R357R355R361
PROJECT ID Table
ON
R583 Array MICR585 Single MIC
DUAL@SINGLE@
R
MIC ID TableStructure
Vcc 3.3V +/- 5%47K +/- 5%Rb
Board ID Ra V min
4.7K +/- 5%0 V
0.274 V 0.300 V 0.328 V0.553V0.849V
0.578 V0.913V
0.628 V0.981 V
AD_BID V typAD_BID VAD_BID max
10K +/- 5%18K +/- 5%27K +/- 5%39K +/- 5%56K +/- 5%
2.173 V
0 V 0 V
1.129 V1.415 V 1.496 V 1.579 V1.712 V2.020V
1.794 V2.097 V
1.876 V
1.204 V 1.282 V
SKU ID Table
1
32
654
7
111098
12
RbNA 4.7K +/- 5%
82K +/- 5%120K +/- 5%220K +/- 5%470K +/- 5%NA
47K(RB@)
2.303 V2.670 V2.972 V3.135 V
2.371 V2.719 V3.000 V3.300 V
2.437 V2.765 V3.026 V3.465 V
H_14_B@H_14_C@H_14_MP@H_15_B@H_15_C@H_15_MP@L_14_B@L_14_C@L_14_MP@L_15_B@L_15_C@NA for L_15_MP
Ra BOM Structure
Rb~ R470Ra~ R472
47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)47K(RB@)
R472
39K_0402_5%H_15_MP@
R472
39K_0402_5%H_15_MP@
R472
18K_0402_5%H_15_B@
R472
18K_0402_5%H_15_B@
R472
56K_0402_5%L_14_B@
R472
56K_0402_5%L_14_B@
R472
27K_0402_5%H_15_C@
R472
27K_0402_5%H_15_C@
R472
120K_0402_5%L_14_MP@
R472
120K_0402_5%L_14_MP@
R472
470K_0402_5%L_15_C@
R472
470K_0402_5%L_15_C@
R472
10K_0402_5%H_14_MP@
R472
10K_0402_5%H_14_MP@
R472
220K_0402_5%L_15_B@
R472
220K_0402_5%L_15_B@
R472
4.7K_0402_5%H_14_C@
R472
4.7K_0402_5%H_14_C@
R472
82K_0402_5%L_14_C@
R472
82K_0402_5%L_14_C@
hexa
inf@
hotm
ail.co
m
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_FAN1
+VCC_FAN1
THERMDA
ITP_TCK
ITP_TRST#
THERMDC
ITP_TDI
ITP_TMS
H_IERR#
H_PROCHOT#
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]
H_A#4H_A#3
H_A#6H_A#5
H_A#8H_A#7
H_A#9H_A#10
H_A#12H_A#11
H_A#15H_A#14H_A#13
H_A#17
H_A#16
H_A#18H_A#19H_A#20
H_A#22H_A#21
H_A#23H_A#24
H_A#26H_A#25
H_A#27H_A#28H_A#29H_A#30H_A#31
H_REQ#0H_REQ#1H_REQ#2
H_REQ#4H_REQ#3
H_RESET#
H_IERR#
ITP_DBRESET#
ITP_TCK
ITP_TRST#
ITP_TDI
ITP_TMS
THERMDA_RTHERMDC_R
H_PROCHOT#
H_RS#0
H_RS#2H_RS#1
H_A#32H_A#33H_A#34H_A#35
THERMDATHERMDC
EN_FAN1_R
+5VS
+3VS
+5VS
+1.05VS
+3VS
+3VS
+3VS
H_DRDY# H_DBSY#
H_BR0#
H_LOCK#
H_HIT# H_HITM#
H_BPRI#
H_DEFER#
H_RESET#
H_TRDY#
CLK_CPU_BCLK CLK_CPU_BCLK#
H_THERMTRIP#
H_A#[3..35]
H_PROCHOT#
H_REQ#[0..4]
H_ADSTB#0
H_ADSTB#1
H_ADS# H_BNR#
EC_SMB_CK2
EC_SMB_DA2
FAN_SPEED1
H_A20M#H_FERR#
H_RS#[0..2]
H_INIT#
H_INTRH_NMIH_SMI#
H_STPCLK#
H_IGNNE#
ITP_DBRESET#
EN_FAN1
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (1/3)
B
4 49Tuesday, June 03, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (1/3)
B
4 49Tuesday, June 03, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (1/3)
B
4 49Tuesday, June 03, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
40mil
FAN1 Conn
EMC1402
THERMDA_R&THERMDC_R Trace / Space = 10 / 10 mil
Layout Note:THERMDA&THERMDC Trace / Space = 10 / 10 mil
TCKTDITMSTRST#PREQ#
55_5%55_5%55_1%55_5%x
54.9_1%Checklist CRB
54.9_1%54.9_1%54.9_1%54.9_1%
Which to follow?
Address:100_1100
1/29 change to EMC1402 pn
EMI Recommend
EMI Recommend
R2110K_0402_5%R2110K_0402_5%
12
R13 54.9_0402_1%R13 54.9_0402_1%1 2
R705 0_0402_5%R705 0_0402_5%1 2
R12 56_0402_5%R12 56_0402_5%1 2
R20
0_0402_5%NS@
R20
0_0402_5%NS@
U1
ADT7421ARMZ-REEL_MSOP8SMSC@
U1
ADT7421ARMZ-REEL_MSOP8SMSC@
SCLK 8
SDATA 7
ALERT/THERM2 6
GND 5
VDD1
D+2
D-3
THERM4R18 10K_0402_5%R18 10K_0402_5%1 2
JP7
ACES_85205-03001
CONN@
JP7
ACES_85205-03001
CONN@
112233
GND4GND5
ADDR GRO
UP 0ADDR G
ROUP 1
CO
NTR
OL
XDP/
ITP
SIG
NA
LS
H CLK
THERMAL
RESE
RVED
ICH
JCPU1A
Merom Ball-out Rev 1aCONN@
ADDR GRO
UP 0ADDR G
ROUP 1
CO
NTR
OL
XDP/
ITP
SIG
NA
LS
H CLK
THERMAL
RESE
RVED
ICH
JCPU1A
Merom Ball-out Rev 1aCONN@
A[10]#N3A[11]#P5A[12]#P2A[13]#L2A[14]#P4A[15]#P1A[16]#R1
A[17]#Y2A[18]#U5A[19]#R3A[20]#W6A[21]#U4A[22]#Y5A[23]#U1A[24]#R4A[25]#T5A[26]#T3A[27]#W2A[28]#W5A[29]#Y4
A[3]#J4
A[30]#U2A[31]#V4
RSVD[01]M4RSVD[02]N5RSVD[03]T2RSVD[04]V3RSVD[05]B2RSVD[06]C3RSVD[07]D2RSVD[08]D22
A[4]#L5A[5]#L4A[6]#K5A[7]#M3A[8]#N2A[9]#J1
A20M#A6
ADS# H1
ADSTB[0]#M1
ADSTB[1]#V1
RSVD[09]D3
BCLK[0] A22BCLK[1] A21
BNR# E2
BPM[0]# AD4BPM[1]# AD3BPM[2]# AD1BPM[3]# AC4
BPRI# G5
BR0# F1
DBR# C20
DBSY# E1
DEFER# H5DRDY# F21
FERR#A5
HIT# G6HITM# E4
IERR# D20
IGNNE#C4
INIT# B3
LINT0C6LINT1B4
LOCK# H4
PRDY# AC2PREQ# AC1
PROCHOT# D21
REQ[0]#K3REQ[1]#H2REQ[2]#K2REQ[3]#J3REQ[4]#L1
RESET# C1RS[0]# F3RS[1]# F4RS[2]# G3
SMI#A3
STPCLK#D5
TCK AC5TDI AA6
TDO AB3
THERMTRIP# C7
THERMDA A24THERMDC B25
TMS AB5
TRDY# G2
TRST# AB6
A[32]#W3A[33]#AA4A[34]#AB2A[35]#AA3
RSVD[10]F6
R15 56_0402_5%R15 56_0402_5%1 2
C61000P_0402_50V7KC61000P_0402_50V7K
1
2
R16 54.9_0402_1%R16 54.9_0402_1%1 2
D2
BAS16_SOT23-3
D2
BAS16_SOT23-3
1 2
D1BAS16_SOT23-3D1BAS16_SOT23-3
12
C3 10U_0805_10V4ZC3 10U_0805_10V4Z1 2
R20 100_0402_5%SMSC@R20 100_0402_5%SMSC@
R17 54.9_0402_1%R17 54.9_0402_1%1 2
C769
0.047U_0402_16V7K
C769
0.047U_0402_16V7K
12
C51000P_0402_50V7K
C51000P_0402_50V7K
1 2
U1
LM95245CIMMX NOPB MSOP 8PNS@
U1
LM95245CIMMX NOPB MSOP 8PNS@
R19
0_0402_5%NS@
R19
0_0402_5%NS@
U2
G990P11U_SOP8
U2
G990P11U_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
C10.1U_0402_16V4Z
C10.1U_0402_16V4Z1 2
C4 10U_0805_10V4ZC4 10U_0805_10V4Z1 2
R14 54.9_0402_1%R14 54.9_0402_1%1 2
R19 100_0402_5%SMSC@R19 100_0402_5%SMSC@
R706 10K_0402_5%R706 10K_0402_5%12
C2
2200P_0402_50V7K
C2
2200P_0402_50V7K
1
2
R815
330_0402_5%
R815
330_0402_5%
1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[0..63]
H_PWRGOODH_CPUSLP#
H_D#56H_D#57
H_D#59H_D#58
H_D#60
H_D#62H_D#61
H_D#63
H_D#49H_D#50
H_D#48
H_D#51H_D#52H_D#53H_D#54H_D#55
H_D#40
H_D#43
H_D#41
H_D#44
H_D#42
H_D#45H_D#46H_D#47
H_D#36
H_D#33H_D#32
H_D#34H_D#35
H_D#37
H_D#39H_D#38
H_D#8
H_D#10H_D#11
H_D#9
H_D#15
H_D#12
H_D#14H_D#13
H_D#2H_D#1
H_D#3
H_D#0
H_D#4
H_D#7
H_D#5H_D#6
H_D#24H_D#25
H_D#29
H_D#26
H_D#28H_D#27
H_D#30H_D#31
H_D#16H_D#17
H_D#19H_D#18
H_D#21H_D#20
H_D#23H_D#22
COMP1COMP0
COMP3COMP2
GTL_REF0TEST1TEST2
TEST4TEST3
TEST5TEST6
VSSSENSE
VCCSENSE
H_PSI#
H_DPRSTP#
+1.05VS
+CPU_CORE
+1.05VS
+CPU_CORE
+1.5VS
+CPU_CORE
H_DSTBN#0H_DSTBP#0H_DINV#0
H_DSTBN#1H_DSTBP#1H_DINV#1
CPU_BSEL0CPU_BSEL1CPU_BSEL2
H_D#[0..63]
H_DSTBN#2 H_DSTBP#2 H_DINV#2
H_DSTBP#3 H_DSTBN#3
H_DINV#3
H_CPUSLP# H_PSI#
H_PWRGOOD
H_DPSLP# H_DPRSTP#
CPU_VID0
VCCSENSE
VSSSENSE
CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6
H_DPWR#
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (2/3)
B
5 49Wednesday, May 28, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (2/3)
B
5 49Wednesday, May 28, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (2/3)
B
5 49Wednesday, May 28, 2008
2007/08/18 2008/08/18Compal Electronics, Inc.
Width=4 mil ,Spacing: 15mil(55Ohm)
COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)
TRACE CLOSELY CPU < 0.5'
20mils
Trace Close CPU < 0.5'
Route VCCSENSE and VSSSENSE traces at 27.4 Ohms with 50 mils spacing.Place PU and PD within 1 inch of CPU (CRB recommend)
Trace width/space/other is 20/7/25Length matching within 25 mils (Compal Common Design)
Place these 2 resisters closk to CPU pins within 500 mils
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
0 1
0 1
CPU_BSEL0
1
0
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
266 0 0 0 Z=27.4 ohmVCCSENSE, VSSSENSE/ 14mils (MS),16mils (SL) width, 7mils space, 25mils space to other signals Mismatch =25mils.
For 6 layer
330u ESR 9m ohm Package(L*W*H)7.3*4.3*1.8Rating 2.5V
C739 100P_0402_50V8J@C739 100P_0402_50V8J@1 2
C9
0.01U_0402_16V7K
C9
0.01U_0402_16V7K
1
2
R221K_0402_1%R221K_0402_1%
12
R282K_0402_1%R282K_0402_1%
12
R25 54.9_0402_1%R25 54.9_0402_1%1 2R23 27.4_0402_1%R23 27.4_0402_1%1 2
R24 1K_0402_5%@R24 1K_0402_5%@12
JCPU1C
Merom Ball-out Rev 1a.CONN@
JCPU1C
Merom Ball-out Rev 1a.CONN@
VCC[001]A7VCC[002]A9VCC[003]A10VCC[004]A12VCC[005]A13VCC[006]A15VCC[007]A17VCC[008]A18VCC[009]A20VCC[010]B7VCC[011]B9VCC[012]B10VCC[013]B12VCC[014]B14VCC[015]B15VCC[016]B17VCC[017]B18VCC[018]B20VCC[019]C9VCC[020]C10VCC[021]C12VCC[022]C13VCC[023]C15VCC[024]C17VCC[025]C18VCC[026]D9VCC[027]D10VCC[028]D12VCC[029]D14VCC[030]D15VCC[031]D17VCC[032]D18VCC[033]E7VCC[034]E9VCC[035]E10VCC[036]E12VCC[037]E13VCC[038]E15VCC[039]E17VCC[040]E18VCC[041]E20VCC[042]F7VCC[043]F9VCC[044]F10VCC[045]F12VCC[046]F14VCC[047]F15VCC[048]F17VCC[049]F18VCC[050]F20VCC[051]AA7VCC[052]AA9VCC[053]AA10VCC[054]AA12VCC[055]AA13VCC[056]AA15VCC[057]AA17VCC[058]AA18VCC[059]AA20VCC[060]AB9VCC[061]AC10VCC[062]AB10VCC[063]AB12VCC[064]AB14VCC[065]AB15VCC[066]AB17VCC[067]AB18
VCC[068] AB20VCC[069] AB7VCC[070] AC7VCC[071] AC9VCC[072] AC12VCC[073] AC13VCC[074] AC15VCC[075] AC17VCC[076] AC18VCC[077] AD7VCC[078] AD9VCC[079] AD10VCC[080] AD12VCC[081] AD14VCC[082] AD15VCC[083] AD17VCC[084] AD18VCC[085] AE9VCC[086] AE10VCC[087] AE12VCC[088] AE13VCC[089] AE15VCC[090] AE17VCC[091] AE18VCC[092] AE20VCC[093] AF9VCC[094] AF10VCC[095] AF12VCC[096] AF14VCC[097] AF15VCC[098] AF17VCC[099] AF18VCC[100] AF20
VCCA[01] B26
VCCP[03] J6VCCP[04] K6VCCP[05] M6VCCP[06] J21VCCP[07] K21VCCP[08] M21VCCP[09] N21VCCP[10] N6VCCP[11] R21VCCP[12] R6VCCP[13] T21VCCP[14] T6VCCP[15] V21VCCP[16] W21
VCCSENSE AF7
VID[0] AD6VID[1] AF5VID[2] AE5VID[3] AF4VID[4] AE3VID[5] AF3VID[6] AE2
VSSSENSE AE7
VCCA[02] C26
VCCP[01] G21VCCP[02] V6
C8
0.1U_0402_16V4Z@C8
0.1U_0402_16V4Z@
1 2
T3 PAD @T3 PAD @
+ C7
330U_D2E_2.5VM_R9
+ C7
330U_D2E_2.5VM_R9
1
2
T2 PAD @T2 PAD @
C762 470P_0402_50V7KC762 470P_0402_50V7K1 2
R27 27.4_0402_1%R27 27.4_0402_1%1 2T1 PAD @T1 PAD @
DA
TA G
RP 0
DA
TA G
RP 1
DA
TA G
RP
2D
ATA
GR
P 3
MISC
JCPU1B
Merom Ball-out Rev 1aCONN@
DA
TA G
RP 0
DA
TA G
RP 1
DA
TA G
RP
2D
ATA
GR
P 3
MISC
JCPU1B
Merom Ball-out Rev 1aCONN@
COMP[0] R26COMP[1] U26COMP[2] AA1COMP[3] Y1
D[0]#E22D[1]#F24
D[10]#J24D[11]#J23D[12]#H22D[13]#F26D[14]#K22D[15]#H23
D[16]#N22D[17]#K25D[18]#P26D[19]#R23
D[2]#E26
D[20]#L23D[21]#M24D[22]#L22D[23]#M23D[24]#P25D[25]#P23D[26]#P22D[27]#T24D[28]#R24D[29]#L25
D[3]#G22
D[30]#T25D[31]#N25
D[32]# Y22D[33]# AB24D[34]# V24D[35]# V26D[36]# V23D[37]# T22D[38]# U25D[39]# U23
D[4]#F23
D[40]# Y25D[41]# W22D[42]# Y23D[43]# W24D[44]# W25D[45]# AA23D[46]# AA24D[47]# AB25
D[48]# AE24D[49]# AD24
D[5]#G25
D[50]# AA21D[51]# AB22D[52]# AB21D[53]# AC26D[54]# AD20D[55]# AE22D[56]# AF23D[57]# AC25D[58]# AE21D[59]# AD21
D[6]#E25
D[60]# AC22D[61]# AD23D[62]# AF22D[63]# AC23
D[7]#E23D[8]#K24D[9]#G24
TEST5AF1
DINV[0]#H25
DINV[1]#N24
DINV[2]# U22
DINV[3]# AC20
DPRSTP# E5DPSLP# B5DPWR# D24
DSTBN[0]#J26
DSTBN[1]#L26
DSTBN[2]# Y26
DSTBN[3]# AE25
DSTBP[0]#H26
DSTBP[1]#M26
DSTBP[2]# AA26
DSTBP[3]# AF24
GTLREFAD26
PSI# AE6
PWRGOOD D6SLP# D7
TEST3C24
BSEL[0]B22BSEL[1]B23BSEL[2]C21
TEST2D25
TEST4AF26
TEST6A26
TEST1C23
R30 100_0402_1%R30 100_0402_1%1 2
R31 100_0402_1%R31 100_0402_1%1 2
R26 1K_0402_5%@R26 1K_0402_5%@12
C10
10U_0805_10V4Z
C10
10U_0805_10V4Z
1
2
R29 54.9_0402_1%R29 54.9_0402_1%1 2
hexa
inf@
hotm
ail.co
m
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (3/3)
B
6 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (3/3)
B
6 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Penryn (3/3)
B
6 49Friday, April 11, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
32X10uF 3m ohm/32 0.6nH/32
(Place these capacitors on South side,Secondary Layer)
(Place these capacitors on South side,Primary Layer)
(Place these capacitors on North side,Primary Layer)
2 x 330uF(9mOhm/3)
6X330uF 9m ohm/6 1.8nH/63m ohm/32 0.6nH/32
C,uF ESL,nH
MLCC 0805 X5R
(Place these capacitors on North side,Secondary Layer)
South Side Secondary North Side Secondary
2 x 330uF(9mOhm/3)
+CPU-COREDecoupling
32X22uF
ESR, mohm
SPCAP,Polymer
(Place these capacitors inside socket cavity in 2 row on North side Secondary)
330u ESR 9m ohm Package(L*W*H)7.3*4.3*1.8Rating 2.5V
C30
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
1
2
C54
0.1U_0402_16V4Z
C54
0.1U_0402_16V4Z
1
2
C22
10U_0805_6.3V6M
C22
10U_0805_6.3V6M
1
2
C39
10U_0805_6.3V6M
@C39
10U_0805_6.3V6M
@
1
2
C26
10U_0805_6.3V6M
C26
10U_0805_6.3V6M
1
2
C31
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
1
2
C23
10U_0805_6.3V6M
C23
10U_0805_6.3V6M
1
2
C40
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
1
2
JCPU1D
Merom Ball-out Rev 1a.CONN@
JCPU1D
Merom Ball-out Rev 1a.CONN@
VSS[082] P6
VSS[148] AE11
VSS[002]A8VSS[003]A11VSS[004]A14VSS[005]A16VSS[006]A19VSS[007]A23VSS[008]AF2VSS[009]B6VSS[010]B8VSS[011]B11VSS[012]B13VSS[013]B16VSS[014]B19VSS[015]B21VSS[016]B24VSS[017]C5VSS[018]C8VSS[019]C11VSS[020]C14VSS[021]C16VSS[022]C19VSS[023]C2VSS[024]C22VSS[025]C25VSS[026]D1VSS[027]D4VSS[028]D8VSS[029]D11VSS[030]D13VSS[031]D16VSS[032]D19VSS[033]D23VSS[034]D26VSS[035]E3VSS[036]E6VSS[037]E8VSS[038]E11VSS[039]E14VSS[040]E16VSS[041]E19VSS[042]E21VSS[043]E24VSS[044]F5VSS[045]F8VSS[046]F11VSS[047]F13VSS[048]F16VSS[049]F19VSS[050]F2VSS[051]F22VSS[052]F25VSS[053]G4VSS[054]G1VSS[055]G23VSS[056]G26VSS[057]H3VSS[058]H6VSS[059]H21VSS[060]H24VSS[061]J2VSS[062]J5VSS[063]J22VSS[064]J25VSS[065]K1VSS[066]K4VSS[067]K23VSS[068]K26VSS[069]L3VSS[070]L6VSS[071]L21VSS[072]L24VSS[073]M2VSS[074]M5VSS[075]M22VSS[076]M25VSS[077]N1VSS[078]N4VSS[079]N23VSS[080]N26VSS[081]P3 VSS[162] A25
VSS[161] AF21VSS[160] AF19VSS[159] AF16VSS[158] AF13VSS[157] AF11VSS[156] AF8VSS[155] AF6VSS[154] A2VSS[153] AE26VSS[152] AE23VSS[151] AE19
VSS[083] P21VSS[084] P24VSS[085] R2VSS[086] R5VSS[087] R22VSS[088] R25VSS[089] T1VSS[090] T4VSS[091] T23VSS[092] T26VSS[093] U3VSS[094] U6VSS[095] U21VSS[096] U24VSS[097] V2VSS[098] V5VSS[099] V22VSS[100] V25VSS[101] W1VSS[102] W4VSS[103] W23VSS[104] W26VSS[105] Y3
VSS[107] Y21VSS[108] Y24VSS[109] AA2VSS[110] AA5VSS[111] AA8VSS[112] AA11VSS[113] AA14VSS[114] AA16VSS[115] AA19VSS[116] AA22VSS[117] AA25VSS[118] AB1VSS[119] AB4VSS[120] AB8VSS[121] AB11VSS[122] AB13VSS[123] AB16VSS[124] AB19VSS[125] AB23VSS[126] AB26VSS[127] AC3VSS[128] AC6VSS[129] AC8VSS[130] AC11VSS[131] AC14VSS[132] AC16VSS[133] AC19VSS[134] AC21VSS[135] AC24VSS[136] AD2VSS[137] AD5VSS[138] AD8VSS[139] AD11VSS[140] AD13VSS[141] AD16VSS[142] AD19VSS[143] AD22VSS[144] AD25VSS[145] AE1VSS[146] AE4
VSS[106] Y6
VSS[001]A4
VSS[149] AE14VSS[150] AE16
VSS[147] AE8
VSS[163] AF25
C50
0.1U_0402_16V4Z
C50
0.1U_0402_16V4Z
1
2
C52
0.1U_0402_16V4Z
C52
0.1U_0402_16V4Z
1
2
C19
10U_0805_6.3V6M
C19
10U_0805_6.3V6M
1
2
C34
10U_0805_6.3V6M
C34
10U_0805_6.3V6M
1
2
C35
10U_0805_6.3V6M
@C35
10U_0805_6.3V6M
@
1
2
C25
10U_0805_6.3V6M
C25
10U_0805_6.3V6M
1
2
C37
10U_0805_6.3V6M
C37
10U_0805_6.3V6M
1
2
C36
10U_0805_6.3V6M
C36
10U_0805_6.3V6M
1
2
C21
10U_0805_6.3V6M
C21
10U_0805_6.3V6M
1
2
C51
0.1U_0402_16V4Z
C51
0.1U_0402_16V4Z
1
2
C17
10U_0805_6.3V6M
C17
10U_0805_6.3V6M
1
2
C41
10U_0805_6.3V6M
C41
10U_0805_6.3V6M
1
2
C47
10U_0805_6.3V6M
@C47
10U_0805_6.3V6M
@
1
2
C46
10U_0805_6.3V6M
C46
10U_0805_6.3V6M
1
2
C27
10U_0805_6.3V6M
C27
10U_0805_6.3V6M
1
2
C53
0.1U_0402_16V4Z
C53
0.1U_0402_16V4Z
1
2
+C15
330U_D2E_2.5VM_R9
+C15
330U_D2E_2.5VM_R9
1
2
C48
10U_0805_6.3V6M
C48
10U_0805_6.3V6M
1
2
C18
10U_0805_6.3V6M
C18
10U_0805_6.3V6M
1
2
C32
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
1
2
C29
10U_0805_6.3V6M
C29
10U_0805_6.3V6M
1
2
C49
0.1U_0402_16V4Z
C49
0.1U_0402_16V4Z
1
2
+C14
330U_D2E_2.5VM_R9@
+C14
330U_D2E_2.5VM_R9@
1
2
C33
10U_0805_6.3V6M
C33
10U_0805_6.3V6M
1
2
C24
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
1
2
C44
10U_0805_6.3V6M
C44
10U_0805_6.3V6M
1
2
C28
10U_0805_6.3V6M
C28
10U_0805_6.3V6M
1
2
C38
10U_0805_6.3V6M
C38
10U_0805_6.3V6M
1
2
+C11
330U_D2E_2.5VM_R9
+C11
330U_D2E_2.5VM_R9
1
2
+C12
330U_D2E_2.5VM_R9
+C12
330U_D2E_2.5VM_R9
1
2
+ C16
330U_D2E_2.5VM_R9@
+ C16
330U_D2E_2.5VM_R9@
1
2
+C13330U_D2E_2.5VM_R9@
+C13330U_D2E_2.5VM_R9@
1
2
C42
10U_0805_6.3V6M
C42
10U_0805_6.3V6M
1
2
C43
10U_0805_6.3V6M
@C43
10U_0805_6.3V6M
@
1
2
C20
10U_0805_6.3V6M
C20
10U_0805_6.3V6M
1
2
C45
10U_0805_6.3V6M
C45
10U_0805_6.3V6M
1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWING
H_RCOMP
H_VREF
H_RS#0
H_REQ#0
H_DSTBP#0
H_REQ#4
H_REQ#2
H_DSTBP#2
H_REQ#3
H_DINV#2
H_REQ#1
H_DINV#0
H_DSTBP#3
H_DSTBN#3
H_DSTBP#1
H_DINV#3
H_RS#2
H_DSTBN#1H_DSTBN#0
H_DSTBN#2
H_RS#1
H_DINV#1
H_A#33H_A#34
H_A#32
H_A#35
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7
H_D#11
H_D#13
H_D#9
H_D#14
H_D#8
H_D#15
H_D#12
H_D#10
H_D#19
H_D#21
H_D#17
H_D#22
H_D#16
H_D#23
H_D#20
H_D#18
H_D#27
H_D#29
H_D#25
H_D#30
H_D#24
H_D#31
H_D#28
H_D#26
H_D#35
H_D#37
H_D#33
H_D#38
H_D#32
H_D#39
H_D#36
H_D#34
H_D#43
H_D#45
H_D#41
H_D#46
H_D#40
H_D#47
H_D#44
H_D#42
H_D#51
H_D#53
H_D#49
H_D#54
H_D#48
H_D#52
H_D#50
H_D#55
H_D#59
H_D#61
H_D#57
H_D#62
H_D#56
H_D#63
H_D#60
H_D#58
H_A#3H_A#4H_A#5H_A#6H_A#7
H_A#11
H_A#8
H_A#10
H_A#12
H_A#9
H_A#13
H_A#15
H_A#17
H_A#14
H_A#21
H_A#18
H_A#20
H_A#22
H_A#19
H_A#26
H_A#23
H_A#25
H_A#27
H_A#24
H_A#31
H_A#28
H_A#30H_A#29
H_ADSTB#1
H_HIT#
H_BNR#H_BPRI#
H_DPWR#
H_ADS#H_ADSTB#0
H_LOCK#
H_DBSY#
H_BR0#
H_HITM#
H_DRDY#
H_DEFER#
H_TRDY#
H_A#16
CLK_MCH_BCLK#CLK_MCH_BCLK
H_CPUSLP#H_RESET#
H_RCOMPH_SWING
+1.05VS
+1.05VS
H_DSTBN#0
H_DSTBP#0
H_REQ#[0..4]
H_RS#[0..2]
H_A#[3..35]
H_DINV#1 H_DINV#2 H_DINV#3
H_D#[0..63]
CLK_MCH_BCLK CLK_MCH_BCLK#
H_HIT# H_HITM#
H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#1
H_DINV#0
H_DSTBP#2 H_DSTBP#3
H_BPRI#
H_RESET#H_CPUSLP#
H_ADSTB#0 H_ADS#
H_ADSTB#1
H_BR0#
H_BNR#
H_DBSY# H_DEFER#
H_DPWR# H_DRDY#
H_LOCK# H_TRDY#
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (1/7)-GTL
B
7 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (1/7)-GTL
B
7 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (1/7)-GTL
B
7 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Near C5 pin
Layout Note:H_RCOMP / H_VREF / H_SWING
trace width and spacing is 10/20
width=10mil
width:spacing=10mil:20mil (
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_CFG_13
MCH_CFG_20
MCH_CFG_9
MCH_CFG_16
MCH_CFG_12
MCH_CFG_19
MCH_CFG_5
HDMICLK_NB
HDMIDAT_NB
PM_EXTTS#0
PM_EXTTS#1
CL_VREF
SM_VREF
SM_RCOMP_VOL
SM_PWROK
CLK_DREF_SSCCLK_DREF_SSC#
CLK_DREF_96M#CLK_DREF_96M
SM_REXT
SM_RCOMP_VOH
DMI_ITX_MRX_N0
DMI_ITX_MRX_P1DMI_ITX_MRX_P0
DMI_ITX_MRX_P3DMI_ITX_MRX_P2
DMI_MTX_IRX_P1DMI_MTX_IRX_P0
DMI_MTX_IRX_P3DMI_MTX_IRX_P2
DMI_ITX_MRX_N3DMI_ITX_MRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_N1DMI_MTX_IRX_N0
DMI_MTX_IRX_N2
DMI_ITX_MRX_N1
CLK_MCH_3GPLL#CLK_MCH_3GPLL
ICH_PWROK
MCH_CLKREQ#
MCH_TSATN#
GMCH_HDA_BITCLKGMCH_HDA_RST#
GMCH_HDA_SDOUTGMCH_HDA_SYNC
MCH_HDA_SDIN
GMCH_PWROK
ICH_PWROK
VGATE
MCH_CFG_9MCH_CFG_10
MCH_CFG_12MCH_CFG_13
MCH_CFG_19MCH_CFG_20
MCH_CFG_16
MCH_CLKSEL1MCH_CLKSEL2
MCH_CLKSEL0
PM_DPRSTP#_R
MCH_RSTIN#
DPRSLPVR_RTHERMTRIP#_R
PM_EXTTS#0
GMCH_PWROK
PM_BMBUSY#_R
PM_EXTTS#1
MCH_CFG_5
MCH_TSATN#
MCH_CFG_7
HDMICLK_NBHDMIDAT_NB
SMRCOMP#SMRCOMP
SM_RCOMP_VOHSM_RCOMP_VOH
SM_RCOMP_VOL
CLK_DREF_96M#
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_SSC
MCH_CFG_10
MCH_CFG_7
MCH_CFG_6
MCH_CFG_6
H_DPRSTP#
PM_DPRSLPVR_D
+3VS
+3VS
+1.8V
+1.05VS
+1.8V
+1.05VS
+3VS +3VS
+1.8V
DDRA_CLK0 DDRA_CLK1 DDRB_CLK0 DDRB_CLK1
DDRA_CLK0# DDRA_CLK1# DDRB_CLK0# DDRB_CLK1#
DDRA_CKE0 DDRA_CKE1 DDRB_CKE0 DDRB_CKE1
DDRA_SCS0# DDRA_SCS1# DDRB_SCS0# DDRB_SCS1#
DDRA_ODT0
DDRB_ODT0
CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#
DDRA_ODT1
DDRB_ODT1
DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3
DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3
DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3
CLK_MCH_3GPLL CLK_MCH_3GPLL#
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
CL_CLK0 CL_DATA0
MCH_CLKREQ# MCH_ICH_SYNC#
GMCH_HDA_BITCLK GMCH_HDA_RST#
GMCH_HDA_SDOUT GMCH_HDA_SYNC
GMCH_HDA_SDIN2
PM_EXTTS#1
PLT_RST_BUF#
MCH_TSATN#_EC
H_THERMTRIP#
ICH_PWROK
H_DPRSTP#PM_EXTTS#0
PM_BMBUSY#
CL_RST#0
VGATE
MCH_CLKSEL0MCH_CLKSEL1MCH_CLKSEL2
PM_DPRSLPVR_D
HDMICLK_NB HDMIDAT_NB
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic0.4Cantiga (2/7)-DMI/DDR
Custom
8 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic0.4Cantiga (2/7)-DMI/DDR
Custom
8 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic0.4Cantiga (2/7)-DMI/DDR
Custom
8 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
For Cantiga 80 Ohm
20mil
SM_DRAMRST# would beneeded for DDR3 only
Layout Note: SM_VREF tracewidth and spacingis 20/20.
Use VGATE for GMCH_PWROK
SM_PWROK: Pull L for DDR2Driven by platform for DDR3
When ICH9M VCCHDA and VCCSUSHDA tie to 3V, don't stuff these resisters (follow CRB)
Change R from 4.02K to 2.21K following CRBAdd follow CRB
CFG[17:3] have internal pull up
CFG[19:18] have internal pull down Strap Pin Table
1 = AMT Firmware will use TLScipher suite with confidentiality
0 = AMT Firmware will use TLS cipher suite with no confidentialityCFG7
CFG100 = PCIE Loopback Enable1 = Disable* (Default)
CFG[13:12]
1 = Normal Operation0 = Lane Reversal Enable
1 = PCIE/SDVO are operating simu.
CFG19
(Default)
CFG20
CFG9
*
*
10 = All Z Mode Enabled
(Default)
SDVO_CTRLDATA
1 = DMI Lane Reversal Enable*
1 = Dynamic ODT Enabled (Default)
(Default)
00 = Reserved
0 = No SDVO Device Present
*
(Default)
0 = Normal Operation
0 = Only PCIE or SDVO is operational.
0 = Dynamic ODT Disabled
(PCIE/SDVO select)
01 = XOR Mode Enabled
CFG16
1 = SDVO Device Present
11 = Normal Operation
*
* (Default)
000 = 1066MT/s FSB
0 = DMI x 2CFG5 *1 = DMI x 4 (Default)
010 = 800MT/s FSBCFG[2:0]011 = 667MT/s FSB
CFG60 = The ITPM Host Interface is enabled1 = The ITPM Host Interface is disabled
* (Default)
*
10/22 intel recommend 2.21K iTPM spec use 10K
R69 4.02K_0402_1%@R69 4.02K_0402_1%@
R48 10K_0402_1%R48 10K_0402_1%1 2
R65 2.21K_0402_1%@R65 2.21K_0402_1%@1 2
R78 33_0402_5%GM@R78 33_0402_5%GM@1 2
R46 80.6_0402_1%R46 80.6_0402_1%
R55 2.21K_0402_1%@R55 2.21K_0402_1%@1 2
R53 0_0402_5%R53 0_0402_5%1 2
R433.01K_0402_1%R433.01K_0402_1%
R70 4.02K_0402_1%@R70 4.02K_0402_1%@
R52 0_0402_5%@R52 0_0402_5%@1 2
C59
0.01U_0402_16V7K
C59
0.01U_0402_16V7K
R74 10K_0402_5%R74 10K_0402_5%
R73 10K_0402_5%R73 10K_0402_5%
R40 0_0402_5%PM@R40 0_0402_5%PM@1 2
R68
511_0402_1%
R68
511_0402_1%
12
EB
CQ2MMBT3904_SOT23-3@E
B
CQ2MMBT3904_SOT23-3@
2
31
C60
2.2U_0603_6.3V6K
C60
2.2U_0603_6.3V6K
R41 0_0402_5%PM@R41 0_0402_5%PM@1 2
R49
1K_0402_1%
R49
1K_0402_1%
1 2
R81
330_0402_5%
@R81
330_0402_5%
@1 2
R56 2.21K_0402_1%@R56 2.21K_0402_1%@1 2
R80 0_0402_5%@R80 0_0402_5%@1 2
R381K_0402_1%R381K_0402_1%
R42 0_0402_5%PM@R42 0_0402_5%PM@1 2
RSVD
CFG
PM
NC
CLK
DMI
GRAPHICS VID
ME
MISC
DDR CLK/ CONTROL/ COMPENSATION
HDA
U3B
CANTIGA ES_FCBGA1329GM@
RSVD
CFG
PM
NC
CLK
DMI
GRAPHICS VID
ME
MISC
DDR CLK/ CONTROL/ COMPENSATION
HDA
U3B
CANTIGA ES_FCBGA1329GM@
SA_CK_0 AP24SA_CK_1 AT21SB_CK_0 AV24SB_CK_1 AU20
SA_CK#_0 AR24SA_CK#_1 AR21SB_CK#_0 AU24SB_CK#_1 AV20
SA_CKE_0 BC28SA_CKE_1 AY28SB_CKE_0 AY36SB_CKE_1 BB36
SA_CS#_0 BA17SA_CS#_1 AY16SB_CS#_0 AV16SB_CS#_1 AR13
SA_ODT_0 BD17SA_ODT_1 AY17SB_ODT_O BF15SB_ODT_1 AY13
SM_RCOMP BG22SM_RCOMP# BH21
SM_RCOMP_VOH BF28SM_RCOMP_VOL BH28
SM_VREF AV42SM_PWROK AR36
SM_REXT BF17SM_DRAMRST# BC36
DPLL_REF_CLK B38DPLL_REF_CLK# A38
DPLL_REF_SSCLK E41DPLL_REF_SSCLK# F41
PEG_CLK F43PEG_CLK# E43
DMI_RXN_0 AE41DMI_RXN_1 AE37DMI_RXN_2 AE47DMI_RXN_3 AH39
DMI_RXP_0 AE40DMI_RXP_1 AE38DMI_RXP_2 AE48DMI_RXP_3 AH40
DMI_TXN_0 AE35DMI_TXN_1 AE43DMI_TXN_2 AE46DMI_TXN_3 AH42
DMI_TXP_0 AD35DMI_TXP_1 AE44DMI_TXP_2 AF46DMI_TXP_3 AH43
GFX_VID_0 B33GFX_VID_1 B32GFX_VID_2 G33GFX_VID_3 F33GFX_VID_4 E33
GFX_VR_EN C34
CL_CLK AH37CL_DATA AH36
CL_PWROK AN36CL_RST# AJ35CL_VREF AH34
DDPC_CTRLCLK N28DDPC_CTRLDATA M28
SDVO_CTRLCLK G36SDVO_CTRLDATA E36
CLKREQ# K36ICH_SYNC# H36
HDA_BCLK B28HDA_RST# B30
HDA_SDI B29HDA_SDO C29
HDA_SYNC A28
RSVD1M36RSVD2N36RSVD3R33RSVD4T33RSVD5AH9RSVD6AH10RSVD7AH12RSVD8AH13RSVD9K12RSVD10AL34RSVD11AK34RSVD12AN35RSVD13AM35RSVD14T24
RSVD15B31
RSVD17M1
RSVD20AY21
RSVD22BG23RSVD23BF23RSVD24BH18
CFG_0T25CFG_1R25CFG_2P25CFG_3P20CFG_4P24CFG_5C25CFG_6N24CFG_7M24CFG_8E21CFG_9C23CFG_10C24CFG_11N21CFG_12P21CFG_13T21CFG_14R20CFG_15M20CFG_16L21CFG_17H21CFG_18P29CFG_19R28CFG_20T28
PM_SYNC#R29PM_DPRSTP#B7PM_EXT_TS#_0N33PM_EXT_TS#_1P32PWROKAT40RSTIN#AT11THERMTRIP#T20DPRSLPVRR32
NC_1BG48NC_2BF48NC_3BD48NC_4BC48NC_5BH47NC_6BG47NC_7BE47NC_8BH46NC_9BF46NC_10BG45NC_11BH44NC_12BH43NC_13BH6NC_14BH5NC_15BG4NC_16BH3NC_17BF3NC_18BH2NC_19BG2NC_20BE2NC_21BG1NC_22BF1NC_23BD1NC_24BC1NC_25F1
RSVD16B2
RSVD25BF18
NC_26A47
TSATN# B12
C760 470P_0402_50V7KC760 470P_0402_50V7K1 2
C61
0.1U_0402_16V4Z
C61
0.1U_0402_16V4Z
1
2
R57 0_0402_5%R57 0_0402_5%1 2
EB
CQ1MMBT3904_SOT23-3@E
B
CQ1MMBT3904_SOT23-3@
2
31
R59 2.21K_0402_1%@R59 2.21K_0402_1%@1 2
C761 470P_0402_50V7KC761 470P_0402_50V7K1 2
R391K_0402_1%R391K_0402_1%
R37 0_0402_5%PM@R37 0_0402_5%PM@1 2
R62 2.21K_0402_1%@R62 2.21K_0402_1%@1 2
R51
1K_0402_1%
R51
1K_0402_1%
12
R64 0_0402_5%R64 0_0402_5%1 2
R60 2.21K_0402_1%@R60 2.21K_0402_1%@1 2
C57
2.2U_0603_6.3V6K
C57
2.2U_0603_6.3V6K
R58 0_0402_5%R58 0_0402_5%1 2
R61 100_0402_5%R61 100_0402_5%
R66
1K_0402_1%
R66
1K_0402_1%
12
R7654.9_0402_1%R7654.9_0402_1%
12
R721K_0402_5%R721K_0402_5%
12
R67 2.21K_0402_1%@R67 2.21K_0402_1%@1 2
R50 499_0402_1%R50 499_0402_1%1 2
R83 0_0402_5%@R83 0_0402_5%@1 2
C58
0.01U_0402_16V7K
C58
0.01U_0402_16V7K
C62
0.1U_0402_16V4Z
C62
0.1U_0402_16V4Z
1
2
R54 2.21K_0402_1%@R54 2.21K_0402_1%@1 2
R63 0_0402_5%R63 0_0402_5%1 2
R45 80.6_0402_1%R45 80.6_0402_1%
R711K_0402_5%@
R711K_0402_5%@
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDRA_SDQS5
DDRA_SDQS0
DDRA_SDQS4DDRA_SDQS3
DDRA_SDQS7
DDRA_SDQS2
DDRA_SDQS6
DDRA_SDQS1
DDRA_SMA14
DDRB_SMA3
DDRB_SMA7
DDRB_SMA0
DDRB_SMA2
DDRB_SMA10
DDRB_SMA1
DDRB_SMA6DDRB_SMA5
DDRB_SMA12DDRB_SMA11
DDRB_SMA4
DDRB_SMA8DDRB_SMA9
DDRB_SMA13
DDRB_SDM6
DDRB_SDM1
DDRB_SDM5
DDRB_SDM0
DDRB_SDM4DDRB_SDM3
DDRB_SDM7
DDRB_SDM2
DDRA_SDM6DDRA_SDM5
DDRA_SDM0
DDRA_SDM4
DDRA_SDM7
DDRA_SDM1DDRA_SDM2DDRA_SDM3
DDRB_SMA14
DDRB_SDQ2DDRB_SDQ3
DDRB_SDQ0DDRB_SDQ1
DDRB_SDQ7DDRB_SDQ6DDRB_SDQ5DDRB_SDQ4
DDRB_SDQ40DDRB_SDQ41DDRB_SDQ42DDRB_SDQ43DDRB_SDQ44DDRB_SDQ45DDRB_SDQ46DDRB_SDQ47
DDRB_SDQ12
DDRB_SDQ14DDRB_SDQ15
DDRB_SDQ13
DDRB_SDQ8DDRB_SDQ9DDRB_SDQ10DDRB_SDQ11
DDRB_SDQ48DDRB_SDQ49DDRB_SDQ50DDRB_SDQ51DDRB_SDQ52DDRB_SDQ53DDRB_SDQ54DDRB_SDQ55
DDRB_SDQ22DDRB_SDQ21
DDRB_SDQ17DDRB_SDQ18
DDRB_SDQ23
DDRB_SDQ16
DDRB_SDQ19DDRB_SDQ20
DDRB_SDQ56DDRB_SDQ57DDRB_SDQ58DDRB_SDQ59DDRB_SDQ60DDRB_SDQ61DDRB_SDQ62DDRB_SDQ63
DDRB_SDQ27DDRB_SDQ26
DDRB_SDQ29
DDRB_SDQ31DDRB_SDQ30
DDRB_SDQ24DDRB_SDQ25
DDRB_SDQ28
DDRB_SDQ32DDRB_SDQ33DDRB_SDQ34DDRB_SDQ35DDRB_SDQ36DDRB_SDQ37DDRB_SDQ38DDRB_SDQ39
DDRB_SDQ[0..63]
DDRB_SMA[0..14]
DDRB_SDM[0..7]
DDRA_SDQ[0..63]
DDRA_SMA[0..14]
DDRA_SDM[0..7]
DDRB_SDQS5#
DDRB_SDQS0#
DDRB_SDQS4#DDRB_SDQS3#
DDRB_SDQS7#
DDRB_SDQS2#
DDRB_SDQS6#
DDRB_SDQS1#
DDRA_SDQS5#
DDRA_SDQS0#
DDRA_SDQS4#DDRA_SDQS3#
DDRA_SDQS7#
DDRA_SDQS2#
DDRA_SDQS6#
DDRA_SDQS1#
DDRA_SDQ2DDRA_SDQ3
DDRA_SDQ0DDRA_SDQ1
DDRA_SDQ7DDRA_SDQ6DDRA_SDQ5DDRA_SDQ4
DDRA_SDQ40DDRA_SDQ41DDRA_SDQ42DDRA_SDQ43DDRA_SDQ44DDRA_SDQ45DDRA_SDQ46DDRA_SDQ47
DDRA_SDQ12
DDRA_SDQ14DDRA_SDQ15
DDRA_SDQ13
DDRA_SDQ8DDRA_SDQ9DDRA_SDQ10DDRA_SDQ11
DDRA_SDQ48DDRA_SDQ49DDRA_SDQ50DDRA_SDQ51DDRA_SDQ52DDRA_SDQ53DDRA_SDQ54DDRA_SDQ55
DDRA_SDQ22DDRA_SDQ21
DDRA_SDQ17DDRA_SDQ18
DDRA_SDQ23
DDRA_SDQ16
DDRA_SDQ19DDRA_SDQ20
DDRA_SDQ56DDRA_SDQ57DDRA_SDQ58DDRA_SDQ59DDRA_SDQ60DDRA_SDQ61DDRA_SDQ62DDRA_SDQ63
DDRA_SDQ27DDRA_SDQ26
DDRA_SDQ29
DDRA_SDQ31DDRA_SDQ30
DDRA_SDQ24DDRA_SDQ25
DDRA_SDQ28
DDRA_SDQ32DDRA_SDQ33DDRA_SDQ34DDRA_SDQ35DDRA_SDQ36DDRA_SDQ37DDRA_SDQ38
DDRA_SMA3
DDRA_SMA7
DDRA_SMA0
DDRA_SDQ39
DDRA_SMA2
DDRA_SMA10
DDRA_SMA1
DDRA_SMA6DDRA_SMA5
DDRA_SMA12DDRA_SMA11
DDRA_SMA4
DDRA_SMA8DDRA_SMA9
DDRA_SMA13
DDRB_SDQS0
DDRB_SDQS5DDRB_SDQS4DDRB_SDQS3
DDRB_SDQS7
DDRB_SDQS2
DDRB_SDQS6
DDRB_SDQS1
DDRB_SBS0
DDRB_SRAS# DDRB_SCAS# DDRB_SWE#
DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7
DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#
DDRA_SDQ[0..63]
DDRB_SBS1
DDRB_SDQ[0..63]
DDRB_SBS2
DDRA_SDM[0..7]
DDRA_SDQS1
DDRA_SMA[0..14]
DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7
DDRB_SDM[0..7]
DDRB_SMA[0..14]
DDRA_SBS0
DDRA_SDQS1#
DDRA_SRAS#
DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#
DDRA_SCAS# DDRA_SWE#
DDRA_SDQS0
DDRA_SBS1
DDRA_SDQS0#
DDRA_SBS2
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (3/7)-DDRII
B
9 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (3/7)-DDRII
B
9 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (3/7)-DDRII
B
9 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
DDR SYSTEM MEMORY B
U3E
CANTIGA ES_FCBGA1329GM@
DDR SYSTEM MEMORY B
U3E
CANTIGA ES_FCBGA1329GM@
SB_DQ_0AK47SB_DQ_1AH46SB_DQ_2AP47SB_DQ_3AP46SB_DQ_4AJ46SB_DQ_5AJ48SB_DQ_6AM48SB_DQ_7AP48SB_DQ_8AU47SB_DQ_9AU46SB_DQ_10BA48SB_DQ_11AY48SB_DQ_12AT47SB_DQ_13AR47SB_DQ_14BA47SB_DQ_15BC47SB_DQ_16BC46SB_DQ_17BC44SB_DQ_18BG43SB_DQ_19BF43SB_DQ_20BE45SB_DQ_21BC41SB_DQ_22BF40SB_DQ_23BF41SB_DQ_24BG38SB_DQ_25BF38SB_DQ_26BH35SB_DQ_27BG35SB_DQ_28BH40SB_DQ_29BG39SB_DQ_30BG34SB_DQ_31BH34SB_DQ_32BH14SB_DQ_33BG12SB_DQ_34BH11SB_DQ_35BG8SB_DQ_36BH12SB_DQ_37BF11SB_DQ_38BF8SB_DQ_39BG7SB_DQ_40BC5SB_DQ_41BC6SB_DQ_42AY3SB_DQ_43AY1SB_DQ_44BF6SB_DQ_45BF5SB_DQ_46BA1SB_DQ_47BD3SB_DQ_48AV2SB_DQ_49AU3SB_DQ_50AR3SB_DQ_51AN2SB_DQ_52AY2SB_DQ_53AV1SB_DQ_54AP3SB_DQ_55AR1SB_DQ_56AL1SB_DQ_57AL2SB_DQ_58AJ1SB_DQ_59AH1SB_DQ_60AM2SB_DQ_61AM3SB_DQ_62AH3SB_DQ_63AJ3
SB_BS_0 BC16SB_BS_1 BB17SB_BS_2 BB33
SB_RAS# AU17SB_CAS# BG16SB_WE# BF14
SB_DM_0 AM47SB_DM_1 AY47SB_DM_2 BD40SB_DM_3 BF35SB_DM_4 BG11SB_DM_5 BA3SB_DM_6 AP1SB_DM_7 AK2
SB_DQS_0 AL47SB_DQS_1 AV48SB_DQS_2 BG41SB_DQS_3 BG37SB_DQS_4 BH9SB_DQS_5 BB2SB_DQS_6 AU1SB_DQS_7 AN6
SB_DQS#_0 AL46SB_DQS#_1 AV47SB_DQS#_2 BH41SB_DQS#_3 BH37SB_DQS#_4 BG9SB_DQS#_5 BC2SB_DQS#_6 AT2SB_DQS#_7 AN5
SB_MA_0 AV17SB_MA_1 BA25SB_MA_2 BC25SB_MA_3 AU25SB_MA_4 AW25SB_MA_5 BB28SB_MA_6 AU28SB_MA_7 AW28SB_MA_8 AT33SB_MA_9 BD33
SB_MA_10 BB16SB_MA_11 AW33SB_MA_12 AY33SB_MA_13 BH15SB_MA_14 AU33
DDR SYSTEM MEMORY A
U3D
CANTIGA ES_FCBGA1329GM@
DDR SYSTEM MEMORY A
U3D
CANTIGA ES_FCBGA1329GM@
SA_BS_0 BD21SA_BS_1 BG18SA_BS_2 AT25
SA_RAS# BB20SA_CAS# BD20SA_WE# AY20
SA_DM_0 AM37SA_DM_1 AT41SA_DM_2 AY41SA_DM_3 AU39SA_DM_4 BB12SA_DM_5 AY6SA_DM_6 AT7SA_DM_7 AJ5
SA_DQS_0 AJ44SA_DQS_1 AT44SA_DQS_2 BA43SA_DQS_3 BC37SA_DQS_4 AW12SA_DQS_5 BC8SA_DQS_6 AU8SA_DQS_7 AM7
SA_DQS#_0 AJ43SA_DQS#_1 AT43SA_DQS#_2 BA44SA_DQS#_3 BD37SA_DQS#_4 AY12SA_DQS#_5 BD8SA_DQS#_6 AU9SA_DQS#_7 AM8
SA_MA_0 BA21SA_MA_1 BC24SA_MA_2 BG24SA_MA_3 BH24SA_MA_4 BG25SA_MA_5 BA24SA_MA_6 BD24SA_MA_7 BG27SA_MA_8 BF25SA_MA_9 AW24
SA_MA_10 BC21SA_MA_11 BG26SA_MA_12 BH26SA_MA_13 BH17SA_MA_14 AY25
SA_DQ_0AJ38SA_DQ_1AJ41SA_DQ_2AN38SA_DQ_3AM38SA_DQ_4AJ36SA_DQ_5AJ40SA_DQ_6AM44SA_DQ_7AM42SA_DQ_8AN43SA_DQ_9AN44SA_DQ_10AU40SA_DQ_11AT38SA_DQ_12AN41SA_DQ_13AN39SA_DQ_14AU44SA_DQ_15AU42SA_DQ_16AV39SA_DQ_17AY44SA_DQ_18BA40SA_DQ_19BD43SA_DQ_20AV41SA_DQ_21AY43SA_DQ_22BB41SA_DQ_23BC40SA_DQ_24AY37SA_DQ_25BD38SA_DQ_26AV37SA_DQ_27AT36SA_DQ_28AY38SA_DQ_29BB38SA_DQ_30AV36SA_DQ_31AW36SA_DQ_32BD13SA_DQ_33AU11SA_DQ_34BC11SA_DQ_35BA12SA_DQ_36AU13SA_DQ_37AV13SA_DQ_38BD12SA_DQ_39BC12SA_DQ_40BB9SA_DQ_41BA9SA_DQ_42AU10SA_DQ_43AV9SA_DQ_44BA11SA_DQ_45BD9SA_DQ_46AY8SA_DQ_47BA6SA_DQ_48AV5SA_DQ_49AV7SA_DQ_50AT9SA_DQ_51AN8SA_DQ_52AU5SA_DQ_53AU6SA_DQ_54AT5SA_DQ_55AN10SA_DQ_56AM11SA_DQ_57AM5SA_DQ_58AJ9SA_DQ_59AJ8SA_DQ_60AN12SA_DQ_61AM13SA_DQ_62AJ11SA_DQ_63AJ12
hexa
inf@
hotm
ail.co
m
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_IBG
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P13
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P9PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N10PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N12PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N0
TV_DCONSEL_1TV_DCONSEL_0
GMCH_LCD_CLKGMCH_LCD_DATAGMCH_ENVDD
LBKLT_EN
LCTLB_DATALCTLA_CLK
GMCH_TV_COMPSGMCH_TV_LUMA
PEG_COMP
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N14
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N13
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P12
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_P14
GMCH_TZOUT0+
GMCH_TZOUT1-
GMCH_TXOUT1-
GMCH_TZOUT2-
GMCH_TXOUT2-
GMCH_TZOUT1+
GMCH_TXOUT0+
GMCH_TZOUT2+
GMCH_TXOUT2+
GMCH_TXOUT0-
GMCH_TXOUT1+
GMCH_TZOUT0-
GMCH_TXCLK-GMCH_TXCLK+
GMCH_TZCLK-GMCH_TZCLK+
CRT_HSYNC
CRT_VSYNC
CRT_IREF
GMCH_CRT_CLKGMCH_CRT_DATA
GMCH_TV_CRMA
PCIE_GTX_C_MRX_P3
GMCH_CRT_CLK
GMCH_CRT_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
TV_DCONSEL_0
TV_DCONSEL_1
LCTLB_DATA
LCTLA_CLK
GMCH_LCD_CLK
GMCH_LCD_DATA
LCTLB_DATA
LCTLA_CLKGMCH_HDA_BITCLKHDA_BITCLK_NBGMCH_HDA_RST#HDA_RST_NB#
HDA_SDOUT_NBHDA_SYNC_NBHDA_SDIN2
GMCH_HDA_SDOUTGMCH_HDA_SYNCGMCH_HDA_SDIN2
HDA_BITCLK_NB GMCH_HDA_BITCLK
HDA_SDIN2 GMCH_HDA_SDIN2
HDA_RST_NB#HDA_SDOUT_NBHDA_SYNC_NB
GMCH_HDA_RST#GMCH_HDA_SDOUTGMCH_HDA_SYNC
+1.05VS_PEG
+3VS
+1.5VS+3.3VS
+1.5VS
GMCH_LCD_CLKGMCH_LCD_DATA
GMCH_ENVDD
GMCH_ENBKL
GMCH_TZCLK-GMCH_TZCLK+GMCH_TXCLK-GMCH_TXCLK+
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_R
GMCH_CRT_CLK
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
GMCH_CRT_DATA
TMDS_B_HPD#
GMCH_TZOUT0-GMCH_TZOUT1-GMCH_TZOUT2-
GMCH_TZOUT0+GMCH_TZOUT1+GMCH_TZOUT2+
GMCH_TXOUT1+GMCH_TXOUT0+
GMCH_TXOUT2+
GMCH_TXOUT0-GMCH_TXOUT1-GMCH_TXOUT2-
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3
HDA_BITCLK_NBHDA_RST_NB#HDA_SDOUT_NBHDA_SYNC_NBHDA_SDIN2
GMCH_HDA_BITCLK GMCH_HDA_RST# GMCH_HDA_SDOUT GMCH_HDA_SYNC GMCH_HDA_SDIN2
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (4/7)-VGA/LVDS/TV
Custom
10 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (4/7)-VGA/LVDS/TV
Custom
10 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga (4/7)-VGA/LVDS/TV
Custom
10 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Conntc to 0 Ohm when use PM chip
20/25mils R492 Close to GMCH < 0.5'
10/22 follow CRB and Checklistrecommend use 30 Ohm (SD028300A80)
Change to @ state
NB Ext VGA
CH7318
Routing notice:
Common design recommend H/VSYNC width=8 mil
R
Reserved for 1.5V level shift circuit
U67 pn is SA00002CT00 for 030 used
C70 0.1U_0402_10V7KPM@C70 0.1U_0402_10V7KPM@1 2
R102 0_0402_5%PM@R102 0_0402_5%PM@1 2
C92 0.1U_0402_10V7KPM@C92 0.1U_0402_10V7KPM@1 2
C74 0.1U_0402_10V7KPM@C74 0.1U_0402_10V7KPM@1 2
C90 0.1U_0402_10V7KPM@C90 0.1U_0402_10V7KPM@1 2
R106 0_0402_5%PM@R106 0_0402_5%PM@1 2
C81 0.1U_0402_10V7KC81 0.1U_0402_10V7K1 2
R92
0_0402_5%PM@
R92
0_0402_5%PM@
R98
1.02K_0402_1%
R98
1.02K_0402_1%
12
C94 0.1U_0402_10V7KPM@C94 0.1U_0402_10V7KPM@1 2
C79 0.1U_0402_10V7KPM@C79 0.1U_0402_10V7KPM@1 2
R104 0_0402_5%PM@R104 0_0402_5%PM@1 2R103 2.2K_0402_5%GM@R103 2.2K_0402_5%GM@1 2
C64 0.1U_0402_10V7KC64 0.1U_0402_10V7K1 2
R90 150_0402_1%R90 150_0402_1%1 2
C83 0.1U_0402_10V7KC83 0.1U_0402_10V7K1 2
C76 0.1U_0402_10V7KPM@C76 0.1U_0402_10V7KPM@1 2
R109 0_0402_5%R109 0_0402_5%1 2
R101 2.2K_0402_5%GM@R101 2.2K_0402_5%GM@1 2
U67
FXL2SD106BQX_DQFN16_2P5X3P5~D@
U67
FXL2SD106BQX_DQFN16_2P5X3P5~D@
VCCA 1
CMD_B14CLK_IN 2CMD_A 3
A0 4A1 5
B013B112B211B310
A2 6
GND9 OE 8A3 7
CLK_OUT15VCCB16
C78 0.1U_0402_10V7KPM@C78 0.1U_0402_10V7KPM@1 2
R78710K_0402_5%
R78710K_0402_5% 1 2
C80 0.1U_0402_10V7KC80 0.1U_0402_10V7K1 2
R85 49.9_0402_1%R85 49.9_0402_1%1 2
C65 0.1U_0402_10V7KC65 0.1U_0402_10V7K1 2
R110 0_0402_5%R110 0_0402_5%1 2
C67 0.1U_0402_10V7KC67 0.1U_0402_10V7K1 2
C69 0.1U_0402_10V7KPM@C69 0.1U_0402_10V7KPM@1 2
C85 0.1U_0402_10V7KPM@C85 0.1U_0402_10V7KPM@1 2
R100 0_0402_5%PM@R100 0_0402_5%PM@1 2
R105 10K_0402_5%GM@R105 10K_0402_5%GM@1 2
C748
0.1U_0402_16V4Z@
C748
0.1U_0402_16V4Z@
1
2
R87 0_0402_5%GM@R87 0_0402_5%GM@
1 2
R7860_0402_5%R7860_0402_5%
1 2
C87 0.1U_0402_10V7KPM@C87 0.1U_0402_10V7KPM@1 2
R86 2.37K_0402_1%GM@R86 2.37K_0402_1%GM@1 2
C89 0.1U_0402_10V7KPM@C89 0.1U_0402_10V7KPM@1 2
C82 0.1U_0402_10V7KC82 0.1U_0402_10V7K1 2
RP60
0_0804_8P4R_5%
RP60
0_0804_8P4R_5%
18273645
R84 0_0402_5%GM@R84 0_0402_5%GM@1 2
C66 0.1U_0402_10V7KC66 0.1U_0402_10V7K1 2
R91
0_0402_5%PM@
R91
0_0402_5%PM@
C84 0.1U_0402_10V7KPM@C84 0.1U_0402_10V7KPM@1 2
C71 0.1U_0402_10V7KPM@C71 0.1U_0402_10V7KPM@1 2
C63 100P_0402_50V8J@C63 100P_0402_50V8J@1 2
R93 150_0402_1%GM@R93 150_0402_1%GM@12
R107 10K_0402_5%GM@R107 10K_0402_5%GM@1 2
R89 150_0402_1%R89 150_0402_1%1 2
C75 0.1U_0402_10V7KPM@C75 0.1U_0402_10V7KPM@1 2
C73 0.1U_0402_10V7KPM@C73 0.1U_0402_10V7KPM@1 2
C96
100P
_040
2_50
V8J
@C96
100P
_040
2_50
V8J
@
1
2
R93
0_0402_5%PM@
R93
0_0402_5%PM@
C91 0.1U_0402_10V7KPM@C91 0.1U_0402_10V7KPM@1 2
R92 150_0402_1%GM@R92 150_0402_1%GM@12
R9530_0402_5%GM@
R9530_0402_5%GM@
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
U3C
CANTIGA ES_FCBGA1329GM@
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
U3C
CANTIGA ES_FCBGA1329GM@
PEG_COMPI T37PEG_COMPO T36
PEG_RX#_0 H44PEG_RX#_1 J46PEG_RX#_2 L44PEG_RX#_3 L40PEG_RX#_4 N41PEG_RX#_5 P48PEG_RX#_6 N44PEG_RX#_7 T43PEG_RX#_8 U43PEG_RX#_9 Y43
PEG_RX#_10 Y48PEG_RX#_11 Y36PEG_RX#_12 AA43PEG_RX#_13 AD37PEG_RX#_14 AC47PEG_RX#_15 AD39
PEG_RX_0 H43PEG_RX_1 J44PEG_RX_2 L43PEG_RX_3 L41PEG_RX_4 N40PEG_RX_5 P47PEG_RX_6 N43PEG_RX_7 T42PEG_RX_8 U42PEG_RX_9 Y42
PEG_RX_10 W47PEG_RX_11 Y37PEG_RX_12 AA42PEG_RX_13 AD36PEG_RX_14 AC48PEG_RX_15 AD40
PEG_TX#_0 J41PEG_TX#_1 M46PEG_TX#_2 M47PEG_TX#_3 M40PEG_TX#_4 M42PEG_TX#_5 R48PEG_TX#_6 N38PEG_TX#_7 T40PEG_TX#_8 U37PEG_TX#_9 U40
PEG_TX#_10 Y40PEG_TX#_11 AA46PEG_TX#_12 AA37PEG_TX#_13 AA40PEG_TX#_14 AD43PEG_TX#_15 AC46
PEG_TX_0 J42PEG_TX_1 L46PEG_TX_2 M48PEG_TX_3 M39PEG_TX_4 M43PEG_TX_5 R47PEG_TX_6 N37PEG_TX_7 T39PEG_TX_8 U36PEG_TX_9 U39
PEG_TX_10 Y39PEG_TX_11 Y46PEG_TX_12 AA36PEG_TX_13 AA39PEG_TX_14 AD42PEG_TX_15 AD46
L_BKLT_CTRLL32L_BKLT_ENG32L_CTRL_CLKM32L_CTRL_DATAM33L_DDC_CLKK33L_DDC_DATAJ33L_VDD_ENM29
LVDS_IBGC44LVDS_VBGB43LVDS_VREFHE37LVDS_VREFLE38
LVDSA_CLK#C41LVDSA_CLKC40LVDSB_CLK#B37LVDSB_CLKA37
LVDSA_DATA#_0H47LVDSA_DATA#_1E46LVDSA_DATA#_2G40LVDSA_DATA#_3A40
LVDSA_DATA_0H48LVDSA_DATA_1D45LVDSA_DATA_2F40LVDSA_DATA_3B40
LVDSB_DATA#_0A41LVDSB_DATA#_1H38LVDSB_DATA#_2G37LVDSB_DATA#_3J37
LVDSB_DATA_0B42LVDSB_DATA_1G38LVDSB_DATA_2F37LVDSB_DATA_3K37
TVA_DACF25TVB_DACH25TVC_DACK25
TV_RTNH24
TV_DCONSEL_0C31TV_DCONSEL_1E32
CRT_BLUEE28
CRT_GREENG28
CRT_REDJ28
CRT_IRTNG29
CRT_DDC_CLKH32CRT_DDC_DATAJ32CRT_HSYNCJ29CRT_TVO_IREFE29
CRT_VSYNCL29
C86 0.1U_0402_10V7KPM@C86 0.1U_0402_10V7KPM@1 2
C68 0.1U_0402_10V7KPM@C68 0.1U_0402_10V7KPM@1 2
R88 150_0402_1%R88 150_0402_1%1 2
R108 0_0402_5%PM@R108 0_0402_5%PM@1 2
R91 150_0402_1%GM@R91 150_0402_1%GM@12
C95 0.1U_0402_10V7KPM@C95 0.1U_0402_10V7KPM@1 2
R9430_0402_5%GM@
R9430_0402_5%GM@
C97
100P
_040
2_50
V8J
@C97
100P
_040
2_50
V8J
@
1
2
C88 0.1U_0402_10V7KPM@C88 0.1U_0402_10V7KPM@1 2
C93 0.1U_0402_10V7KPM@C93 0.1U_0402_10V7KPM@1 2
R99 0_0402_5%PM@R99 0_0402_5%PM@1 2 C747
0.1U_0402_16V4Z@
C747
0.1U_0402_16V4Z@
1
2
C72 0.1U_0402_10V7KPM@C72 0.1U_0402_10V7KPM@1 2
C77 0.1U_0402_10V7KPM@C77 0.1U_0402_10V7KPM@1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF4
VCCSM_LF7
VCCSM_LF2
VCCSM_LF5
VCCSM_LF3
VCCSM_LF6
VCCSM_LF1
+VCC_AXG
+1.05VS
+1.05VS
+1.8V
+VCC_AXG
+1.05VS
+1.8V
+VCC_AXG
+1.05VS +VCC_AXG
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga GMCH(5/7)-GTL
Custom
11 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga GMCH(5/7)-GTL
Custom
11 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga GMCH(5/7)-GTL
Custom
11 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
VCC_SM: 3300mA(330UF*1,22UF*2, 0.1UF*1) 9/14 add for reservation
(IFTXX)
VCC: 2898.52mA(220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)
VCC_AXG: 8700mA(330UF*2,22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
Remember open stencil at GM@10/05 This is for GM@ (IFTXX)
Checklist 220u ESR max 15m ohm330u ESR max 12m ohm
330u ESR 15m ohm Package(L*W*H)7.3*4.3*1.8Rating 2.5V
330u ESR 15m ohm Package(L*W*H)7.3*4.3*1.8Rating 2.5V
220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9Rating 4V
1/25 Change J5, J6, J7 from 43x79 to 43x39
Add these caps around PCI-E bus of NB
C110
0.1U_0402_16V4Z
C110
0.1U_0402_16V4Z
1
2
C125
0.1U_0402_16V4ZGM@
C125
0.1U_0402_16V4ZGM@
1
2
C116
0.1U_0402_16V4Z@
C116
0.1U_0402_16V4Z@
1
2
J6 JOPENGM@J6 JOPENGM@12
C108
0.22U_0603_16V7K
C108
0.22U_0603_16V7K
R114
0_0805_5%PM@
R114
0_0805_5%PM@
C763
0.1U_0402_16V4Z
C763
0.1U_0402_16V4Z
1
2
C122
1U_0603_10V4ZGM@
C122
1U_0603_10V4ZGM@
C128
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1
2
C112
22U_0805_6.3V6M@
C112
22U_0805_6.3V6M@
1
2
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
C123
0.47U_0603_16V4ZGM@
C123
0.47U_0603_16V4ZGM@
C117
1U_0603_10V4Z@
C117
1U_0603_10V4Z@
C114
4.7U_0805_10V4Z
C114
4.7U_0805_10V4Z
C115
1U_0603_10V4Z
C115
1U_0603_10V4Z
J5 JOPENGM@J5 JOPENGM@12
+C111
330U_D2E_2.5VM
+C111
330U_D2E_2.5VM
1
2
T23 PAD @T23 PAD @
C120
10U_0805_10V4ZGM@
C120
10U_0805_10V4ZGM@
1
2POW
ER
VCC SMVCC GFX
VCC
GFX
NCT
FVC
C SM
LF
U3F
CANTIGA ES_FCBGA1329GM@
POWE
R
VCC SMVCC GFX
VCC
GFX
NCT
FVC
C SM
LF
U3F
CANTIGA ES_FCBGA1329GM@
VCC_AXG_NTCF_1 W28VCC_AXG_NCTF_2 V28VCC_AXG_NCTF_3 W26VCC_AXG_NCTF_4 V26VCC_AXG_NCTF_5 W25VCC_AXG_NCTF_6 V25VCC_AXG_NCTF_7 W24VCC_AXG_NCTF_8 V24VCC_AXG_NCTF_9 W23
VCC_AXG_NCTF_10 V23VCC_AXG_NCTF_11 AM21VCC_AXG_NCTF_12 AL21VCC_AXG_NCTF_13 AK21VCC_AXG_NCTF_14 W21VCC_AXG_NCTF_15 V21VCC_AXG_NCTF_16 U21VCC_AXG_NCTF_17 AM20VCC_AXG_NCTF_18 AK20VCC_AXG_NCTF_19 W20VCC_AXG_NCTF_20 U20VCC_AXG_NCTF_21 AM19VCC_AXG_NCTF_22 AL19VCC_AXG_NCTF_23 AK19VCC_AXG_NCTF_24 AJ19VCC_AXG_NCTF_25 AH19VCC_AXG_NCTF_26 AG19VCC_AXG_NCTF_27 AF19VCC_AXG_NCTF_28 AE19VCC_AXG_NCTF_29 AB19VCC_AXG_NCTF_30 AA19VCC_AXG_NCTF_31 Y19VCC_AXG_NCTF_32 W19VCC_AXG_NCTF_33 V19VCC_AXG_NCTF_34 U19VCC_AXG_NCTF_35 AM17VCC_AXG_NCTF_36 AK17VCC_AXG_NCTF_37 AH17VCC_AXG_NCTF_38 AG17VCC_AXG_NCTF_39 AF17VCC_AXG_NCTF_40 AE17VCC_AXG_NCTF_41 AC17VCC_AXG_NCTF_42 AB17VCC_AXG_NCTF_43 Y17VCC_AXG_NCTF_44 W17VCC_AXG_NCTF_45 V17VCC_AXG_NCTF_46 AM16VCC_AXG_NCTF_47 AL16VCC_AXG_NCTF_48 AK16VCC_AXG_NCTF_49 AJ16VCC_AXG_NCTF_50 AH16VCC_AXG_NCTF_51 AG16VCC_AXG_NCTF_52 AF16VCC_AXG_NCTF_53 AE16VCC_AXG_NCTF_54 AC16VCC_AXG_NCTF_55 AB16VCC_AXG_NCTF_56 AA16VCC_AXG_NCTF_57 Y16VCC_AXG_NCTF_58 W16VCC_AXG_NCTF_59 V16VCC_AXG_NCTF_60 U16
VCC_SM_LF1 AV44VCC_SM_LF2 BA37VCC_SM_LF3 AM40VCC_SM_LF4 AV21VCC_SM_LF5 AY5VCC_SM_LF6 AM10VCC_SM_LF7 BB13
VCC_SM_1AP33VCC_SM_2AN33VCC_SM_3BH32VCC_SM_4BG32VCC_SM_5BF32VCC_SM_6BD32VCC_SM_7BC32VCC_SM_8BB32VCC_SM_9BA32VCC_SM_10AY32VCC_SM_11AW32VCC_SM_12AV32VCC_SM_13AU32VCC_SM_14AT32VCC_SM_15AR32VCC_SM_16AP32VCC_SM_17AN32VCC_SM_18BH31VCC_SM_19BG31VCC_SM_20BF31VCC_SM_21BG30VCC_SM_22BH29VCC_SM_23BG29VCC_SM_24BF29VCC_SM_25BD29VCC_SM_26BC29VCC_SM_27BB29VCC_SM_28BA29VCC_SM_29AY29VCC_SM_30AW29VCC_SM_31AV29VCC_SM_32AU29VCC_SM_33AT29VCC_SM_34AR29VCC_SM_35AP29
VCC_SM_36/NCBA36VCC_SM_37/NCBB24VCC_SM_38/NCBD16VCC_SM_39/NCBB21VCC_SM_40/NCAW16VCC_SM_41/NCAW13VCC_SM_42/NCAT13
VCC_AXG_1Y26VCC_AXG_2AE25VCC_AXG_3AB25VCC_AXG_4AA25VCC_AXG_5AE24VCC_AXG_6AC24VCC_AXG_7AA24VCC_AXG_8Y24VCC_AXG_9AE23VCC_AXG_10AC23VCC_AXG_11AB23VCC_AXG_12AA23VCC_AXG_13AJ21VCC_AXG_14AG21VCC_AXG_15AE21VCC_AXG_16AC21VCC_AXG_17AA21VCC_AXG_18Y21VCC_AXG_19AH20VCC_AXG_20AF20VCC_AXG_21AE20VCC_AXG_22AC20VCC_AXG_23AB20VCC_AXG_24AA20VCC_AXG_25T17VCC_AXG_26T16VCC_AXG_27AM15VCC_AXG_28AL15VCC_AXG_29AE15VCC_AXG_30AJ15VCC_AXG_31AH15VCC_AXG_32AG15VCC_AXG_33AF15VCC_AXG_34AB15VCC_AXG_35AA15VCC_AXG_36Y15VCC_AXG_37V15VCC_AXG_38U15VCC_AXG_39AN14VCC_AXG_40AM14VCC_AXG_41U14VCC_AXG_42T14
VCC_AXG_SENSEAJ14VSS_AXG_SENSEAH14
C765
0.1U_0402_16V4Z
C765
0.1U_0402_16V4Z
1
2
C124
0.1U_0402_16V4ZGM@
C124
0.1U_0402_16V4ZGM@
1
2
C113
10U_0805_10V4Z
C113
10U_0805_10V4Z
1
2
C121
10U_0805_10V4ZGM@
C121
10U_0805_10V4ZGM@
1
2
C107
10U_0805_10V4Z
C107
10U_0805_10V4Z
1
2
C109
0.22U_0603_16V7K
C109
0.22U_0603_16V7K
C130
0.22U_0402_6.3V6K
C130
0.22U_0402_6.3V6K
1
2
C766
0.1U_0402_16V4Z
C766
0.1U_0402_16V4Z
1
2
C132
1U_0603_10V4Z
C132
1U_0603_10V4Z
+C106
220U_D2_4VM_R15
+C106
220U_D2_4VM_R15
1
2
C129
0.22U_0402_6.3V6K
C129
0.22U_0402_6.3V6K
1
2
C767
0.1U_0402_16V4Z
C767
0.1U_0402_16V4Z
1
2
C131
0.47U_0603_16V4Z
C131
0.47U_0603_16V4Z
C764
0.1U_0402_16V4Z
C764
0.1U_0402_16V4Z
1
2
C126
1U_0603_10V4Z@
C126
1U_0603_10V4Z@
+C119
330U_D2E_2.5VMGM@
+C119
330U_D2E_2.5VMGM@
1
2
POWER
VCC CORE
VCC
NCT
F
U3G
CANTIGA ES_FCBGA1329GM@
POWER
VCC CORE
VCC
NCT
F
U3G
CANTIGA ES_FCBGA1329GM@
VCC_1AG34VCC_2AC34VCC_3AB34VCC_4AA34VCC_5Y34VCC_6V34VCC_7U34VCC_8AM33VCC_9AK33VCC_10AJ33VCC_11AG33VCC_12AF33
VCC_13AE33VCC_14AC33VCC_15AA33VCC_16Y33VCC_17W33VCC_18V33VCC_19U33VCC_20AH28VCC_21AF28VCC_22AC28VCC_23AA28VCC_24AJ26VCC_25AG26VCC_26AE26VCC_27AC26VCC_28AH25VCC_29AG25VCC_30AF25VCC_31AG24VCC_32AJ23VCC_33AH23VCC_34AF23VCC_35T32
VCC_NCTF_1 AM32VCC_NCTF_2 AL32VCC_NCTF_3 AK32VCC_NCTF_4 AJ32VCC_NCTF_5 AH32VCC_NCTF_6 AG32VCC_NCTF_7 AE32VCC_NCTF_8 AC32VCC_NCTF_9 AA32
VCC_NCTF_10 Y32VCC_NCTF_11 W32VCC_NCTF_12 U32VCC_NCTF_13 AM30VCC_NCTF_14 AL30VCC_NCTF_15 AK30VCC_NCTF_16 AH30VCC_NCTF_17 AG30VCC_NCTF_18 AF30VCC_NCTF_19 AE30VCC_NCTF_20 AC30VCC_NCTF_21 AB30VCC_NCTF_22 AA30VCC_NCTF_23 Y30VCC_NCTF_24 W30VCC_NCTF_25 V30VCC_NCTF_26 U30VCC_NCTF_27 AL29VCC_NCTF_28 AK29VCC_NCTF_29 AJ29VCC_NCTF_30 AH29VCC_NCTF_31 AG29VCC_NCTF_32 AE29VCC_NCTF_33 AC29VCC_NCTF_34 AA29VCC_NCTF_35 Y29VCC_NCTF_36 W29VCC_NCTF_37 V29VCC_NCTF_38 AL28VCC_NCTF_39 AK28VCC_NCTF_40 AL26VCC_NCTF_41 AK26VCC_NCTF_42 AK25VCC_NCTF_43 AK24VCC_NCTF_44 AK23
C133
1U_0603_10V4Z
C133
1U_0603_10V4Z
J7 JOPENGM@J7 JOPENGM@12
+C118
330U_D2E_2.5VMGM@
+C118
330U_D2E_2.5VMGM@
1
2
T22 PAD @T22 PAD @
J1
PAD-OPEN 3x3mGM@
J1
PAD-OPEN 3x3mGM@
1 2
hexa
inf@
hotm
ail.co
m
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_A_PEGPLL
+1.05VS_A_PEGPLLVTTLF_CAP1
VTTLF_CAP3VTTLF_CAP2
+1.8V_LVDS
+1.5VS_LDO
+1.05VS_AXF
+1.05VS
+1.8V_SM_CK
+1.8V
+3VS_CRTDAC
+1.05VS
+1.05VS_A_SM_CK
+1.05VS
+1.05VS
+1.8V_TX_LVDS
+1.05VS_DPLLA
+1.05VS_DPLLB
+1.05VS_HPLL
+1.05VS
+1.05VS_DPLLA
+1.05VS_DPLLB
+1.05VS_HPLL
+1.05VS_MPLL
+1.05VS
+1.8V
+3VS_CRTDAC
+3VS_DACBG
+3VS_DACBG
+1.05VS
+1.05VS_PEG
+1.05VS
+1.05VS +3VS
+3VS
+1.8V
+1.8V_TX_LVDS
+1.05VS_MPLL
+1.5VS
+VCCA_PEG_BG
+1.05VS_A_SM
+3VS_TV_CRT_DAC
+1.5VS_QDAC
+1.05VS
+1.5VS
+1.5VS_QDAC
+1.5VS_TVDAC
+1.5VS
+1.5VS_TVDAC
+3VS_TV_CRT_DAC
+3VS_TV_CRT_DAC
+3VS_TV_CRT_DAC
+1.05VS_DMI
+1.05VS_PEG
+1.5VS
+1.5VS_HDA
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga GMCH(6/7)-GTL
Custom
12 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JHXXX M/B LA-4241P Schematic 0.4Cantiga GMCH(6/7)-GTL
Custom
12 49Tuesday, June 03, 2008
2007/08/18 2008/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
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