1 data-converter circuits a/d and d/a chapter 9 1

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Data-Converter CircuitsA/D and D/AChapter 9

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Analog Signals every where Examples of A/D

• Microphones - take your voice varying pressure waves in the air and convert them into varying electrical signals

• Seat Belt-• Thermocouple – temperature measuring device converts thermal

energy to electric energy

• Voltmeters

• Digital Multimeters

• ADSL

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Figure 9.36 The process of periodically sampling an analog signal. (a) Sample-and-hold (S/H) circuit. The switch closes for a small part ( seconds) of every clock period (T). (b) Input signal waveform. (c) Sampling signal (control signal for the switch). (d) Output signal (to be fed to A/D converter).

Need to Sample an analog signalThen convert to digital by A/D converter

Most signals are analog

Are sensor outputs Analog ?Eg. Seatbelt ? EEG, oil temp

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Figure 9.37 The A/D and D/A converters as circuit blocks.

A/D converter and D/A Converters

Analog to Digital Digital to Analog

What parts of your iPhone operation are Analog ? / Digital

Your internet access: Analog ?Digital ?

A/D converter

Converts analog signals into binary words

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Figure 9.38 The analog samples at the output of a D/A converter are usually fed to a sample-and-hold circuit to obtain the staircase waveform shown. This waveform can then be filtered to obtain the smooth waveform, shown in color. The time delay usually introduced by the filter is not shown.

D/A ConversionNormal Output from digital domain is staircase Filtered to produce smooth Analog output

Conversion accuracy: eg 2-bits

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Blue line ?

Red ?

• Analog is continuous

• But digital is discrete

• Limited by number of bits

3-bit conversion example

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Each binary representation is a “range”

Quantization levels

Eg 5V divided into 8 levels – each 0.625

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Figure 2.10 A weighted summer.

D/A conversion implementationWeighted Summing Circuit

vo = - [(Rf / R1) * v1 + (Rf / R2) * v2 +….+ (Rf / Rn) * vn]

in = ?i = ?

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Figure 9.39 An N-bit D/A converter using a binary-weighted resistive ladder network.

N-bit D/A Converter Implementation Binary weighted resistive ladder

digital values control switches S1 - Sn

Analog Digital Conversion 2-Step Process:

• Quantizing - breaking down analog value to set of finite states

• Encoding - assigning a digital word or number to each state

Step 1: QuantizingExample: a 3 bit A/D , N=23=8 (no. of steps)

0-10V signals. Separated into discrete states with 1.25V increments.

Analog quantization size:

Q=(Vmax-Vmin)/N = (10V – 0V)/8 = 1.25V

Output States

Discrete Voltage Ranges (V)

0 0.00-1.25

1 1.25-2.50

2 2.50-3.75

3 3.75-5.00

4 5.00-6.25

5 6.25-7.50

6 7.50-8.75

7 8.75-10.0

Encodinggive value to each state

Output States

Output Binary Equivalent

0 000

1 001

2 010

3 011

4 100

5 101

6 110

7 111

Accuracy of A/D Conversion

two ways to improve accuracy:

• Increase resolution: improves accuracy in measuring analog signal amplitude

• Increase sampling rate: increases max frequency that can be measured. Eg high pitch audio

A/D Converter Types

– Flash ADC– Delta-Sigma ADC– Dual Slope (integrating) ADC– Successive Approximation ADC

ADC Resolution Comparison

0 5 10 15 20 25

Sigma-Delta

Successive Approx

Flash

Dual Slope

Resolution (Bits)

Type Speed (relative) Cost (relative)

Dual Slope Slow Med

Flash Very Fast High

Successive Appox Medium – Fast Low

Sigma-Delta Slow Low

ADC Types ComparisonADC Types Comparison

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Figure 9.43 A simple feedback-type A/D converter.

Analog to Digital ConverterSimple, Cheap but slow : (SAR)Increment counter D/A compare

DIGITAL

ANALOG

PIC microcontroller A/D10-bit resolution

controlled by program. registers

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If 0-5V rangeWhat is pic resolutionWhat is 3.65V In digital domain ?

8 Analog channels

Flash ADC

• series of comparators, each one compares input to a unique reference voltage.

• comparator outputs connect to a priority encoder circuit produces binary output

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Figure 9.45 Parallel, simultaneous, or flash A/D conversion.

Flash Analog to Digital ConverterFast – but more expensive :Single cycle - Uses many Comparators in parallel with different reference voltages

AnalogDigital

• 2N-1 comparators for N-bits• Each reference voltage

equivalent to a quantization level

• Encoding logic produces word

How Flash Works

• As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state.

• The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.

Flash

Advantages• Simplest in terms of

operational theory

• Most efficient in terms of speed, very fast

• limited only in terms of comparator and gate propagation delays

Disadvantages

• Lower resolution• Expensive• For each additional output

bit, the number of comparators is doubled

• i.e. for 8 bits, 256 comparators needed

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Figure 9.46 Charge-redistribution A/D converter suitable for CMOS implementation: (a) sample phase, (b) hold phase, and (c) charge-redistribution phase.

A / D Converter – CMOS ImplementationCharge-redistribution A/D

FYI