©alex doboli 2006 analog to digital converters alex doboli, ph.d. department of electrical and...
TRANSCRIPT
©Alex Doboli 2006
Analog to Digital Converters
Alex Doboli, Ph.D.
Department of Electrical and Computer Engineering
State University of New York at Stony Brook
Email: [email protected]
©Alex Doboli 2006
ADC
The chapter introduces the following aspects:
• Basic concepts of ADC & 1sr and 2nd order ADCs
• ADC are main subsystems in any embedded system
ADC offer high resolution through two mechanisms:– Oversampling: reduces in-band quantization noise– Noiseshaping: eliminates in-band quantization noise
• PSoC implementation of ADC: modulator, decimator, API
©Alex Doboli 2006
Nyquist ADCs
Embedded system front end:
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Sampling
• Collect sufficient data for correctly representing a continuous-time signal
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Nyquist Sampling Theorem
• A bandlimited signal can be exactly reconstructed if the samplingFrequency is greater than twice the signal bandwidth
• Nyquist frequency is twice the signal bandwidth
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Sampling
aliasing
Xs(f) = X(f) + X(f+/-fs) + X(f+/-2fs) + X(f+/-3fs) + X(f+/-4fs) + …
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Quantization
• Quantization is the process of converting the sampled continuous-Valued signals into discrete-valued data
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Quantization
• Discretization range: = 2 / (2B - 1)
• Quantization error:er ε (-/2, /2)
White noise
xd = xs + er
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Quantization Error
• Bennett’s conditions:• Input does not overload quantizer• B is large• is small• Joint probability density function of the input at
various sampling moments is smooth
• Quantization error is white noise & is uncorrelated to the input
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Quantization Error
• Quantization noise power
• Power spectral density
2e = 2 / 12
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Analog to Digital Converter
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Oversampling
• Oversampling frequency• Oversampling Ratio (OSR)
• Advantages of high OSR:• simplifies elimination of the images• reduced in-band noise power
Pin-band = 2e / OSR
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Noiseshaping
Y(z) = H(z) / (1 + H(z)) X(z) + 1 / (1 + H(z)) E(z)
STF NTF
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ADC Performance
• Signal-to-noise ratio (SNR):
SNR (dB) = 10 log (signal power) / (in band quantization noise power)
– For sinusoidal input:SNR (dB) = 6.02 B + 1.76 (dB)
SNR (dB) = 6.02 B + 10 log OSR
• Dynamic range (DR):– Ratio between the output power for a sinusoidal input with full-
range amplitude and the output power of the smallest input signal that it can distinguish and quantize
DR (dB) = 10 log (2 / 8) / (in band quantization noise power)B (bits) = (DR (dB) – 1.76) / 6.02
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First-order Modulator
yd(t) = z-1 x(t) + (1 – z-1) e(t)
STF = z-1
NTF = 1 – z-1
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First-order Modulator: STF & NTF
STF
NTF
High pass
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Power Spectrum Density
Frequency of the input signal
noise shaping
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Modulator Performance
• Signal to noise ratio for sinusoidal input:
• In-band quantization noise power:
Pin-band = 2 / (9 OSR3)
SNR = 10 log (9 A2 OSR3) / (2 2)
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Dynamic Range
34 dB (5 bits)
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Dynamic Range vs. OSR
DR=34db (OSR=32)DR=38dB (OSR=64)
DR=42dB (OSR=128)DR=50dB (OSR=256)
(8 bits)
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PSoC Implementation
Vin (-Vref, Vref)Vref {VDD/2, 1.6 Vbandgap, Vexternal}OSR = 64Vin = (n – 128) / 128 Vref
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PSoC Implementation
modulator– Uses programmable SC blocks
• Decimator– Low pass filtering (eliminates high frequency images)– Downconversion by factor OSR– Sinc2 filter– Implementation: hardware (integration) – software
(differentiation)– Downconversion: timer produces an interrupt after OSR clock
cycles & ISR implements differentiations
• API routines
• Clocks
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Modulator Implementation
Single clock for entire design (4 x OSR)
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Measured PSD (OSR = 32)
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Measured PSD (OSR = 64)
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Sinc2 Decimator Filter (OSR=64)
H(z) = [1 / OSR x (1 – z-OSR) / (1 – z-1) ]2
fb/2 + m fs/2
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Sinc2 Decimator Filter
• Integration: in hardware using Type 1 decimator block• Differentiation: in software at downconversion rate (4 x
OSR)
• Interrupts at 4 x OSR / fs
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Timer ISR
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API Routines
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API Routines
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Example
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Modeling of jitter noise
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Switch Thermal Noise
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Switch Thermal Noise
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Switch Thermal Noise
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OpAmp Noise
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Modeling of Slew Rate & Saturation
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Second Order Modulator
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Second-order Modulator
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PSoC Implementation