aim: to present the concepts of basic structure of computers, arithmetic operations, processing...
DESCRIPTION
Syllabus UNIT- I BASIC STRUCTURE OF COMPUTERS 9 Functional units – Basic operational concepts – Bus Structures – Performance andmetrics – Instructions and instruction sequencing – Hardware – Software interface –Instruction set architecture – Addressing modes – RISC – CISC – ALU design –Fixed point and floating point operations. UNIT –II BASIC PROCESSING UNIT 9 Fundamental concepts – Execution of a complete instruction – Multiple busorganization – Hardwired control – Micro programmed control – Nano programming.TRANSCRIPT
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Aim:
To present the concepts of basic structure of computers, arithmeticoperations, processing unit, memory system and I/O organization.
Objective: • To introduce the concepts of basic structure of computers.• To give an idea about various arithmetic operations.• To study the concepts of basic processing unit such as hardwired control,
pipelining, etc.• To familiarize the students in the concepts of memory system such as ROM,
RAM, virtual memory, secondary storage.• To study the concept of II/O devices, interrupts, DMA, standard I/O interfaces.
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SyllabusUNIT- I BASIC STRUCTURE OF COMPUTERS 9
Functional units – Basic operational concepts – Bus Structures –Performance andmetrics – Instructions and instruction sequencing – Hardware – Software interface –Instruction set architecture – Addressing modes – RISC – CISC – ALU design –Fixed point and floating point operations.
UNIT –II BASIC PROCESSING UNIT 9
Fundamental concepts – Execution of a complete instruction – Multiple bus organization – Hardwired control – Micro programmed control – Nano programming.
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UNIT -III PIPELINING 9Basic concepts – Data hazards – Instruction hazards – Influence on instruction sets –Data path and control considerations – Performance considerations – Exceptionhandling.
UNIT- IV MEMORY SYSTEM 9Basic concepts – Semiconductor RAM – ROM – Speed – Size and Cost – Cachememories – Improving cache performance – Virtual memory – Memory managementrequirements – Associative memories – Secondary storage devices.
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UNIT- V I/O ORGANIZATION 9Accessing I/O Devices – Programmed I/O– Interrupts – Direct memory access –Buses – Interface circuits – Standard I/O interfaces (PCI, SCSI, USB) – I/O devicesand processors.
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TEXT BOOKS1. Carl Hamacher, Zvonko Vranesic and
Safwat Zaky, “Computer Organization”, 5th Edition, Tata Mc-Graw Hill, 2002.
2. Heuring, V.P. and Jordan, H.F., “Computer Systems Design and
Architecture”, 2nd Edition, Pearson Education, 2004.
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REFERENCES1. Patterson, D. A., and Hennessy, J.L.,
“Computer Organization and Design:The Hardware/Software Interface”, 3rd Edition, Elsevier, 2005.
2. William Stallings, “Computer Organization and Architecture – Designing forPerformance”, 6th Edition, Pearson Education, 2003.
3. Hayes, J.P., “Computer Architecture and Organization”, 3rd Edition, TataMc-Graw Hill, 1998.
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Introduction
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UNIT-1Basic structure of computers
Functional units Bus structures Memory operations Instruction sequencing Addressing modes Basic I/O operations Stack and queue
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Functional Units
Memory Unit
Arithmetic and Logic
Unit
Control Unit
Input Unit
Output Unit
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UNIT –2 BASIC PROCESSING UNIT *Fundamental concepts*Execution of a complete instruction *Multiple bus
organization *Hardwired control *Micro programmed control *Nano programming.
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Micro programmed control unit
CLK
Control signals
IR Sequencer
Status flags
Condition codes
Control Address Register
Control Memory
Micro Instruction Register
Decoder
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UNIT -3 PIPELINING
*Basic concepts *Data hazards *Instruction hazards *Influence on instruction sets –*Data path and control considerations*Performance considerations –*Exception handling.
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DATA HAZARDS
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UNIT-4Memory system
RAM ROM Cache memory Virtual memory Memory management Secondary storage
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Classification of memories
Memory
ROM RAM
Masked PROM EPROM EEPROM Static Dynamic
ROM
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UNIT-5I/O ORGANIZATION
I/O devices Interrupts DMA Buses Standard I/O interfaces
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Block diagram of I/O system
Data Status
Control
Address lines Data
Status
Control lines Control
Data RegisterStatus/Control Register
External device interface logic
I/O logic
External device interface logic
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Seminar Topics
Addressing modes Nano programming Exception handling Virtual memory Interface circuits
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Bus Structures Micro programmed control Data hazards Memory managementrequirements Interrupts
Assignment Topics
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URL http://www.indiastudychannel.com/
resources/13904-Pipelining-concept-computer-architecture.aspx
http://compnetworking.about.com/od/basiccomputerarchitecture/Computer_Architecture_Basics.
http://hubpages.com/hub/BASIC-CONCEPTS-OF-COMPUTER-ARCHITECTURE
http://www.cs.iastate.edu/~prabhu/Tutorial/title.html
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