agenda - 21ictoggle rate up to the cpu clock speed on the advanced high-performance bus. ½ cpu...

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Agenda Introduction to ARM ® Cortex™-M4F and Peripherals Code Composer Studio Introduction to StellarisWare, Initialization and GPIO Interrupts and the Timers Interrupts and the Timers ADC12 Hibernation Module USB Memory Floating-Point BoosterPacks and grLib StellarisWare...

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Page 1: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

Agenda

Introduction to ARM® Cortex™-M4F and PeripheralsCode Composer Studio

Introduction to StellarisWare, Initialization and GPIOInterrupts and the TimersInterrupts and the Timers

ADC12Hibernation Module

USBMemory

Floating-PointBoosterPacks and grLib

StellarisWare...

Page 2: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

StellarisWare®

Li f d R lt f d

Peripheral Driver Library

License-free and Royalty-free source codefor TI Cortex-M devices:

Peripheral Driver LibraryGraphics LibraryUSB LibraryyEthernet stacksIn-System Programming

Features...

Page 3: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

Peripheral Dri er Librar

StellarisWare FeaturesPeripheral Driver Library

High-level API interface to complete peripheral setLicense & royalty free use for TI Cortex-M partsAvailable as object library and as source codeProgrammed in the on-chip ROM

Graphics LibraryGraphics Library Graphics primitive and widgets153 fonts plus Asian and CyrillicGraphics utility tools

USB Stacks and ExamplesUSB Device and Embedded Host compliantUSB Device and Embedded Host compliantDevice, Host, OTG and Windows-side examplesFree VID/PID sharing program

Ethernetlwip and uip stacks with 1588 PTP modificationsExtensive examplesExtensive examples

ExtrasSimpliciTI wireless protocolIQ th lIQ math examplesBootloadersWindows side applications ISP...

Page 4: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

In System Programming Options

Stellaris Serial Flash Loader

Small piece of code that allows programming of the flash without the need for a p p g gdebugger interface.All Stellaris MCUs ship with this pre-loaded in flashUART or SSI interface optionUART or SSI interface option

The LM Flash Programmer interfaces with the serial flash loaderSee application note SPMA029

Stellaris Boot Loader

P l d d i ROM b d h b i i f fl hPreloaded in ROM or can be programmed at the beginning of flash to act as an application loader

Can also be used as an update mechanism for an application running on a St ll i i t llStellaris microcontroller.

Interface via UART (default), I2C, SSI, Ethernet, USB (DFU H/D)

Included in the Stellaris Peripheral Driver Library with full applicationsIncluded in the Stellaris Peripheral Driver Library with full applications examples

Fundamental Clocks...

Page 5: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

Fundamental Clock Sources

Precision Internal Oscillator (PIOSC)Precision Internal Oscillator (PIOSC)16 MHz ± 3%

Main Oscillator (MOSC) using…( ) gAn external single-ended clock sourceAn external crystal

Internal 30 kHz OscillatorInternal 30 kHz Oscillator30 kHz ± 50%Intended for use during Deep-Sleep power-saving modesg p p p g

Hibernation Module Clock Source32,768Hz crystalIntended to pro ide the s stem ith a real time clock so rceIntended to provide the system with a real-time clock source

SysClk Sources...

Page 6: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

System (CPU) Clock SourcesThe CPU can be driven by any of the fundamental clocks …

Internal 16 MHzMainInternal 30 kHzExternal Real-Time

- Plus -The internal PLL (400 MHz)The internal PLL (400 MHz)The internal 16MHz oscillator divided by four (4MHz ± 3%)

Clock Source Drive PLL? Used as SysClk?Internal 16MHz Yes YesInternal 16Mhz/4 No YesMain Oscillator Yes YesInternal 30 kHz No YesInternal 30 kHz No YesHibernation Module No YesPLL - YesPLL Yes

Clock Tree...

Page 7: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

Stellaris Clock Tree

driverLib API SysCtlClockSet() selects: SYSDIV divider settingOSC or PLLMain or Internal oscillatorMain or Internal oscillatorCrystal frequency

GPIO...

Page 8: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

General Purpose IO

Any GPIO can be an interrupt:y pEdge-triggered on rising, falling or bothLevel-sensitive on high or low values

Can directly initiate an ADC sample sequence or µDMA transferCan directly initiate an ADC sample sequence or µDMA transferToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard.5V tolerant in input configurationProgrammable Drive Strength (2, 4, 8mA or 8mA with slew rate control)control)Programmable weak pull-up, pull-down, and open drainPin state can be retained during Hibernation modePin state can be retained during Hibernation mode

Masking...New Pin Mux GUI Tool: www.ti.com/StellarisPinMuxUtility

Page 9: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

GPIO Address MaskingEach GPIO port has a base address. You can write an 8-bit value directly to this base address and all eight pins are modified. If you want to modify specific bits, you can use a bit-mask to indicate which bits are to be modified This is done in hardware by mapping each GPIO port to

Th i t t t h i GPIO P t D (0 4005 8000) 1 1 1 1 1 1 0 1GPIO Port D (0x4005.8000)

indicate which bits are to be modified. This is done in hardware by mapping each GPIO port to 256 addresses. Bits 9:2 of the address bus are used as the bit mask.

The register we want to change is GPIO Port D (0x4005.8000)Current contents of the register is:

1 1 1 1 1 1 0 1

The value we will write is 0xEB:Write Value (0xEB)

Instead of writing to GPIO Port D directly write to

1 1 1 0 1 0 1 1The value we will write is 0xEB:

0 0 0 1 0 1 1 0 0 0000…Instead of writing to GPIO Port D directly, write to 0x4005.8098. Bits 9:2 (shown here) become a bit-mask for the value you write.

1 1 1 0 1 0 1 1Only the bits marked as “1” in the bit-mask are changed.

New value in GPIO Port D (note that only the red bits were written)that only the red bits were written)

GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_4|GPIO_PIN_2|GPIO_PIN_1, 0xEB);

Note: you specify base address, bit mask, and value to write. The GIPOPinWrite() function determines the correct address for the mask. Lab...

Page 10: Agenda - 21icToggle rate up to the CPU clock speed on the Advanced High-Performance Bus. ½ CPU clock speed on the Standard. 5V tolerant in input configuration Programmable Drive Strength

Lab 3: Initialization and GPIO

USB Emulation ConnectionUSB Emulation Connection

Configure the system clockEnable and configure GPIOUse a software delay to toggle an LED on the evaluation board

Agenda ...