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AFT09MP055N AFT09MP055GN AFT09MP055NB

1RF Device DataFreescale Semiconductor, Inc.

Freescale Confidential Proprietary. Nondisclosure Agreement Required.Contact RF Division Marketing.

RF Power LDMOS TransistorsEnhancement--Mode Lateral MOSFETs

Designed for mobile two--way radio applications with frequencies from 764

to 941 MHz. The high gain, ruggedness and broadband performance of these

devic es make them ideal for large--s ignal, common sourc e amplif ier

applications in mobile radio equipment.

Narrowband Performance (13.6 V, IDQ = TBD mA, TA = 25C, FM)

Frequency

Gps(dB)

D(%)

P1dB

(W)

764 MHz 16.5 72.0 62

870 MHz 16.5 69.0 55

941 MHz 16.5 68.0 55

800 MHz Broadband Performance (13.6 V, IDQ = TBD mA, TA = 25C, FM)

Frequency

Gps(dB)

D(%)

P1dB

(W)

764 MHz 16.0 66.0 55

820 MHz 16.0 65.0 55

870 MHz 16.0 66.0 55

Load Mismatch/Ruggedness

Frequency

(MHz)

Signal

Type VSWR

Pout(W)

Test

Voltage Result

870 CW 20:1 at all

Phase Angles

TBD

(3 dB Overdrive)

17 No Device

Degradation

Features

Characterized for Operation from 764 to 941 MHz

Integrated Input Matching Improves Broadband Performance

Integrated ESD Protection

Integrated Stability Enhancements Broadband Full Power Across the Band (764--870 MHz)

225C Capable Plastic Package

Exceptional Thermal Performance

High Linearity for: TETRA

P25 Phase 2

SSB

Cost--effective Over--molded Plastic Packaging

Typical Applications

Output Stage 800 MHz Band Mobile Radio

Output Stage 700 MHz Band Mobile Radio

DATA SHEET IN 2nd REVIEW -- 2/27/12

Document Number: Order from RF MarketingRev. 0, 2/2012

Freescale SemiconductorProduct Brief: Market Assessment

Freescale Confidential Proprietary. Nondisclosure Agreement Required. Contact RF Division Marketing.

764--941 MHz, 55 W, 13.6 V

LDMOS BROADBAND

RF POWER MOSFETs

AFT09MP055NAFT09MP055GNAFT09MP055NB

This document contains preview

information on a new product that

may be in a design phase or under

development. Freescale reserves the

right to change or discontinue this

product without notice.

Sample parts not yet available

Contact technical marketing at

480 --4 13--35 95 to provide feedb ack

or to request additional information.

CASE 1484--04, STYLE 1

TO--272 WB--4

PLASTIC

AFT09MP055NB


TO--270 WB--4

PLASTIC

AFT09MP055N


TO--270 WB--4 GULL

PLASTIC

AFT09MP055GN

Figure 1. Pin Connections

Note: Exposed backside of the package is

the source terminal for the transistors.

(Top View)

Drain A

Drain B

Gate A

Gate B

Freescale Confidential Proprietary. Nondisclosure Agreement Required. Contact RF Division Marketing.

Freescale Semiconductor, Inc., 2012. All rights reserved.

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RF Device DataFreescale Semiconductor, Inc.



Table 1. Maximum Ratings

Rating Symbol Value Unit

Drain--Source Voltage VDSS --0.5, +40 Vdc

Gate--Source Voltage VGS --6.0, +12 Vdc

Operating Voltage VDD 19, +0 Vdc

Storage Temperature Range Tstg --65 to +150 C

Total Device Dissipation @ TC = 25C

Derate above 25C

PD TBD

TBD

W

W/C

Operating Junction Temperature (1,2) TJ 225 C

Table 2. Thermal Characteristics

Characteristic Symbol Value (2,3) Unit

Thermal Resistance, Junction to Case

Case Temperature TBDC, TBD W CW, 13.6 Vdc, IDQ = TBD mA, TBD MHz

RJC TBD C/W

Table 3. ESD Protection Characteristics

Test Methodology Class

Human Body Model (per JESD22--A114) TBD (voltage range TBD)

Machine Model (per EIA/JESD22--A115) TBD (voltage range TBD)

Charge Device Model (per JESD22--C101) TBD (voltage range TBD)

Table 4. Moisture Sensitivity Level

Test Methodology Rating Package Peak Temperature Unit

Per JESD22--A113, IPC/JEDEC J--STD--020 3 260 C

Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

Off Characteristics (4,5)

Gate--Source Leakage Current

(VGS = 10 Vdc, VDS = 0 Vdc)

IGSS TBD nAdc

Drain--Source Breakdown Voltage

(ID = 10 A, V GS = 0 Vdc)

V(BR)DSS 40 Vdc

Zero Gate Voltage Drain Leakage Current

(VDS = 13.6 Vdc, VGS = 0 Vdc)

IDSS 1 Adc

On Characteristics

Gate Threshold Voltage (4,5)

(VDS = 5 Vdc, ID = 115 Adc)

VGS(th) TBD Vdc

Drain--Source On Resistance (4,5)

(VGS = 10 Vdc, ID = 1.2 Adc)

RDS(on) TBD

Drain--Source On--Voltage (4,5)

(VGS = 10 Vdc, ID = 1.2 Adc)

VDS(on) TBD Vdc

Forward Transconductance (6)

(VGS = 10 Vdc, ID = TBD Adc)

gfs TBD S

1. Continuous use at maximum temperature will affect MTTF.2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF

calculators by product. (Calculator available when part is in production.)

3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.

Select Documentation/Application Notes -- AN1955.

4. Each side of device measured separately.

5. Parameters tested 100% at final test at room temperature.

6. Limits verified by characterization, not tested in production.

(continued)

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Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)

Characteristic Symbol Min Typ Max Unit

Dynamic Characteristics (1,2)

Reverse Transfer Capacitance

(VDS = 13.6 Vdc 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)

Crss TBD pF

Output Capacitance

(VDS = 13.6 Vdc 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)

Coss TBD pF

Input Capacitance

(VDS = 13.6 Vdc, VGS = 0 Vdc 30 mV(rms)ac @ 1 MHz)

Ciss TBD pF

Functional Tests (3,4) (In Freescale Test Fixture, 50 ohm system) VDD = 13.6 Vdc, IDQ = TBD mA, Pout = 55 W, f = 870 MHz

Common--Source Amplifier Power Gain Gps TBD dB

Drain Efficiency D TBD %

Load Mismatch/Ruggedness (In Freescale Test Fixture, 50 ohm system, IDQ = TBD mA)

Frequency

(MHz)

Signal

Type VSWR

Pout(W) Test Voltage, V DD Result

870 CW 20:1 at all Phase Angles TBD

(3 dB Overdrive)

17 No Device Degradation

1. Each side of device measured separately.

2. Limits verified by characterization, not tested in production.

3. Parameters tested 100% at final test at room temperature.4. Measurement made with device in straight lead configuration before any lead forming operation is applied.

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APPLICATIONS INFORMATION

DESIGN CONSIDERATIONS

This device is a common--source, RF power, N--Channel

enhancement mode, Lateral Metal--Oxide Semiconductor

Field--Effect (LDMOS) transistor. Freescale Application Note

AN211A, FETs in Theory and Practice, is suggested reading

for those not familiar with the construction and characteris-

tics of FETs.

This surface--mount packaged device was designed pri-

marily for land mobile power amplifier applications. Manufac-

turability is improved by utilizing the tape and reel capability

for fully automated pick and placement of parts. However,

care should be taken in the design process to insure proper

heat sinking of the device.

The major advantages of LDMOS transistors include high

gain, simple bias systems, relative immunity from thermal

runaway, and the ability to withstand severely mismatched

loads without suffering damage.

MOSFET CAPACITANCES

The physical structure of a MOSFET results in capacitors

between all three terminals. The metal oxide gate structure

determines the capacitors from gate--to--drain (Cgd), and

gate--to--source (Cgs). The PN junction formed during fab-rication of the RF MOSFET results in a junction capacitance

from drain--to--source (Cds). These capacitances are charac-

terized as input (Ciss), output (Coss) and reverse transfer

(Crss) capacitances on data sheets. The relationships be-

tween the inter--terminal capacitances and those given on

data sheets are shown below. The C iss can be specified in

two ways:

1. Drain shorted to source and positive voltage at the gate.

2. Positive voltage of thedrain in respectto source andzero

volts at the gate.

In the latter case, the numbers are lower. However, neither

method represents the actual operating conditions in RF ap-

plications.

Drain

Cds

Source

Gate

Cgd

Cgs

Ciss = Cgd + CgsCoss = Cgd + CdsCrss = Cgd

DRAIN CHARACTERISTICS

One critical figure of merit for a FET is its static resistance

in the full--on condition. This on --resistance, RDS(on), occurs

in the linear region of the output characteristic and is speci-

fied at a specific gate--source voltage and drain current. The

drain--source voltage under these conditions is termed

VDS(on). For MOSFETs, VDS(on) has a positive temperature

coefficient at high temperatures because it contributes to the

power dissipation within the device.

BVDSS values for this device are higher than normally re-

quired for typical applications. Measurement of BVDSS is not

recommended and may result in possible damage to the de-

vice.

GATE CHARACTERISTICS

The gate of the RF MOSFET is a polysilicon material, and

is electrically isolated from the source by a layer of oxide.

The DC input resistance is very high on the order of 109

resulting in a leakage current of a few nanoamperes.

Gate control is achieved by applying a positive voltage to

the gate greater than the gate--to--source threshold voltage,

VGS(th).

Gate Voltage Rating Never exceed the gate voltage

rating. Exceeding the rated VGS can result in high currents

through the ESD protection circuits that can result in perman-

ent damage to the device.

Gate Termination The gates of these devices are es-sentially capacitors. Circuits that leave the gate open--cir-

cuited or floating should be avoided. These conditions can

result in turn--on of the devices due to voltage build--up on

the input capacitor due to leakage currents or pickup.

Gate Protection These devices have an internal pro-

tection circuit from gate--to--source. It is still recommended to

use a resistor to keep the gate--to--source impedance low, to

help dampen transients. Voltage transients on the drain can

be coupled to the gate through the parasitic gate--drain capa-

citance. If the gate--to--source impedance and the rate of

voltage change on the drain are both high, then the signal

coupled to the gate may be large enough to exceed the

gate--threshold voltage and turn the device on.

DC BIASSince this device is an enhancement mode FET, drain cur-

rent flows only when the gate is at a higher potential than the

source. RF power FETs operate optimally with a quiescent

drain current (IDQ), whose value is application dependent.

This device was characterized at IDQ = TBD mA, which is the

suggested value of bias current for typical applications. For

special applications such as linear amplification, IDQ may

have to be selected to optimize the critical parameters.

The gate is a dc open circuit and draws no current. There-

fore, the gate bias circuit may generally be just a simple re-

sistive divider network. Some special applications may

require a more elaborate bias system.

GAIN CONTROL

Power output of this device may be controlled to some de-gree with a low power dc control signal applied to the gate,

thus facilitating applications such as manual gain control,

ALC/AGC and modulation systems . This characteristic is

very dependent on frequency and load line.

REPLACEMENT COPYTO COME

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MOUNTING

The specified maximum thermal resistance of TBDC/W

assumes the entire source contact on the back side of the

package is in good contact with an appropriate heat sink. As

with all RF high power devices, the goal of the thermal

design should be to minimize the temperature at the back

side of the package.

AMPLIFIER DESIGN

Impedance matching networks similar to those used with

bipolar transistors are suitable for this device. For examplessee Freescale A ppl icat ion Not e A N721, I mpedance

Matching Networks Applied to RF Power Transistors .

Large--signal impedances are provided, and will yield a good

first pass approximation.

Since RF power MOSFETs are triode devices, they are not

unilateral. This coupled with the very high gain of this device

yields a device capable of self oscillation. Stability may be

achieved by techniques such as drain loading, input shunt

resistive loading, or output to input feedback. The RF test fix-

ture implements a parallel resistor and capacitor in series

with the gate, and has a load line selected for a higher effi-

ciency, lower gain, and more stable operating region.

Tw o -- p o r t s t ab i li t y a n al y s is w i th t h is d e v ic e s

S--parameters provides a useful tool for selection of loadingor feedback circuitry to assure stable operation. See Free-

scale Application Note AN215A, RF Small--Signal Design

Using Two--Port Parameters for a discussion of two port

network theory and stability.

Figure 2. Amplifier Topologies using Dual Transistors

Load

Hybrid

Coupler

0

90

Match

Match

Input

Match

Match0

90

Hybrid

Coupler

Load

Output

Hybrid Coupler Redundant System

Match

Match Match

Match

Match and Combine

Balun

Match

Match Match

Match

Balun

Push--Pull Configuration

Match Match

Parallel Configuration

REPLACEMENT COPYTO COME

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PACKAGE DIMENSIONS

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