Adaptive Neural Networks based on Metal-Insulator-Metal

Nanostructures (Memristors)

Tomás Martinstomas.martins@tecnico.ulisboa.pt

Instituto Superior Técnico, Lisboa, Portugal

June 2018

Abstract

In recent years novel computer architectures have been pursued to overcome the limitations of thetraditional silicon-based von Neumann paradigm and the imminent end of Moore’s law. A promisingalternative is neuromorphic computation, which is based on non-linear, massively parallel, neural-likealgorithms, allowing the construction of artificial neural networks. These can be implemented usingmemristors, fundamental and passive electric components that show reversible and persistent resistancestate changes, which translate in similar electric responses to biological neural tissue. In this work westudy the optimization of the microfabrication process of individual and crossbar arrays of magnesiumoxide-based memristive devices. Each configuration is implemented in two different fabricationprocesses: a more complete procedure where the main metal-insulator-metal pillar is defined usingoptical lithography and ion beam milling and a simpler, two-level process where the bottom electrodeis patterned first and the junction is defined by magnetron sputtering of the insulator film and topelectrode, overlapping precisely with the former. SEM imaging is used to identify defects in thefabricated structures. A computer program is developed to control a voltage-current sourcemeter, toperform automatic voltage-current sweeps with flexible parameters for measurement of memristivedevices. Individual structures fabricated with the first process show large ON-OFF resistance ratios ofat least 103, although the process yield and average device endurance are low, respectively at 43% andless than 10 full switching cycles. Crossbar arrays do not show improved performance. The two-stepprocess yields better results, although the margin for improvement is still extensive.Keywords: Memristor, Neuromorphic computation, Magnesium oxide, Magnetron sputtering,Resistive switching

1. Introduction

The unrelenting advances in silicon technology thathave been proving Moore’s Law correct for the pastfour decades are waning. We are starting to hit fun-damental physical limits in our quest for ever moreminiaturized and powerful electronics, and we mustsoon turn our attention elsewhere to keep improv-ing the tools we use to tackle ever more complexproblems.

At the same time, aided by this “silicon ex-plosion”, we have been experiencing an enormousboost in the field of artificial intelligence: it hasbeen nearly twenty years since Deep Blue beat theworld chess champion Kasparov in 1997. More re-cently, deep learning techniques have been makingtheir way into many applications and tools, thatcan process huge amounts of data rather quickly,and are now ubiquitous in our daily life.

Despite these breakthroughs, our ability to simu-late human thinking in conventional computers will

eventually reach a limit, not only because of theend of Moore’s Law but also because our brain,one of the most complex structures we know andfrom which we still know very little, is structuredin a radically different way than the predominantvon Neumann architecture; while the latter has astrict and deterministic input-processing-memoryinterface-output hierarchy, we benefit from having avery large number of individual processing cells, theneurons, connected with each other in a non-linearand massively parallelized arrangement. This al-lows us to trivially perform tasks such as learningnew concepts and extrapolate our past experiencesto future events, something even the most powerfulsupercomputers struggle with.

These reasons mean that we must start workingto build a fundamentally different computer archi-tecture so that we can build artificial neural net-works capable of having the same power as ourbrains and implement in a machine those tasks we

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excel at. To do that, very promising building blockshave recently gathered much interest, which arememristive systems. These are two-terminal passiveelectronic components which feature a non-linearrelationship between current and voltage, and aswe will see later on, this seemingly simple propertymakes such devices display a very similar behav-ior to biological neurons. Combined with their po-tential for miniaturization and integration, we thenhave an ideal starting step to build advanced neu-romorphic artificial structures.

2. Background2.1. Memristors and memristive systemsA memristor (from memory resistor) is a passive,two-terminal electric component whose resistance isnot constant, but depends on the applied voltage,or current, and for how long it has been applied.It was first derived theoretically by Chua in 1971[1], who related the four fundamental electromag-netic circuit quantities - the electric charge q, themagnetic flux ϕ, the voltage V and the current I -to each other in a pairwise manner through 4 con-stituting relations plus Faraday’s law and the defi-nition of current as the temporal derivative of theelectric charge.

In addition to resistors, inductors and capacitors,Chua realized that a fourth canonical circuit ele-ment must exist in order to satisfy the equationrelating magnetic flux and electric charge: dϕ =M dq. Furthermore, he also showed that the behav-ior of a passive device characterized by a variablememristance M ≡ M(q) cannot be reproduced byany combination of resistors, inductors and capaci-tors, proving this device is indeed truly fundamen-tal.

Figure 1: The four canonical circuit elements(reused with permission from Ref. [2]).

The memristance is a function of the electriccharge, or alternatively, of all previous values of thecurrent that has passed through the device, whichconfers a memory behavior to the memristor - henceits name.

The practical realization of the memristor hap-pened in 2008 by Strukov et al. [2], who built ananodevice consisting of a thin semiconductor layer

mounted between two metallic contacts. This de-vice makes use of a property widely observed in suchthin-film structures called resistive switching: theresistance of the device is not fixed but can in factbe tuned with the controlled application of a par-ticular voltage to its terminals.

More recent studies on the nature of memris-tive behavior have developed a new model for thememristance of a metal-insulator-metal structure,where such resistance changes arise due to the for-mation and destruction of very thin and localizedfilaments of conducting material inside the insulatorfilm. These have been demonstrated to be respon-sible for a large variety of resistive switching (RS)phenomena in a huge amount of materials, particu-larly in the context of resistive random-access mem-ories (ReRAMs) research.

One of the most important and unique proper-ties of memristive systems is the response they dis-play when subject to a periodic driving signal. Inparticular, for a sinusoidal input I(t) = I0 cos(ωt),the V (I) response of the system will be a pinchedhysteretic loop, as shown in Fig. 2. This happensdue to the massive nature of the ions, which arethe main charge carriers across such a device, andthe inertia effects they experience when actuated byrapidly varying forces.

Figure 2: Experimental memristor I(V ) character-istic (reused with permission from Ref. [2]).

2.2. Neurons and synapsesThe neuron is a specialized cell in the brain andnerves that is excitable by electric signals and whosetask is to receive those inputs, process them andpropagate them to the other neurons connected toit.

The synapse is the specialized structure that con-nects neurons to each other. When an electricspike Vpre reaches the end of the axon of the pre-synaptic neuron, chemical markers called neuro-transmitters activate receptors on the post-synapticneuron membrane, changing the permeability of ionchannels also present there. This allows the diffu-sion of ions in and out of the neuron, changing theelectric potentials inside and outside the membrane,

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and thus a second spike Vpost forms and propagatesfurther [3].

2.3. Artificial neural networks

The memristor is an ideal candidate to replace sil-icon implementations of artificial synapses in com-plex artificial neural networks [3]. It naturally ex-hibits a non-linear resistance that changes accord-ing to the history of previous inputs, affecting howeffectively a signal is transmitted through it, exactlythe sort of behavior we see in a biological synapse.It is also a passive electric component, which doesnot require a power supply, unlike conventional sil-icon synapses, and has a simple physical structureand hence a big potential for miniaturization, mak-ing very compact, complex and scalable networkspossible.

3. State of the art

At a material optimization level, Huang et al. [4]have established the non-polar resistive switchingnature of an electroforming-free Pt/MgO/Pt mem-ristive cell, using a 60 nm thick oxide depositedby ion beam deposition, which the authors proposemight introduce a relatively high density of defectsin the insulating matrix; this translates to measure-ments in which the initial resistance of the deviceand the voltage threshold of the first Set transitionare nearly the same as those of subsequent transi-tions.

In accordance with the requirements of resistivestates stability, separation and unipolar operationof memristive cells for memory applications, Guerraet al. [5] have demonstrated such properties in a Pt150/ MgO 15/ Ta 20/ Ru 5 thin film stack (values innm). This MIM structure presents an average Setvoltage of ∼1.61 V and a Reset voltage of ∼1.38V, as well as an average ROFF/RON ratio of ∼ 7,over 42 switching cycles. The cells have also demon-strated a retention of both resistive states for 104

s.

In a last example, Dias et al. [6] undertook acomprehensive study of the Set and Reset voltageand current variability using the four possible po-larity combinations. Using a Pt 150/ MgO 30/ Ta20/ Ru 5 structure (values in nm) with the plat-inum contact grounded, the authors found that, af-ter 50 Set-Reset cycles, the Set and Reset thresholdvoltage variability is lower when the Set process isperformed with positive bias. In particular, the Setand Reset voltages are lowest when performing Set+, Reset − cycling. A lower variability of the OFFstate resistance is also lowest in the (+,−) mode,where the average ROFF/RON ratio is around 33.

4. Thin films

Thin films of tantalum (Ta), ruthenium (Ru) andmagnesium oxide (MgO) were deposited on the

N2000 system with a nominal thickness of 300 Å,and additionally for MgO, a thickness of 150 Å, us-ing alumina-coated silicon and glass as substrates.The thickness, resistivity of Ru and Ta and X-raydiffraction analysis were performed in these mate-rials.

4.1. Resistivity

The resistivity values of the ruthenium and tan-talum thin films were measured in a linear four-probe setup, on thin glass stripes deposited at thesame time as the main samples. A linear fit wasperformed to several current-voltage values, takenusing a Keithley 220 programmable current sourceand a Keithley 182 sensitive digital voltmeter, andthe resistance extracted, as shown in Fig 3.

Figure 3: Fit of I−V experimental points for Ta andRu thin films in glass substrate (nominal thickness300 Å)

The resistance values thus obtained were: RRu =37.649± 0.0032 Ω and RTa = 126.93± 0.0032 Ω.

The geometric parameters necessary for the cal-culation of the resistivity, namely the width of theglass stripes wRu and wTa, as well as the distancebetween the inner probes lprobes, were determinedusing a Vernier caliper. These parameters, as wellas the relevant thicknesses and the calculated resis-tivity values are shown in Table 1:

Parameters Ru Ta

lprobes (cm) 0.7205 ± 0.0005t (cm) (3.00 ± 0.35)×10-6 (3.19 ± 0.32)×10-6

w (cm) 0.312 ± 0.0005 0.311 ± 0.0005R (Ω) 37.649 ± 0.0032 126.93 ± 0.0032

ρ (µΩ·cm) 48.9 ± 5.8 174.8 ± 17.9

Table 1: Geometric parameters, resistance and re-sistivity of Ru and Ta thin films. The uncertaintiesin ρRu and ρTa were calculated using standard errorpropagation.

The resistivities obtained for the Ru and Ta thinfilms are in line with the values reported in the lit-erature at similar thicknesses [7, 8], so that their

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electric characteristics are as expected and can beused in the complete memristor process.

4.2. MgO etch rate calibration

The MgO ion beam etching rates for the relevantpan angles of 60o and 30o in Nordiko 3600 werecalculated using two different methods.

4.2.1 Standard method

A thick (∼ 1000 Å) MgO film is deposited on a1×1 sq inch glass substrate using Nordiko 2000, anddifferent regions are etched in Nordiko 3600 duringtimes t1 = 300 s, t2 = 600 s and t3 = 900 s, using theink pen technique, at 60o and 30o pan angles. Theetched thicknesses are measured on the profilometerand a linear fit is performed, yielding the etch rate.The results are shown in Fig. 4a.

4.2.2 Iterative method

An MgO film with a measured thickness of 306 ±23 Å is deposited on a 1×1 sq inch Si/SiO2/ Ti250/ Pt 1500 substrate in Nordiko 2000. The sam-ple is progressively etched, starting with an etchtime t1 = 300 s; the cumulative time is increasedin steps of ∆t1 = 100 s until contact is achieved onthe exposed area using a multimeter and the pro-cess is stopped. The last cumulative time wherecontact was not registered, and so where MgO isstill present in the exposed area, is denominated t2.The second iteration of the process further refinesthe upper and lower bounds of the etch time. Theinitial time step in the new region will be t2 + 25s, incrementing in ∆t2 = 25 s steps until contact ismeasured. The last cumulative etch time withoutcontact is now t3. Finally, the process is repeated,starting at t3 + 10 s and using ∆t3 = 10 s steps.The results for both pan angles are shown in Fig.4b.

(a) Standard process. (b) Iterative process.

Figure 4: MgO etch rate calibration using two dif-ferent methods.

The results of both methods are summarized inTable 2.

Both methods yielded similar results, and the val-ues in one are contained in the experimental error

Method 60o 30o

Standard 0.76 ± 0.09 0.93 ± 0.03Iterative 0.71 ± 0.06 0.97 ± 0.09

Table 2: MgO etch rates determined by two dif-ferent methods, for pan angles of 60o and 30o, inNordiko 3600 (in Å/s).

of the other. Hence, we can conclude that no pro-cedure is better than the other, and they both giveaccurate results to use in the complete fabricationprocess.

4.3. X-ray diffractionAn x-ray diffraction analysis of the films depositedon Nordiko 2000 was carried out in a Siemens D5000diffractometer, which uses a molybdenum (Mo) Kαx-ray generator, with a characteristic wavelength λ0= 0.70930 Å, in a 15o-21o 2θ range.

For the considered 2θ range, only one peak waspresent in each main spectrum, as expected due tothe highly textured nature of thin films.

All peaks in the main spectra were fitted to aLorentzian function and the centroid 2θ0 and full-width at half maximum (FWHM) w were deter-mined. A larger sweep, from 15o to 45o, revealeda secondary peaks in these films; however, they aresmall in comparison with the main peaks so themain orientation dominates.

The crystallite size was also estimated throughthe Scherrer equation (Eq. 1), where τ is the aver-age crystallite size, λ the x-ray wavelength, β theFWHM of the sample broadening contribution andK = 0.9 [9] a factor depending on the peak shapeand crystallite geometry.

τ = Kλ

β cos θ(1)

sThese values were, respectively for MgO, Ru and

Ta and substrates [Si ; glass]: [58.92; 58.92], [218.30;161.33] and [147.68, 141.99].

The measured peak position values were thencompared with data from the American Mineralo-gist crystal structure database [10], using the searchterms “periclase”, “ruthenium” and “tantalum”, re-spectively for MgO, Ru and Ta, and the spacingparameter dteor and Miller indices {hkl} were ex-tracted. These are, respectively, 2.1055 Å, 2.0545Å, 2.3376 Å and {2 0 0}, {1 0 1}, {1 1 0}.

5. Device fabrication5.1. Platinum redeposition and mitigationAs a first optimization of memristive devices fabri-cation the redeposition of platinum in the junctionpillar sidewall, which typically causes short-circuits

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across the electrodes and device failure, was stud-ied. Several etching recipes were tested in Nordiko3600 in samples with a MgO 300/ Ta 200/ Ru 50stack (values in Å) patterned with 200×200 µm2square pillars, using only 60o, 30o or a combinationof both pan angles, as well as different amounts ofoveretching into the Pt layer. Short-circuits weretested by measuring contact from the top of pillarsto the die frame.

A major issue with this test was that the etchedthickness was smaller than expected for all testedsamples, with more pronounced differences for 30o

only etching, meaning that short-circuit testing didnot yield significant results since the platinum layermight not have been exposed and some MgO re-mained in the areas of interest. It was later foundempirically that increasing the ruthenium thick-ness from 50 Å to 200 Å and etching the top elec-trode and most of the MgO film (around 70%) ata 60o, while the rest of the MgO (30%) and aslight overetch at 30o resulted in no apparent short-circuits in round test pillars of 100 µm, 200 µm and300 µm.

5.2. Fabrication processesTwo different fabrication processes were imple-mented, each with advantages and shortcomings.

5.2.1 First process

The first process (samples N3MA1 and N3MA3)is comprised of six main stages, defining in sequencethe insulator junction, bottom electrode and thentop electrode. This design is better shielded againstphysical damage, electric interference from neigh-boring structures and short-circuits between the topand bottom electrodes, while allowing smaller junc-tion areas. This process is outlined in Fig. 5.

Stack depositionThe thin film stack used is the following (the

numbers refer to the film thickness in Å):

Substrate Si/SiO2 1000Bottom electrode Ti 250/ Pt 1500Junction MgO 300Top electrode Ta 200/ Ru 200

The bottom electrode material was depositedon a 6-inch wafer by ion-beam deposition inNordiko 3000, while the junction and top electrodefilms were deposited by magnetron sputtering inNordiko 2000; the latter films measured a combinedthickness of tdep1 = 697± 27 Å.

Junction pillar definition

The junctions are patterned in square pillars ofvarying area and configuration, to build both in-dividual (sample N3MA1) and crossbar arrays of

(a) (b) (c)

(d) (e) (f)

Figure 5: Memristor six-step fabrication processsketch.

memristors (sample N3MA3), by ion beam etch-ing in Nordiko 3600, using the optimized 60o/30o

recipe previously mentioned. The etched thicknesswas measured at tetch1 = 776± 42 Å.

After etching, an insulating layer of alumina(Al2O3) is deposited in UHV2, to protect the pil-lar and avoid short-circuits, with a thickness oftdep2 = 466 ± 47 Å. This value is nearly half whatwas expected, due to a higher than normal processpressure caused by pumping issues in the chamberof the machine.

The liftoff is done in an ultrasound bath of pureMicrostrip 3001 at a temperature of 65 oC for aperiod of 12 hours.

Bottom electrode definition

The bottom electrodes are defined by etchingin Nordiko 3600, at an intermediate pan angleof 45o, to remove the Al2O3 and Ti/Pt layers,reaching the non-conductive SiO2 layer of thesubstrate; the etched thickness was calculated astetch2 = 2425± 144 Å.

First via opening to bottom pads

The Al2O3 film over the bottom electrode padsis removed by ion beam etching at 45o pan anglein Nordiko 3600, in order to reach the Ti/Pt level,with a slight overetch included to make sure thatno oxide remains on top of the pads; an etchedthickness of tetch3 = 558 ± 34 Å was measured,with this value, alongside visual inspection, beingused for endpoint control of the etch.

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Second passivation and second via opening tobottom pads

The entire sample is passivated with a very thicklayer of SiO2, deposited in the Alcatel SCM 450magnetron sputtering machine, to protect the lat-eral walls of the bottom electrode and cover thepads and the exposed top face of the pillar in equalthickness of material, tdep3 = 2727±50 Å. It is thennecessary to remove the oxide over the vias to thebottom pads and the top face of the pillars. Thisprocess done by reactive-ion etching in the LAMRainbow 4520 machine, which allows the selectiveremoval the silicon dioxide these regions while keep-ing the rest of the structure mostly intact.

The endpoint is controlled by visual inspectionof opened areas and electric contact probing indedicated test regions in the sample, where ashort-circuit was detected, indicating that theoxide layer has been fully removed.

Top contact definition and metallization

The final step in the memristor fabrication pro-cess is the deposition of metallic leads, contactingwith the bottom electrode and with the top of thejunction pillar. This metallization process is doneon Nordiko 7000, and consists of a soft sputter etchto remove contaminants from the surface, a 3000 Ådeposition of Al98.5Si1Cu0.5 alloy by DC sputteringand a 150 Å deposition of TiW(N) for film protec-tion.

5.2.2 Second process

A second process, simpler than the former (sam-ples F3N2 and F3N3), features only two steps anda single oxide deposition: the bottom electrode ispatterned first, followed by the deposition of a pas-sivating/leveling oxide. Afterwards, the junction isdefined by depositing the insulator and top elec-trode in overlap with the exposed bottom level in awell-defined area, allowing current flow between thetwo electrodes. This design has a faster fabricationtime than the former, while also eliminating rede-position phenomena. The drawbacks are that thestructures are damage-prone due to exposed side-walls, while the minimum junction area also cannotbe as small due to the very close alignment requiredbetween both levels. A summary of the process isshown in Fig. 6:

Bottom electrode definition

The bottom electrodes, both in individual andcrossbar configurations are defined by ion beametching in Nordiko 3600, with tapered shapes todirect the current to the junction and to distribute

(a) (b)

Figure 6: Memristor two-step fabrication processsketch.

the heat dissipated by Joule heating along theelectrode tracks, with with a pan angle of 60o, toremove the Ti/Pt layer and reach the insulatingsubstrate. The etched thickness was measuredat tetch1 = 2341 ± 109 Å, a sizeable, althoughharmless, deviation from the expected value of1800 Å due to differences between the consideredand actual etch rates. A Al2O3 layer is thendeposited in UHV2 to level the sample surfaceagain. The liftoff ultrasound bath lasted for 75minutes.

Junction and top electrode definition, metalliza-tion

To define the memristive junction, MgO, Ta andRu films are deposited on Nordiko 2000, with a com-bined thickness of tdep1 = 533±38 Å. The top tracksare then reinforced by a layer of AlSiCu, 1000 Åthick, deposited on Nordiko 7000.

In the following iterations of the process somemodifications were made to improve device robust-ness and process yield, namely by using a predevel-opment step in the second lithography, to improvethe photoresist profile, soft etch steps before everydeposition to ensure the surface is free of contami-nants thus improving adherence, greatly increasingthe alumina liftoff time to several hours and usinga thicker (1000 Å to 6000 Å) Au electrode.

6. Voltage/current sweep measurement pro-gram

The testing of the samples fabricated accordingto the processes described in the previous chap-ter was carried out using a bipolar voltage-currentsourcemeter (Keithley 2400-C at IFIMUP, 200 Vor 1 A (max power = 22 W) and Keithley 2401at INESC-MN, 21 V at 1.05 A) connected to twotungsten microprobes.

A tool with the versatility necessary for theautomated characterization of memristive deviceswas not available at INESC-MN, so a basic Lab-

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VIEW program compatible with the Keithley 2401sourcemeter, implementing the required measure-ment modes and data output, was developed. Themain source-delay-measure loop is implemented inthe LabVIEW block diagram shown in Fig. 7.

Figure 7: Main measurement loop and visual dataprinting of voltage-current sweep LabVIEW pro-gram.

7. Device characterization

This work focused on studying the resistive switch-ing of MgO junctions in bipolar operation mode, sopositive Set and negative Reset, using continuousvoltage sweeps (the positive direction is defined ascurrent flowing from the top to the bottom elec-trode), a combination thought to be better for pro-longing device life and using smaller voltage thresh-olds [6].

Positive sweeps starting at zero, reaching a max-imum value and returning to zero are done toattempt Set transitions of the devices, while thesame process at negative polarities is used for Resetevents. The maximum values and current compli-ances are adjusted throughout testing.

7.1. Electric measurements

Several devices with different junction areas weresampled in sample N3MA1, registering the initialresistances and states and maximum number of Set-Reset cycles before failure. These are shown in Figs.8a and 9a.

The starting states of the junctions seem to bedistributed almost evenly between the ON and OFFstates, with a slight larger number of devices (∼65%) starting in the LRS. The smaller area junc-tions of 3×3 µm2 and 4×4 µm2 junction areas seemto start always in the ON state, indicating persis-tent platinum redeposition issues. The resistancevalues of both states also seem to be independentof the junction area, with a variation in each state ofabout two orders of magnitude around the averagevalue.

The switching reliability of the device does not

(a) Sample N3MA1 ini-tial resistances.

(b) Sample N3MA3 ini-tial resistances.

Figure 8: Initial resistances and states of devicesmeasured in samples N3MA1 and N3MA3.

(a) Sample N3MA1 de-vice endurance.

(b) Sample N3MA3 de-vice endurance.

Figure 9: Histogram of number of complete Set-Reset cycles before device failure, by area, in sam-ples N3MA1 and N3MA3.

seem to be determined by the starting state, sincesome devices attained a high number of Set-Resetevents even though they started in the LRS.

The overall yield of the fabrication process is low:most devices, regardless of starting state, do notexhibit any sort of reversible switching. In devicesthat do show some switching, it is nevertheless verylimited, only completing one or two full cycles be-fore failure, indicating issues with fabrication pro-cess.

Sample N3MA3, where crossbar devices werepatterned, shows generally poorer performance, asseen in Figs. 8b and 9b: out of 44 measured mem-ristors only 6 exhibited switching behavior, and inthose only one to two cycles were possible before apermanent state change.

Junctions with larger areas seem to be more reli-able, with more memristors displaying more cyclesbefore failing than smaller area devices. The Setand Reset voltages, as well as resistances in bothstates, is shown in Fig. 10.

The Set voltages vary from around 2 V to 18 V,while the Reset values are stable throughout themeasurement, varying from near zero to -3 V. Re-garding the resistance values represented in the fig-ure, the ON state has a tight distribution of values,varying from 10 Ω to 1 kΩ, while the OFF stateresistances are more slightly spread out; the two

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Figure 10: (N3MA1) Set and Reset voltage thresh-olds and resistances in the On and Off states, for100×100 µm2 junction with large number of cycles(Icomp = 1 mA).

states can nevertheless be clearly distinguished fromeach other. These observations follow other experi-mental work in the same kind of devices.[5, 6, 11].

The first iteration of the short fabrication pro-cess, in sample F3N2, did not improve upon thefull process: only 2 10×10 µm2 memristors out of atotal of 32 measured devices lasted up to 10 com-plete cycles before failure, while no individual de-vices registered switching.

The modifications to the process applied in sam-ple F3N3, in contrast, have significantly improvedthe yield and endurance of the devices, as shownin Fig. 11, particularly for the largest 100×100µm2 devices, some of which lasted for several dozenswitches without failure, while presenting stableROFF/RON ratios of around 10

2.

Figure 11: (F3N3) Histogram of number of com-plete Set-Reset cycles before device failure, by area,for 47 devices. The 100×100 µm2 crossbar junctionsthat switch for 11+ complete cycles did not fail andare still operational after testing.

7.2. SEM inspection

A SEM inspection of the devices in sample N3MA1was performed on a Raith-150 E-beam system. Thefocus of the observation was in and around the pillararea, since it contains the MgO thin film responsible

for the resistive switching and is the most critical lo-cation in the fabrication process. Several elements,both in a virgin state and after measurement, wereobserved, as shown in Figs. 12-13.

Figure 12: (N3MA1) SEM observation of 30×30µm2 unmeasured device.

Figure 13: (N3MA1) SEM observation of 8×8 µm2device after measurement-induced failure.

On closer inspection of the pillar areas in Fig 12,the sidewalls display more material present is somesegments than others. This visual aspect points tothe presence of liftoff residues which are sharp up-ward features. These are formed after the first pas-sivation of the pillar sidewalls, so a smooth pillar-oxide transition is not possible.

These structural defects result in material disin-tegration as seen in Fig. 13, which always appearin or around the junction pillar. Particularly in themetallization stage, the AlSiCu reinforcement layerwill be thinner than expected along the pillar walls,which leads to a localized increase in current den-sity, in turn leading to accelerated electromigrationin this region and ultimately the disruption of theelectrode and of the device.

SEM observations of sample N3MA3 exhibitsthe same results.

Regarding the short process, devices in sampleF3N2 show the same sort of damage caused by themeasurement procedure, as shown in 14; the topelectrode is stressed due to electromigration after

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Figure 14: (F3N2) SEM observation of 10×10 µm2device after measurement-induced failure.

successive cycles and breaks at the interface withthe bottom electrode, due to liftoff residues. Otherissues were detected for smaller junctions, mainlydue to misalignment between both levels and poorphotoresist profile.

The next iteration of the process, used to fabri-cate sample F3N3, shows extensive improvementson device morphology. As seen on Fig. 15, since thetop level contour is much smoother, the presence ofliftoff residues is mitigated and the small misalign-ment does not affect performance, as evidenced inthe electric characterization of this sample.

Figure 15: (F3N3) SEM observation of 5×5 µm2unmeasured individual device.

8. ConclusionsThis thesis focused on the development of mag-nesium oxide-based memristive structures, in in-dividual and crossbar array configurations. Tothat end, several material characterization and pro-cess optimization steps were undertook, using aPt/MgO/Ta/Ru thin film stack.

The resistivity of the top electrode films, ruthe-nium and tantalum, respectively with thicknesses293 ± 48 Å and 337 ± 34 Å, was determined to be48.9 ± 5.8 and 174.8 ± 17.9 µΩ·cm, respectively.The MgO ion beam etching rate in Nordiko 3600was also determined using the standard and an it-

erative method, and it was found to be, respectivelyfor these two methods, 0.76 ± 0.09 Å/s and 0.71 ±0.06 Å/s for a 60o pan angle and 0.93 ± 0.03 Å/sand 0.97 ± 0.09 Å/s for a 30o pan angle. X-raydiffraction analysis of MgO, Ta and Ru revealedhighly textured materials with a single highly pre-ferred crystallographic orientation, respectively andusing Miller indices notation, {2 0 0}, {1 1 0} and{1 0 1}, which correspond to average interplanardistances of 2.08 Å, 2.61 Å and 2.11 Å.

Efforts to minimize platinum redeposition in thepillar sidewalls were also done, although the electricresults were inconclusive. It was found empiricallythat etching the top electrode layers and most of theMgO film (70%) at 60o and the remainder of MgOwith a slight overetch at 30o yielded best results inlarge-area round pillars.

Two different fabrication processes were imple-mented. In the first, the MIM junction is definedby ion beam etching before defining the bottom andtop electrodes. In the second process, the bottomelectrode is defined first and aluminium oxide isused to level the sample surface; the junction is thendefined by depositing the MgO, Ta and Ru films ina precise overlap with the bottom electrode.

In the first fabrication method, around 60% of in-dividual devices did not show any resistive switch-ing behavior, while those that did show a poorendurance during the measurement process, witharound 33% of devices lasting only for one or twocomplete Set-Reset cycles before ceasing operation;larger areas seem to be more resilient to testing withtwo 100×100 µm2 devices exhibiting a large numberof Set-Reset cycles (∼ 80) and a clear separation ofthe ON and OFF states (ROFF/RON ≈ 102). Cross-bar arrays fared significantly worse: out of 44 mea-sured devices only 6 showed a very limited abilityto perform resistive switching.

SEM observations uncovered the same critical is-sue in both processes. Liftoff residues originatingfrom the first passivating and levelling oxides, re-spectively for the first and second processes, re-sulted in very sharp protuberances that affect thetopography of the films deposited on top which ex-acerbate electromigration phenomena near those re-gions. Thus, successive sweeps cause progressivedegradation and ultimately lead to device failure.

These issues were mitigated in the last iterationof the two-step process, mainly by increasing themetallization layer thickness and significantly pro-longing the liftoff duration.

This sample showed a marked improvement inthe yield and endurance of the devices. All individ-ual junctions measured have exhibited complete RScycles; regarding the crossbar configurations, theimprovements are more limited; even so, the en-durance is better than previously, with 4 out of 17

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100×100 µm2 devices showing more than 11 full cy-cles without electric failure.

In conclusion, despite revealing some shortcom-ings that still persist in the fabrication process,these results are very promising. Resistive switch-ing has been shown in crossbar arrays of memris-tors using the Pt/MgO/Ta/Ru stack and developedwith the tools available at INESC-MN. Thus, thesestructures present a good basis for future implemen-tations in artificial neural networks.

Future work is necessary, in terms of electric char-acterization, by using unipolar measurements andpulsed measurements as well, in the fabrication pro-cess, such as using chemical-mechanical polishingto fully remove liftoff residues and cross-sectionalSEM to directly observe the material hierarchy inthe junction region, and by studying other stackmaterials that might improve the electric behaviorof the device.

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[2] D. B. Strukov, G. S. Snider, D. R. Stewart,and R. S. Williams. The missing memristorfound. Nature, 453(7191):80–83, May 2008.ISSN 0028-0836. doi: 10.1038/nature06932.

[3] B. Linares-Barranco, T. Serrano-Gotarredona,L. Camuñas-Mesa, J. Perez-Carrasco, C. Za-marreño-Ramos, and T. Masquelier. On Spike-Timing-Dependent-Plasticity, Memristive De-vices, and Building a Self-Learning Visual Cor-tex. Frontiers in Neuroscience, 5:26, 2011.ISSN 1662-453X. doi: 10.3389/fnins.2011.00026.

[4] H.-H. Huang, W.-C. Shih, and C.-H. Lai. Non-polar resistive switching in the Pt/MgO/Ptnonvolatile memory device. Applied PhysicsLetters, 96(19):193505, May 2010. doi: 10.1063/1.3429024.

[5] L. M. Guerra, C. Dias, J. Pereira, H. Lv,S. Cardoso, P. P. Freitas, and J. Ven-tura. Unipolar Nonvolatile Resistive Switchingin Pt/MgO/Ta/Ru Structures Deposited byMagnetron Sputtering. Journal of Nanoscienceand Nanotechnology, 17(1):564–567, Jan. 2017.doi: 10.1166/jnn.2017.12333.

[6] C. Dias, L. M. Guerra, B. D. Bordalo,H. Lv, A. M. Ferraria, A. M. B. do Rego,S. Cardoso, P. P. Freitas, and J. Ventura.Voltage-polarity dependent multi-mode resis-tive switching on sputtered MgO nanostruc-tures. Physical Chemistry Chemical Physics,

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[7] D. Wuu, C. Chan, and R. Horng. Char-acterization of sputtered Ta–Ru thin filmsfor ink-jet heater applications. Thin SolidFilms, 373(1):84–88, 2000. ISSN 0040-6090.doi: 10.1016/S0040-6090(00)01098-1. URLhttp://www.sciencedirect.com/science/

article/pii/S0040609000010981. Proceed-ings of the 11th International Conference onThin Films.

[8] S. Freitas. Dual-stripe GMR And Tunnel Junc-tion Read Heads And Ion Beam DepositionAnd Oxidation Of Tunnel Junctions. PhD the-sis, Instituto Superior Técnico, Dec. 2001.

[9] A. J. Blake, J. M. Cole, and J. S. O.Evans. Crystal Structure Analysis: Prin-ciples and Practice. OXFORD UNIV PR,2009. ISBN 019921946X. URL https://www.ebook.de/de/product/8944867/

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[10] R. Downs and M. Hall-Wallace. The AmericanMineralogist crystal structure database. Amer-ican Mineralogist, 88(1):247–250, Jan. 2003.ISSN 0003-004X. URL http://rruff.geo.arizona.edu/AMS/amcsd.php.

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