ad144_la-1011232
DESCRIPTION
ad144_LA-10112323TRANSCRIPT
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PAGE 35
PAGE 30
EmbeddedController
PCI BUS
ES1988
PAGE 42
SO-DIMM X2
OZ163Rev.C
OZ6933T
P
S
B
PAGE 27
DC-IN JACKPAGE 9,10,11
LAN
Parallel
MAX1617MEE
EQ Circuit
PAGE 28
PAGE 4,5
USB X 2
PAGE 35
Docking Connector
PAGE 17,18
625 BGA
HDD Connector
USB & BlueTooth
ICS9250-38
Audio Amplifier
EXT. MIC IN
PAGE 25
FDD
ATA 66/100
Mic Jack
LPC
PAGE 33
BATTERY
NS PC87591
Audio DJ
PAGE 23
PAGE 8
Charger
PAGE 39
PARALLEL PORT
Almador-M GMCH-M
POWERInterface
Mobile Tualatin orCoppermine-T Thermal Sensor
H
U
B
I
n
t
e
r
f
a
c
e
ICH3-M
PS/2 CONN.
CD-ROM Connector
Scan KBPAGE 28
LINE OUT
PAGE 20
Kinnereth82562ET
FIRPAGE 33
Memory Bus
PAGE 16
BANK 0, 1, 2, 3 LAN
PAGE 5
CK TITAN
NS PC87391AudioController
PAGE 24
SERIAL PORT
PAGE 26
CardBus
(uFCBGA/uFCPGA)
Slot 0/1
PAGE 40,41,42,44
DC/DC InterfaceRTC Battery
PAGE 14
PS/2 Interface
USB
Model Name :N32N101PCB No :LA-1011Date :2001/09/01Revision : 1.0
PAGE 37
BLOCKDIAGRAM
CRTConn.
421 BGA
PAGE 21
PAGE 21
PAGE 32
Super I/O
CRT CONN.
PAGE 38
Mini PCISocket
PAGE 29
PAGE 7
CPU VID & Allreference voltage
PAGE 36
FAN on controller &TEMP. sensing circuit
IEEE-1394Controller
PAGE 22
PAGE 33 PAGE 31
ROMBIOS
PAGE 15
LVDSConn.
DVOC Bus InterfaceTV-OutEncoder
PAGE 15
PAGE 15DVOA Bus InterfaceVCH
TV-OutConn. PAGE 16
401174 1A
SCHEMATIC, M/B LA-1011
Custom
2 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Voltage Rails
VINB++VCC_H_CORE+VTT
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU1.2V switched power rail for CPU AGTL Bus
External PCI DevicesDevice IDSEL# REQ#/GNT# Interrupts
CardBus
Mini-PCI
LANAD20
AD18
(AD24 internal)
EC SM Bus1 addressDevice
MAX1617MEE
OZ163
Docking
S1 S3 S5
ON OFFON OFF
N/A N/A N/AN/AN/AN/A
Power Plane Description
OFFOFF
Audio Controller AD19
+1.8V_SW OFF1.8V switched power rail ON OFFON+2.5V 2.5V power rail OFF
EC SM Bus2 addressDevice
Smart Battery
2
3
1
PIRQA/PIRQB
PIRQD
PIRQC
Mini-PCI(LAN) AD22 4 PIRQD
ON
EEPROM
DOT Board
0011 0100 b
1001 110X b
0011 011X b
XXXX XXXXb
0001 011X b
1010 000X b
+1.8V_ALW 1.8V always on power rail ON ON ON*+1.5V_SW AGP 4X ON OFF OFF+1.5V_ALW 1.5V always on power rail ON ON ON*
+3V
OFF
ON
12V always on power rail
ON
ON
OFFON
ON
3.3V switched power rail
+12V_SW
3.3V always on power rail
+3V_SW
OFF
+5V
3.3V power rail
ON*OFF5V switched power rail
5V power rail OFFON
OFF
ON+5V_ALW
ON
ON
+12V_ALW
+3V_ALW
ON
OFF
5V always on power rail
ON
OFF
ON
ON
ON
+5V_SW
ON
ON
RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON*
ON*
RTCVCC12V switched power rail
+2-5V_MRIMM 2.5V switched power rail ON OFF OFF
IEEE-1394 Controller AD16 0 PIRQA
P.S:Default Resistor & Capacitor's package are 0402.Default 8P4R package is 0402.
ICH3 SM Bus addressDeviceSODIMM 1010 000X b
1101 001X bClock Gen.
401174 1A
SCHEMATIC, M/B LA-1011
Custom
3 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MobileTualatin
AddressLines
RequestSignals
InterfaceError
ArbitrationSignals
VCC
SnoopSignals
VSS VCC
DataSignals
401174 1A
SCHEMATIC, M/B LA-1011
Custom
4 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
H_D#52
H_D#43
H_D#14
H_A#27
H_A#14
H_A#11
H_D#41H_D#40H_D#39H_D#38
H_D#9
H_A#22
H_A#20
H_A#12
H_D#26H_D#25
H_D#[0..63]
H_D#63
H_D#19
H_D#15
H_D#10
H_REQ#4
H_A#23
H_A#17
H_REQ#[0..4] H_D#33
H_D#16
H_A#30
H_A#21
H_A#9
H_A#3
H_D#51H_D#50
H_D#42
H_D#32H_D#31H_D#30
H_D#12H_A#16
H_A#26
H_A#24
H_A#18
H_D#62
H_D#8
H_D#6
H_D#11
H_D#5
H_D#3
H_A#31
H_A#29
H_D#57H_D#56H_D#55H_D#54H_D#53
H_D#49H_D#48H_D#47H_D#46H_D#45H_D#44
H_D#18
H_D#29
H_D#1H_D#0
H_REQ#3
H_D#28H_D#27
H_REQ#2H_REQ#1H_REQ#0
H_A#28
H_A#15
H_A#7H_A#6
H_A#4
H_D#24H_D#23H_D#22H_D#21H_D#20
H_D#17
H_D#13
H_D#2
H_A#25
H_A#10
H_A#5
H_A#[3..31]
H_D#61H_D#60
H_D#7
H_D#4
H_A#13
H_A#8
H_D#59H_D#58
H_D#37H_D#36H_D#35H_D#34
H_A#19
+VCC_H_CORE
+1.5V_SW
+VCC_H_CORE
R19 1.5K1 2
R28 101 2
U4A
TUALATIN
K1J1
G2K3J2H3G1A3J3H1D3F3G3C2B5
B11C6B9B7C8A8
A10B3
A13A9C3
C12C10
A6A15A14B13A12
R1L3T1U1L1T4
AA3
W2AB3
P3C14
AF23AF4
L2R2
AD23C22C4A7
V3
T3U2
AA2
A16B17A17D23B19C20C16A20A22A19A23A24C18D24B24A18E23B21B23E26C24F24D25E24B25G24H24F26L24H25C26K24G26K25J24K26F25N26J26M24U26P25L26R24R26M25V25T24M26P24AA26T26U24Y25W26V26AB25T25Y24W24Y26AB24AA24V24
D22
F22
E21
H22
G21
K22
J21
M22
L21
P22
N21
T22
R21
V22
U21
Y22
W21
AB
22A
A21
AC
21D
20F2
0E
19A
B20
AA
19A
C19
D18
F18
E17
AB
18A
A17
AC
17D
16F1
6E
15A
B16
AA
15A
C15
D14
F14
E13
AB
14A
A13
AC
13D
12F1
2E
11A
B12
AA
11A
C11
D10
F10
E9
AB
10A
A9
AC
9D
8F8 E
7A
B8
AA
7A
C7
D6
F6 E5
H6
G5
K6
J5 N5
T6 V6
U5
Y6
W5
AB
6A
A5
AC
5M
6P
6
E16
R4
E25
G25
J25
L25
N25
R25
U25
W25
AA
25A
C25
AF2
5A
E26
C23
F23
H23
K23
M23
P23
T23
V23
Y23
AB
23A
E23
B22
D21
F21
E22
H21
G22
K21
J22
M21
L22
P21
N22
T21
R22
V21
U22
Y21
W22
AB
21A
A22
AC
22A
E21
B20
D19
AB
19A
A20
AC
20A
E19
B18
D17
F17
E18
AB
17
A#3A#4A#5A#6A#7A#8A#9A#10A#11A#12A#13A#14A#15A#16A#17A#18A#19A#20A#21A#22A#23A#24A#25A#26A#27A#28A#29A#30A#31A#32A#33A#34A#35
REQ#0REQ#1REQ#2REQ#3REQ#4RP#ADS#
AERR#AP#0AP#1BERR#BINIT#IERR#
BNR#BPRI#NCNCNCBREQ0#
LOCK#
DEFER#HITM#HIT#
D#0D#1D#2D#3D#4D#5D#6D#7D#8D#9
D#10D#11D#12D#13D#14D#15D#16D#17D#18D#19D#20D#21D#22D#23D#24D#25D#26D#27D#28D#29D#30D#31D#32D#33D#34D#35D#36D#37D#38D#39D#40D#41D#42D#43D#44D#45D#46D#47D#48D#49D#50D#51D#52D#53D#54D#55D#56D#57D#58D#59D#60D#61D#62D#63
VC
C_0
VC
C_1
VC
C_2
VC
C_3
VC
C_4
VC
C_5
VC
C_6
VC
C_7
VC
C_8
VC
C_9
VC
C_1
0V
CC
_11
VC
C_1
2V
CC
_13
VC
C_1
4V
CC
_15
VC
C_1
6V
CC
_17
VC
C_1
8V
CC
_19
VC
C_2
0V
CC
_21
VC
C_2
2V
CC
_23
VC
C_2
4V
CC
_25
VC
C_2
6V
CC
_27
VC
C_2
8V
CC
_29
VC
C_3
0V
CC
_31
VC
C_3
2V
CC
_33
VC
C_3
4V
CC
_35
VC
C_3
6V
CC
_37
VC
C_3
8V
CC
_39
VC
C_4
0V
CC
_41
VC
C_4
2V
CC
_43
VC
C_4
4V
CC
_45
VC
C_4
6V
CC
_47
VC
C_4
8V
CC
_49
VC
C_5
0V
CC
_51
VC
C_5
2V
CC
_53
VC
C_5
4V
CC
_55
VC
C_5
6V
CC
_57
VC
C_5
8V
CC
_59
VC
C_6
1V
CC
_62
VC
C_6
3V
CC
_64
VC
C_6
5V
CC
_66
VC
C_6
7V
CC
_68
VC
C_6
9V
CC
_70
VC
C_7
1V
CC
_72
VC
C_7
3V
CC
_74
VC
C_7
5V
CC
_76
VC
C_7
7V
CC
_78
VC
C_7
9V
CC
_80
VS
S_0
VS
S_1
VS
S_2
VS
S_3
VS
S_4
VS
S_5
VS
S_6
VS
S_7
VS
S_8
VS
S_9
VS
S_1
0V
SS
_11
VS
S_1
2V
SS
_13
VS
S_1
4V
SS
_15
VS
S_1
6V
SS
_17
VS
S_1
8V
SS
_19
VS
S_2
0V
SS
_21
VS
S_2
2V
SS
_23
VS
S_2
4V
SS
_25
VS
S_2
6V
SS
_27
VS
S_2
8V
SS
_29
VS
S_3
0V
SS
_31
VS
S_3
2V
SS
_33
VS
S_3
4V
SS
_35
VS
S_3
6V
SS
_37
VS
S_3
8V
SS
_39
VS
S_4
0V
SS
_41
VS
S_4
2V
SS
_43
VS
S_4
4V
SS
_45
VS
S_4
6V
SS
_47
VS
S_4
8V
SS
_49
VS
S_5
0V
SS
_51
VS
S_5
2V
SS
_53
VS
S_5
4V
SS
_55
VS
S_5
6V
SS
_57
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
H_A#[3..31]9
H_REQ#[0..4]9
H_D#[0..63] 9
H_ADS#9
H_BNR#9H_BPRI#9
H_LOCK#9
H_HIT#9H_HITM#9
H_DEFER#9
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Place H_RESET#R272
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Layout note :
Place .47uF caps underneath balls on solder side.
Use 2~3 vias per PAD.Place 10uF caps on the peripheral near balls.
Place close to CPU, Use 2~3 vias per PAD.
Place close to CPU, Use 2 vias per PAD.
Layout note :
D4 D3 D2 D1 D0 CPU_Core(V) QS( MP)
01.40V
11
11
-------------------------------------------------------
Tualatin
000
-------------------------------------------------------
0 1.15V0
-------------------------------------------------------
1
-------------------------------------------------------
10 1.35V
0
0
1
-------------------------------------------------------
0
Coppermine-T
0 1.70V0
01
01.35V
0
D4 D3 D2 D1 D0 CPU_Core(V) QS( MP)
D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)
1.70V
0
-------------------------------------------------------
0
00
0
0
0
-------------------------------------------------------
401174 1A
SCHEMATIC, M/B LA-1011
Custom
6 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
+VCC_H_CORE
+VCC_H_CORE
+VCC_H_CORE
+VCC_H_CORE
+VCC_H_CORE
+VCC_H_CORE
+VTT
+VTT
C404.22UF_0603
12
C413
.22UF_0603
12
C398
.22UF_0603
12
C426.22UF_0603
12
C428
.22UF_0603
12
C401
.22UF_0603
12
C440.22UF_0603
12
C434
.22UF_0603
12
C399.22UF_0603
12
C437.22UF_0603
12
C411
.22UF_0603
12
C396.22UF_0603
12
C438.22UF_0603
12
C432
.22UF_0603
12
C410
.22UF_0603
12
C402.22UF_0603
12
C433
.22UF_06031
2
C397.22UF_0603
12
C439
.22UF_0603
12
C425.22UF_0603
12
C412
.22UF_0603
12
C427.22UF_0603
12
C435
.22UF_0603
12
C403.22UF_0603
12
C9810UF_10V_1206
12
C6210UF_10V_1206
12
C40710UF_10V_1206
12
C1710UF_10V_1206
12
C40610UF_10V_1206
12
C42910UF_10V_1206
12
C9910UF_10V_1206
12
C39010UF_10V_1206
12
C2510UF_10V_1206
12
C4610UF_10V_1206
12
+ C59150UF_D2_6.3V
12
+ C104150UF_D2_6.3V
12
+ C391150UF_D2_6.3V
12
+ C387150UF_D2_6.3V
12
+ C52150UF_D2_6.3V
12
+ C469150UF_D2_6.3V
12
+ C471150UF_D2_6.3V
12
+ C24150UF_D2_6.3V
12
+ C444150UF_D2_6.3V
12
+ C424150UF_D2_6.3V
12
+ C75150UF_D2_6.3V
12
C291UF_0603
12
C431UF_0603
12
C561UF_0603
12
+ C42150UF_D2_6.3V
12
+ C47150UF_D2_6.3V
12
C1021UF_0603
12
C551UF_0603
12
C411UF_0603
12
C911UF_0603
12
C1011UF_0603
12
C631UF_0603
12
+ C105150UF_D2_6.3V
12
C4361UF_0603
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+ C28150UF_D2_6.3V
12
+ C76150UF_D2_6.3V
12
+ C51150UF_D2_6.3V
12
+ C392150UF_D2_6.3V
12
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Default for Resistors Shouldbe +VCC_CPU = 0.7V, forDeeper Sleep Only.
HUB Interface Reference
GTL Reference Voltage
CMOS Reference Voltage
HUB Interface VSwing Voltage
1. Place R70 and R75 between and GMCH and CPU.2. Place decoupling caps near CPU.(Within 500mils)
Layout note :
1. Place R81 and R76 between and GMCH and CPU.2. Place decoupling caps near CPU.
Layout note :
Place capacitor close to GMCH.
System Memory Reference
1. Place R123 and R124 in middle of Bus.2. Place capacitors near GMCH.
Layout note :
1. Place R360 and R361 in middle ofBus.
Place Reference Circuit near GMCH
1. Place R255 and R253 near GMCH.
In-Target Probe
CPU Voltege ID
PM_SSGMUXSEL = 0 : for low Voltage A-C1 : for high Voltage B-C
249.9_1%
401174 1A
SCHEMATIC, M/B LA-1011
Custom
7 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
CPU_VID0CPU_VID1CPU_VID2CPU_VID3CPU_VID4
STRAP_VID0STRAP_VID1STRAP_VID2STRAP_VID3STRAP_VID4
MUX_VID3MUX_VID2MUX_VID1MUX_VID0
MUX_VID4
MUX_VID3MUX_VID2MUX_VID1
MUX_VID4
MUX_VID0
CPU_VID4
CPU_VID3CPU_VID2CPU_VID1CPU_VID0
+VTT+1.5V_SW+VTT
+VTT
+1.5V_SW
+VTT
+3V_ALW
+3V_SW
+5V_SW
+5V_SW
+3V
+V_SMREF
+1.8V_SW
+VS_HUBREF
+1.8V_SW
+VS_HUBVSWING
+1.8V_SW
+VS_RIMMREF
+VTT
+V_AGTLREF
+1.5V_SW
+1.5V_SW
+VS_CMOSREF
+VAGP_CRDREF
+3V_SW
RP2@8P4R_10K
18
27
36
45
R100
@10K
12
12
R101@0
12
R103
@0
12
R102@0
12
R107
@0
12
R108@0
12
C515.01UF
12
U34
SN74CBT3383
1
23
4 5
67
8 9
1011
1213
14 15
1617
18 19
2021
22 23
24BE#
C0A0
B0 D0
C1A1
B1 D1
C2A2
GNDBX
B2 D2
C3A3
B3 D3
C4A4
B4 D4
VCC
R68499_1%
12
C430.1UF
12
R651K_1%
12
C423.1UF
12
R621K_1%
12
R642K_1%
12
C389.1UF
12
C400.1UF
12
C443.1UF
12
C388.1UF
12
U33
@SN74CBT3383
1
23
4 5
67
8 9
1011
1213
14 15
1617
18 19
2021
22 23
24BE#
C0A0
B0 D0
C1A1
B1 D1
C2A2
GNDBX
B2 D2
C3A3
B3 D3
C4A4
B4 D4
VCC
R133249_1%
12
C223.1UF
12
R12649.9_1%
12
R159301_1%
12
R152301_1%
12
R438301_1%
12
R435301_1%
12
C643.1UF
12
R1271K_1%
12
R1131K_1%
12
C229 470PF1 2
R13482.5_1%
12
R11982.5_1%
12C216 470PF1 2
R2872K_1%
12
R296576_1%
12
R43 2401 2
R44
56.2_1%
12
R275
200
12
R269
150
12
R266
200
12
R313
56.2_1%
12
R27039
12
R79
39
12
R84
10K
12
R311 24012
JP15
@ITP_RECEPTACLE
2468
1012141618202224262830
1357911131517192123252729
RESET#DBRESET#TCKTMSPOWERONDBINST#GNDGNDGNDGNDGNDGNDGNDGNDBCLK
GNDGNDGND
TDITDO
TRST#BSEN#
PREQ0#PRDY0#PREQ1#PRDY1#
NCNCNC
BCLK#
R86
1.5K
12
R328240
12
C256.1UF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C496
@15PF
12
R317
@10
12
C512
@15PF
12
R332
@10
12
R34 5101 2
R3331K
12
RP168P4R_1K
18
27
36
45
R553 01 2
RP37 8P4R_0
1 82 73 64 5
PM_DPRSLPVR17,43
CPU_VID0 43CPU_VID1 43CPU_VID2 43CPU_VID3 43CPU_VID4 43
AC_VID118
AC_VID318
AC_VID018
PM_SSMUXSEL17,43
AC_VID218
AC_VID418
CPU_VR_VID35
CPU_VR_VID15
CPU_VR_VID45
CPU_VR_VID25
CPU_VR_VID05
ITP_TDI 5ITP_TDO 5ITP_TRST# 5
ITP_PREQ# 5ITP_PRDY# 5
H_RESETX#9
ITP_TCK5ITP_TMS5
CLK_ITPP8 CLK_ITPP# 8
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Place Crystal within 500 mils of CK_Titan
caps are internal to CK_TITAN
Place all these Block's Components near CPU (U6)
Place all these Block's Components near GMCH (U23)
Place caps. near CK_Titan (U31)
Place all these Block's Components near ITP (JP1)
Width=40 mils
401174 1A
SCHEMATIC, M/B LA-1011
Custom
8 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
DOT_48M
CLK_HT#
CLK_BCLK#
USB_48M ICH_33M
ICH_66M
CB_33M
GBIN_66M
APIC_33M PCIF1
EC_33M
REF_14M
SEL0SEL1
MINI_33M
CLK_ITP
CLK_ITP#
AUD_33MSIO_33M
HOST_CPU CLK_BCLK
HOST_CPU#
GMCH_CPU CLK_HT
GMCH_CPU#
1394_33M
VCH_66M
GBIN_ISO
+3V_SW
+3V_SW
+3V_SW
+3V_SW
+3V_SW
+3V_CLK
+12V_SW+12V_SW
+3V_SW +3V_SW
R278 331 2
R390 221 2
R277 331 2
R281475_1%
12
R282 60.4_1%1 2
R280 60.4_1%1 2
R9 331 2
R10 331 2
R8475_1%
12
R5 60.4_1%1 2
R6 60.4_1%1 2
R389 331 2
R388 220_1%1 2
R425 331 2
R432 331 2
R427 331 2
C629 10PF12
C647 10PF12
Y314.318MHZ
12
+C626
22UF_1206_10V
12
C286.01UF
12
C288.01UF
12
C314.01UF
12
C289.01UF
12
C315.01UF
12
C287.01UF
12
C313.01UF
12
C615.01UF
12
C316.01UF
12
L46BLM21A601SPT1 2
L50BLM21A601SPT1 2
+C33522UF_1206_10V
12
C664.01UF
12
R424 331 2
R433 331 2R434 331 2
C654@10PF
12
C652@10PF
12
R400 331 2
R399 331 2
C589@10PF
12
C588@10PF
12
R3801K
12
R386
1K1
2
R364 10K1 2
R403 01 2
R426 331 2
R318 331 2
R324 @331 2
R325475_1%
12
R320 60.4_1%1 2
R330 60.4_1%1 2
R431 331 2R430 331 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R3960
1 2
R375 240K1 2
R397
01 2
R394
01 2
R393
01 2
C653
@10PF
R437
@3312
R429 331 2
R391 22_1%1 2
C655 .01UF
G
D S
Q312N7002
2
1 3
G
D S
Q29
2N7002
2
1 3
R231100K
12
R229100K
12
R23010K
12
R23210K
12
U41
ICS9250-38
1 8 14 19 32 37 46 50
26
4 9 15 20 31 36 41 47
273
2
405554
253453
28
43
2930
3335
42
45
44
49
48
52
51
24
232221
765
18171613121110
39
38
56V
DD
_RE
FV
DD
_PC
IV
DD
_PC
IV
DD
_3V
66V
DD
_3V
66V
DD
_48M
HZ
VD
D_C
PU
VD
D_C
PU
VDD_CORE
GN
D_R
EF
GN
D_P
CI
GN
D_P
CI
GN
D_3
V66
GN
D_3
V66
GN
D_4
8MH
ZG
ND
_IR
EF
GN
D_C
PU
GND_COREXTAL_OUT
XTAL_IN
SEL2SEL1SEL0
PWR_DWN#PCI_STOP#CPU_STOP#
VTT_PWRGD#
MULT0
SDATASCLK
3V66_0/DRCG3V66_1/VCH_CLK
IREF
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
66MHZ_IN/3V66_5
66MHZ_OUT2/3V66_466MHZ_OUT1/3V66_366MHZ_OUT0/3V66_2
PCICLK_F2PCICLK_F1PCICLK_F0
PCICLK6PCICLK5PCICLK4PCICLK3PCICLK2PCICLK1PCICLK0
48MHZ_USB
48MHZ_DOT
REF
R365100K
12
L52 BLM21A601SPT
1 2
CLK_DREF9
CLK_GHT 9
CLK_GHT# 9
CLK_HCLK 5
CLK_HCLK# 5
CLK_ICH4817
PM_SLP_S1#17,30PM_STPPCI#17
PM_STPCPU#17
CLK_GBOUT 9
CLK_CPU_APIC 5
CLK_ICHHUB 17
CLK_LPC_EC 30
CLK_ICHPCI 17
CLK_PCI_CB 23
CLK_GBIN 9
CLK_ICH1417CLK_SIO1432
SMB_CLK14,17,19
SMB_DATA14,17,19
H_BSEL15H_BSEL05,11
CLK_MINIPCI 38
CLK_ITPP 7
CLK_ITPP# 7
CLK_PCI_AUD 27CLK_LPC_SIO 32
VTT_PWRGD#5,30
CLK_VCH15
CLK_1394 22
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Almador-M GMCH
HostInterface
HostInterface
VSS
10 mils wide,length
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Place resistors & capacitors near GMCHLayout note :
Almador-M GMCH
SDRAMSystemMemory
SDRAMSystemMemory
VSS
VSS Power
C181/C188 close toBall E5 and F24
Layout note :1.Placement TP6 for Almador-M A2 stepping die.2.The 0.1uF capacitor and connection to +3Vmust be implanted for Almador-M A3 steppingdie.
Total trace length from ballC24 to A24 and C470 do notexceed 200mils.
401174 1A
SCHEMATIC, M/B LA-1011
Custom
10 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
SM_DQM0SM_DQM1SM_DQM2SM_DQM3SM_DQM4SM_DQM5SM_DQM6SM_DQM7
SM_CS#0
SM_CS#2
SM_D_CLK0
SM_CKE0
SM_CKE2SM_CKE3
SM_D_MA3
SM_D_MA8
SM_D_MA4
SM_D_MA10SM_D_MA9
SM_D_MA5
SM_D_MA12
SM_D_MA1
SM_D_MA[0..12]
SM_D_MA0
SM_D_MA11
SM_D_MA2
SM_D_MA6SM_D_MA7
SM_CS#3
GMCH_RAS#GMCH_CAS#GMCH_WE#
SM_OCLK
SM_D_CLK0
SM_D_CLK2SM_D_CLK3
SM_D_CLK3
SM_D_CLK1
SM_CS#1
SM_D_CLK2SM_D_CLK1
SM_CKE1
SM_DQ13
SM_DQ24
SM_DQ40
SM_DQ29
SM_DQ57
SM_DQ0
SM_DQ3
SM_DQ53
SM_DQ32
SM_DQ60
SM_DQ55
SM_DQ28
SM_DQ52
SM_DQ15
SM_DQ39
SM_DQ8
SM_DQ46
SM_DQ49
SM_DQ38
SM_DQ33
SM_DQ26
SM_DQ9
SM_DQ1
SM_DQ25
SM_DQ61
SM_DQ63
SM_DQ51
SM_DQ11
SM_DQ36
SM_DQ58
SM_DQ48
SM_DQ16
SM_DQ41
SM_DQ21SM_DQ20
SM_DQ42
SM_DQ31
SM_DQ7
SM_DQ45
SM_DQ37
SM_DQ18
SM_DQ12
SM_DQ27
SM_DQ54
SM_DQ2
SM_DQ59
SM_DQ23
SM_DQ19
SM_DQ5
SM_DQ10
SM_DQ6
SM_DQ30
SM_DQ62
SM_DQ35
SM_DQ44
SM_DQ14
SM_DQ47
SM_DQ34
SM_DQ43
SM_DQ50
SM_DQ56
SM_DQ17
SM_DQ22
SM_DQ4
SM_DQ[0..63]
+VTT
+V_SMREF
+3V
+3V
+3V
R150 101 2R149 101 2R151 101 2
C259@33PF
12
R378 101 2
R148 101 2R157 101 2
C255@33PF
12
C587@33PF
12
C254@22PF_NPO
12
R156 101 2
C260@33PF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C248 .1UF1 2
C230
.1UF
12
C217
.1UF
12
C253 .1UF1 2
U30B
82830
D29C29D27C27A27B26E24C25E23B25C23F22B23C22E21B22C12D10C11A10C10C8A7E9C7E8A5F8C5D6B4C4
E27C28B28E26C26D25A26D24F23A25G22D22A23F21D21A22F11A11B11F10B10B8D9B7F9A6C6D7B5E6A4D4
A20B20B19C19A18A19C17C18B17A17A16C15C14
F20E20F12E11C21F19E12A12
B16C16
F18D18D13D12E18F17F14F13
E17F16D16D15E15E14
A15B2B14A3A14C3
A13C9C13A9B13A8
C20
D19
A21
A24
C24
E5
F24
AD
8A
D9
AD
10A
J21
AE
8A
E9
AE
10A
E11
AE
12A
E13
AE
17A
E19
AH
21A
F8A
F9A
F10
AF1
1A
F12
AF1
3A
F14
AF1
5A
F16
AF1
7A
F18
AF1
9A
F20
AG
7A
G15
AG
16A
G21
AH
6A
H8
AH
9A
H11
AH
12A
H14
AH
17A
H18
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28
K28
N28
T28
W28
AB
28L2
5P
25U
25Y
25
AE
20G
24
H7
H23
K7
K23
L7 N6
T6 W7
Y7
AB
7M
24P
24T2
4V
24Y
23M
14M
15M
16P
12R
12T1
2P
18R
18T1
8
SM_DQ0SM_DQ1SM_DQ2SM_DQ3SM_DQ4SM_DQ5SM_DQ6SM_DQ7SM_DQ8SM_DQ9SM_DQ10SM_DQ11SM_DQ12SM_DQ13SM_DQ14SM_DQ15SM_DQ16SM_DQ17SM_DQ18SM_DQ19SM_DQ20SM_DQ21SM_DQ22SM_DQ23SM_DQ24SM_DQ25SM_DQ26SM_DQ27SM_DQ28SM_DQ29SM_DQ30SM_DQ31SM_DQ32SM_DQ33SM_DQ34SM_DQ35SM_DQ36SM_DQ37SM_DQ38SM_DQ39SM_DQ40SM_DQ41SM_DQ42SM_DQ43SM_DQ44SM_DQ45SM_DQ46SM_DQ47SM_DQ48SM_DQ49SM_DQ50SM_DQ51SM_DQ52SM_DQ53SM_DQ54SM_DQ55SM_DQ56SM_DQ57SM_DQ58SM_DQ59SM_DQ60SM_DQ61SM_DQ62SM_DQ63
SM_MA0SM_MA1SM_MA2SM_MA3SM_MA4SM_MA5SM_MA6SM_MA7SM_MA8SM_MA9
SM_MA10SM_MA11SM_MA12
NCNCNCNC
VSSVSS
VCC_SMVCC_SM
SM_BA0SM_BA1
SM_DQM0SM_DQM1SM_DQM2SM_DQM3SM_DQM4SM_DQM5SM_DQM6SM_DQM7
SM_CS#0SM_CS#1SM_CS#2SM_CS#3
VCCQ_SMVSS
SM_CLK0SM_CLK1SM_CLK2SM_CLK3
VSSVSS
SM_CKE0SM_CKE1SM_CKE2SM_CKE3
VSSVCC_SM
SM
_RA
S#
SM
_CA
S#
SM
_WE
#
SM
_OC
LKS
M_R
CLK
SM
_VR
EF0
SM
_VR
EF1
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
S_L
MV
SS
_LM
VS
SP
_SM
0V
SS
P_S
M1
VS
SP
_SM
2V
SS
P_S
M3
VS
SP
_SM
4V
SS
P_S
M5
VS
SP
_SM
6V
SS
P_S
M7
VS
SP
_SM
8V
SS
P_S
M9
VS
SP
_SM
10V
SS
P_S
M11
VS
SP
_SM
12V
SS
P_S
M13
VS
SP
_SM
14V
SS
P_S
M15
VS
SP
_SM
16V
SS
P_S
M17
VS
SP
_SM
18V
SS
P_S
M19
VS
SP
_AG
P0
VS
SP
_AG
P1
VS
SP
_AG
P2
VS
SP
_AG
P3
VS
SP
_AG
P4
VS
SP
_AG
P5
VS
SP
_AG
P6
VS
SP
_AG
P7
VS
SP
_AG
P8
VS
SA
_DP
LL0
VS
SA
_DP
LL1
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
VC
CV
CC
SM_D_MA[0..12] 13
SM_BA1 14SM_BA0 14
SM_DQM[0..7] 14
SM_CS#0 14
SM_CS#2 14SM_CS#3 14
SMD_CLK0 14
SMD_CLK2 14SMD_CLK3 14
SM_CKE0 14
SM_CKE2 14SM_CKE3 14
SM_RAS# 14SM_CAS# 14SM_WE# 14
SMD_CLK1 14
SM_CS#1 14
SM_CKE1 14
SM_DQ[0..63] 14
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Almador-M GMCH
Place close to AE16, AE15 of GMCH
Layout note :
AGPInterface
Local Memory Interface
Local Memory Interface
InterfaceDisplay
PowerInterface
(DVOB/DVOC & ZV port)
(DVOA port)
DVOA_D1 IOQD=2 IOQD=8
Strap Name Low High
DVOA_D6 Dual Ended Term Single Ended Term
DVOA_D5 Desktop Mobile
DVOA_D0 Reserved 133MHz
Place R8, R234, R278near VGA Connector.
R, L, Cplace nearGMCH.
AGP_PAR : Strapping optionfor SW detection of AGP orDVO device.0 -> DVO B/C device1 -> AGP device
1.5V level clock
401174 1A
SCHEMATIC, M/B LA-1011
Custom
11 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
+VC
CA_
DPL
L1
VCC
A_PL
L
VCC
A_D
AC
DVOA_CLKINT
DVOA_CLKINT
DVO_INTR#
DVO_INTR#
DVOA_D6DVOA_D5
DVOA_D1DVOA_D0
DVOD0DVOD1
DVOD5DVOD6
DAC_BLUE#DAC_GREEN#DAC_RED#
DAC_VSYNCDAC_HSYNC
VS_RIMMREF
DVOD2DVOD3
DVOD8DVOD9DVOD10DVOD11
DVCLK#DVCLK
AGP_PAR
+VC
CA_
DPL
L0
DVOD4
DVOD7
DVOA_D0DVOA_D1DVOA_D2DVOA_D3DVOA_D4DVOA_D5DVOA_D6DVOA_D7DVOA_D8DVOA_D9DVOA_D10DVOA_D11
DVOC_D5
M_I2CDATA
DVOC_D0DVOC_D1DVOC_D2DVOC_D3DVOC_D4
DVOC_D6DVOC_D9DVOC_D8DVOC_D11DVOC_D10
DVCCLK#DVCCLK
DVOC_D7
M_DDC2_CLK
M_DDC2_DATA
M_DDC1_DATA
DVOA_I2CDATA
DVOA_I2CCLK
DPMS_CLK
DPMS_CLK
M_DDC2_DATAM_DDC1_CLKM_DDC1_DATA
M_DDC2_CLK
TV_I2CCLK
DAC_VSYNC
DAC_HSYNC
TV_I2CDATA
TV_I2CCLK
TV_I2CDATA
M_DDC1_CLKM_I2CCLK
DVOA_I2CCLKDVOA_I2CDATA
+VTT
+1.8V_SW+VTT
+VS_RIMMREF
+1.8V_SW
+3V
+1.5V_SW
+3V
+1.5V_SW
+1.8V_SW+VTT
+3V+1.8V_SW
+1.5V_SW
+1.5V_SW
+3V_SW
+VTT
+3V_SW
+3V_SW
+3V_SW
+1.5V_SW
+1.5V_SW
C12768PF
12
C103 .1UF12
C205 .1UF12
R66 0_08051 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C10868PF
12
R294 100_1%_06031 2
C452.1UF
12
C454.1UF
12
R104 33012
C96
.01UF
12
C95
.1UF
12
R56 100K1 2
R57 100K1 2
R289 @2.2K1 2R290 2.2K1 2
R292 @2.2K1 2R293 10K1 2 R59
6801 2
R63 37.4_1%1 2R61 37.4_1%1 2
R72 37.4_1%1 2
R53 255_1%1 2
L14 .1UH_080512
L17 .1UH_080512
C227
.1UF
12
C92
.1UF
12
+
C93
100UF_D2_6.3V
12
+ C210
100UF_D2_6.3V
12
R452
8.2K
12
R55 10K1 2R295 10K1 2
RP13 16P8R_2212345678 9
10111213141516
R52 221 2R50 221 2
RP14 8P4R_22
1 82 73 64 5
C77@10PF
R46@33
12
L16
L06031 2
R307 221 2R310 221 2
R90 100K12
R554 4.7K1 2
R91 10K1 2
R89 10K1 2
R569604_1%_0603
12R568732_1%_0603
12
U60
NC7S14
1
2
34
5NC
A
GNDY
VCC
RP36 8P4R_100K
1 82 73 64 5
R555 4.7K1 2
U30C
82830
AA29AA24AA25
Y24Y27Y26
W24Y28
AB26
AB29
AB25
AC28
AC29
AB27
L29L28U29U28
AA27AA28
R29P26P27N25R28
AC27AD29
P28
L27P29R27T25
J29J28K26K25L26J27K29K27M29M28L24
M27N29M25N26N27R25R24T29T27T26U27V27V28U26V29
W29V25
W26W25W27Y29
AD21AD20
AJ27AD27AE27AH28AG29AF29
AE29
AH27AG28AF28AD28
AF23AF22AD25AC25AG24AJ24
AJ22AH22AG22AJ23AH23AG23AE23AE24AJ25AH25AG25AJ26
AD26AE26AE21AE22
AG17AJ17AG18AJ18AG19AJ19AG20AJ20
AJ11AH10AJ10AG10AJ9AG9AJ8AG8
AH7
AF7
AJ7
AG11
AJ12
AG12
AH13
AG13
AJ13
AG14
AJ14
AJ6
AG6
AD14
AE14
AC24
AH15
AJ15
AJ16
AH16
V14
V15
V16
AE16
AE15
AD15
AD16
AE25
AD23
J24
F26
N24
W23
J26
M26
R26
V26
AA26
L23
AA23
U24
AE6
G7
G10
G20
AF6
AE7
AC9
AC8
AF26
AG27
F5 J5 M5
R5
V5 AA5
AD5
AG5
E2
D5
D8
D11
D14
D17
D20
D23
D26
F7 F15
G11
G19
G23
AC10
AC11
AD11
AD12
AD13
AE18
AD17
AD18
AD19
AC20
F25
AC21
AF21
AF24
AGP_SBA0/ZV_D8AGP_SBA1/ZV_D7AGP_SBA2/ZV_D6AGP_SBA3/ZV_D5AGP_SBA4/ZV_D2AGP_SBA5/ZV_D1AGP_SBA6/ZV_D0AGP_SBA7/ZV_HREF
AGP_
PIPE
#/ZV
_D10
AGP_
WBF
#/ZV
_D9
AGP_
RBF
#/ZV
_D11
AGP_
ST0/
ZV_D
14AG
P_ST
1/ZV
_D13
AGP_
ST2/
ZV_D
12
AGP_ADSTB0/DVOB_CLKAGP_ADSTB#0/DVOB_CLK#AGP_ADSTB1/DVOC_CLKAGP_ADSTB#1/DVOC_CLK#AGP_SBSTB/ZV_D4AGP_SBSTB#/ZV_D3AGP_FRAME#/M_DDC1_DATAAGP_IRDY#/M_I2C_CLKAGP_TRDY#/M_DDC1_CLKAGP_STOP#/M_DDC2_DATAAGP_DEVSEL#/M_I2C_DATAAGP_REQ#/ZV_CLKAGP_GNT#/ZV_D15AGP_PAR
AGP_CBE#0/DVOB_D7AGP_CBE#1/DVOB_BLANK#AGP_CBE#2/ZV_VSYNCAGP_CBE#3/DVOC_D5
AGP_AD0/DVOB_HSYNCAGP_AD1/DVOB_VSYNCAGP_AD2/DVOB_D1AGP_AD3/DVOB_D0AGP_AD4/DVOB_D3AGP_AD5/DVOB_D2AGP_AD6/DVOB_D5AGP_AD7/DVOB_D4AGP_AD8/DVOB_D6AGP_AD9/DVOB_D9AGP_AD10/DVOB_D8AGP_AD11/DVOB_D11AGP_AD12/DVOB_D10AGP_AD13/DVOBC_CLKINT#AGP_AD14/DVOB_FLD/STLAGP_AD15/M_DDC2_CLKAGP_AD16/DVOC_VSYNCAGP_AD17/DVOC_HSYNCAGP_AD18/DVOC_BLANK#AGP_AD19/DVOC_D0AGP_AD20/DVOC_D1AGP_AD21/DVOC_D2AGP_AD22/DVOC_D3AGP_AD23/DVOC_D4AGP_AD24/DVOC_D7AGP_AD25/DVOC_D6AGP_AD26/DVOC_D9AGP_AD27/DVOC_D8AGP_AD28/DVOC_D11AGP_AD29/DVOC_D10AGP_AD30/DVOC_INT#/DPMS_CLKAGP_AD31/DVOC_FLD/STL
DVO_BLANK#DVO_CLKIN
DAC_REFSETIO_DDC1DATA
IO_DDC1CLKDAC_BLUE
DAC_GREENDAC_RED
DAC_VSYNC
DAC_BLUE#DAC_GREEN#
DAC_RED#DAC_HSYNC
DVO_VSYNCDVO_HSYNC
IO_I2CCLKIO_I2CDATA
DVO_CLK#DVO_CLK
DVO_D0DVO_D1DVO_D2DVO_D3DVO_D4DVO_D5DVO_D6DVO_D7DVO_D8DVO_D9
DVO_D10DVO_D11
IO_DDC2DATAIO_DDC2CLK
DVO_INTR#DVO_FIELD
LM_DQA0LM_DQA1LM_DQA2LM_DQA3LM_DQA4LM_DQA5LM_DQA6LM_DQA7
LM_DQB0LM_DQB1LM_DQB2LM_DQB3LM_DQB4LM_DQB5LM_DQB6LM_DQB7
LM_C
MD
LM_S
CK
LM_S
IO
LM_R
Q0
LM_R
Q1
LM_R
Q2
LM_R
Q3
LM_R
Q4
LM_R
Q5
LM_R
Q6
LM_R
Q7
LM_R
CLK
LM_G
CLK
LM_R
AMR
EF0
LM_R
AMR
EF1
AGP_BUSY#
LM_C
TMLM
_CTM
#
LM_C
FMLM
_CFM
#
VDD
_LM
VDD
_LM
VDD
_LM
VDD
_LM
VDD
_LM
VDD
_LM
VDD
_LM
VCC
P_IO
VCC
P_IO
VCC
P_H
UB
VCC
P_H
UB
VCC
Q_A
GP
VCC
Q_A
GP
VCC
P_AG
PVC
CP_
AGP
VCC
P_AG
PVC
CP_
AGP
VCC
P_AG
PVC
CP_
AGP
VCC
P_AG
PVC
CP_
AGP
VCC
A_H
PLL
VCC
A_C
PLL
VCC
Q_S
MVC
CQ
_SM
VCC
PCM
OS_
LMVC
CPC
MO
S_LM
VCC
PCM
OS_
LMVC
CPC
MO
S_LM
VCC
A_D
ACVC
CA_
DAC
VCC
_HVC
C_H
VCC
_HVC
C_H
VCC
_HVC
C_H
VCC
_HVC
C_H
VCC
_H
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
P_SM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
_LM
VCC
A_D
PLL0
VCC
A_D
PLL1
VCC
P_D
VOVC
CP_
DVO
VCC
P_D
VO
C756
27PF
12
C757
27PF
12
C76510PF
12
C76410PF
12
R369 100K1 2
R363 100K1 2
R105 100K1 2 AGP_BUSY# 17
IO_DDC1CLK 16IO_DDC1DATA 16
H_BSEL0 5,8
DAC_RED 16,37
DAC_BLUE 16,37DAC_GREEN 16,37
DAC_HSYNC 16,37DAC_VSYNC 16,37
DVOA_D[0..11] 15
DVOA_CLK 15DVOA_CLK# 15
DVOA_BLANK# 15DVOA_VSYNC 15DVOA_HSYNC 15
DVOC_HSYNC15DVOC_VSYNC15
DVOC_CLK15DVOC_CLK#15
DVOC_D[0..11]15
DVOA_STALL 15
RTCCLK17,23,24
TV_DDCDATA 15TV_DDCCLK 15
DVOA_I2CDATA 15DVOA_I2CCLK 15
DVOC_FLD15
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Layout note :Distribute as close as possible to GMCH Processor Quadrant .
Layout note :Distribute as close as possible to VCCPCMOS_LM .
Layout note :Distribute as close as possible to GMCH Local Memory Quadrant .
Distribute as close as possible to GMCH AGP/DVO Quadrant .
Layout note :
Distribute as close as possible to GMCH System Memory Quadrant .
Layout note :
Layout note :Distribute as close as possible to IO Quadrant .
401174 1A
SCHEMATIC, M/B LA-1011
Custom
12 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
+VTT
+VTT
+VTT
+VTT
+VTT
+VTT
+VTT
+VTT
+3V
+3V
+1.5V_SW
+1.8V_SW
+1.8V_SW
C132.1UF
12
C106.1UF
12
C87.1UF
12
C142.1UF
12
C114.1UF
12
C136.1UF
12
C100.1UF
12
C84.1UF
12
C547.1UF
12
C537.1UF
12
+ C7422UF_1206_10V
12
C111.1UF
12
C113.1UF
12
C151.1UF
12
C88.1UF
12
C109.1UF
12
C86.1UF
12
C148.1UF
12
C112.1UF
12
C89.1UF
12
C85.1UF
12
+ C212150UF_D2_6.3V
12
+ C65150UF_D2_6.3V
12
+ C414150UF_D2_6.3V
12
C224.1UF
12
C120.1UF
12
C121.01UF
12
C122.01UF
12
C117.1UF
12
C143.1UF
12
C174.1UF
12
C147.1UF
12
C128.1UF
12
C115.1UF
12
C183.1UF
12
C161.1UF
12
C116.1UF
12
C154.1UF
12
+ C211150UF_D2_6.3V
12
C131.1UF
12
+C82
22UF_1206_10V
12
C13782PF
12
C135.1UF
12
C197.1UF
12
C118.1UF
12
C13382PF
12
+C165
22UF_1206_10V
12
C123.1UF
12
C141.1UF
12
C16882PF
12
C97.1UF
12
C157.1UF
12
C175.1UF
12
C126.1UF
12
C18582PF
12
C181.1UF
12
C125.1UF
12
C18082PF
12
C186.1UF
12
C19382PF
12
C202.1UF
12
C236.1UF
12
C214.1UF
12
C203.1UF
12
+C221
22UF_1206_10V
12
C20182PF
12
C240.1UF
12
C209.1UF
12
C20882PF
12
C239.1UF
12
C21582PF
12
C220.1UF
12
C238.1UF
12
C21382PF
12
C244.1UF
12
C237.1UF
12
C242.1UF
12
+ C64150UF_D2_6.3V
12
C153.1UF
12
+ C415150UF_D2_6.3V
12
+ C50150UF_D2_6.3V
12
C155.1UF
12
+ C49150UF_D2_6.3V
12
C159.1UF
12
C156.1UF
12
C134.1UF
12
C189.1UF
12
C140.1UF
12
C204.1UF
12
+ C67150UF_D2_6.3V
12
C206.1UF
12
C187.1UF
12
C191.1UF
12
C226.1UF
12
C172.1UF
12
C146.1UF
12
C188.1UF
12
C173.1UF
12
C145.1UF
12
C138.1UF
12
C110.1UF
12
C192.1UF
12
C190.1UF
12
C184.1UF
12
C162.1UF
12
+ C66150UF_D2_6.3V
12
C171.1UF
12
C195.1UF
12
C194.1UF
12
C199.1UF
12
C130.1UF
12
C139.1UF
12
C94.1UF
12
+ C23522UF_1206_10V
12
C241.1UF
12
C225.1UF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Layout note :One .1uF cap per power pin .Place each cap close to SODIMM(DIMM 0) pin .
Layout note :One .1uF cap per power pin .Place each cap close to SODIMM(DIMM 1) pin .
401174 1A
SCHEMATIC, M/B LA-1011
Custom
13 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
SM_D_MA12
SM_D_MA2
SM_D_MA0
SM_D_MA3
SM_D_MA11SM_D_MA10SM_D_MA8
SM_D_MA6SM_D_MA7SM_D_MA4
SM_D_MA9
SM_D_MA5
SM_D_MA1
SM_MA3SM_MA2SM_MA1SM_MA0
SM_MA5SM_MA4SM_MA7SM_MA6
SM_MA9SM_MA8SM_MA10SM_MA11
SM_MA12
+3V
+3V
+3V
+3V
C475.1UF
12
C598.1UF
12
C494.1UF
12
C592.1UF
12
+ C41722UF_1206_10V
12
C491.1UF
12
C566.1UF
12
C613.1UF
12
C584.1UF
12
C602.1UF
12
C465.1UF
12
C579.1UF
12
C462.1UF
12
C479.1UF
12
C556.1UF
12
C492.1UF
12
C540.1UF
12
C464.1UF
12
C528.1UF
12
RP5
8P4R_10
1 82 73 64 5
RP3
8P4R_10
1 82 73 64 5
RP4
8P4R_10
1 82 73 64 5
R147 101 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C521.1UF
12
C553.1UF
12
C495.1UF
12
C606.1UF
12
+ C41622UF_1206_10V
12
C574.1UF
12
C586.1UF
12
C543.1UF
12
C591.1UF
12
C481.1UF
12
C489.1UF
12
C593.1UF
12
C461.1UF
12
C467.1UF
12
C601.1UF
12
C575.1UF
12
C611.1UF
12
C470.1UF
12
C619.1UF
12
SM_D_MA[0..12]10 SM_MA[0..12] 14
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
10 X1 Y1
System SMBus Selector
AB Output
1
0 X0, Y0
0
0
01
1 1
X1, Y1
X2, Y2
X3, Y3
Place closely to DIMM0
DIMM0 DIMM1
Place closely to DIMM1
401174 1A
SCHEMATIC, M/B LA-1011
Custom
14 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
SM_DQM0
SM_MA0SM_MA1SM_MA2
SMD_CLK0
SM_RAS#
SM_MA9
SODIMM0_SMDAT
SM_DQM4
SM_MA3
SM_CKE1SM_MA12
SM_BA0
SM_BA1SM_MA11
SM_DQM7
SM_DQM1
SM_DQM2SM_DQM3
SM_DQM6
SM_DQM5
SM_MA6SM_MA8
SM_MA10
SM_MA7
SM_MA4SM_MA5
SM_DQ62
SM_DQ57SM_DQ56
SM_DQ61
SM_DQ63
SM_DQ59SM_DQ58
SM_DQ55
SM_DQ60
SM_DQ54
SMD_CLK1
SM_WE#SM_CS#0SM_CS#1
SODIMM0_SMCLK
SM_CKE0
SM_CAS#
SM_DQM4
SM_MA3
SM_CKE3SM_MA12
SM_BA0
SM_BA1SM_MA11
SM_DQM7SM_DQM6
SM_DQM5
SM_MA7
SM_MA4SM_MA5
SM_DQ63
SM_DQ48
SM_DQ57
SM_DQ42
SM_DQ53
SM_DQ32
SM_DQ54
SM_DQ39
SM_DQ40
SM_DQ34
SM_DQ55
SM_DQ43
SM_DQ33
SM_DQ56
SM_DQ35
SM_DQ47
SM_DQ61
SM_DQ52
SM_DQ46
SM_DQ36
SM_DQ45
SM_DQ58
SM_DQ44
SM_DQ38
SM_DQ51
SM_DQ37
SM_DQ60
SM_DQ62
SM_DQ49
SM_DQ59
SM_DQ50
SM_DQ41
SMD_CLK3
SODIMM1_SMCLK
SM_CKE2
SM_CAS#
SM_DQM0
SM_MA0SM_MA1SM_MA2
SMD_CLK2
SM_RAS#
SM_MA9
SODIMM1_SMDAT
SM_DQM1
SM_DQM2SM_DQM3
SM_MA6SM_MA8
SM_MA10
SM_DQ17
SM_DQ27
SM_DQ16
SM_DQ22
SM_DQ11
SM_DQ18
SM_DQ12
SM_DQ19
SM_DQ31
SM_DQ15
SM_DQ5
SM_DQ29SM_DQ28
SM_DQ20
SM_DQ3
SM_DQ6
SM_DQ23
SM_DQ8
SM_DQ7
SM_DQ2
SM_DQ30
SM_DQ9
SM_DQ21
SM_DQ13
SM_DQ25
SM_DQ1
SM_DQ26
SM_DQ4
SM_DQ24
SM_DQ14
SM_DQ0
SM_DQ10
SM_WE#SM_CS#2SM_CS#3
SMD_CLK1SMD_CLK0 SMD_CLK2 SMD_CLK3
SODIMM0_SMCLK
SM_DQ46
SM_DQ11
SM_DQ40
SM_DQ28
SM_DQ7
SM_DQ51
SM_DQ49
SM_DQ45
SM_DQ17
SM_DQ42
SM_DQ25
SM_DQ18
SM_DQ33SM_DQ1
SM_DQ5
SM_DQ3
SM_DQ8
SM_DQ13
SM_DQ6
SM_DQ2
SM_DQ0
SM_DQ16
SM_DQ29
SM_DQ22
SM_DQ14
SM_DQ38
SM_DQ36
SM_DQ41
SM_DQ39
SM_DQ35
SM_DQ43
SM_DQ27
SM_DQ47
SM_DQ4
SM_DQ32
SM_DQ48
SM_DQ9
SM_DQ31
SM_DQ50
SM_DQ23
SM_DQ53
SM_DQ10
SM_DQ21
SM_DQ34
SM_DQ30
SM_DQ44
SM_DQ26
SM_DQ12
SM_DQ15
SM_DQ24
SM_DQ20
SM_DQ19
SM_DQ37
SM_DQ52
SODIMM0_SMDAT
SODIMM1_SMCLK
SODIMM1_SMDAT
+3V+3V
+3V +3V +3V +3V
+12V_SW
+3V
JP28
SO-DIMM144-Reverse
13579
11131517192123252729313335373941434547495153555759
6163656769717375777981838587899193959799
101103105107109111113115117119121123125127129131133135137139141143
24681012141618202224262830323436384042444648505254565860
62646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144
VSSDQ0DQ1DQ2DQ3VCCDQ4DQ5DQ6DQ7VSSCKE0#DQMB0CKE1#/DQMB1VCCA0A1A2VSSDQ8DQ9DQ10DQ11VCCDQ12DQ13DQ14DQ15VSSRFU/DQ64RFU/DQ65
RFU/CLK0VCCRFU/RAS#WE#RE0#/S0#RE1#/S1#RFU/EDO_OE#VSSRFU/DQ66RFU/DQ67VCCDQ16DQ17DQ18DQ19VSSDQ20DQ21DQ22DQ23VCCA6A8VSSA9A10VCCCE2#/DQMB2CE3#/DQMB3VSSDQ24DQ25DQ26DQ27VCCDQ28DQ29DQ30DQ31VSSSDAVCC
VSSDQ32DQ33DQ34DQ35VCC
DQ36DQ37DQ38DQ39
VSSDQMB4/CE4#DQMB5/CE5#
VCCA3A4A5
VSSDQ40DQ41DQ42DQ43VCC
DQ44DQ45DQ46DQ47
VSSDQ68/RFUDQ69/RFU
CKE0/RFUVCC
CAS#/RFUCKE1/RFU
A12/RFUA13/RFU
CLK1/RFUVSS
DQ70/RFUDQ71/RFU
VCCDQ48DQ49DQ50DQ51
VSSDQ52DQ53DQ54DQ55VCC
A7BA0VSSBA1A11
VCCDQMB6/CE6#DQMB7/CE7#
VSSDQ56DQ57DQ58DQ59VCC
DQ60DQ61DQ62DQ63
VSSSCLVCC
JP29
SO-DIMM144-Normal
13579
11131517192123252729313335373941434547495153555759
6163656769717375777981838587899193959799
101103105107109111113115117119121123125127129131133135137139141143
24681012141618202224262830323436384042444648505254565860
62646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144
VSSDQ0DQ1DQ2DQ3VCCDQ4DQ5DQ6DQ7VSSCKE0#DQMB0CKE1#/DQMB1VCCA0A1A2VSSDQ8DQ9DQ10DQ11VCCDQ12DQ13DQ14DQ15VSSRFU/DQ64RFU/DQ65
RFU/CLK0VCCRFU/RAS#WE#RE0#/S0#RE1#/S1#RFU/EDO_OE#VSSRFU/DQ66RFU/DQ67VCCDQ16DQ17DQ18DQ19VSSDQ20DQ21DQ22DQ23VCCA6A8VSSA9A10VCCCE2#/DQMB2CE3#/DQMB3VSSDQ24DQ25DQ26DQ27VCCDQ28DQ29DQ30DQ31VSSSDAVCC
VSSDQ32DQ33DQ34DQ35VCC
DQ36DQ37DQ38DQ39
VSSDQMB4/CE4#DQMB5/CE5#
VCCA3A4A5
VSSDQ40DQ41DQ42DQ43VCC
DQ44DQ45DQ46DQ47
VSSDQ68/RFUDQ69/RFU
CKE0/RFUVCC
CAS#/RFUCKE1/RFU
A12/RFUA13/RFU
CLK1/RFUVSS
DQ70/RFUDQ71/RFU
VCCDQ48DQ49DQ50DQ51
VSSDQ52DQ53DQ54DQ55VCC
A7BA0VSSBA1A11
VCCDQMB6/CE6#DQMB7/CE7#
VSSDQ56DQ57DQ58DQ59VCC
DQ60DQ61DQ62DQ63
VSSSCLVCC
R352 01 2
R344 01 2
C318.1UF
12
U17
74HC4052
1524
12141511
610
9
3
13
167 8
X0X1X2X3
Y0Y1Y2Y3
INHAB
X
Y
VCC
GN
DG
ND
R335
10
12
C511
10PF
12
C546
10PF
12
R349
10
12
C533
10PF1
2
C559
10PF
12
R357
10
12
R341
10
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
RP7
8P4R_10K
18
27
36
45
R194100K
G
D S
Q22 2N7002
2
1 3
G
D S
Q24 2N70022
1 3
R176100K
R551100K
D45
RB751V
21
SM_DQ[0..63] 10
SM_DQM010SM_DQM110
SM_DQM210SM_DQM310 SM_DQM7 10
SM_DQM6 10
SM_DQM5 10SM_DQM4 10
SM_MA013SM_MA113SM_MA213
SM_MA613SM_MA813
SM_MA1013SM_MA913
SM_MA7 13
SM_MA12 13
SM_MA3 13SM_MA4 13SM_MA5 13
SMD_CLK010
SMD_CLK1 10
SM_RAS#10SM_WE#10SM_CS#010SM_CS#110
SM_MA11 13SM_BA1 10
SM_BA0 10
SM_CAS# 10SM_CKE1 10
SM_CKE0 10
SMD_CLK3 10
SM_CKE3 10
SM_CKE2 10SMD_CLK210
SMB_DATA8,17,19
SM_SEL017
SM_CS#210SM_CS#310
SMB_CLK8,17,19
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS CONNECTORVCH
401174 1A
SCHEMATIC, M/B LA-1011
C
15 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
DVOA_D0DVOA_D1DVOA_D2DVOA_D3DVOA_D4DVOA_D5DVOA_D6DVOA_D7DVOA_D8DVOA_D9DVOA_D10DVOA_D11
DVOA_HSYNCDVOA_VSYNC
LCD_VREF
PID3PID2PID1PID0
LCD_VREF
1.8VS_VCH
VCH_VREFHIVCH_VREFLO
TXO
UT0
+TX
OU
T0-
TXO
UT1
+TX
OU
T1-
TXO
UT2
+TX
OU
T2-
TXC
LK0+
TXC
LK0-
TXO
UT4
+TX
OU
T4-
TXO
UT5
+TX
OU
T5-
TXO
UT6
+TX
OU
T6-
TXC
LK1+
TXC
LK1-
ENVDDENEXBUF
ENBLT
PID2
DVOC_D11DVOC_D10
DVOC_D7DVOC_D6DVOC_D5DVOC_D4DVOC_D3DVOC_D2DVOC_D1DVOC_D0
SL_STALL
PCI_RST#
VREF_TVO
DVOC_D8DVOC_D9
DVOA_CLK#DVOA_CLK
CLK_VCH
PID3
PID0PID1
DVOC_CLK#DVOC_CLK
ENVDD
LCDVDD
TXOUT0+TXOUT0-
TXOUT1-TXOUT1+
TXOUT2-TXOUT2+
TXCLK0-TXCLK0+
LCDVDD
TXOUT0+TXOUT0-
TXOUT1-TXOUT1+
TXOUT2-TXOUT2+
TXCLK0-TXCLK0+
TXOUT6-
TXOUT4-TXOUT4+
TXOUT5-TXOUT5+ TXOUT6+
LCDVDDTXCLK1-TXCLK1+
ENBLT
+1.8V_SW
+1.8V_SW
+1.8V_SW+3V_SW
+3V_SW
+1.8V_SW
LCDVDD
+3V_SW
+1.5V_SW
+3V_SW
+5V_SW
+1.5V_SW
+5V_SW+3V_SW
+3V_SW
+3V_SW
+1.5V_SW
+LCDVDD+3V
+12V_ALW
+12V_ALW
+LCDVDD
+3V_SW
+1.8V_SW
+LCDVDD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R326 36.5_1%1 2
R322 15_1%12
R327
75_1%
12
R329
2K_1%
12
R323
2K_1%
12
C486
10UF_10V_1206
12
C473.1UF
12
C446.1UF
12
C478.1UF
12
C445.1UF
12
C474.1UF
12
C476.1UF
12
C498.1UF
12
C499.1UF
12
C441
10UF_10V_1206
12
C447.1UF
12
C448.1UF
12
L44
L0805
12
R279 15012
R2831501 2
C54
.1UF
12
+
C395
10UF_10V_1206
R302 10K12
TP1TP
1
C493
2.2UF_16V_0805
12
C500.01UF
12
SW1
SW DIP-4
2
4
7
56
1
3
8
U31
CH7007
13
34
22
8
44211
20
234679
101112
31
51630
24
1828
36
1923
33 32
40
2726
35
4342
25
17
41
37
1415
29 38
39
D11
AGND
Y
DGND[0]
D0CD1
CVBS
D2D3D4D5D6D7D8D9D10
AVDD
DVDD[0]DVDD[1]DVDD[2]
ISET
DGND[1]DGND[2]
DGND[3]
GND[0]GND[1]
XO
XI/F
IN
XCLK
SCSD
DS/BCO
VH
VDD
CSYNC
XCLK*
POUT
GPIO[0]GPIO[1]
RESET* DVDD2
VREF
R351 012
R362 360_1%12
R340 10K1 2
R343
10K
12
C536
.1UF
12
C578
12PF
12
Y2
14.318MHZ
1 2
C560
22PF
12
C562
10UF_10V_1206
12
C510.1UF
12
C570.1UF
12
C5411000PF
12
C567.01UF
12
C5731UF_0603
12
C542.1UF
12
C571.1UF
12
R337
100K
12
+C485
22UF_1206_10V
12
C463.1UF
12
C4971000PF
12
RP15
8P4R_4.7K
18
27
36
45
U28
82807
M11P10N10M10
P9M9P8P7N7M7P6N6
M8N8
N11P12P11N12P13
A2
A13
C9
D4
D6
D9
E4
F11
G4
H4
J4 K4
L6 C6
D5
D10
E8
E11
F4 G11
H11
J11
K11
L5 L7 L8 L9 N13
C5
L10
C10
C7
A1
A14
B1
C4
D11
E5
E6
E7
E9
E10
F5 F6 F7 F8 F9 F10
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J5 J6 J7 J8 J9 J10
K5
K6
K7
K8
K9
K10
L4 N14
P1
P14
L11
C11
C8
E3E2E1F3F2F1G3G2G1H3H2H1J3J2J1K3K2K1L3L2L1M3M2M1N1N2P2N3P3M4N4P4M5N5P5M6
C1B2D2D3
C2C3D1
A3
B3
A4
A5
B4
B5
A7
B7
A6
B6
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
H14
H13
H12
J14
K14
K13
K12
L14
L13
L12
M14
M13
G14
G13
G12
F14
J13
J12
D8D7
E14F13
B13C13E12E13F12
C12C14
D13D12
M12
D14
B14N9
DVODATA0DVODATA1DVODATA2DVODATA3DVODATA4DVODATA5DVODATA6DVODATA7DVODATA8DVODATA9DVODATA10DVODATA11
CLKINCLKIN#BLANK#CLKOUTLCD_HDE#LCD_VDE#LCD_VREF
VC
C_3
V1
VC
C_3
V2
VC
C_3
V3
VC
C3_
3V4
VC
C3_
3V5
VC
C3_
3V6
VC
C3_
3V7
VC
C3_
3V8
VC
C3_
3V9
VC
C3_
3V10
VC
C3_
3V11
VC
C3_
3V12
VC
C3_
3V13
VC
C3_
3V14
VC
C1_
8V1
VC
C1_
8V2
VC
C1_
8V3
VC
C1_
8V5
VC
C1_
8V7
VC
C1_
8V6
VC
C1_
8V8
VC
C1_
8V9
VC
C1_
8V10
VC
C1_
8V11
VC
C1_
8V12
VC
C1_
8V13
VC
C1_
8V14
VC
C1_
8V15
VC
C1_
8V16
VC
CA
VC
CB
AV
CC
DA
VS
S1
VS
S2
VS
S3
VS
S4
VS
S7
VS
S8
VS
S9
VS
S10
VS
S11
VS
S12
VS
S13
VS
S14
VS
S15
VS
S16
VS
S17
VS
S5
VS
S18
VS
S19
VS
S20
VS
S21
VS
S22
VS
S23
VS
S6
VS
S24
VS
S25
VS
S26
VS
S27
VS
S28
VS
S29
VS
S30
VS
S31
VS
S32
VS
S33
VS
S34
VS
S35
VS
S36
VS
S37
VS
S40
VS
S38
VS
S39
VS
S41
VS
S42
VS
S43
VS
S44
VS
SA
VS
SB
AV
SS
DA
P0P1P2P3P4P5P6P7P8P9
P10P11P12P13P14P15P16P17P18P19P20P21P22P23P24P25P26P27P28P29P30P31P32P33P34P35
FLMLPDE
SHFCLK
ENABKLENAVDD
ENEXBUF
YA
0PY
A0M
YA
1P
YA
2PY
A1M
YA
2MY
A3P
YA
3MC
LKA
PC
LKA
M
YA
4PY
A4M
YA
5PY
A5M
YA
6PY
A6M
YA
7PY
A7M
CLK
BP
CLK
BM
TV_D
ATA
0TV
_DA
TA1
TV_D
ATA
2TV
_DA
TA3
TV_D
ATA
4TV
_DA
TA5
TV_D
ATA
6TV
_DA
TA7
TV_D
ATA
8TV
_DA
TA9
TV_D
ATA
10TV
_DA
TA11
TV_V
SY
NC
TV_H
SY
NC
TV_B
LAN
K#
TV_C
LKIN
TV_C
LKO
UT#
TV_C
LKO
UT
VREF_HIVREF_LO
GPIO7GPIO8
GPIO2GPIO3GPIO4GPIO5GPIO6
GPIO0GPIO1
I2C_DATAI2C_CLK
OSC
PCIRST#
TESTINDVOrCOMPR299 2.2K12
C78@10PF
R51@33
12
R49@33
12
C80@10PF
R353
@75_1%
12
R303 @10K1 2R301 @10K1 2
C53
1000PF
12
R226@33
12
C330@10PF
C545
10UF_10V_1206
12
C577
10UF_10V_1206
12
R775_1%
12
R534 @75_1%1 2
R535 75_1%1 2
R536 75_1%1 2
R537 75_1%1 2
C759@10PF
R542@33
12
R543@33
12
C760@10PF
R336 100K1 2
D46 RB751V
21
Q35
SI2302DS
2
13R32100K
22K
22K
Q12
DTC124EK
2
13
R31100K
C409
@1000PF
R33
150K
+C405
4.7UF_16V_1206
R26100
12
Q102N7002
21
3
Q11
2N7002
21
3
C4191000PF
12
C418.1UF
12
+C420
22UF_1206_10V
12
+C421
4.7UF_16V_1206
JP10
JST BM20B-SRDS
123456789
10
11121314151617181920
12345678910
11121314151617181920
L13
FBM-l11-201209-221LMAT1 2
JP11
IPEX20265-030E
123456789
10
131415
1617181920
1112
21222324252627282930
12345678910
131415
1617181920
1112
21222324252627282930
L53 @0_08051 2
R3054.7K
D19RB751V
21
D20RB751V
21
+C442
22UF_1206_10V
12
C450.1UF
12
C4511000PF
12
DVOA_D[0..11]11
DVOA_CLK#11DVOA_BLANK#11
DVOA_CLK11
DVOA_HSYNC11DVOA_VSYNC11
DVOA_STALL11
PCI_RST#9,17,21,22,23,26,27,30,32,38
DVOA_I2CDATA11DVOA_I2CCLK11
TV_DDCDATA11
COMPS 16,37
DVOC_D[0..11]11
DVOC_CLK11DVOC_CLK#11
DVOC_HSYNC11
DVOC_FLD11
CLK_VCH8
PAL/NTSC#17
TV_DDCCLK11
DVOC_VSYNC11
DISPOFF# 34BKOFF#30
ENBLT30
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT Connector
Output filter network
TV Out CONN.
GMBus switch
401174 1A
SCHEMATIC, M/B LA-1011
Custom
16 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
DAC_B
DAC_R
DAC_G
DAC_RED
DAC_HSYNC
DAC_VSYNC
CRTGATE
DAC_V
DAC_H
COMPS_CON5VDDCCL5VDDCDA
DAC_BLUE
DAC_GREEN
5VDDCCL
5VDDCDA
CRTGATE
CRTVCC
+1.8V_SW
+12V_SW
+5V_SW
+3V_SW
+5V_SW
D15DAN217
1
2 3
C818PF_0603
12
D16DAN217
1
2 3
D1DAN217
1
2 3
C5.1UF
12
C352220PF
12
C35910PF
12
C354100PF
12
C36118PF_0603
12
C35718PF_0603
12
C1110PF
12
L35
FCM2012C-800(0805)1 2
C353100PF
12
C2220PF
12
L7
FCM2012C-800(0805)1 2
F1POLYSWITCH_0.5A
JP2
CRT-15P
61117
1228
1339
144
10155
18 19
C16.1UF
12
G
DS
Q32N7002
2
13
R254 100K1 2
G
DS
Q332N7002
2
13
L2
FBM-L10-160808-3011 2
L33
FBM-L10-160808-3011 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C21100PF_0603
12
L91.8UH_06031 2
C22270PF_0603
12
JP6RCA JACK
1
2
C2033PF_0603
1 2
D39
DAN217
1
2
3R74
2.2K
12
R73
2.2K
12
C163
.1UF
12
D5
RB751V
21
R99
10K
12
R250
75_1%1
2
C360
18PF
12
C36518PF
12
R4
75_1%
12
C18
18PF
12
L36
FCM2012C-800(0805)1 2
R256
75_1%
12
R135 331 2
R142 331 2
U10
CBTD_3384
3478
11
256910
1
24
12
1417182122
1516192023
13
1A11A21A31A41A5
1B11B21B31B41B5
OE1#
VCC
GND
2A12A22A32A42A5
2B12B22B32B42B5
OE2#
D47
RB491D
2 1
G
D S
Q612N7002
2
1 3
G
D S
Q60
2N7002
2
1 3
M_SEN#31,37
DAC_VSYNC11,37
DAC_HSYNC11,37
DAC_BLUE11,37
DAC_RED11,37
5VDDCCL 37COMPS15,37
IO_DDC1CLK11IO_DDC1DATA11 5VDDCDA 37
SCROLLED#30NUMLED#30CAPSLED#30DRV0#32
SCRLED5V# 34NUMLED5V# 34CAPSLED5V# 34DRV05V# 34
DAC_GREEN11,37
HDDLED_CON#21 HDDLED# 34CDLED# 34CDLED_CON#21
-
AA
B
B
C
C
D
D
1 1
2 2
3 3
4 4
(for use if CPU unable to support DPSLP#)
ICH3-M (1/2)InterfacePCI
InterfaceLAN
PCIInterface
HubLinkInterface
VSS
AC'97Interface
LPCInterface
Clocks EEPROMInterface
InterfaceCPU
InterfaceSystemManagment
InterfaceInterrupt
GPIOunMUX
GeyservillePower Management
Place closely toICH3-M
Place closely to ICH3-M
Close to ICH3-M.
401174 1A
SCHEMATIC, M/B LA-1011
Custom
17 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
IDE_PATADET
EC_SMI#EC_SCI#EC_LID_OUT#
INT_PIRQA#INT_PIRQB#
INT_PIRQD#INT_PIRQC#
PCI_AD27
PCI_AD16
PCI_AD13PCI_AD12
RTC_X1
RTC
_X2
ICH3_PME#
PCI_AD8
PCI_AD3PCI_AD2PCI_AD1
EC
_LID
_OU
T#LA
N_C
LK_I
CH
HUB_PD5
PCI_AD14
PCI_AD9
H_PICD0
INT_
PIR
QB
#
H_P
ICD
0
HUB_PD0
PCI_AD26
PCI_AD20
PCI_AD17
PCI_AD11PCI_AD10
PCI_AD7PCI_AD6
HUB_PD[0..10]
CLK_ICH14
CLK_ICH14HUB_ICH_RCOMP
HUB_PD10
HUB_PD4
PCI_AD22
RTC
_VB
IAS
HUB_PD9
HUB_PD3HUB_PD2
PCI_AD31PCI_AD30
PCI_AD21
RTC_VBIAS
RTC_X2
RTC
_X1
H_PICD1
CLK_ICH48
PCI_AD28
IDE
_PA
TAD
ET
HUB_PD8
PCI_AD23
PCI_AD19
CLK_ICHPCI
EC
_SC
I#
HUB_PD6
HUB_PD1
CLK_ICHPCI
PCI_AD4
CLK_ICHHUB
H_P
ICD
1IN
T_P
IRQ
A#
INT_
PIR
QC
#
PCI_AD25PCI_AD24
EC
_SM
I#
PCI_AD29
INT_
PIR
QD
#
HUB_PD7
PCI_AD15
PM_RSMRST#
CLK_ICH48 RTC
_RS
T#
PCI_AD18
PCI_AD5
PCI_AD0
CLK_ICHHUB
S_G
PIO
2S
_GPI
O3
S_G
PIO
4S
_GP
IO5
CLK
_IC
HA
PIC
S_GPIO3S_GPIO4S_GPIO5
S_GPIO2
PM_RSMRST#
ICH3_PME#
+RTCVCC
+RTCVCC
+VS_HUBREF
+VS_HUBVSWING
+1.5V_SW
+3V_SW
+3V_SW
+3V_ALW
R227 36.5_1%1 2
R4821K
12
C334.01UF
12
C666.01UF
12
R234@10K
12
R186@1K
12
R2111K
12
R2201K
12
R233 01 2
C328
@15PF
12
R222
@10
12
R491 10M_06031 2
C71312PF
12
R475
10M_06031 2
C702 .047UF1 2
R495 1K1 2
X3
32.768KHZC69612PF
12
J1JOPEN
12
C6901UF_0603
12
R472 15K
1 2
C327
@15PF
12
R212
@10
12
C290
@15PF
12
R188
@10
12
R401
@4.7K
12
C686@10PF
R456@33
12
R224 10K12R213 10K12
R225 012
RP18
8P4R_100K
1 82 73 64 5
R4740
1 2
R529 221 2
R567
2.4M_1%_0603
12R566 22M_0603
12
U16A
82801
J2K1J4K3H5K4H3L1L2G2L4H4M4J3
M5J1F5N2G4P2G1P1F2P3F3R1E2N4D1P4E1P5
K2K5N1R2
A4E3D2D5B4
D3F4A3R4E4
U22W23Y21AA23AB23AA21J22AB22V23Y22
AC5AB5AC4AB2AC3Y6
H1H2L5Y1W1M1M2G5N3B3B6D4C4F1M3T5
U23Y23W21
L22M21M23N20P21R22R20T23M19P19N19
T19
R19
N22
P23
K19
L20
L19
E9
D8
E8
D10
C8
A8
A9
B9
C10
A10
C9
D7
V4
Y5
AB
3V
5A
C2
AB
21A
B1
AA
6A
A1
AA
7W
20A
A5
AA
2V
21U
21A
A4
AB
4U
5
U20
Y20
V19
B7
D11
B11
C11
C7
A7
V1
U3
T3 U2
T2 U4
U1
V2
W2
Y4
Y2
W3
W4
Y3
AC
6A
C7
Y7
F20
J23
AB
7
H22
W19
AB
14A
5C
5B
5A
6A
2B
2C
1B
1J2
1J2
0J1
9
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5PCI_AD6PCI_AD7PCI_AD8PCI_AD9PCI_AD10PCI_AD11PCI_AD12PCI_AD13PCI_AD14PCI_AD15PCI_AD16PCI_AD17PCI_AD18PCI_AD19PCI_AD20PCI_AD21PCI_AD22PCI_AD23PCI_AD24PCI_AD25PCI_AD26PCI_AD27PCI_AD28PCI_AD29PCI_AD30PCI_AD31
PCI_C/BE#0PCI_C/BE#1PCI_C/BE#2PCI_C/BE#3
PCI_GNT#0PCI_GNT#1PCI_GNT#2PCI_GNT#3PCI_GNT#4
PCI_REQ#0PCI_REQ#1PCI_REQ#2PCI_REQ#3PCI_REQ#4
CPU_RCIN#CPU_PWRGOOD
CPU_NMICPU_INTRCPU_INIT#
CPU_IGNNE#CPU_FERR#
CPU_DPSLP#CPU_A20M#
CPU_A20GATE
SMB_ALERT#/GPIO11SMB_DATA
SMB_CLKSMLINK1SMLINK0
SM_INTRUDER#
PCI_TRDY#STOP#
PCI_SERR#PCI_RST#PCI_PME#
PCI_LOCK#PCI_PERR#
PCI_PARPCI_IRDY#
PCI_GPIO17/GNTB#/GNT5#PCI_GPIO16/GNTA#
PCI_GPIO1/REQB#/REQ5#PCI_GPIO0/REQA#
PCI_FRAME#PCI_DEVSEL#
PCI_CLK
STPCLK#CPU_SMI#CPU_SLP#
HUB_PD0HUB_PD1HUB_PD2HUB_PD3HUB_PD4HUB_PD5HUB_PD6HUB_PD7HUB_PD8HUB_PD9
HUB_PD10
HU
B_C
LKH
UB
_PA
RH
UB
_PS
TRB
HU
B_P
STR
B#
HU
B_R
CO
MP
HU
B_V
RE
FH
UB
_VS
WIN
G
EE
P_C
SE
EP
_DIN
EE
P_D
OU
TE
EP
_SH
CLK
LAN
_RX
D0
LAN
_RX
D1
LAN
_RX
D2
LAN
_TX
D0
LAN
_TX
D1
LAN
_TX
D2
LAN
_JC
LKLA
N_R
STS
YN
C
PM
_AG
PB
US
Y#/
GP
IO6
PM
_AU
XP
WR
OK
PM
_BA
TLO
W#
PM
_C3_
STA
T#/G
PIO
21P
M_C
LKR
UN
#/G
PIO
24P
M_D
PR
SLP
VR
PM
_PW
RB
TN#
PM
_PW
RO
KP
M_R
I#P
M_R
SM
RS
T#P
M_S
LP_S
1#/G
PIO
19P
M_S
LP_S
3#P
M_S
LP_S
5#P
M_S
TPC
PU
#/G
PIO
20P
M_S
TPP
CI#
/GP
IO18
PM
_SU
S_C
LKP
M_S
US
_STA
T#P
M_T
HR
M#
PM
_GM
UX
SE
L/G
PIO
23P
M_C
PU
PR
EF#
/GP
IO22
PM
_VG
ATE
/VR
MP
WR
GD
AC
_BIT
CLK
AC
_RS
T#A
C_S
DA
TAIN
0A
C_S
DA
TAIN
1A
C_S
DA
TAO
UT
AC
_SY
NC
LPC
_AD
0LP
C_A
D1
LPC
_AD
2LP
C_A
D3
LPC
_DR
Q#0
LPC
_DR
Q#1
LPC
_FR
AM
E#
GP
IO_7
GP
IO_8
GP
IO_1
2G
PIO
_13
GP
IO_2
5G
PIO
_27
GP
IO_2
8
CLK
_RTC
X2
CLK
_RTC
X1
CLK
_RTE
ST#
CLK
_48
CLK
_14
CLK
_VB
IAS
INT_
SE
RIR
QIN
T_IR
Q15
INT_
IRQ
14IN
T_P
IRQ
H#/
GP
IO5
INT_
PIR
QG
#/G
PIO
4IN
T_P
IRQ
F#/G
PIO
3IN
T_P
IRQ
E#/
GP
IO2
INT_
PIR
QD
#IN
T_P
IRQ
C#
INT_
PIR
QB
#IN
T_P
IRQ
A#
INT_
AP
ICD
1IN
T_A
PIC
D0
INT_
AP
ICC
LK
VS
S0
VS
S1
VS
S2
VS
S3
VS
S4
VS
S5
VS
S6
VS
S7
VS
S8
VS
S9
VS
S10
VS
S11
VS
S12
VS
S13
VS
S14
VS
S15
VS
S16
VS
S17
VS
S18
VS
S19
VS
S20
VS
S21
VS
S22
VS
S23
VS
S24
VS
S25
VS
S26
VS
S27
VS
S28
VS
S29
VS
S30
VS
S31
VS
S32
VS
S33
VS
S34
R525 100K
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
CLK_ICH148
PCI_RST# 9,15,21,22,23,26,27,30,32,38
LPC_AD1 30,32
CLK_ICHPCI 8
LAN_RXD0 25
HUB_PSTRB 9
PCI_GNT#138
LPC_FRAME# 30,32
PCI_REQ#419,38
PM_DPRSLPVR7,43
PCI_GNT#223
LAN_RXD2 25
LPC_AD2 30,32
PCI_FRAME# 19,22,23,27,38
PCI_C/BE#022,23,27,38
PCI_LOCK# 19,23
LPC_AD0 30,32
PCI_REQ#019,22
LAN_TXD1 25
PCI_C/BE#322,23,27,38
HUB_PD[0..10] 9
LAN_TXD0 25
CLK_ICH488
PCI_TRDY# 19,22,23,27,38
LPC_AD3 30,32
PCI_REQ#319,27
LAN_RXD1 25
HUB_PSTRB# 9
PCI_SERR# 19,22,23,38
PCI_C/BE#122,23,27,38
PCI_REQ#119,38
PCI_AD[0..31]22,23,27,38
LAN_TXD2 25
PCI_C/BE#222,23,27,38
CLK_ICHHUB 8
PCI_IRDY# 19,22,23,27,38
PCI_STOP# 19,22,23,27,38
PCI_REQB# 19PCI_REQA# 19
PCI_PERR# 19,22,23,38
LAN_RSTSYNC 25
PCI_REQ#219,23
PCI_PAR 19,22,23,27,38
PCI_DEVSEL# 19,22,23,27,38
INT_SERIRQ 19,23,30,32
PM_THRM#30
PM_BATLOW#19,30
IDE_PATADET21
KBRST# 30
PM_CPUPERF#5
SM_INTRUDER# 19
SMB_CLK 8,14,19SMB_DATA 8,14,19
PM_CLKRUN#19,22,23,30,32,38 INT_IRQ14 19,21INT_IRQ15 19,26
PM_LANPWROK25,30
PBTN_OUT#30PM_PWROK35
PM_SLP_S3#30PM_SLP_S1#8,30
PM_SLP_S5#30PM_STPCPU#8PM_STPPCI#8
PM_SUS_STAT#30,32
EC_SMI#30EC_SCI#30
H_DPSLP#5,43
SMB_ALERT# 19
EC_LID_OUT#30
GATE20 30H_A20M# 5
H_SMI# 5
H_INIT# 5
SMLINK1 19
H_NMI 5
SMLINK0 19
H_STPCLK# 5
H_INTR 5
H_FERR# 5
H_PWRGD 5
H_IGNNE# 5
VGATE35,43
INT_PIRQA#19,22,23INT_PIRQB#19,23INT_PIRQC#19,38INT_PIRQD#19,27,38
PCI_GNT#327
AGP_BUSY#11
PCI_GNT#022
PCI_GNT#438
PM_RSMRST#19ICH_SWI#19,30
PM_SSMUXSEL7,43
RTCCLK11,23,24 LPC_DRQ#1 32
PAL/NTSC# 15
WARM_RST# 35SM_SEL0 14
EEP_DIN 25EEP_CS 25
EEP_DOUT 25EEP_SHCLK 25
LAN_JCLK 25
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ICH3-M (2/2) InterfaceIDE
InterfaceUSB
Misc
Power
Power
VSS
CLOSE TO ICH3-M(< 1 inch)
401174 1A
SCHEMATIC, M/B LA-1011
Custom
18 46Friday, September 21, 2001
Compal Electronics, inc.Title
Size Document Number Rev
Date: Sheet of
USB_OC#0
IDE_SDD10
IDE_SDD1
IDE_PDD0
IDE_PDD9
IDE_SDD11
IDE_SDD15
IDE_PDD6
IDE_PDD2
IDE_SDD8
IDE_SDD0
IDE_SDD14
IDE_PDD3
IDE_PDD13IDE_PDD12
IDE_SDD12
USB_OC#1
IDE_PDD7
IDE_SDD13
IDE_PDD8
IDE_PDD1
IDE_SDD6
IDE_PDD11
IDE_SDD4
VCC5REF
IDE_SDD3IDE_SDD2
IDE_PDD5
USB_D_PN0
V3A
LW_I
CH
IDE_PDD4
IDE_SDD7
IDE_PDD10
IDE_SDD9
IDE_PDD15IDE_PDD14
IDE_SDD5
USB_D_PP2USB_D_PP3
USB_D_PN1USB_D_PN2USB_D_PN3USB_D_PN4
USB_D_PP4
USB_OC#2USB_OC#3USB_OC#4USB_OC#5
USB_OC#2USB_OC#3USB_OC#4USB_OC#5
USB_BIAS
ICH_ACIN
ICH_ACIN
VC
CP
_AU
X
USB_D_PP0USB_D_PP1
VP
LL_U
SB
USB_D_PP3
USB_D_PP2USB_D_PN2
USB_D_PP4USB_D_PN3
USB_D_PP1
USB_D_PP0
USB_D_PN1
USB_D_PN0
USB_D_PN4
+3V_ALW
+5V_SW +3V_SW
+3V_ALW
+3V_ALW+1.5V_SW
+RTCVCC
+V1.8_ICHLAN
+1.8V_ALW
+3V_SW +1.8V_SW
+3V_SW
+1.8V_SW
+3V_SW
+1.8V_ALW +1.8V_ALW
+3V_ALW
D271SS355
21
C714@1UF_0603
12
C709.1UF
12
R4931K
12
R196 @1K1 2
RP198P4R_100K
1 82 73 64 5
R15418.2_1%
12
L47
BLM21A601SPT
1 2
D13 RB751V21
R181
100K
12
C599.1UF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C705
1UF_0603
12
L18 FBM-L10-160808-3011 2
L27 FBM-L10-160808-3011 2L26 FBM-L10-160808-3011 2
L24 FBM-L10-160808-3011 2L25 FBM-L10-160808-3011 2
L19 FBM-L10-160808-3011 2
U16B
82801
D19A19E17B17D15A15D18A18E16B16D14A14
E12D12C12B12A12A11
H20G22F21G19E22E21H21G23F23G21D23E23
B21
AC15AB15AC21AC22
AA14AC14AA15AC20AA19AB20
W12AB11AA10AC10W11Y9AB9AA9AC9Y10W9Y11AB10AC11AA11AC12
Y17W17AC17AB16W16Y14AA13W15W13Y16Y15AC16AB17AA17Y18AC18
Y13Y19AB12AB18AC13AC19Y12AA18AB13AB19
H23
E13
F14
K12
P10
V6
V7
F15
F16
F7 F8 K10
AB
6
E6
W8
C13
W5
F9 F10
P14
U18
V22
C23
B23
E7
T21
D6
T1 C2
A21
A22
F6 G6
H6
J6 M10
R6
T6 U6
G18
H18
P12
V15
V16
V17
V18
J18
M14
R18
T18
U19
F17F18K14
E10V8V9
E11
K6
K18
P6
P18
V10
V14
E14
E15
E18
E19
E20
F22
G3
G20
H19
AA
22J5 K
11K
13K
20K
21K
22K
23L3 L1
0L1
1L1
2L1
3L1
4L2
1L2
3M
11M
12M
13M
20M
22N
5N
10N
11N
12N
13N
14N
21N
23P
11P
13P
20P
22R
3R
5R
21R
23T4 T2
0T2
2V
3A
C23
V20
W6
W7
W10
W14
W18
W22
Y8
AA
3A
A8
AA
12A
A16
AA
20A
B8
AC
1A
C8
USB_PP0USB_PP1USB_PP2USB_PP3USB_PP4USB_PP5USB_PN#0USB_PN#1USB_PN#2USB_PN#3USB_PN#4USB_PN#5
USB_OC#0USB_OC#1USB_OC#2USB_OC#3USB_OC#4USB_OC#5
GPIO32GPIO33GPIO34GPIO35GPIO36GPIO37GPIO38GPIO39GPIO40GPIO41GPIO42GPIO43
USB_RBIAS
IDE_PDCS1#IDE_PDCS3#IDE_SDCS1#IDE_SDCS3#
IDE_PDA0IDE_PDA1IDE_PDA2IDE_SDA0IDE_SDA1IDE_SDA2
IDE_PDD0IDE_PDD1IDE_