a study of different types of current mirrors using polysilicon tfts

7/30/2019 A study of different types of current mirrors using polysilicon TFTs

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A study of different types of current mirrors using polysilicon

TFTs

I Pappas1, L Nalpantidis

1, V Kalenteridis

1, S Siskos

1, C A Dimitriadis

2, A A

Hatzopoulos3

Aristotle University of Thessaloniki,1Physics Dept., Electronics Lab, 54124, Greece

2Physics Dept, Solid State Physics Lab, 54124, Greece

3Department of Electrical and Computer Engineering, 54124, Greece

E-mail: [email protected], [email protected]

Abstract. Polysilicon thin-film technology has become of great interest due to the demand for

large area electronic devices. Active Matrix Liquid Crystal Displays (AMLCDs) and ActiveMatrix Organic Light Emitting Displays (AMOLEDs) are among the fields where polysilicon

thin-film transistors (poly-Si TFTs) are most commonly used. Such devices, generally, require

analog signal processing. This fact makes the performance of basic analog blocks, such as

current mirrors implemented with poly-Si TFTs, crucial. This paper examines the performance

of various current mirror designs through simulation. Finally, a novel design of a current

mirror is proposed aimed to be used in low voltage applications.

1. IntroductionThin-film transistors have made large area electronic devices such as AMLCDs and AMOLEDs

commercially appealing [1]. Despite the similarities with the commonly used MOSFETs, poly-Si

TFTs present some important differences. The main reason that causes these differences is that instead

of a single-crystal silicon wafer, a typically heat-sensitive material, usually glass, is used. Such a

substrate indicates that TFTs lack substrate pin, having only three terminals. The presence of the

insulating substrate provides ideal isolation of each device and negligible parasitic capacitances [2].

Figure 1. Poly-Si TFT structure Figure 2. Cross section of a poly-Si TFT

Institute of Physics Publishing Journal of Physics: Conference Series 10 (2005) 373376doi:10.1088/1742-6596/10/1/091 Second Conference on Microelectronics, Microsystems and Nanotechnology

373 2005 IOP Publishing Ltd


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Devices implemented with this technology demonstrate inferior characteristics, however they make

the integration of drive and interface circuitry no the same substrate possible. Because of the nature of

the fabrication process, there is a variation in the electrical characteristics of individual TFTs over thesubstrate area [3]. The major disadvantages of poly-Si TFTs are the large mismatches of the threshold

voltage and the mobility of the transistors. These mismatches present no spatial uniformity. The

threshold voltage varies up to 1V from the nominal value [7]. Another characteristic that

deteriorates the performance of poly-Si TFTs is the kink effect [6]. This effect is mainly originated by

impact ionization at the drain end of the channel and causes an anomalous increase of the drain current

for relatively high values of the drain to source voltage Vgs as it can be seen in figure 3 [1]. Lower

supply voltages would prevent kink effect from playing a dominant role in the TFTs saturation

region. Many different methods to reduce the effect of these disadvantages are proposed [4],[5],[6].

Figure 3. Typical output

characteristics of a n-channel

poly-Si TFT at different VGS.

2. Simulation parametersThe simulation programs used were HSpice and AIM-Spice. The poly-Si TFTs were simulated using

the PSIA2 RPI model (level 62 and 16 respectively). The default values of the models parameters

were kept [8] except those specified in table 1 [9] and the width (W) and length (L) parameters that

were chosen for every design simulated, in order to achieve the optima results.

Table 1. TFTs parameters values used in simulation.

High field mobility

MU0 (cm2/Vs)

Zero-bias threshold voltage

VTO (V)

n channel 100 2

p channel 50 -3

3. Simulation resultsThe purpose of the simulations was to ascertain the minimum supply voltage needed in order to

operate properly, the input and output resistances of the devices and the relative error between the

reference and output current for both equal and unequal transistors threshold voltages. The designs

were implemented using p-channel TFTs. The effect of the threshold voltage mismatch was taken into

account by assuming VTO variations of 1V for each transistor, that means a total 2V difference. The

reference input current ranged from 1 to 100.

The first design examined was the simple current mirror implemented with two poly-Si TFTs as

shown in figure 4. The minimum supply voltage was found to be 10V and the relative error between

reference input and output current was 16% for no variation of the threshold voltage. The high value

of the relative error is caused by the different Vds of the transistors. Assuming 1V variation from the

nominal value for the transistors' threshold voltages, the relative error between the input and outputcurrent becomes up to 38%.

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Figure 4. Simple current mirror Figure 5. Cascode current mirror

The second design examined was the cascode current mirror implemented with p-type poly-Si

TFTs, shown in figure 5. The minimum supply voltage found 20V and the optimum bias voltage -10V.

The relative error between reference input and output current was 10% for common threshold voltages

of the transistors used. The decrease of the relative error was expected since the two transistorsforming the mirror share an almost identical value of the Vds. Assuming 1V variation from the

nominal value for the transistors' threshold voltages, the relative error between the input and output

current becomes up to 24%.

The third design examined was the fully cascode current mirror as shown in figure 6. The supply

voltage used was 20V and the relative error was no more than 5% for no variation of the threshold

voltage. The result of the assumed non-uniformity of the transistors' threshold voltages was an

increase of the relative error up to 25%.

Figure 6. Fully cascade current mirror Figure 7. Wide swing current mirror

The wide swing current mirror of figure 7 was examined. The supply voltage used was 20V. The

relative error was found 1,5% for no variation of the threshold voltage. Taking into account the

variation from the nominal value of the threshold voltages, the relative error found to be up to 15%.

The complexity, the area and the voltage supply increase is the trade-off for the improvement of

current mirror performance.A novel design of a current mirror aimed to be used in low voltage applications is proposed. This

design is shown in figure 8. It was chosen C1=6x10-12

F, C2=3x10-12

F.

Figure 8. Proposed current mirror design

embodying capacitive coupling of the TFTs

gates

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Applying the charge conservation law it can be derived that the TFTs gates are biased so as:

VG1= VG2=Vbias21

1

CC

C

+

It is evident that the proposed design shares the same topology with the simple current mirror.

Appropriate decision of C1, C2 and Vbias values can lead to almost zero threshold voltage transistors,

because the gate voltage will be set almost equal to the threshold voltage. Therefore transistors can

operate in the saturation region with very small value of Vds.

The results of the previous simulations are summarized in table 2.

Table 2. Simulations results summarization

Minimum Relative mirroring errorCurrent mirror

type Vdd (V) R (K) ROUT (K) VT=0 VT= 1V

Simple 15 53.9 285 16% 38%Cascode 20 53.9 770 10% 24%

Full cascode 20 107.8 1900 5% 25%

Wide swing 25 255 802 1.5% 15%

Proposed 12 88.3 833.3 4.5% 9%

4. ConclusionsA number of current mirrors implemented with poly-Si TFTs were examined. Their performance was

found poor in comparison with those implemented with conventional MOSFETs. However, complex

structures such as the wide swing current mirror, present satisfactory characteristics even for the worst

transistors threshold voltages variation case. A novel design has been proposed that can provide a

current mirror with practically zero threshold voltage transistors. The behavior of the proposed design

is considered satisfactory considering its simple structure.

5. AcknowledgmentsThe authors would like to thank the ministry of national education and religious affairs for the

financial support of the frame PYTHAGORAS.

6. References[1] Fortunato G and Mariucci L 2001 SAFE 2001[2] Lewis A G, Lee D D and Bruce R H 1992IEEE Journal of solid-state circuits27 1833-42[3] Simon W-B Tam, Yojiro M, Hiroshi M, Tatsuya S and P Migliorato 2001 Conference 4925 A

Electronic Imaging 2001, San Jose, California, U.S.A.

[4] Chun L Y and Philip K T M 2004Int. J. Electronics 91 199-210[5] Gururaj A B, Man W, Zhongle J and Hoi S K 1999Analysis and Reduction of the Kink Effect in

MILC-TFTs

[6] Mazhari B and Yosegh S. C 2003 10th International Display Workshop, Fukuoka[7] Jacunski D M, Shur S M and Hack M 1996IEEE Transactions on Electron Devices43[8] Synopsys HSPICE Version U-2003.03-SP1[9] Lewis G A, Lee D D and Bruce R H 1992 IEEE Journal of Solid State Circuits27

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a study of different types of current mirrors using polysilicon tfts

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