a simple subcircuit extension of the bsim3v3 model for ... · 612 ieee journal of solid-state...

612 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 4, APRIL 2000

A Simple Subcircuit Extension of the BSIM3v3Model for CMOS RF Design

Suet Fong Tin, Ashraf A. Osman, Kartikeya Mayaram, Senior Member, IEEE, and Chenming Hu, Fellow, IEEE

Abstract—An accurate and simple lumped-element extensionof the BSIM3v3 MOSFET model for small-signal radio-frequencycircuit simulation is proposed and investigated. Detailed compar-isons of the small-signal and parameters with both two-dimen-sional device simulations and measurement data are presented. Aprocedure is developed to extract the values of two lumped resis-tors—the only added elements. The non-quasi-static and substrateeffects can be modeled with these two resistors to significantly im-prove the model accuracy up to a frequency of 10 GHz, which isabout 70% of the of the 0.5- m NMOS transistor.

Index Terms—BSIM3v3 RF model, CMOS RF, lumped-elementmodel, MOSFET RF modeling, parameter extraction, small-signalmodel.

I. INTRODUCTION

T HE RAPID pace of development in the communicationcircuits market is driving IC designs to higher levels of in-

tegration and circuitry that operates at higher frequencies andlow voltages. IC designers rely on circuit simulators and ac-curate models for design verification before committing a de-sign to silicon; thus model accuracy is a significant concern forradio-frequency (RF) applications [1]. Since CMOS is the pre-ferred technology for integrating systems on a chip, MOSFETmodels such as BSIM3v3 [2] must provide accurate simulationof CMOS RF circuits.

The BSIM3v3 model is an industry standard MOSFETmodel for deep submicrometer applications and has beensufficiently validated for digital applications at hundreds ofmegahertz. However, not much attention has been paid toradio-frequency modeling. Recent papers [3]–[6] have startedaddressing the suitability of BSIM3v3 for RF applicationsand the development of new MOSFET models and parameterextraction for RF circuit simulation [7]–[10].

At high frequencies the MOSFET behaves as a distributeddevice. Therefore, the effects that must be modeled are:

1) distributed channel or the non-quasi-static (NQS) effect;2) distributed gate resistance in wide geometry transistors;3) distributed substrate resistance.

Manuscript received August 13, 1999; revised December 20, 1999. This workwas supported in part by the National Science Foundation (NSF) Center forthe Design of Analog/Digital Integrated Circuits r and by the National ScienceFoundation under Grant CCR-9702292. The UTMOST parameter extractor wasmade available under NSF Grant DUE-651416.

S. F. Tin is with Cypress Semiconductor, Woodinville, WA 98072 USA.A. A. Osman is with Level One Communications, Inc., Sacramento, CA

95827 USA.K. Mayaram is with the Department of Electrical and Computer Engineering,

Oregon State University, Corvallis, OR 97331 USA.C. Hu is with the Department of Electrical Engineering and Computer Sci-

ences, University of California, Berkeley, CA 94720 USA.Publisher Item Identifier S 0018-9200(00)02654-8.

Fig. 1. A gate resistanceR in series with the MOSFET gate modelsnon-quasi-static operation.

This work differs from previous efforts in several ways.First, we examine the minimum circuit-level modifications toBSIM3v3 that are required to improve the accuracy of thismodel. It is shown that only two lumped resistors need tobe added to represent all distributed effects. Previous studieshave used up to six additional circuit elements. Second, wehave demonstrated good accuracy for small-signal RF circuitsimulation for a frequency range up to 70% of the transistor

. Third, the model is compared with results from two-dimen-sional (2-D) physical device simulation, which are accurate forhigh-frequency applications, and measurement data. Fourth,based on the insight gained from device simulations and thesimplicity of the proposed circuit model, a parameter extractionprocedure is derived. Although the use of the lumped resistorshas been evaluated only for BSIM3v3, the technique is generaland simple so that it can be applied to other MOSFET models.

This paper is organized in the following manner. In Sec-tion II, a brief overview of the previous work in high-frequencyMOSFET modeling is described. A new simple and accuratesubstrate model is presented and analyzed in Section III. Thedevice-simulation based verification methodology is presentedin Section IV. Comparisons of the small-signal circuit modelswith experimental data are presented in Section V. The mainconclusions are summarized in Section VI.

II. A N OVERVIEW OF RF MOSFET MODELING

In this section, MOSFET modeling approaches for high-fre-quency applications are examined. Most of the approaches forlarge-signal analysis result in complex models that are availableonly in special simulators. These techniques cannot be usedin the context of a standard model such as BSIM3v3. Simplelumped-element equivalent circuit extensions are desirablesince they can be incorporated with any MOSFET model. The

0018–9200/00$10.00 © 2000 IEEE

TIN et al.: SIMPLE SUBCIRCUIT EXTENSION OF BSIM3v3 MODEL 613

Fig. 2. Magnitude and phase ofy andy as a function of frequency from device simulations for two transistor structures, one for which the substrate effects areimportant (Sub) and the other for which the substrate effects have been minimized (without Sub).W=L = 500�=0:6� andW=L = 500�=1:2� atV = 0:8 VandV = 3:0 V.

emphasis here is on small-signal models for the MOSFET athigh frequencies.

A. NQS Modeling

NQS effects are important for high-frequency applications[11] and have been experimentally demonstrated in MOSFET’sby on-wafer -parameter measurements [12]. They have beenincorporated in circuit simulators using a solution of the cur-rent continuity equation [13]–[22]. Most of these models are ex-tremely complex and valid only for long-channel MOSFET’s.

An alternate approach, as suggested in [11] and [23], is tomodel the distributed nature of the MOSFET by using a lumped-sectional model. Here several MOSFET sections are used to rep-resent the distributed channel. Although the MOSFET modelis generally believed to be accurate, the computational cost in-creases because of an increase in the number of MOSFET’s thathave to be evaluated.

In BSIM3v3 the NQS effect is accounted for by a first-ordermodel based on the Elmore delay [24]. When the nonquasistaticmodel option is selected (NQSMOD ), the ELM parametercontrols the value of the Elmore delay. Alternatively, a similarbehavior can be introduced by use of an external resistancein series with the gate terminal as in [3] and [5] and as shownin Fig. 1. The external series gate resistance solution is the mostattractive since this resistance models not only the NQS effectbut also the gate-induced thermal noise [25]. Furthermore, thisresistance can be combined with an effective gate resistance toinclude the effect of the distributed resistance of the gate elec-trode, as described in Section II-B [26].

B. Distributed Gate Resistance Modeling

The effect of the distributed gate resistance becomes im-portant in MOSFET’s at high frequencies, particularly so forwide geometry transistors [27]. Although this effect can be


(a)

(b)

Fig. 3. (a) Substrate network model of [5]. (b) Substrate network model of [4].

Fig. 4. The new substrate network models the substrate as a single resistor.MOSFET capacitances are shown with dashed lines.

minimized by using multifinger transistors, its modeling is im-portant for circuit simulation. A detailed model derived from atransmission-line analysis is available in [28]. However, simplelumped element equivalent circuits are accurate in modelingthe distributed gate resistance effect and are also well suited forhand calculations [29], [30]. The effect of the distributed gateresistance is modeled in [29] by a lumped resistance of value(1/3) , where is the gate sheet resistance andand are the transistor width and length, respectively. Thissimple model has been compared to the detailed analysis of[28] for various technologies in [30]. Furthermore, a significantimprovement to the model of [29] is also demonstrated in [30]for predicting the distributed gate resistance effect on theparameters and noise.

C. Distributed Substrate Modeling

The distributed substrate resistance also plays an importantrole in high-frequency applications. However, even a recent

Fig. 5. The simulation and verification methodology. The device simulator isused to generate the data for the parameter extractor and also for verifying theaccuracy ofy parameters.

Fig. 6. Simulatedg and g from the BSIM3v3 model and the devicesimulator for NMOSFET withW=L = 500�=0:6�. A reasonable agreementis seen between the simulated data and the BSIM3v3 model.

overview paper on high-frequency MOS device physics [26] hasnot considered the influence of the substrate on the MOSFETcharacteristics at high frequencies. Its effect on transistor noisehas been investigated in [31] and more recently in [32].

The influence of the substrate on the high-frequency charac-teristics of the MOSFET can be easily demonstrated with phys-ical device simulations from the 2-D device simulator MEDICI[33]. A low-resistivity substrate is considered here, and similardata can be obtained for a high-resistivity substrate. Two tran-sistor structures are considered: 1) a regular transistor in whichthe substrate effects are important and 2) a transistor for whichthe substrate effects have been minimized. The regular transistoris an NMOSFET structure for which the-substrate is 8 m


TABLE IREAL AND IMAGINARY PARTS OF THEy PARAMETERS FOR THENEW SUBSTRATE MODEL

TABLE IIREAL AND IMAGINARY PARTS OF THEy PARAMETERS FOR THE

SIMPLE SUBSTRATE MODEL

thick. The substrate is heavily doped at a concentration of ap-proximately 10 /cm and has an epilayer in which the tran-sistor is fabricated. A contact is provided at the bottom of thesubstrate. The transistor structure in which the substrate effectshave been minimized has a substrate thickness of 0.8m and abottom substrate contact.

The device simulation results for and are shown inFig. 2 for the two transistor structures, one in which the substrateeffects are important and the other for which the substrate effectshave been minimized. and remain virtually unaffectedand have not been shown. From Fig. 2, it is seen that the phase ofboth and is changed due to the presence of the substrate.In fact, for a small peaking is observed.

Recent small-signal BSIM3v3 extensions for RF have incor-porated the effect of the substrate as an external network withthe BSIM3v3 model [4]–[6]. A substrate coupling network hasalso been used in the model of [10]. These network approachesare summarized in Fig. 3. The substrate models of [5] and [6] aresimilar with the exception of additional capacitances in parallelwith for the model of [6]. The substrate model of [10] issimilar to that of [4] in that only a single is used. Hence,

TABLE IIICHANNEL LENGTH AND GATE BIAS DEPENDENCE OFPARAMETERSR AND

ELM FOR DEVICE SIMULATION DATA AT V = 3:0 V

TABLE IVCHANNEL LENGTH AND DRAIN BIAS DEPENDENCE OFPARAMETERSR AND

ELM FOR DEVICE SIMULATION DATA AT V = 1:5 V

our focus will only be on the substrate networks of [4] and [5].The substrate model of [4] [Fig. 3(b)] is a more complicated thanthat of [5] [Fig. 3(a)] and requires a complex parameter extrac-tion procedure. If in the network of Fig. 3(b), thenthis model also reduces to that of Fig. 3(a). One common fea-ture in both of these models is the use of extrinsic capacitancesto account for the drain/source bulk junction capacitances. TheMOSFET model junction diode capacitances are not used, asthey are set to zero and a different model is required for high fre-quencies. Therefore, the drawback is that a single model cannotbe used from low frequencies to frequencies in the gigahertzregime.

III. SUBSTRATE NETWORK MODELING

In this section, a new, simple, and accurate substrate networkis presented that works consistently with the p-n junction diodecapacitances included in the MOSFET model. Since the biasdependence is captured in the diode capacitance model, no sep-arate capacitance extractions are required for each bias point.Furthermore, one single model can be used from low to highfrequencies. An analysis of this new substrate model and pa-rameter extraction are also described.


Fig. 7. Magnitude and phase ofy as a function of frequency forW=L =

500�=0:6�, V = 0:8 V, andV = 3:0 V with ELM = 24 andR =

0:85 . The same ELM andR are used in Figs. 7–10. The phase rolloff inyis accurately modeled by NQSMOD= 1 or by the use ofR .

A. New Substrate Model

The silicon substrate acts like a distributed resistive networkin the low gigahertz regime [34] and as a distributed RC networkfor higher frequencies. Our experience and that of others [4], [5],[10], indicates that a resistive network is adequate for frequen-cies up to 10 GHz. Therefore, the substrate can be modeled bya lumped resistor as in Fig. 4. Here, an external substrate resis-tance is added at the bulk node. This model is a simplificationof that in Fig. 3(b) in that no external capacitances are requiredand only one lumped resistor is used, i.e., .

B. Analysis for New Substrate Model

The new substrate model is analyzed in terms of two-portparameters in this section. This analysis provides the basis forextracting and in conjunction with the core BSIM3v3model parameters.

The MOSFET circuit of Fig. 4 is analyzed as a two-port de-vice with the input being at the gate and the output at the drain,and both the source and substrate terminals are grounded. Froma small-signal analysis of the circuit in Fig. 4 we obtain

(1)


500�=0:6�,V = 0:8 V, andV = 3:0 V. y is accurately modeled evenwith NQSMOD= 0.

where and .Since both and are much larger than the followingapproximation can be made:

(2)

whereby

(3)

The above result is identical to that obtained if were zeroin Fig. 4. This clearly indicates that does not affect .Therefore, can be extracted from the phase of indepen-dent of .

By use of the approximation made in (2) we have

(4)

It should be noted that both and influence . Since(based on typical values), the effect of the

substrate resistance is observed at lower frequencies comparedwith the gate resistance. In the frequency rangewe can simplify the expression for to be

(5)



500mu=0:6�, V = 0:8 V, andV = 3:0 V. The phase rolloff iny isqualitatively modeled only byR . NQSMOD= 1 has no effect.

Similarly

(6)

An analysis for that includes is significantly morecomplex. However, since the effect of is observed at muchhigher frequencies, we have derived the expression foras-suming is zero. In this case

(7)

From the above expressions, the real and imaginary parts ofeach of the parameters can be determined, and these quanti-ties are summarized in Table I. Theparameters for the simplesubstrate network of [5] are given in Table II. Theseparame-ters are obtained from those of Table I by setting , , and

to zero. From these tables, it is clear that both andare important and that a simple model does not accurately cap-ture the effect of the substrate. Furthermore, it is also seen that

has a significant effect on , and this property is used toextract an appropriate value for .

The above analysis also indicates that the models of [5] and[6] [Fig. 3(a)] do not allow coupling of the gate signal to the


500�=0:6�,V = 0:8 V, andV = 3:0 V. y is accurately modeled evenwith NQSMOD= 0.

drain, and vice versa, through the substrate () and . Thiscoupling is important for both and at high frequenciesand is accounted for in the networks of Figs. 3(b) and 4. Also,for the simple network, the output circuit includes only a singletime constant, and there are difficulties in matching the phase of

.

IV. DEVICE-SIMULATION -BASED VERIFICATION

METHODOLOGY

In this section, we validate the gate and substrate resistanceextensions of the BSIM3v3 model using the device simulatorMEDICI [33]. The focus is on modeling of the non-quasi-staticand substrate effects. The distributed gate resistance can bemodeled as described in Section II-B and is, therefore, notconsidered here. The methodology used to verify the BSIM3v3model is shown in Fig. 5. MEDICI was used to determinethe I–V characteristics, capacitances, andparameters for aMOSFET based on the doping profiles of a 0.5-m CMOSprocess. From the device simulation results, the model param-eters were extracted using the parameter extractor UTMOST[35]. Two NMOS transistors of and

have been used in this comparison. Boththe dc and ac parameters of the BSIM3v3 model for eachdevice were extracted from the characteristics obtained fromthe MEDICI device simulator. The fit of the simulated con-ductance/voltage characteristics from BSIM3v3 to the devicesimulator data is shown in Fig. 6. The discrepancies in this data


(a) (b)

(c) (d)

Fig. 11. Simulateds parameters from the device simulator (open symbols) and the BSIM3v3 model:R (dash lines), NQSMOD= 1 (dotted lines) for a frequencyrange of 100 kHz–10 GHz withW=L = 500�=0:6�. (a)V = 0:8 V, V = 3 V, ELM = 26,R = 0:65 , andR = 106 ; (b) V = 1:5 V, V = 2

V, ELM = 7.8,R = 0:53 , andR = 130 ; (c) V = 2 V, V = 3 V, ELM = 5.6,R = 0:49 , andR = 120 ; and (d)V = 3 V, V = 3 V,ELM = 3.6,R = 0:46 , andR = 135 .

appear as inaccuracies in the low-frequency comparisons. Oncethe BSIM3v3 parameters were extracted, SPICE3 was used todetermine the parameters at different biases, using differentoptions for high-frequency modeling. Theparameters werealso computed using the device simulator and compared withthe parameters obtained from the circuit simulations. For allBSIM3v3 circuit simulations, the default 40/60 channel-chargepartitioning was used since this is the most physical model [2].

A. Model Verification with Substrate Excluded

For this verification, we examine devices in which the influ-ence of the substrate has been minimized as explained in Sec-tion II-C. The results for the following cases are presented: 1)NQSMOD , i.e., the quasi-static model; 2) NQSMODand ELM adjusted to give the correct phase for; 3) externalgate resistance , with NQSMOD and the value of

determined from the phase of ; and 4) the simulated devicedata from MEDICI for the transistor in which substrate effectshave been minimized. Additional results and comparisons areavailable in [36] and [37]. Device and circuit simulation data forPMOSFET’s are also compared in [37]. It should be noted thatthis is the first comparison of the NQSMOD option of BSIM3v3for small-signal RF applications.

The parameters extracted from the device data are com-pared with the circuit-level simulations for different biases andfrequencies up to 10 GHz. The parameters ELM andwerefound to be dependent on both the channel length and the bias,as summarized in Tables III and IV. It is seen that there is a de-pendence on the gate bias but almost no dependence on the drainbias.

The parameters for the 0.6-m device for two bias condi-tions are shown in Figs. 7–10. From the simulated results it isseen that for all four cases, a very good agreement is obtained in


Fig. 12. Photomicrograph of test chip.

the magnitudes of theparameters, whereas there is a disagree-ment in the phase for some of the cases described above. Thefollowing conclusions can be derived from these figures. At lowfrequencies and low the disagreement in and is dueto the lack of a proper fit for and during parameter ex-traction. This difference also translates into discrepancies in thephase. At high frequencies, the magnitude of increases be-cause of the gate-drain overlap capacitance, which could not beeliminated in the device simulations. The parameter NQSMODaffects only the phase of , and use of NQSMOD givesan incorrect phase. The use of a series gate resistance for incor-porating the high-frequency rolloff produces results similar tothose for NQSMOD . However, NQSMOD is qualita-tively incorrect in predicting the rolloff in phase, whereasthe gate resistance model is significantly better.

In summary, for a device in which the substrate effects arenegligible, a match to , , can be obtained for small-signal analyses by use of the NQSMOD flag in BSIM3v3 anda proper value of the ELM parameter. The same behavior isreproduced by use of an external resistance in series with thegate, which also accurately models the phase rolloff of. BothELM and are gate-bias and channel-length dependent. Thesecomparisons indicate that the core BSIM3v3 model with a seriesgate resistance can account for non-quasi-static operation.

B. Model Verification with Substrate Included

The effect of the substrate network is now considered in themodel verification. The results for the following cases are pre-sented: 1) NQSMOD with external substrate resistance

, where the values of ELM and are extracted to givethe correct phase for and , respectively; 2) external gateand substrate resistances and , with NQSMOD(Fig. 4), where the values of and are extracted to givethe correct phase for and , respectively; and 3) the sim-ulated device data from MEDICI for the regular transistor. The

parameters from the network of Fig. 4 using the MOSFETjunction diode models are in good agreement with device simu-lations for several different bias conditions, as shown in Fig. 11.The values of ELM, , and are bias dependent as shown

TABLE VBIAS DEPENDENCE OFPARAMETERS ELM, R , AND R FOR MEASURED

TRANSISTORDATA WITH W=L = 405�=0:6�

TABLE VIVALUE OF f OBTAINED FROM MEASUREMENT AND SPICE SIMULATIONS

FORW=L = 405�=0:6�

in the figure caption. Thus, the original BSIM3v3 model withan external substrate resistance can be also used to account forthe effect of the substrate. This combined with the external gateresistance then gives a complete RF MOSFET model that is val-idated with experimental data in Section V.

V. VALIDATION WITH MEASUREDDATA

In this section, we compare the BSIM3v3 model incorpo-rating the gate and substrate networks with experimental tran-sistor data from a 0.5-m CMOS process from MOSIS. Againthe emphasis is on modeling of the non-quasi-static and sub-strate effects. The data for a transistor withare used. This transistor has an interdigitated layout with 50 fin-gers to minimize the gate resistance and eight dummy fingers tominimize edge-related etching effects. In the absence of dummytransistors, boundary-dependent overetching can occur, leadingto poor matching and significant deviation from the predictedperformance. A photomicrograph of the test structure is shownin Fig. 12.

One of the goals of this validation process is to demonstratethat the BSIM3v3 model can be extended to RF applicationssimply by extracting appropriate values for and inFig. 4. We have made use of the dc and capacitance parametersfor the test run from MOSIS. Since the output conductance wasnot accurately modeled by this parameter set, we re-extractedthe dc model parameters from the current/voltage characteris-tics of the twelve transistors for dc characterization on the testchip. For the drain/source bulk capacitances, the diode deple-tion region capacitance model from MOSIS was usedwithoutany modifications.

The first set of validations include a comparison of theBSIM3v3 model and the new substrate network of Fig. 4 withmeasured data. The non-quasi-static operation was included byuse of a series gate resistanceor NQSMOD . The valuesfor and ELM were extracted from the phase rolloff of ,and was determined from a nonlinear least squares fitfor the phase of . These values are summarized in Table Vfor different bias conditions. In this case, we see thatis independent of the bias and that ELM and are bias


Fig. 13. Magnitude and phase ofy , y , y , andy as a function of frequency forW=L = 405�=0:6� for the new substrate network model and measureddata atV = 0:8 V andV = 3 V.

dependent. A comparison of the measured and simulatedissummarized in Table VI and a good agreement is obtained.

The parameters for different bias conditions are comparedin Fig. 13. From this figure we see that a reasonable agree-ment is obtained between the BSIM3v3 model and the mea-sured data for frequencies up to 10 GHz. It should be noted thatany disagreement in the low-frequency data is due to the lackof an exact fit to the low-frequency device characteristics. Thisalso translates into discrepancies at high frequencies. The model

with has a better agreement than that with NQSMOD.In fact, for , NQSMOD predicts an incorrect trend in thephase. This problem was also observed in the comparisons withthe device simulation data. In addition, there is a disagreementin the magnitude of with NQSMOD for higher fre-quencies. Thus, for RF applications, improved accuracy can beobtained only with an external gate resistance. The NQSMOD

option when used with the substrate network results in aloss in accuracy.


Fig. 14. Magnitude and phase ofy parameters as a function of frequency forW=L = 405�=0:6� for the three substrate models and measured data atV =

0:8 V andV = 3:0 V.

The second set of validations include a comparison of allthe substrate network models with measurements. For eachof the substrate models [4], [5], and/or were ex-tracted to obtain a match in the phase of. The values for

were extracted from the phase rolloff of . The pa-rameters with the three substrate networks are compared inFig. 14. From these figures, the following conclusions canbe made. All networks give the proper magnitude for all ofthe parameters. An examination of and indicatesthat the substrate models of Figs. 3(b) and 4 accurately pre-

dict the phase variation over frequency. However, we wereunable to obtain this behavior with the model of Fig. 3(a).This is not surprising since similar conclusions were derivedfrom the analysis.

Last, the parameters obtained from the BSIM3v3 modelincorporating the gate and substrate resistances as in Fig. 4are compared with measured data in Fig. 15 for two differentNMOS transistors and one PMOS transistor. This demonstratesthat the simple substrate network can accurately model tran-sistor behavior at high frequencies.


(a) (b)

(c)

Fig. 15. s parameters from measurement (open symbols) and the BSIM3v3 model withR andR (solid lines) for a frequency range of 100 MHz–10 GHz:(a) NMOSFET withW=L = 405�=0:6�, V = 1:0 V, andV = 3:0 V, (b) NMOSFET withW=L = 405�=1:2�, V = 1:0 V, andV = 3:0 V, and (c)PMOSFET withW=L = 405�=0:6�,V = 2:0 V, andV = 2:0 V.

VI. CONCLUSIONS

This paper examines MOSFET modeling accuracy for small-signal RF circuit simulation using the BSIM3v3 model. Exten-sive comparisons have been made with device simulations andmeasured data. It is demonstrated that two external lumped re-sistors are adequate for modeling the non-quasi-static effect andthe substrate network. The resistance values can be readily ex-tracted from high-frequency parameter data in conjunctionwith the low-frequency transistor parameters. When these re-sistors are combined with the BSIM3v3 model, accurate small-signal analyses can be performed for frequencies up to 10 GHz.However, the external resistors are bias dependent and are suit-able only for small-signal analyses. Physical modeling of theseresistors is needed in order to develop an accurate large-signalMOSFET model for RF applications. Such an approach hasbeen demonstrated in [25] for modeling of the gate resistance.Although the lumped resistor modeling approach has been ver-

ified for the BSIM3v3 model in this paper, it is general and canalso be used with other compact MOSFET models.

ACKNOWLEDGMENT

The authors would like to thank Prof. T. Fiez, Dr. W. Liu, J. J.Ou, and X. Jing for several helpful discussions and Avant! TMAfor providing the device simulation tools. X. Ouyang’s help withthe low-frequency measurements and P. Upadhyaya’s help withparameter extraction is highly appreciated.

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[37] S. F. Tin, “High frequency MOSFET modeling for circuit simulation,”M. S. thesis, Washington State University, Pullman, Dec. 1998.

Suet Fong Tinreceived the B.S and M.S. degrees inelectrical engineering from Washington State Univer-sity, Pullman, in 1996 and 1998, respectively.

She joined the Timing Technology Division ofCypress Semiconductor, Woodinville, WA, in 1999as a Product Engineer, where she is responsible forthe characterization and qualification of motherboardclocks.

Ashraf A. Osman received the B.S. degree from theUniversity of Khartoum, Khartoum, Sudan, in 1991and the M.S. degree from Washington State Univer-sity, Pullman, in 1994, both in electrical engineering.He is currently pursuing the Ph.D. degree in electricalengineering at Washington State University.

He joined the Analog & Mixed-Signal DesignMethods group at Level One Communications,an Intel company, in January 1999, where he isworking on SPICE model extractions, testing, andverification. His research interests are SOI and bulk

MOSFET modeling for mixed-signal and RF applications.

Kartikeya Mayaram (S’82–M’89–SM’99) re-ceived the B.E. (Hons.) degree from the BirlaInstitute of Technology and Science, Pilani, India,in 1981, the M.S. degree from the State Universityof New York, Stony Brook, in 1982, and the Ph.D.degree from the University of California, Berkeley,in 1988, all in electrical engineering.

From 1988 to 1992, he was a Member ofTechnical Staff in the Semiconductor Process andDesign Center of Texas Instruments, Dallas. From1992 to 1996, he was a Member of Technical

Staff at Bell Labs, Allentown, PA. He was an Associate Professor in theSchool of Electrical Engineering and Computer Science, Washington StateUniversity, Pullman, from 1996 to 1999. Since January 2000, he has been anAssociate Professor in the Electrical and Computer Engineering Departmentof Oregon State University, Corvallis. His research interests are in the areasof circuit simulation, device simulation and modeling, integrated simulationenvironments, and analog/RF design.

Prof. Mayaram received the National Science Foundation CAREER Award in1997. He is an Associate Editor of IEEE TRANSACTIONS ONCOMPUTER-AIDED

DESIGN OFINTEGRATED CIRCUITS AND SYSTEMS.


Chenming Hu (S’71–M’76–SM’83–F’90) receivedthe B.S. degree from National Taiwan University,Taiwan, R.O.C., and the M.S. and the Ph.D. degreesin electrical engineering from the University ofCalifornia (UC), Berkeley.

Currently, he is Chancellor’s Professor of Elec-trical Engineering and Computer Sciences at UCBerkeley. Previously, he was an Assistant Professorat the Massachusetts Institute of Technology,Cambridge. He is the Board Chairman of BTATechnology, Inc., and of the East San Francisco

Bay Chinese School. He is a frequent Advisor to industry and educationalinstitutions. His present research areas include microelectronic devices, thindielectrics, circuit reliability simulation, and nonvolatile memories. He is anauthor or coauthor of four books and more than 600 research papers, and hehas supervised 60 doctoral students.

Prof. Hu is a member of the U.S. National Academy of Engineering and aLife Honorary Professor of the Chinese Academy of Science. In 1991, he re-ceived the Excellence in Design Award from Design News and the InauguralSemiconductor Research Corporation Technical Excellence Award for leadingthe research of IC reliability simulator, BERT. He received the SRC OutstandingInventor Award in 1993 and 1994. He leads the development of the MOSFETmodel BSIM3v3 that has been chosen as the first industry standard model forIC simulation by the Electronics Industry Alliance Compact Model Council andgiven an R&D 100 Award in 1996 as one of the 100 most technologically sig-nificant new products of the year. He received the 1997 Jack A. Morton Awardfrom the IEEE for his contributions to the physics and modeling of MOSFETreliability. Also in 1997, he received UC Berkeley’s highest honor for teaching,the Distinguished Teaching Award. In 1998, he received the Monie A. FerstAward of Sigma Xi for encouragement of research through education. He re-ceived the Pan Wen Yuan Foundation Award for outstanding research in elec-tronics in 1999.

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