a reconfigurable fpga architecture for dsp transforms subramanian rama vishnu vijayaraghavan
DESCRIPTION
Motivation Dedicated VLSI Architectures for Orthogonal Transforms – FFT, DCT, Convolution, Correlation Dedicated VLSI Architectures for Non- Orthogonal Transforms – Gabor, Wavelet Not many Architectures for Both – Current Day Applications like Handhelds, Mobile Phones, etc. require such DSP capabilitiesTRANSCRIPT
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A Reconfigurable FPGA Architecture for DSP Transforms
Subramanian Rama Vishnu Vijayaraghavan
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OUTLINE Motivation Reconfigurable FPGA’s DSP Transforms, Breakdown &
Applications Communication Graphs& Proposed
Architecture Imaginary Radix Complex Multiplication Accomplished Work Conclusion
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Motivation Dedicated VLSI Architectures for
Orthogonal Transforms – FFT, DCT, Convolution, Correlation
Dedicated VLSI Architectures for Non- Orthogonal Transforms – Gabor, Wavelet
Not many Architectures for Both – Current Day Applications like Handhelds, Mobile Phones, etc. require such DSP capabilities
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Need for Reconfigurable Architecture Multiple Orthogonal & Non-Orthogonal
Transforms can be broken down to a basic set of Building blocks (DCT,DST, multipliers and Adders)
Handheld devices don’t require much Multiprocessing – No need to waste hardware
Increased Fault-Tolerance By Reconfiguration and Redundancy
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AREA & POWER INCREASING PROMINENCE OF
PORTABLE SYSTEMS Cell Phones Personal Digital Assistants Tablet PC’s
Need for Low Power & Area Battery Technology not kept pace
with Semiconductor Technology
BATTERY(40+ lbs)
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DISCRETE FOURIER TRANSFORM
APPLICATIONS:Image Processing Orthogonal Frequency Division Multiplexing
Traditional DFT
Breakdown of 2D DFT
Breakdown of 1D DFT
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Discrete Gabor TransformGabor Transform and Coefficients
Breakdown
Applications Speech Processing / Voice Recognition Image Compression
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Discrete Convolution
Applications Image Manipulation Sound Processing
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2-D Fourier Transform
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Convolution Operation
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Convolution Operation (Contd.)
Computational complexity:2 DCT, 2 DST,4 real multiplications and 2 real additions
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Imaginary Radix Representation A imaginary number system, Donald Knuth,
Communications of the ACM Concept:
a + ib = A – Interleave both real and Imaginary parts # of multiplications get reduced to one Preserve Interleaving even during
multiplication Requires slight modifications in multiplier
design (one reason for migrating to FPGA)
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Convolution Operation (using Complex Representation)
Computational complexity:2 DCT, 2 DST,1 complex multiplication (same as real multiplication methodology)
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Convolution using Complex Representation - Communication Graph
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Gabor Transform Communication Graph
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Reconfiguration
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Work so far Design & Synthesis of Basic Building Blocks
DCT DST Parallel Array Multiplier Reconfiguration Unit Partial Integration
Work to be done: Complete Integration Functional Correctness Check
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CONCLUSIONNeed for multiple transforms on same chip Mobile devices, Handhelds Not much multiprocessing requiredUse of Reconfigurable FPGA’s Reduces
AREA Increases
Functionality Fault Tolerance