a low cost approach1 to improve the performance
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8/6/2019 A Low Cost Approach1 to Improve the Performance
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A Low Cost Approach1 to Improve the Performance
of an Adjustable Speed Drive (ASD) under Voltage Sags
arid Short-Term Power Interruptions.
*I*Jest L. DurAn G6mez, Student Member IEEE, h a s a d N. njeti, Senior Member IEEE, Byeong OkW oo
*Power Quality Laboratory
Department of Electrical Engineering
Texas A&M University
College Station, TX. 77843-3128
Tel: (409) 845-7466.
Fax: (409) 845-6259
http://powerquality.tamu.edu
Email: [email protected]
Abstract - Voltage sags are a common
occurrence in industrial power distribution
systems. Although a typical sag may last only 5-
20 cycles and voltage magnitude Power than
20% of its rated value can trip an adjustable
speed ac drive (ASD). Such a riuisance tripping
of a continuous industrial process can be very
costly. In this paper, a low cost approach to
improve the performance of an ASD under
voltage sag and short term interruptions is
presented. The approach consists of a low cost
modification (addition of three diodes, D,, Ds, Ds
and an inductor L, Fig. 4) to the front end diode
rectifier topology. This modification do ng with
the dynamic braking IGB'I' (Qdb) control
(standard component in a ASD) is shown to
provide ride-through capability for voltage sags.
Further, it is shown that with the addition of the
diode Dlo and battery E (Fig. 4) the ride-
through capability can be extended to short-
term power interruptions also. The IGBT Qat, issuitably controlled in the event of a sag to
maintain rated dc-link voltage in closed loop,
thus avoiding any nuisance tripping or
momentary speed fluctuations. A 460 V, 10 hp
commercially available ASD is modified with the
proposed approach. Analysis, design and
simulation results are discussed. Experimental
results illustrating the performance of the ASDwith the proposed ride-through topology for awide range of voltage sag conditions are
presented.
0-7803-5006-5 98/$10.00@1!>98EEE.
**Power Electronics Laboratory
LG Industrial Systems
533 Hogae-dong Anyang-shi
Kyongki-do Korea
email: [email protected]
1. INTRODUCTION.A voltage sag, or voltage dip is a reduction of
the voltage (e& Fig. 1) at a customer position with
a duration of between one cycle and a few seconds.
Voltage sags are caused by motor starting, short
circuits and fast reclosing of circuit breakers.
Voltage sags normally do not cause equipment
damage but can easily disrupt the operation ofsensitive loads such as electronic adjustable speed
drives (ASDs) [l]. A sever voltage sag can be
defined as one that falls below 85% of rated
voltage. Power quality surveys are a common
practice and frequently appear in the literature
[1,2,5]. According to these surveys, voltage sags
are the main cause of disturbances.
Time
Fig. 1 (a) Typical voltage sag on one phase, (b ) dc-link voltagevo.
For example, in the survey reported in [3], 68% of
the disturbances registered were voltage sags, and
were the only cause of production loss. This loss
was caused by voltage drops of more than 13% of
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rated voltage and a durai.ion o f more than 8.3ms - 1 D(112 cycle). Reference [2 i states that a little more
than 62 % of the disturbances recorded were voltage
sags with a duration of less than half a second (30cycles). A recent study (17-month period) [ l ]
conducted at two industrial site!; with ASDs, it was
concluded that voltage sags with a duration of 12
cycles or more and lower than 20% voltage drop
will trip out the ASD irivo1vt:d in a continuous
process. comparinghis data with the
curve" published in [1,4] estatilishes that modern
Fig. !Conventional boost topology design to provide ride-
thro'lgh for "Itage sags 1
ASDs appear to be more sensitive than data
processing equipment.
brief voltage sag
may potentially cause an ASD to introduce speed
fluctuations which can damage the end product.
Further a brief voltage sag also causes a momentary
decrease in dc-link voltage biggering an undervoltage trip or result in an over current trip. Such
nuisance tripping of AS D equbment employed in
continuous-process industries contributes to loss in
revenue and can incur othcr costs.Fig, I(a) shows a typical voltage sag (one
phase) and Fig. l(b) shows the corresponding dc-
link voltage. The drop in dc-link voltage exceeds
the trip-level in most ASDs and is the frequent
cause for nuisance tripping. Fig. 2 shows a boost
topology to maintain tht: dc-l ink voltage under
voltage sags [8]. Upon thc occurrence of a voltage
sag the IGBT (Fig. 2) is iurned ordoff to maintain
the dc-link voltage Vo at near rated condition. The
disadvantages of this approach (Fig. 2) are,
(a) Diode 'D' is in the series path of power
flow.
(b) Inductor 'L' s essential. is bulky and is in
the series path of power flow. Also L
carries high frequency current during the
boost mode when voltage sags occur.
Other methods to pro\ ide ride-through consists
of
(a) Motor generator sets, [ l 7,lI].(b) Flywheel energy storage I7.101
(c) Super conductor magnetic energy storage
A11 of the above options are prohibitively
expensive.
In textile and paper mills
(SMES) [7,10].
In response to thest: concerns, this paper
examines a low cost approach to improve the
performance of an ASD under voltage sags and
short-term power interruptions.
''he integrated boost converter approach (Fig.
4) c-mploys three additional diodes, inductor Lalong with the existing dynamic braking IGBT
harcware, (a standard component in a ASD) to
prolide for ride-through. Upon detection of a
voltige sag, the IGBT Qdb (Fig. 4) is suitably
controlled. Diodes D4 ,Dg, D2 and D7, Ds, Dg and
IGBT Qdb now operate in boost mode and the dc-
link voltage is maintained at its rated value. This
metitod of control provides ride-through for most
common voltage sag conditions. Fig. 4 also shows
an option to the proposed topology with the
addition of Dlo and E. This enables ride-through
undc:r short-term power interruptions also.
'('he proposed approach has the following
advi mtages:
(i) I ow cost, due to minimal additional hardware
(ii) Yo power semiconductor components in the
(iii) The proposed modification can be easily
i nd control.
inain power flow path of the ASD.
integrated into a standard ASD.
The proposed integrated boost converter
appioach [12] is connected in shunt and its VA
ratirg is a Fraction of the ASD rating. Analysis,
design and simulation results are discussed in the
pap1.r. Experimental results on a 460V, 10 hp ASD
equipment subjected to a variety of voltage sags in
a 1.1boratory is presented to demonstrate the
effe, tiveness of the proposed system.
2. INTEGRATED BOOST CONVERTERAPPROACH TO IMPROVE RIDE-
THROlJGH PERFORMANCE.The integrated boost converter approach
consists of a low cost modification (addition of
threib diodes. D7, Dg, Ds, and an inductor L, Fig. 4)
to ti e front-end rectifier topology in a commercial
ASK). These diodes supply a rectified output
voltirge to the boost converter consisting of the
induztor (L). IGBT (Qdb) and diode Ddb.As it was
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pointed out earlier, IGBT (Qdb) ;tnd diode (Ddb) are
already available in a commerci;il ASD as a part of
the dynamic braking feature. ?'he IGBT (Qdb) is
turned o d o f fat a constant switcl ling frequency (fJ.
The switch duty cycle is varied in the event of a
voltage sag via feedback. During the off time
energy stored in the inductor (I.) is transferred to
the dc-link.
and an energy
source E such as batteries, call be added as an
option to provide ride-through of the connected
load under short-term power interruptions. The
main advantage of the integratcd boost converter
Further, in Fig. 4 diode
Three-phase Three-phase Proposed ride-through
electric utility diode rectifie r topology fo r voltage
srgslshort term interruptions.
additional components are only a fraction of ASD
rating.
DC-Link PWM
Inverter
- Iapproach is the absence of additional power
semiconductor in the main powe c flow path and its
low cost features. Further, the ratings of theFig, adjustable speed drive (ASD)
Induction
Motor
Load
Input voltageI
ense fo r sags
and short term
interruptionsfeedback
Fig. 4 Proposed Integrated Boost Co nv ere r approach with an optional diode Dlo and energy storage E for short-term power interruptions
W I .
3. ANALYSIS OF THE PROPOSED
APPROACH.Fig. 4 illustrates the proposal approach. In Fig.
4, diodes D7, D8, D9 and D4, D6, D2 form an
additional three-phase rectifier bi idge. The inductor
L along with Qdb and Ddb form a boost converter.
Upon the detection of an input voltage sag, control
of IGBT Qdb is initiated. Hence. during a sag the
dc-link power is supplied by the I ectifier diodes D7,
D8, D9, D4, Dg, D2 and the boosi converter (L , Qdb
and Ddb). In this section, analy:.is is presented to
limit the peak inductor currcnt and calculate
component ratings.
3.1 Peak Inductor Current.
Under voltage sag the IGBT Qdb is turned odoff
with a duty ratio 'D' adjusted in closed loop.
Assuming high switching frequency, discontinuous
operation of the boost stage
to nL L =L Jz vu*, (1)
Where,
VIL,sss RMS line to line voltage under voltage sag
condition.
IL,peakPeak inductor current of L.
t - On time of IGBTQdb.
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Equation (1 ) can be modified a:;
and
L = i * v u , s a g * D m m (3)
f T * L p r t r k
Where,
switch.
stage.
D - Maximum duty cj.cle of the boost
f, - Switching frequency of the boost
For a given , D,,,, f, and ILpeak,theinductor ‘L‘ alue can be computed. Also IL,peaks
the peak current rating of the IGB?’Qdb andDdb.
3.2 Design Example.
a 460V , 10kW, ASD system.
In this section a design example is illustrated for
Assuming:
vu,,,,,,line to line rms voltage) =46QV
4, (output power) = l o kw .
v, (dc-link voltage) = 1.35*v, = 620v
I , (dc-linkcurrent) - 0 -17 39Amp
I, (input line current rms)= - * I = 1 5 A
P
v,,
t oAssuming I L ,pea l = 2 * I = ~ O A
and a switching frequency of
f , = 1O.OkHz,Dmax 0.5 , W i have from
equation (3 )
L=0.542mH (4)
4. SIMULATION RESULTS
Simulation of the ASD system with the
integrated boost converter approa:h is performed
on PSPICE. An ideal switch was used in place of
the IGBT, Qdb. Fig. 5 shows the results. Fig. 5 fa)
illustrates the occurrence of the sag on phase A line
to neutral voltage at 0.5 sec. A reduction in voltage
magnitude of 50 To lasting 30 cycles is shown. Fig.
5 (b) shows the dc-link voltage before and during
the occurrence of the sag. Notice that the boost
module is successful in maintaining the dc-link
voltage: at the required dc-level. Fig. ,5 (c) to (e)
show the input line currents. Line current
magnitude in phase ‘b’ and ‘c’ increase as phase A
is experiencing a sag.
5 0 ~ ) ;
Voltage sag ma ni tude = 50 Rof rated l i n e 10 neutral voltaae
I
I
I& 1.55 1.65 0.75 1.15 1.95 1.85
U I ( L I ) (11
line
Fig. 5 Simulation results of the proposed approach (Fig. 4), (a)
voltage sag on phase ‘a’ line to neutral voltag e, (b) dc-link
voltage, 1.c) line current i,, (d) line current ib, (e) line curre nt i,.
5. EXPERIMENTAL RESULTS.
A 10 hp, 460 V commercially ASD was
modified with the integrated boost converter
approach (Fig, 4). Fortunately, sufficient room was
available on the heat sink for the placement of
diQdesD7, D8,Dg. he dynamic braking IGBT Qdb
gating signals were re-routed to a sag correction
control hardware shown in Fig. 4. A three phase
programmable ac power source (480V, 54 kVA)
was employed to create a sag on phase A when the
ASD was powered.
Figs. 6(a) and 6(b) show the experimental
performance of the ASD under voltage sag when
the proposed boost module was dis-enabled. Notice
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the reduction in the dc-link vo1t;ige during the sag.
Also from Fig. 6(b), notice the line current i,
collapses to zero during the sag an phase A due to
the reverse bias of the diodes in phase ‘a’.Fig. 7 shows experimental results for the
performance of the ASD under a 50 % voltage sag.
The top trace in Fig. 7 shows thz compensation of
the dc-link voltage on the event 13f the voltage sag,
(middle trace in Fig. 7), with a duration of 0.500
sec (30 cycles). The dc-link voltage was
compensated by the ride-through approach by
operating the integrated boost c( nverter during the
sag. That is, the IGBT (Qdb) is switched at a
switching frequency of 10 kHz t’.)operate the boost
module in Fig. 4. Also, the 1ou;er trace in Fig. 7
shows the boost inductor current IL on the turn
o d o f fconditions.
Tek pIIw l.OOkS/s 17 8 AcqsE -T-- ___._.._I. . . , . . . . , . , . . , . . . , . . . . , . . , . , . -
‘ 1
(b)Fig. 6 Experimental results on an ASI.? for a voltage sag on
phase ‘a’ without the integrated boost converter approach.(a ) 1+ oltage sag on phase ‘a’, 23 c-link voltage, (b) 1 -+
line curr ent i,, 24 ine current it,. 3+ .ne current i,.
1*
1
Fig. 7 Experimental results for a 50 % voltage sag magnitudewith the integrated boost converter approach 1+ oltage sag
on phase ‘a’, 2.1 dc-link voltage with an increased IGBT duty
cycle 4 -+boost inducto r curre nt iL,
6. CONCLUSIONS.In this paper a low cost approach to improve the
performance of an ASD under voltage sag and
short-term power interruptions has been proposed.
The approach requires the addition of only three
additional diodes and minimal control
modifications. Simulations and experimental results
demonstrate performance improvements.
AKNOWLEGMENTThe author, J.L. Du rh G6 me z would like to
recognize to CONACYT (Consejo Nacional de
Ciencia y Tecnologia ) Mexico and ITCH (Instituto
Tecnoldgico de Chihuahua) Mexico for the support
given during his doctoral studies and research at
Texas A&M University. Also ASD equipment
donation from Toshiba industrial drives, Houston,
TX is acknowledged.
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[I 1
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