IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 19, NO. 3, JUNE 2009 685

A Linear Model of Quantization Noise inSuperconductor ADCs

Aaron A. Pesetski, Donald Miller, John X. Przybysz, and Quentin P. Herr

Abstract—Superconductor Delta-Sigma modulators featurequantum accurate feedback that allows them to operate in theideal, quantization-noise limit. We have developed a linear modelthat predicts the quantization noise of the modulator analytically,by mapping the white quantization noise at the comparator tofrequency-dependent noise at the output. The key advance was de-termination of the transimpedance of the Josephson comparator.Both first order modulators, such as the phase modulation/demod-ulation design, and our own second order modulator have beenanalysed. We conclude that first order modulators all have thesame noise shaping performance irrespective of circuit parametervalues and feedback gain. The primary constraint on circuitdesign is instead set by thermal noise considerations.

I. INTRODUCTION

Q UANTIZATION noise in an analog-to-digital converter(ADC) is an unavoidable consequence of the differencebetween the discrete levels available in the digital domain

and the continuous values of the analog domain. Delta-Sigmaarchitectures use feedback that acts to correct the quantizationerror of each sample on subsequent samples. Specifically, thedigital output is converted to an analog impulse that is subtractedfrom the time-integrated input. Quantization noise can be re-duced in Delta-Sigma architectures by high oversampling ratio,where one-bit samples at high rate correspond to multi-bit sam-ples at the much-reduced Nyquist rate of the signal. Analysis ofquantization noise in conventional Delta-Sigma architectures,using linear models, is well established [1].

Superconductor ADCs use circuit components that are nearlyideal. The analog feedback voltage waveform is quantum ac-curate in that its time-integral has units of the Single FluxQuantum, . Single-loop modulators with singlebit comparators using only a few devices, sampled at ratesapproaching 40 GHz, have achieved performance comparableto the state-of-the-art [2], [3], and performance well beyondstate-of-the-art has been predicted for the two-loop modulator[4]. However, superconductor architectures are far from con-ventional, as there is no op amp for signal isolation and gain.In single loop modulators, the sampler and feedback DAC are

Manuscript received August 26, 2008. First published May 27, 2009; currentversion published July 10, 2009. This work was supported in part by the Officeof Naval Research.

The authors are with Northrop Grumman, Baltimore, MD 21090 USA(e-mail: aaron.pesetski@ngc.com; donald.l.miller@ngc.com; john.przy-bysz@ngc.com; quentin.herr@ngc.com).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TASC.2009.2017866

both provided by the comparator. Integrators are fabricated byapplying the voltage pulse from the comparator to an inductor.Because of this non-standard architecture, conventional linearmodels for Delta-Sigma modulators can not be applied. In thepast, quantization noise and signal-to- noise ratio (SNR) calcu-lations have been performed either through lengthy algebraicanalysis in the discrete-time z-domain [4] or by using intensivetime-domain numerical simulations of the circuit followed bylong FFTs of the output. A linear model is used to find ananalytic expression for SNR in a single-loop Josephson mod-ulator in [5]. Here we present a linear model that is generallyapplicable to Josephson Delta-Sigma modulators. This modelyields both signal and noise transfer functions directly in thefrequency domain. Analytic results can be obtained for certainimportant simple cases, while more complicated circuits caneasily be handled by SPICE ac analysis.

II. ANALYTIC RESULTS

We will describe the method by applying it to the two-loopmodulator shown in Fig. (1a). The linear model is motivated bythe fact that a properly functioning ADC is a linear device, in thesense that the output power spectrum has a linear relationshipto the input. We can replace the quantizer and feedback DACswith linear amplifiers as shown in Fig. (1b). In this model, thecomparator is treated as a current-controlled voltage source withtransimpedance , in which the control current is the sum ofthe sampled current and a white noise current, consistent withthe usual white noise approximation [6]. This is really nothingmore than a model of a noisy resistor. Feedback to the first loopis modeled as a voltage source controlled by the output voltageof the comparator, with voltage gain N.

The transimpedance can be determined by requiring thatthe modulator be linear in the passband. Although the sampledcurrent and the feedback may look nothing alike on time scalescompared to the sampling time, as illustrated in Fig. 2, the av-erage values should be equal on a time scale that is long com-pared to the sampling time multiplied by the oversampling ratio.The average comparator output voltage is , as-suming that the output is 50% ones and 50% zeros. To calcu-late the average sample current, note that every time the samplecurrent exceeds the threshold, it is decremented by an amount

on the next clock cycle. This behavior can be captured byapproximating the sample current as a sawtooth waveform ofamplitude and with an average current of . It followsfrom Ohm’s law that

(1)

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686 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 19, NO. 3, JUNE 2009

Fig. 1. A two-loop superconductor modulator is shown (a) with the Josephsoncomparator, and (b) with a linearized comparator model. (c) SNR over a givenbandwidth can be read directly from the analytic signal and noise transfer func-tions, with proper normalization. The curves are calculated for an � of 50 and��� times corresponding to 4 MHz.

Fig. 2. Current and voltage in the Josephson comparator is illustrated. Tran-simpedance of the comparator is determined by integrating these waveformsover long time scales.

where the first equality generally holds, and the second equalityholds when is determined by the loop inductance accordingthe equation .

Noise and signal transfer functions for the second-order mod-ulator of Fig. (1b) can be determined analytically using stan-

dard linear circuit analysis techniques. Using Kirchhoff’s lawand summing voltages around each loop yields:

(2)The linear approximation means that

(3)

Solving this system of equations for the loop currents yields:

(4)

The output of the modulator is simply the output of the com-parator. It is convenient to drop the factor of as the result willbe normalized further on:

(5)

The signal transfer function is obtained from the output by set-ting the noise current to zero and the signal current to unity:

(6)The noise transfer function is obtained from the output by set-ting the noise current to unity and the signal current to zero:

(7)The quantization noise shaping of the modulator is simply

the power spectral density of the noise, . Signal andnoise transfer functions are plotted in Fig. (1c) for a modulatorwith voltage gain of 50 and an time corresponding to 4MHz. That is, MHz. Samplerate is set to 10 GHz.

Signal-to-noise ratio (SNR) can be read directly from the plotwith correct normalization. The scale is set so that the totalpower out of the modulator is equal to unity, or 0 dBsat. TheSTF is scaled to 3 dBsat in the signal passband. This corre-sponds to the power in an inband single tone input that touchesthe maximum (all “ones”) and minimum (all “zeros”) modulatoroutput. This theoretical maximum serves as a useful limit eventhough real devices typically have a maximum signal power thatis lower by a few dB, which must be determined experimen-tally. The power in NTF across the entire band, 0–5 GHz, is

, or 4.77 dBsat per 5 GHz, where is the quantizationinterval in our one-bit comparator. This power is dominated bythe flat region of the curve close to Nyquist. The signal band,

PESETSKI et al.: A LINEAR MODEL OF QUANTIZATION NOISE IN SUPERCONDUCTOR ADCs 687

Fig. 3. A single-loop superconductor modulator is shown a) with the Josephsoncomparator, and b) with a linearized comparator model. c) The noise transferfunction for all single-loop Josephson modulators is independent of circuit pa-rameters, but improves with sample rate.

0–10 MHz, corresponds to an oversampling ratio of 500, or 27dB. If the NTF is shifted down by the oversampling ratio, theunits of power are dBsat/10 MHz. Integrated noise power withinthe signal band, which is dominated by the value at 10 MHz, canthen be read directly from the curve. The analysis indicates thatan SNR of up to 92 dB is possible, even for this fairly conser-vative design. Feedback gain, coupling strength, and samplerate are all likely candidates to be increased, resulting in addi-tional bits of SNR performance.

Multi-bit designs can also be handled by the model, as eachadditional bit reduces by a factor of two. This increases SNRby 6 dB or more per additional bit. To illustrate this, considerthe peak signal that can be accommodated by 1-bit, 2-bit, and3-bit quantizers. If the 1-bit quantizer with two levels can accepta signal of amplitude , the 2-bit quantizer can accept a signalof amplitude 3 V, yielding an improvement of 9 dB. The 3-bitquantizer has a peak signal of 7 V, an improvement of 17 dB.Additional quantizer bits increase the SNR by about 6 dB perbit.

A similar analysis can be applied to the single-loop JosephsonADC modulator. Various single-loop designs have been tested,as described in [3], [7]–[9], reviewed together with additional ci-tations in [2]. A representative circuit is the “phase modulation”design shown in Fig. (3a). In this particular design, the signal istransformer-coupled into the integrator loop. A step-down trans-former is typically used to increase current in the secondary,which is part of the integrator loop. This increases input sensi-tivity and improves input impedance matching compared to thedirect input found in some of the other designs. Transformercoupling produces an STF and a phase response that is fre-quency-dependent in the passband; however, the input signalcan be fully recovered in subsequent digital filtering [10].

The phase modulation design has bipolar feedback; everyother sample period, a voltage impulse is generated by thevoltage source on the left, which amounts to on average.The comparator produces implicit negative feedback of either

Fig. 4. The linearized two-loop superconductor modulator is shown with delayin the feedback to the first loop. Spice ac analysis returns the signal and noisetransfer functions for delay of 0, 1, and 2 ns. Peaks in the transfer functions at2 ns suggest that the modulator is unstable.

zero or . Adding the contributions from the voltage sourceand the comparator yields feedback of per period. Thelinear model of the modulator is shown in Fig. (3b). Solving theloop equation yields

(8)

and

(9)

the inductance and mutual inductance in the STF indicatesthat these parameters affect input sensitivity. Apart from this,STF and NTF have the same shape, depend only on sample rate

, and are independent of circuit parameter values such as in-ductance or feedback amplitude. Of course, parameter valuesare still important to the extent that should be chosen tobe larger than thermal noise in the comparator. The curves areplotted in Fig. (3c) using normalization similar to that describedabove, i.e. the STF is scaled to a maximum of 3 dBsat in thepassband, and NTF is scaled down from a value of 4.77 dBsatat Nyquist by a factor corresponding to the oversampling ratio.The plot indicates that an SNR of up to 91 dB is possible acrossa 10 MHz passband using a 40 GHz sample rate.

III. NUMERICAL RESULTS

Analytic solution of the transfer functions may not be prac-tical for more complicated circuit schematics. However, thelinear model is generally applicable to complicated circuitsusing simple numerical simulation, such as SPICE ac frequencyanalysis. An example is shown in the schematic of Fig. (4a),which incorporates feedback delay into the second ordermodulator of Fig. 1. The comparator is modeled as a voltagenoise source in series with a resistor , as before. Output of

688 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 19, NO. 3, JUNE 2009

Fig. 5. Spice ac analysis can be used generally to produce noise-shaping curvesfor any modulator schematic. A two-loop bandpass design with LC resonatorscentered at 200 MHz is shown. However, the model does not indicate stabilityor account for time jitter.

the comparator, at node n1, is delayed by a high-impedancetransmission line. The feedback DAC is modeled as a voltagesource that amplifies the delayed comparator output of noden2. The quantization noise transfer function (NTF) is com-puted by setting the noise source “verr” as the independentvoltage source and looking at the total voltage response of thecomparator. The following WRSpice [11] script defines circuitparameter values, sets delay to 1 ns, and computes STF andNTF power spectra for the netlist, found in the file “ns1”:

� � � ns1.run � � �

.control

���� � ������� � ��; �� � ���� �; �� � ����

�� � ������� � ��

��� � �

�� � �; ���� � �; ��� �� ���; run

�� � �; ���� � �; ��� �� ���; run

�� � ����������� � ����� � ���������������

�� � ��� � ���������������

plot dn ds

.endc

The output is plotted in Fig. (4b) for delay values of 0, 1, and2 ns. For zero delay the result is identical to the analytic resultof Fig. 1. At 1 ns, the curves show additional structure, and at2 ns sharp peaks occur. These peaks suggest modulator insta-bility, which we confirmed by simulating a few clock cycles ofthe circuit in the time-domain. However, the circuit is stable for1 ns delay and has the same noise-shaping performance as in-stantaneous feedback.

Numerical ac analysis can also be used to predict the perfor-mance of the two-loop bandpass shown in Fig. (5a). The capac-itors produce LC resonators centered at approximately 190 and

210 MHz, which moves the passband to a 20 MHz region cen-tered at 200 MHz, as shown in Fig. (5b). Additional informa-tion could have been plotted, such as signal phase delay in thepassband. The passband circuit is illustrative of the limitationsof the linear noise model. The model does not indicate whetherthe circuit is stable, the effect of timing jitter on noise shaping,nor the effect of timing jitter on stability. These questions mustbe answered by other means, such as long, intensive time-do-main simulations.

IV. CONCLUSION

The linear model is a powerful, general tool to predict thequantization noise of Josephson modulators. Analytic results arepossible for simple single and double loop schematics. Simpleac numerical analysis is effective for more complicated designs.First order modulators all have the same noise shaping per-formance irrespective of circuit parameter values and feedbackgain. Performance of the second order modulator depends di-rectly on parameter values, and on a more subtle interplay be-tween thermal noise, stability, feedback latency, and feedbackgain. Excellent agreement been quantization noise predicted bythe model and experiment has been achieved for a second orderdevice [12]. This indicates that superconductor modulators doindeed have nearly ideal behavior, and gives us confidence to ex-trapolate to performance levels far beyond state-of-art in moreadvanced designs.

REFERENCES

[1] R. W. Adams and R. Schreier, “Stability theory for �� modulators,”in Delta-Sigma Data Converters, S. R. Norsworthy, R. Schreier, andG. C. Temes, Eds. Piscataway, NJ: IEEE Press, 1997, pp. 141–164.

[2] O. A. Mukhanov, D. Gupta, A. M. Kadin, and V. K. Semenov, “Super-conductor analog-to-digital converters,” Proceedings of the IEEE, vol.92, pp. 1564–1584, Oct. 2004.

[3] J. F. Bulzacchelli, H.-S. Lee, J. A. Misewich, and M. B. Ketchen,“Superconductor bandpass �� modulator with 2.23-GHz centerfrequency and 42.6-GHz sampling rate,” IEEE J. Solid-State Circuits,vol. 37, pp. 1695–1702, Dec. 2002.

[4] J. X. Przybysz, D. L. Miller, and E. H. Naviasky, “Two-loop modulatorfor Sigma–Delta analog to digital converter,” IEEE Trans. Appl. Super-cond., vol. 5, pp. 2248–2251, June 1995.

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[8] V. K. Semenov, Y. A. Polyakov, and D. Schneider, “Implementationof oversampling analog-to-digital converter based on RSFQ logic,” inExtended Abstracts ISEC’97, Berlin, pp. 41–43.

[9] S. V. Rylov and R. P. Robertazzi, “Superconductive high-resolutionA/D converter with phase modulation and multi-channel timing arbi-tration,” IEEE Trans. Appl. Supercond., vol. 5, pp. 2260–2263, June1995.

[10] O. A. Mukhanov et al., “High-resolution ADC operation up to19.6 GHz clock frequency,” Supercond. Sci. Technol., vol. 14, pp.1065–1070, Dec. 2001.

[11] Whiteley Research, Inc [Online]. Available: www.wrcad.com, Avail-able from

[12] Q. P. Herr, D. L. Miller, A. A. Pesetski, and J. X. Przybysz, “Aquantum-accurate two-loop data converter,” IEEE Trans. Appl. Super-cond., this conference.