a greedy algorithm for wire length optimization

7/28/2019 A Greedy Algorithm for Wire Length Optimization

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Fig. 2: (a) Gh; (b) Gv; (c) Horizontal key tree; (d) Vertical key tree.

piz}. Let (Li,Bi) and (Ri, Ti) refer to the lower-left and upper-right corners of the bounding box ofNi. Let (pxik,pyik) be thecoordinates ofpik and (rel_pxik(j), rel_pyik(j)) be its relativeoffset from (xj, yj) ofbj. Thus, we have "k{1, 2,, z}

Lixj + rel_pxik(j) (4)

Rixj + rel_pxik(j) (5)

Biyj + rel_pyik(j) (6)Tiyj + rel_pyik(j). (7)

The problem (3) can be stated as

=-+-

n

i iiiii

BTLR1

)(min l(8)

subject to the set of constraints as stated in (4)-(7). Thenproblem (8) can be decoupled into two subproblems

=

-n

i

iii LR1

)(min l

(9)subject to the constraints as stated in (1), (4) and (5), and

=

-n

i

iii BT1

)(min l (10)

subject to the constraints as stated in (2) , (6) and (7).Subproblem (9) and (10) can be solved separately.

III. GREEDY ALGORITHMA. Review of TCG

TCG has two graphs named horizontal transitive closuregraph Gh(Vh, Eh) and the vertical Gv(Vv, Ev) to represent thegeometric relations between blocks. Gh and Gv of the floorplanin Fig. 1 (a) are shown in Fig. 2. More details of TCGalgorithm can be found in [6].

B. Moving rangeWe assume that F is LB-compact floorplan. Let dxj and

dyj be the offsets from original position ofbj, horizontally andvertically. Let closed intervals [0, djhmax] and [0, djvmax]denote the moving ranges of block bj, which prevents

overflow of the outline. Let endpoint djhmax (djvmax) be themaximum distance for which bj can be moved. Let hs_distj(vs_distj) denote the length of the longest path from thesources to nodej in Gh (Gv). Let ht_distj (vt_distj) denote thelength of the longest path from nodej to the sinkt.

The value of endpoint djhmax (djvmax) can be gotten from

W- hs_distj - ht_distj (H- vs_distj- vt_distj). Summation ofhs_distj + ht_distj represents the length of the path from thesources to the sinkt, which may not be the longest. Ifbj is inthe longest path, we can get W = hs_distj + ht_distj anddjhmax= 0. It means that bj is fixed. Ifbj is not in the longest

path, we can get djhmax= W- hs_distj - ht_distj> 0. hs_distjrepresents the widths summation of blocks at the left of bj.

ht_distj represents the widths summation of blocks at the right

ofbj. Thus, we can get the value of djhmax(djhmax0), and 0

dxi djhmax, 0dyi djvmax.

In Fig. 2, we can get W=6,H=6, hs_dist1 = 0, hs_dist2 = 4,hs_dist3 = 0, vs_dist1 = 0, vs_dist2 = 0, vs_dist3 = 4, ht_dist1 =

6, ht_dist2 = 2, ht_dist3 = 4, vt_dist1 = 6, vt_dist2 = 4 andvt_dist3 = 2. Thus, we can get d1hmax=0, d2hmax=0, d3hmax=2,d1vmax=0, d2vmax=2 and d3vmax= 0. The horizontal movingrange ofb3 is closed interval [0, 2], as shown in Fig. 1 (d).The vertical moving range ofb2 is closed interval [0, 2].

C. Moving cost treeIt is obvious that horizontal movements of blocks do not

affect they-coordinates of the pins, and vice versa. Thus, wewill focus on the horizontal movement only.

Consider the set of nets Q(bj) connecting bj. If bj ismoved, the possible positions of the pins on bj affect thehorizontal wire lengths of the nets in Q(bj). Let hmctj (vmctj)

denote the relationship between the movement and its effect.hmctj is a segment tree structure and its leaf has two elements:the cost (summation of net weight) and the elementaryinterval. The moving range [0, djhmax] is split into segments

by hmctj. The net weight and relevant interval are insertedinto hmctj, with the interval dividing technique. The insertingnet weight is plus to the existing costs of leaves betweenrelevant interval. If the cost of a leaf is positive, themovement of the block will reduce the wire length. Otherwise,it will increase the wire length.

We simply divide the pins into three types: Non-effectpins,Increscent pins andDecrescent pins.

Non-effect pins: Pins can not be moved or themovements of them will not affect the wire length.We will insert nothing.

Increscent pins: The movements of pins will increasethe wire length. We will insert negative net weightsand relevant intervals into hmctj.

Decrescent pins: The movements of pins will decreasethe wire length. We will insert positive net weightsand relevant intervals into hmctj.

Consider a netNi connecting a set ofzpins {pi1,pi2,,piz},

and thezpins are in an ascending order inx-direction (0pxi1

pxi2pxiz). The movement ofLi (Li = pxi1) orRi (Ri= pxiz)will affect the horizontal wire length, but pik is on different

blocks with various moving ranges. LetLimax (Rimax) denote thepossible rightmost position of Li (Ri). We will insertcorresponding elements into hmctj, when deciding the value of

Limax (Rimax) for each netNi.

The simplest case is that pi1 and piz are fixed and Non-effectpins, we will insert nothing. Other four representativecases are shown in Fig. 3. With different insertions, weconstruct the final moving cost tree hmctj for each block.

For the floorplan in Fig. 1 (a), b1 and b2 are fixed in Gh,and hmct1=hmct2=NULL. The movement of b3 will reducehorizontal wire length ofN2, and hmct3=2 [0,2]=1 [0,2]. b1and b3 are fixed in Gv, and vmct1= vmct3= NULL. The

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Fig. 3: Four representations when searching forLimax andRimax.

TABLE I. INFORMATION OFTHETESTINGCIRCUITS

No. of Non-

effect PinsTest

Cases

No.

of

Cells

No.

of

Nets

No.

of

Pads

No.

of

Pins x-dir y-dir

Percentage

apte 9 97 73 264 128 165 55.49%

xerox 10 203 2 696 477 332 58.18%

hp 11 83 45 214 117 244 84.35%

ami33 33 123 42 480 280 245 54.69%

ami49 49 408 22 931 237 279 27.71%

n10 10 118 69 179 65 68 37.15%n30 30 349 212 511 124 176 29.35%

n50 50 485 209 841 247 196 26.34%

n100 100 885 334 1539 239 414 21.22%

n200 200 1585 564 3035 1026 1009 33.53%

n300 300 1893 569 3789 1463 1546 39.70%

movement ofb2 will reduce vertical wire lengths ofN1 andN2,

and vmct2=1 [0,1]+(-1)[1,2]+2[0,2]=3[0,1]+(-1)[1,2].

D. Key treeAn edge (j, k) is said to be a reduction edge if there does

not exist another path from bj to bk, except the edge (j, k) itself[6]. Consider the closure set of blocks R(bj) includes bk with

reduction edge (j, k) and adjacent to bj, orbl with reductionedge (k, l) and adjacent to bk. The horizontal key tree ofbj isconsisted of blocks in R(bj) and corresponding edges. Ifbj ismoved to the right, the blocks in R(bj) must satisfy theconstraints (1), otherwise there will be overlapped. Thus, themovement ofbj will change the position of bk and the wire

length of nets connected to bk, bkR(bj). The key tree offloorplan in Fig. 1 (a) is shown in Fig. 2.

E. Reduce the wire lengthWe should know the maximum improvement of the

horizontal wire length. We will travel the blocks in atopological order from left to right in x-direction. Given anarbitrary blockbj, we construct its key tree and merge all of

the moving cost trees of blocks in R(bj) into one. Then themaximum improvement, the value ofdxj can be obtained andwe will move blocks inR(bj) for distance dxj inx-direction.

For the floorplan in Fig. 1 (a), the travel order is b1, b3, b2in x-direction, and b1, b2, b3 in y-direction. The maximumhorizontal improvement is 1(2-0)=2. We can get dx1=0,dx2=0 and dx3=2. The maximum vertical improvement is

3(1-0)=3. We obtain dy1=0, dy2=1 and dy3=0. Thus, thefinal positions arex1 = 0,x2 = 4,x3 = 2,y1 = 0,y2 = 1 andy3= 4.

Our greedy approach is divided into three steps.

1) Derive the moving range for each block in Gh and Gv.

2) Build the moving cost tree structure for each block inGh and Gv.

3) Travel the blocks in topological order, construct thekey tree and evaluate the maximum improvement of

the wire length to locate the positions of blocks.

IV. TIME COMPLEXITYIn a floorplan Fwith m blocks and n networks, the time

complexity of the greedy algorithm is consisted of three steps.The time complexity of step 1) is O(m2). The complexity ofstep 2) is complicated. We assume that the number of pins onbj is constant q on average, and q intervals will be inserted intohmctj in the worst case. The complexity of insertion tosegment tree is O(qlog(q)). We assume the number of pinsconnected Ni is constantzon average and the total number of

pins is nz(nz=mq). The complexity of step 2) is O(nzqlog(q))= O(n). In step 3), the complexity of constructing bjs key tree

is O(m

2

). The complexity of the merge operation of twosegment tree is O(q2log(q)) and there are m segment trees atmost. The complexity of evaluating the maximumimprovement is O(nz). Thus, the complexity of step 3) isO(m

2+m*(mq

2log(q)+nz)) = O(m

2+n

2+mn). Finally, the total

complexity of the greedy algorithm is O(m2+mn+n2).

V. EXPERIMENTAL RESULTAll programs are written in C++ and run on a PC with

AMD 1.83GHz CPU and 1GB RAM. The MCNC and GSRCbenchmark circuits are used as our test cases. The pre-placedoriginal floorplans are obtained from TCG floorplanner[6]with minimum wire length option. It is ensure that all theoriginal floorplans are well-optimized in terms of wire length.

For all test cases, we use the original fixed location of pins andthe location of IO pads are resized proportionally to the frame

boundaries. Then we apply our approach to all of the originalfloorplans. Note that we assume i=O(1) for all nets. Detailedinformation of the original circuits and Non-effect pins areshown in Table I. There are about 21%-84% of the pins are

Non-effect pins, which can be omitted in the computation.

The summaries of the improvement in HPWL for MCNCand GSRC benchmarks are shown in Table II and Table III,respectively. The maximum improvements are about 3.6% and4.2% on average. The runtimes are also shown in the tables.There is 3.6% and 4.2% reduction of wire length with about7.38s on average. Fig.4 displays the results of originalfloorplan and improved floorplan for n300 circuit.

We intend to compare our approach with the Min-Wirealgorithm. Although we construct the same originalfloorplan in [13] and use the center of block as the location ofthe pin, we get the wire length is 103.1mm for ami33 and1179.1mm for ami49. The reconstruction is shown in Fig. 5.However, the wire lengths are claimed to be 60.0mm and790.1mm in [13]. Thus, we do not list the results from Min-wire approach in Table II.

VI. CONCLUSIONIn this paper, we have proposed a novel greedy algorithm

to optimize the wire length by distributing white space for

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wire length optimization. The experimental results show thatour algorithm is effective as a post-floorplanning refinement.

TABLE II. ASUMMARY OFTHEIMPROVEMENTONMCNCCIRCUITS

Original Wire(mm) After(mm) ImproveCircuitx-dir y-dir total x-dir y-dir total x-dir y-dir total

Time(s)

apte 190.1 214.7 404.8 177.0 212.2 389.2 3.2% 0.6% 3.9% 0.05

xerox 223.4 171.0 394.3 211.7 164.4 376.1 2.9% 1.7% 4.6% 0.08

hp 117.3 48.7 166.0 111.9 48.3 160.2 3.2% 0.3% 3.5% 0.06

ami33 27.2 35.0 62.2 26.4 33.9 60.3 1. 3% 1.6% 2.9% 0.09

ami49 402.5 454.1 856.5 391.2 440.2 831.3 1.3% 1.6% 2.9% 0.21

Average 2.4% 1.2% 3.6% 0.10

TABLE III. ASUMMARYOFTHEIMPROVEMENTONGSRCCIRCUITS

Original Wire(mm) After(mm) ImproveCircuit

x-dir y-dir total x-dir y-dir total x-dir y-dir totalTime(s)

n10 17.055 20.851 37.906 16.916 17.737 34.653 0.4% 8.2% 8.6% 0.06

n30 49.290 77.404 126.694 46.408 74.713 121.121 2.3% 2.1% 4.4% 0.14

n50 75.564 64.588 140.152 73.272 62.150 135.422 1.6% 1.8% 3.4% 0.25

n100 91.991 130.559 222.550 88.468 127.647 216.142 1.6% 1.3% 2.9% 1.85n200 190.285 216.464 406.749 184.164 210.104 394.268 1.5% 1.6% 3.1% 12.14

n300 256.733 299.183 555.916 251.030 287.773 538.803 1.0% 2.1% 3.1% 29.83

Average 1.4% 2.8% 4.2% 7.38

Fig. 4 (a) Original floorplan (555.9mm) (b) Improved floorplan (538.803mm) Fig. 5(a) Reconstruction of ami33 (b) Reconstruction of ami49

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a greedy algorithm for wire length optimization

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