a dynamic link allocation router
DESCRIPTION
A Dynamic Link Allocation Router. Wei Song, Doug Edwards Advanced Processor Group The University of Manchester. Overview. Network-on-a-Reconfigurable-Chip The Dynamic Link Allocation Flow control method The Dynamic Link Allocation Router (DyLAR) Conclusion. The NoRC Platform. - PowerPoint PPT PresentationTRANSCRIPT
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23/4/19Advanced Processor Group The School of Computer Science
A Dynamic Link Allocation Router
Wei Song, Doug Edwards
Advanced Processor Group
The University of Manchester
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23/4/19Advanced Processor Group The School of Computer Science
Overview
• Network-on-a-Reconfigurable-ChipNetwork-on-a-Reconfigurable-Chip
• The Dynamic Link Allocation Flow control method
• The Dynamic Link Allocation Router (DyLAR)
• Conclusion
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23/4/19Advanced Processor Group The School of Computer Science
The NoRC Platform
Network Interface
Router
Processor
• NoRC: network on a reconfigurable chip
• Running multimedia applications
• Connection oriented • Stochastic routing algorithm• GALS: fully asynchronous rout
ers linked by CHAIN
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23/4/19Advanced Processor Group The School of Computer Science
Connection Oriented Routing
• Flit Definitions
Master Slave
Tim
e
Request to reserve a path
OK ACK
Data transmissionsData transmissionsData transmissionsData transmissionsData transmissionsData transmissions
False ACK
Data transmissions (end)
Request to reserve a path
False Ack
data request content flit type flit header
data flit type flit header
Request Flit
Other Flits
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23/4/19Advanced Processor Group The School of Computer Science
The High Retry Rate
0 100 200 300 4000
2000
4000
6000
8000
10000
12000
14000
16000
Ave
rage
Fra
me
Late
ncy
(ns)
Frame Injection Rate (kfps)
Simulation results of a 6x6 NoC with 12 functions in network.
0 100 200 300 400
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Loss
Rat
e
Frame Injection Rate (kfps)
Flit Level Loss Rate Frame Level Retry rate
7%
Virtual Channels are required to reduce the retry rate.Virtual Channels are required to reduce the retry rate.
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23/4/19Advanced Processor Group The School of Computer Science
Overview
• Network-on-a-Reconfigurable-Chip
• The Dynamic Link Allocation Flow contThe Dynamic Link Allocation Flow control methodrol method
• The Dynamic Link Allocation Router (DyLAR)
• Conclusion
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23/4/19Advanced Processor Group The School of Computer Science
Major Design Targets
• Implement some kind of virtual channels
• Increase the bandwidth of CHAIN links
• Reduce the area and power of the router
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23/4/19Advanced Processor Group The School of Computer Science
Increase the bandwidthC
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C C
C
C C
C
DI00
DI01
DI10
DI11
DI20
DI21
DI30
DI31
DO00
DO01
DO10
DO11
DO20
DO21
DO30
DO31
ACKI ACKO
Dual-rail 0
Dual-rail 1
Dual-rail 2
Dual-rail 3
Asynchronous Links work better with the lower wire count.Asynchronous Links work better with the lower wire count.
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23/4/19Advanced Processor Group The School of Computer Science
Increase the bandwidth
A B C
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23/4/19Advanced Processor Group The School of Computer Science
Increase the bandwidth
A B C
A B C
Spatial division multiplex (SDM) is a good choice for Spatial division multiplex (SDM) is a good choice for asynchronous NoCs.asynchronous NoCs.
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23/4/19Advanced Processor Group The School of Computer Science
Problems of SDM
SDM has the low bandwidth efficiency.SDM has the low bandwidth efficiency.
Master Slave
Tim
e
Request to reserve a path
OK ACK
Data transmissionsData transmissionsData transmissionsData transmissionsData transmissionsData transmissions
False ACK
Data transmissions (end)
Request to reserve a path
False Ack
N1 N2 N3
Spare sub-link
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23/4/19Advanced Processor Group The School of Computer Science
Problems of SDM
N1 N2 N3
N1 N2 N3
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23/4/19Advanced Processor Group The School of Computer Science
Dynamic Link Allocation
• Divide the sub-link allocation apart from the path reservation
• Allocate idle sub-link to active communications that reserved this link
• All communications fairly compete for the bandwidth
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23/4/19Advanced Processor Group The School of Computer Science
Overview
• Network-on-a-Reconfigurable-Chip
• The Dynamic Link Allocation Flow control method
• The Dynamic Link Allocation Router (DThe Dynamic Link Allocation Router (DyLAR)yLAR)
• Conclusion
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23/4/19Advanced Processor Group The School of Computer Science
Dynamic Link Allocation Router (DyLAR)
Tran Control
Tran Control
Tran Control
Arbiter
Output Buffer
Output Buffer
Output Buffer
Data Switch
Request Switch
Input Buffer
Input Buffer
Input Buffer
DyLAR Router
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23/4/19Advanced Processor Group The School of Computer Science
Path Reservation Stage
Tran Control
Tran Control
Tran Control
Arbiter
1
2
3
4
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23/4/19Advanced Processor Group The School of Computer Science
Data Transmission Stage
Tran Control
Tran Control
Tran Control
Arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Head-of-line (HOL) Problem
00 01 02 03
10 11 12 13
20 21 22 23
30 31 32 33
00 01 02 03
10 11 12 13
20 21 22 23
30 31 32 33
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23/4/19Advanced Processor Group The School of Computer Science
Backpressure
tran_
ctl
tran_
ctl
data switch
request switch
arbiter
tran_
ctl
tran_
ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Backpressure
tran_ctl
tran_ctl
data switch
request switch
arbiter
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Overview
• Network-on-a-Reconfigurable-Chip
• The Dynamic Link Allocation Flow control method
• The Dynamic Link Allocation Router (DyLAR)
• ConclusionConclusion
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23/4/19Advanced Processor Group The School of Computer Science
Conclusion
• Contribution– A new flow control method– Implement the first asynchronous spatial division rout
er• Advantages
– Smaller latency under zero load– Larger overall throughput under heavy load– Smaller retry rate (smaller power consumption)
• Problems– An extra request switch in each router– Extra control logic– Increase the latency to pass a router
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23/4/19Advanced Processor Group The School of Computer Science
Thank You!
Questions?
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23/4/19Advanced Processor Group The School of Computer Science
Detailed Procedures
– Request– Path reserved– Sending data– Release path
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Request Procedure
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
OK Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
Data Flits
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
False Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
False Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
False Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
False Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter
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23/4/19Advanced Processor Group The School of Computer Science
False Ack
tran_ctl
tran_ctl
data switch
request switch
arbiter