368 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 23, NO. 7, JULY 2013

A Divide-by-3 0.4–1.4 GHz Injection-LockedFrequency Divider Based on Relaxation OscillatorKai Zhu, Member, IEEE, Syed K. Islam, Senior Member, IEEE, Melika Roknsharifi, Member, IEEE,

Md. Sakib Hasan, and Ifana Mahbub, Student Member, IEEE

Abstract—In this letter, a new topology for divide-by-3 injec-tion-locked frequency divider based on relaxation oscillator isreported. A prototype is designed and implemented in a 90 nmCMOS process technology. The measurement results demonstratea locking range of 0.4–1.4 GHz with a power consumption of30 .

Index Terms—Divide-by-3, injection locked frequency divider(ILFD), prescaler, relaxation oscillator.

I. INTRODUCTION

I NJECTION locked frequency dividers have been widelystudied primarily for their low-power performance in radio-

frequency (RF) applications [1]–[5].Most of the ILFDs reportedin literature are designed based on either LC or ring oscillatorstructure and there are very few publications on ILFDs with re-laxation oscillator schemes. In [6], an injection locked oscillator(ILO) based on relaxation oscillator is reported and the test re-sults for a divide-by-2 ILFD are presented. However, the re-ported operating frequency is just around 1 MHz which is in-adequate for RF applications. A dual-modulus ILFD based onrelaxation oscillator is reported in [7], but from the topologythe multi-modulus is implemented by arbitrarily tuning the free-running oscillation frequency, without optimizing the lockingrange for the division ratios. In general, the locking range of anILFD should be optimized to achieve the maximum value. Inaddition, most of the ILFDs published have even ratios such as

as the odd ratio dividers are more difficult to imple-ment [4].In this work, an RF divide-by-3 ILFD based on relaxation os-

cillator is proposed and implemented in a 90 nmCMOS process.The ILFD topology has been optimized for divide-by-3 oper-ation. The proposed ILFD is explained in Section II and inSection III the design and implementation of the circuits alongwith the test results are provided. A conclusion is provided inSection IV.

Manuscript received September 25, 2012; revised February 16, 2013; ac-cepted March 12, 2013. Date of publication April 04, 2013; date of current ver-sion June 27, 2013.The authors are with the Department of Electrical Engineering and Com-

puter Science, University of Tennessee, Knoxville, TN 37996 USA (e-mail:kzhu3@utk.edu).Color versions of one or more of the figures in this letter are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/LMWC.2013.2254705

Fig. 1. Proposed divide-by-3 ILFD topology.

II. PROPOSED ILFD WITH RELAXATION OSCILLATOR

The proposed ILFD is shown in Fig. 1. A basic relaxationoscillator includes a charging current , a discharging cur-rent , a charging capacitor , a Schmitt trigger which pro-vides two threshold voltages: higher threshold and lowerthreshold , and an inverter. Therefore, the charging timeand the discharging time in a cycle can be easily derived

as

(1)

If the magnitude of is two times that of , then willalso be larger than by the same ratio. Defining the oscillatingfrequency as and the period as , then with theoscillating frequency can be expressed as

(2)

Now suppose the injection current can be expressed as, where and are the input frequency and the

phase with period , and is denoted as its amplitude. Supposeis a small-signal with negligible amplitude compared toand . When the ILFD is injection-locked, the output

frequency is equal to the free-running frequency so that sym-metric locking range and stable operation can be achieved [6].Then from (1), we can integrate the current during the chargingperiod to get

(3)

1531-1309/$31.00 © 2013 IEEE

ZHU et al.: DIVIDE-BY-3 0.4–1.4 GHZ ILFD BASED ON RELAXATION OSCILLATOR 369

Fig. 2. Waveforms of divide-by-3 ILFD under injection with definitions ofphase angles and time intervals, where . In in the th period (

), , are the time needed for ramping up and down, ,are the timing point with reaching and , and , arecorresponding phases at these values.

The last integral term in (3) should be zero for locking tooccur. This depends both on the input frequency and thephase . For injection locking to be stable, this integral shouldbe zero regardless of the value of . Fig. 2 shows the signalwaveforms under injection-locking. Since the integral of a sinu-soidal wave over its complete cycle must be zero, we can writebelow using Fig. 2

(4)

where .Similarly, for discharging current, we can write

(5)

where .Given , from (4) and (5) we get . Sincecan only take integer values can only take even

numbers to satisfy the necessary conditions for boththe charging and the discharging processes.The period can be written as

(6)

and the division ratio can be expressed as

(7)

The division ratio turns out to be . respectively. Notethat if is reduced to be the same as , even divisionratio of 2 or 4 can be achieved with the similar derivation above,which makes this topology very flexible.

III. CIRCUITS DESIGN AND IMPLEMENTATION

The proposed divide-by-3 ILFD based on the relaxation os-cillator has been implemented in a 90 nm CMOS process asshown in Fig. 3 which shows two discharging current mirrors:MN2, MN5 compared to just one charging current mirror MP2.The dimensions of the transistors constituting the current mir-rors have been chosen to be a little larger than the minimumpossible values for better current matching which will benefitthe locking range, but not too large for avoiding high dynamiccurrent consumption.

Fig. 3. Circuit schematic of the proposed divide-by-3 ILFD in 90 nm CMOSprocess.

Fig. 4. Chip micrograph of the proposed ILFD.

Fig. 5. Output spectrum of ILFD with 1.4 GHz input frequency.

The Schmitt Trigger is sized for smaller threshold voltage dif-ference to achieve a higher oscillating frequency, which also im-proves the locking range [6]. Fig. 4 shows the chip microphoto-graph of the proposed circuit. The ILFD core occupies an areaof 30 19 , while the output buffer has a silicon area of52 31 . The ILFD core consumes a current of 30with 1 V supply voltage, and the measured locking range is0.4–1.4 GHz.Fig. 5 shows the output power spectrum, with an input

frequency of 1.4 GHz. The phase noise values at 1 KHz and10 MHz are measured as 95 and 120 ,

370 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 23, NO. 7, JULY 2013

Fig. 6. Sensitivity of the ILFD as a function of the input frequency.

Fig. 7. Transient waveform of output signal with 1 GHz input.

TABLE ICOMPARISON WITH THE PREVIOUS DIVIDE-BY-3 ILFDS

respectively. Fig. 6 shows the sensitivity of the ILFD. Note thatthis sensitivity curve is not symmetrical “V” shape compared

with LC ILFDs [4], since larger injection power not onlystrengthens the injection efficiency but also directly increasesthe free-running oscillating frequency. Fig. 7 shows a transientwaveform with 1 GHz input frequency.Table I provides the comparison of the proposed ILFD

with the previous divide-by-3 ILFDs [8]–[10]. This ILFD hasshown a good locking range over power (LROP) among all thestate-of-art divide-by-3 ILFDs, and validated the feasibility ofrelaxation oscillator as a flexible RF ILFD candidate.

IV. CONCLUSION

A new divide-by-3 ILFD based on relaxation oscillator is pro-posed, and implemented. With the proposed ILFD, the lockingrange is optimized. The proposed ILFD shows good lockingrange and power performance compared with published workswhile allowing easy and flexible implementation.

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