a direct digital frequency synthesizer utilizing quasi-linear interpolation method

8/13/2019 A Direct Digital Frequency Synthesizer Utilizing Quasi-Linear Interpolation Method

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A Direct Digital Frequency S ynthesizer UtilizingQuasi-Linear Interpolation MethodAshkan Ashrafi Reza Adhami

Department of Electrical and C omputer EngineeringThe University of Alabama in HuntsvilIe Department of Electrical and Computer E ngineeringThe University of Alabama in Huntsvilleashkan@,ieee.org rradhami@,ene.uah .edu

Key Words: Direct Digital Frequency Synthesizer, Sinusoidal SignaIs Generation, Polynomial InterpolationA b s t r a c b In this paper, a novel direct digital frequencysynthesizer DDFS) i s introduced in which a combinationof l inear and even piecewise parabolic polynomialinterpolation EPW) is used to interpolate the firstquadran t of a cosine signal. An appr opria te combinationo f these t w o methods is employed to maxim ize th espurious free dynamic range and reduce the complexity ofthe e ntire system. T he even parabolic polynomial c an bet reated as a linear interpolation with respect to t h esquared of the accumulator 's output, thus the proposedsystem is called Quasi Linear Interpolation QLIP) di rectdigital frequency synthesizer.

1. INTRODUCTIONDirect digital fkquency synthesizers (DDFS) re an

important part of modern communication systems. They areemployed to create accurate sinusoidal signal for modulationand demodulation. The amplitude of a sinusoidal signal isdigitally stored in a ROM and they are consecutively fetchedby the output of an at:cumulator, which feeds the address lineof the ROM l]. Fig.] shows the structure of a DDFS.

The input of the accumulator and its word-lengthdetermine the output frequency and the output frequencyresolution, respectively. The ROM hnctions as a phase tosine amplitude converter that generates sine amplitudes byusing the digital ramp sequence generated by theaccumulator. The frequency of the output sinusoidal signal is

where F L f and f are the input of theaccumulator, the accumulator word-length, the clockfrequency and the output frequency, respectively [ 3A DDFS has two important features. The first and the

most important feature of a DDFS is its capability to tune thefrequency of the output sinusoidal signal with a very smallpitch. The other feature of a DDFS is its fast frequencyhopping. The only drawbacks of DDFS systems are their highpower consumption and low maximum clock fiequency dueto the very large ROM. These drawbacks are further

deteriorated. by increasing the ROM size, which is used toenhance the resolution and spurious free dynamic range(SFDR) of the output sinusoidal signal. The SFD R is definedas the ratio of the fundamental harmonic magnitude t themaximum spur magnitude.

A basic method to reduce the ROM size of a DDFS is totruncate the accumulator's word-length from L to W whereW


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In this paper, a novel method to design a phase to sineamplitude converter for direct digital frequency synthesizersis introduced. This method i s based on a combination of EPIPand linear polynomial interpolation of a cosine signal becausea cosine signal is very close to a parabola at the peak, but it iscloser to a line at zero crossing points. An appropriatecombination has been found to achieve the highest possibleSFDR. A MATLAB simulation is performed to compare theproposed method with the best linear interpolation methodintroduced in [SI.

11. THEQLIP METHODLet the first quadrant O < @ l l ) of a cosine signalcos (d / 2) be divided into m = 2' segments, where s is a

positive integer number and let the parameter x be theposition where the interpolation method should be changedi.e., for k < x the cosine signal is interpolated by evenparabolic polynomials Co k-Clto and for k > x cosinesignal is interpolated by line segments CO,~C '. Fig. 2illustrates the QLIPmethod.

The least squares method is employed to find thecoeEcients CO,~nd c k. Then, MATLAB is used tocalculate the SFDR of the QLIP method for different valuesof x and m using the evaluated coefficients. Fig. 3 showsthe results calculated by MATLAB. It can be seen in Fig. 3that for 4 1 m 1 3 2 the best SFDR is achieved whenx = 3m 4 .Therefore, the output signal can be represented by

4)~ ~ ( 8 )c ~ , ~c,,,BPk( )=CO,k 3 m / 4 + 1 < k I m15 k m/4

To compare the QLIP method with piecewise linearinterpolation and EPIP methods, the variations of SFDRversus the number of sections m (utilizing the least squares

method to calculate the coefficients) for x =0 (linear)x = 1(EPIP) and x = 3m /4 QLIP) are calculated byMATLAB and depicted in Fig.4. It can be seen in Fig. 4 thatthere is around l2dBc improvement in SFDR between thepiecewise linear interpolation and EPIP methods.

Since the maximum achievable SFDR from a piecewiselinear interpolation method ( x = O ) is 16s 1 [XIconsequently, the maximum achievable SFDR from he EPIPmethod x = ) can be empirically approximated by64s2 . Moreover, Fig. 4 shows that in order to achieve acertain SFDR we need half the number of sections in EPIPthan piecewise linear interpolation and that leads to a simplerdigital circuitcy.

Fig.4 also shows that the QLlP method x = 3m 4 ) has6dBc improvement over the EPIP method x = 1) and 18dBcimprovement over the h e a r interpolation x =0 ) methodwhich makes it more appropriate in terms of spectral purity.

4 i d 10 2 12 ab 4 LI

Fig. 3: Variation of the SFDR ersus X for differentnumber of section. .

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e:O60604030 2 4 B 16 32NMtbero fSegmentqm

Ffg. 4: Comparison between the SFDR of he EPIP, piece-wise linearplynormal interpolationmethod and he QLIP method.

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111.DIGITAL REALIZATIONTo realize the method in a digital circuitry, signal (4)

should be digitized. By considering the phase word-lengthequal to W the output word-length equal to D andemploying the quarter wave symmetry [6]

51A f@= - O I n 1 2 -1, M = W - 2 ,M 'the digitized version of (4) will be

By choosing W = D + 2 and knowing the fact thatM = W - 2 then D - M , t h u s

where 11 means the integer part of x , In fact, to digitize thecoefficients we should multiply (4) y 2 D - 1 but for thesake of simplicity (having a cancellation with z M hemultiplicand has been chosen to be 2O. Since thecoefficients will be changed further both by 8) andoptimization method, this assumption will not have adevastating effect. To eliminate the requirement of secondmultiplier, the coefficients Cl,,+are approximated by asummation of integer powers o f wo, which can be realizedby logical shifts

For m = 4,8 the value of r is equal to two and for= 16 it is equal to three. For greater values of m he

digital system becomes too complicated; therefore, theywould be realized as a very com plicated system, which is notappropriate. The term t 1 / 2 ~ an be realized by a fixed-length digital multiplier whose input and output word-lengthsare identical. Since the output word-length is the outputgenerated by (7) has to be truncated to D - because the firstquadrant has half of the amplitude of the full cosine signal.Therefore, the behavioral model of the entire system can berepresented by the following formula

j=O

where n n = n 2 , - M ) and {a,-b> means that the binarynumber n has been shifted to the right by 6 bits and theresult is truncated to an integer number. Then the output is

The complexity of the linear interpolation section3n44 1 5 k 5 m can be further reduced. This section can berepresented by the following discrete signal

where

j=OSince h,, hl ,A a . are negative for these segments,then wi is significantly less than wk. sing this technique,the ROM size and bits involved in the addresses aredramatically reduced. Moreover, simulation shows that theinput word-lengths of the squarer can be reduced by 2-bitswithout any significant deterioration in the output SFDRwhich leads to a less complex system. Fig. 5 illustrates theblock diagram of the entire digital system of the QLIPmethod. The above approximation deteriorates the SFDR ofthe output signal compared to the ideal case. To restore thetheoretical SFDR of the output signal, the Nelder-Meadnonlinear simplex optimization m ethod [91 s used to changethe digitized values of CO,,n order to maximize the SFDR.The result of the simulation is compared with the ideal Q LIPin Fig. 6 that shows the optimization restores the S FDR c loseto the theoretical values. Table-1 shows the optimizedcoefficients for W=12, P I O m=4.

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Although the SFDR improvement is a very goodachievement for the QLIP method, the real com parison withthe piecewise linear interpolation method should be madehaving the information of the realized corresponding VLSIchip. Future research is needed to incorporate the QLWsystem in a VLSI chip to evaluate the complexity, powerconsumption and maximum clock frequency of the QLlPsystem and make a realistic comparison with the piecewiselinear interpolation method.

V. EFERENCESFig. 6: Comparison between the ideal and the digitizedQLIP. [l] 1. Vankh and K. Halonen. Direct Digital Synthesizers,Theory, Design and Applications, Kulwer Academic

Publishers, 2001.[2] H.T. Nicholas and H. Samueli, An Analysis of the outputspectrum of Direct Digital Frequency Synthesizers in theVDISCUSSION AND CONCLUSION

A Quasi Linear Interpolation (QLIP ) method to designa DDFS system based on a combination of a piecewiseeven parabolic and linear poIynomia1 interpolations, isintroduced in this paper. The digital realization o f theproposed method is formulated based on the linearinterpolation method given in [SI It is shown that theSFDR of the proposed method is lSdBc better than theh e a r interpolation method introduced in [SI.Moreover,the com plexity of the system is reduced because only halfof the segments are required to achieve the same SFDR asthe linear interpolation method given in [PI. This leads tohalf the number of multiplexers and a simpler adder inFig. 5 However, in the QLIP method (compared to thelinear interpolation method [8]) an extra multiplier isneeded to generate the squared of the accumulatorsoutput. This extra niultipliet makes the proposed systemslightly more complex.

Table-1: The cmfidencs of the QLIPmethod form=4

presence of phase-accumulator truncation 4ls AnnualFrequency Conrrol Symposium,pp 495-502, 987.

[3j J. Vankka, Methods of mapping from phase sineamplitude in Direct Digital Synthesis, IEEE Transactionson Ultrasonic,Ferroelectric and Fregu eng Control, Vol.44, o.2, March 1997.

141 A.M. Sodagar G.R. Lahiji, Mapping from Phase tosine-amplitude in direct digital frequency synthesizersusing parabolic approximation, IEEE Transactions onCircuit and Systems. II Vol. 47, No. 12,Dec. 000

[ 5 ] D.De Caro, E. Nappli, and A.C.M. Strollo,Direct DigitalFrequency Synthesizers with Polynomial HypafoldingTechnique, IEEE ?runs. Circuit Sysr. Part-II, Vo1.51,

[6] A. Ashrafi,Z. an, R. Adhami, and B.E. Wells, A NovelROM-less Direct Digital Frequency Synthesizer Based onChebyshev Polynomial Interpolation, Proceedings of The36hSoutheastern Symposium on System Theory, SSSTU4,

pp 337-344, July 2004.

pp 393-397, March 2004.[7] A. Ashrafi, R.Adhami, L. Joiner, and P.Kaveh, ArbitraryWaveform DDFS Utilizing Chebyshev Polynomials

Interpolation, IEEE Trans. on Circuit Syst.Purt- I[g] J.M.P. anglois, and D AI-Khalili, Novel Approach tothe Design of Direct Digital Frequency Synthesizers Based

on Linear Interpolation, IEEE Trans. on Circuit Syst.Part-II,Vo1.50 No.9, Sep. 2003.

[9] J.A. Nelder and R. Mead, A Simplex Method forFunction Minimization, The Computer Journal, Vol. 7 ,

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N0.4,p 308-313, Jan. 1965.

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a direct digital frequency synthesizer utilizing quasi-linear interpolation method

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