95-2-semiconductor (1)
TRANSCRIPT
-
8/11/2019 95-2-semiconductor (1)
1/27
1
1
Introduction to
Semiconductor Fabrication Process
Yao-Joe Yang
2
Why I have to introduce semiconductor
manufacturing process ?
The most important industry in Taiwan
Both IC and LCD use similar
manufacturing concepts ME play the most important role in the
field (process, equipment, automation,
QC)
The core of the hi-tech in the world
The core of the recent technology
revolution in human history
-
8/11/2019 95-2-semiconductor (1)
2/27
2
3
Integrated Circuits
4
ANALOG ADXL-50 ARCHITECTURE
~ 5 mm
The cover picture of
Micorelectronic Circuit
by Sedra and Smith
Accelerometer
A classic example ofintegration of MEMS
and electronic circuit
-
8/11/2019 95-2-semiconductor (1)
3/27
3
5
NovaSensor Accelerometer
6
MIT/AT&T Micro Motor (Circa 1989)
-
8/11/2019 95-2-semiconductor (1)
4/27
4
7
Optical Switch
8
Micro-robot
-
8/11/2019 95-2-semiconductor (1)
5/27
5
9
Packaged tactile array: (a) close-up of polyimidesensor array inserted into connector and (b) overview
of tactile sensor, connector and PCB patterned to
interface with card-edge connector.
10
Crystal Growth
Yao-Joe Yang
-
8/11/2019 95-2-semiconductor (1)
6/27
6
11
Crystal Pulling: CZ method
Graphite Crucible
Single Crystal
silicon Ingot
Single Crystal Silicon Seed
Quartz Crucible
Heating Coils1415 C
Molten Silicon
12
CZ Crystal Pulling
Source: http://www.fullman.com/semiconductors/_crystalgrowing.html
-
8/11/2019 95-2-semiconductor (1)
7/27
7
13
CZ Silicon Ingots
14
Czochralski Growth Equipnment
-
8/11/2019 95-2-semiconductor (1)
8/27
8
15
Overview of Wafer Fabrication
Yao-Joe Yang
16
Basic Wafer Fabrication Operations
Layering form thin layer/film structures
oxidation, CVD, sputtering, evaporation, epitaxy ..
Patterning (patter transfer) trim layer/film to desired device size
lithography, etching .
Doping skip adjust layer/film/substrate electrical properties
ion implementation, diffusion
Heat treatment skip partially recover the damage after certain processes
diffusion process, annealing .
-
8/11/2019 95-2-semiconductor (1)
9/27
9
17
Layering
Adding (uniform) thin layers to wafer surfaces
Methods
Growing:
oxidation (grow silicon oxide: SiO2)
nitridation (grow silicon nitride: Si3N4)
Deposition
Epitaxy
chemical vapor deposition physical vapor deposition
18
Layering
In terms of final shapes, there are three types oflayering processes:
Conformal
Planar
Stack (not traditional IC process)
-
8/11/2019 95-2-semiconductor (1)
10/27
10
19
Conformal
original original
20
Planar
original original
-
8/11/2019 95-2-semiconductor (1)
11/27
11
21
Stack
(not traditional IC process)
original original
22
Patterning
A series of steps that remove unwanted
patterns from substrate surface layers
Patterns are defined byphoto-masks ( )
Also known as: Photomasking, masking,
lithography, photo-lithography, -lithography
-
8/11/2019 95-2-semiconductor (1)
12/27
12
23
Etching
Layer 1
Layer 2
Layer 1
Layer 2
Photo-mask
Example:
Layer 1 is etched by an etchant
Pattern is defined by photo-mask (etching mask is not shown)
24
FSG
Metal 4 Copper
Passivation 1, USG
Passivation 2, nitride
Lead-tin
alloy bump
FSG
CopperMetal 2
FSG
FSG
CopperMetal 3
FSG
P-epi
P-wafer
N-wellP-well
n+STI p+ p+USGn
+
PSG Tungsten
FSG
Cu Cu
Tantalum
barrier layer
Nitride etch
stop layer
Nitride
seal layer
M 1
Tungsten local
Interconnection
Tungsten plug
PMD nitride
barrier layer
T/TiN barrier &
adhesion layer
Tantalum
barrier layer
CMOS Chip
with 4 Metal
Layers
-
8/11/2019 95-2-semiconductor (1)
13/27
13
25
CMOS IC
p-Si USGn-Si
Balk Si
Polysilicon
STI
n+ Source/Drain p+ Source/DrainGate Oxide
26
Overview of Patterning
Yao-Joe Yang
-
8/11/2019 95-2-semiconductor (1)
14/27
14
27
Patterning
Patterns transferred from photo-masks to
thin-films on a planar substrate via
lithographic process
Example
Step 1:
Transfer patterns of photo-masks () tophotoresist () by lithography techniques
Step 2:Use etchants () to etch unwanted portionof material defined by etching-masks.
28
Pattern Transfer:
Example 1
Spin-coating PR
Photo-lithography
alignment and exposure
Development
Etching
Striping remaining PR
-
8/11/2019 95-2-semiconductor (1)
15/27
15
29
Example 2:
Starting Material
P-Well
USGSTI
Polysilicon
30
Example 2:
Spin-coating PR
P-Well
USGSTI
Polysilicon
Photoresist ()
-
8/11/2019 95-2-semiconductor (1)
16/27
16
31
Example 2:
Photo-Mask Alignment (using an aligner)
P-Well
USGSTI
Polysilicon
Photoresist
Photomask ()
32
Example 2:
Gate Mask Exposure
Gate Mask
P-Well
USGSTI
Polysilicon
Photoresist
-
8/11/2019 95-2-semiconductor (1)
17/27
17
33
Example 2:
Development
P-Well
USGSTI
Polysilicon
PR
34
Example 2:
Etch Polysilicon (not finished yet)
P-Well
USGSTI
PRPR
Polysilicon
-
8/11/2019 95-2-semiconductor (1)
18/27
18
35
Example 2:
Final Shape of Etched Polysilicon
P-Well
USGSTI
Gate Oxide Polysilicon
PR
36
Example 2:
Strip Photoresist
P-Well
USGSTI
Gate Oxide Polysilicon
-
8/11/2019 95-2-semiconductor (1)
19/27
19
37
Summary of a typical patterning procedure
Spin coating photoresist (PR) on a wafer
Mask alignment with the wafer using an
aligner ( )
Exposure of PR
Development (remove unwanted PR)
With the remained PR as etching masks, etch the
wafer
Striping the remaining PR from the wafer
Patterning
38
Lithography
Yao-Joe Yang
-
8/11/2019 95-2-semiconductor (1)
20/27
20
39
Optical
X-ray (skipped)
electron beam writer (skipped)
non-traditional, no masks
Types of lithography systems
40
Optical Lithography
Photo-masks ()
Interface between designers and devices
Designers layout design (mask) on computers (2D patterns)
opaque patterns (chromium) on transparent glass (fused
silica)
-
8/11/2019 95-2-semiconductor (1)
21/27
21
41
Photomasks ( )
42
Photoresist
Photoresist (PR, )
Optical resists:
photosensitive polymers
PR is coated on the whole
substrate surface using spin-
coater
Positive PR:
can be removed by KOH orNaOH solution if it is exposed
most popular for IC process
Negative PR:
can be removed by specificsolution if it is not exposed
not good for feature size < 3 um
-
8/11/2019 95-2-semiconductor (1)
22/27
22
43
Aligners
Alignment and exposure systems
()
A microscopic system which:
Align the photo-mask and the substrate
Expose PR
Also called:
printers
44
Classification of aligners by exposure methods
Contact printer ()
High resolution ( 1m)
Mask deterioration
Proximity printer ()
10 - 25 m gap --> longer mask life
Diffraction effect --> 2 - 4 m resolution
Projection printer ()
Image of mask usually reduced
Scanning or stepping of small field (~ 1cm)
VLSI standard (0.25 m possible with deep-UV source)
-
8/11/2019 95-2-semiconductor (1)
23/27
23
45
Schematics of Exposure systems
46
Contact Printer
Light Source
Lenses
Mask
PhotoresistWafer
-
8/11/2019 95-2-semiconductor (1)
24/27
24
47
Proximity Printer
Light Source
Lenses
Mask
PhotoresistWafer
~10 m
48
Light Source
Lens
Mask
Photoresist
Wafer
Scanning Projection System
Synchronized
mask and wafer
movement
(stepper)
Slit
Lens
-
8/11/2019 95-2-semiconductor (1)
25/27
25
49
Lithography
Karl Suss Contact Aligner stepper
50
Light sources ()
Visible light
Ultraviolet (UV)
Deep ultraviolet (DUV)
Extreme ultraviolet (EUV)
-
8/11/2019 95-2-semiconductor (1)
26/27
26
51
Coating of Photoresists
Spinning coating
Final thickness of photoresist is a function of rotating speed.
Relationship has been calibrated and formed a look up table
Thickness1
52
Photoresist Spin Coating
Spindle
To vacuumpump
PR dispensernozzle
Chuck
PR suck back
Wafer
-
8/11/2019 95-2-semiconductor (1)
27/27
53
Photoresist Spin Coating
Spindle
To vacuumpump
PR dispensernozzle
Chuck
PR suck back
Wafer
54
Coater ( )
Spin coater