9/29: lecture topics
DESCRIPTION
9/29: Lecture Topics. Memory Addressing (naming) Address space sizing Data transfer instructions load/store on arrays on arrays with variable indices Conditional branch instructions. Administrative notes. Don’t forget: homework due Monday Readings: before or after lecture? - PowerPoint PPT PresentationTRANSCRIPT
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9/29: Lecture Topics
• Memory– Addressing (naming)– Address space sizing
• Data transfer instructions– load/store
• on arrays• on arrays with variable indices
• Conditional branch instructions
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Administrative notes
• Don’t forget: homework due Monday
• Readings: before or after lecture?• Lecture slides on the web/printing• Are you on the mailing list yet?
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Memory and Addressing
• Only so many registers, but memory holds millions of data elements
• Think of memory as a big array
Address Data
01011010
0
1
2
3
4
10011001100011111111001000011001
Each address is a 32-bit number describing a location...
...and each data element is
8 bits of information.
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MIPS Information Units
• Data types and size:– byte (eight bits)– half-word (two bytes)– word (four bytes)– float (four bytes, single precision)– double (eight bytes, double precision)
• Memory is byte addressable• Data types start at an address
divisible by the data type size (alignment)
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Word Alignment
• Why do you think so many architectures use alignment?
Address Data
0
4
8
12
16
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How Big Can Memory Be?
• How big is an address?– 32 bits
• How many addresses are there?– 232 = about 4 billion
• How much data lives at each address?– 1 byte
• How much memory can this computer have?– 4 billion x 1 byte = 4 GB
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Some Perspective
• Today’s attitude:– 32 bits is definitely not enough for
long– We hope 64 bits will be enough for a
while
• The attitude a while back:– 16 bits is enough for all time!– Who could possibly use up 64K of
memory?
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Loads and Stores
• Data transfer instructions let us– load data from memory to registers– store data from registers into memory
• In MIPS, all data must be loaded before use and stored after use– Load-store architecture
• lw instruction fetches a word• sw instruction stores a word
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Alternatives to Load-Store (p. 191)
• register-register is another name for load-store (MIPS)
• accumulator architectures had only one register (EDSAC)
• register-memory architectures allow one operand to be in memory (IBM 360, Intel 80386)
• memory-memory architectures allow both operands to be in memory (DEC VAX)
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Load Syntax
• first argument: where to put the data
• second argument: offset• third argument: address
Desired result: MIPS assembly:
lw $t0, 0($s0)Load the word at the address in $s0 into register $t0
Load the word at the address in $s0 plus 4 into $t0
lw $t0, 4($s0)
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A Related Concept: move
• lw and sw are for moving data between memory and registers
• move is for copying data from one register to another
• common usage: zero a register
move $t0, $0
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“Complex” Example Revisited
Desired result:
MIPS assembly:
add $s0, $s1, $s2 sub $s0, $s0, $s3 sub $s0, $s0, $s4
f = (g + h) - (i + j)
f, g, h, i, j are in registers $s0, $s1, $s2, $s3, $s4, respectively
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“Complex” Example with L/S
Desired result:
MIPS assembly:
f = (g + h) - (i + j)
load g, h, i, j, compute, then store f
add $s0, $s1, $s2sub $s0, $s0, $s3sub $s0, $s0, $s4
Address Data
f200
204
208
212
216
g
h
i
j
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Arrays in Assembly Programs
• One reason for lw syntax is arrays– keep the base address in a register– lw and sw on offsets into the array
• Example:
int A[10];
A[0] = 0;
A[1] = 0;
# addr of A in $t0
sw $0, 0($t0)
sw $0, 4($t0)
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Variable Array Indexing
• Very common use of arrays: walk through the array by incrementing a variable
• lw and sw instructions allow offset to be specified:– as a constant– as the contents of a register
lw $t0, 4($t2) lw $t0, $t1($t2)vs.
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Array Example
g = h + A[i]
Idea: translate
into assembly, assuming
Base address of A is in $s3g, h, i in $s1, $s2, $s4
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Operation Types
• Remember these?Arithmetic
– add, sub, mult, divData Transfer
– lw, sw, lb, sb
• Conditional Branch– beq, bne
• Unconditional Jump– j, jr, jal
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Conditional Branch
yes
no
?
...
...
...
...
A change of the flow of control
of the program that depends on
a condition
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Control flow in C
• Conditional branch constructs:– while, do while loops– for loops
• Unconditional jump constructs:– goto– switch statements
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Branching Instructions
• beq• bne• other real instructions: b, bgez, bgtz, more...
• other pseudoinstructions: beqz, bge, bgt, ble, blt, more...
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Pseudoinstructions
• One-to-one mapping between assembly and machine language not strictly true
• Assembler can do some of the work for you
• Example: bgt is a real instruction; blt is a pseudoinstruction
• move is a pseudoinstruction
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Labels in MIPS
• MIPS allows text tags– a name for a place to branch to
• Under the covers, the assembler converts the text tag into an address
loop: add $t0, $t0, $t0 #
bne $t0, $t1, loop #
sw $t2, 0($t3) #
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Building a while loop in MIPS
i=0;while(i<100) { i++;}
Idea: translate
into assembly.
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How about a for loop?
• One answer: translate from for to while, then use while loop conventions
• This is typically how compilers handle loops
for(i=0; i<N; i++) { do_stuff(i);}
i=0;while(i<N) { do_stuff(i); i++;}
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Example C Program
int array[100];
void main() {
int i;
for(i=0; i<100; i++)
array[i] = i;
}
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An Assembly Version
main: move $t0, $0 #
la $t1, array #
start: bge $t0, 100, exit #
sw $t0, 0($t1) #
addi $t0, $t0, 1 #
addi $t1, $t1, 4 #
j start #
exit: j $ra #