8085 architecture

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Microprocessor?

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8086

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Page 1: 8085 Architecture

Microprocessor?

Page 2: 8085 Architecture

8085(8 bit microprocessors)

Page 3: 8085 Architecture

Accumulator Temp. Reg. IR

Address Buffer Data/adr Buffer

Instruction Decoder & m/c cycle encoding

Flags

Timing and Control

W Z

B C

D E

H L

Stack Pointer

Program Counter

Inc/Dec Address Latch

MUX

Interrupt Control

ALU

8-bit internal data bus

SID SODINTR

INTA

RST 5.5

RST 6.5

RST 7.5TRAP

Clk out

READY

RD WR ALE S0 S1 IO/M HOLD HLDA

RESET IN

RESET OUT

X0

X1CLK GEN Control Status DMA Reset

A15 – A8Address Bus AD0 – AD7

Address/Data Bus

Page 4: 8085 Architecture

Architecture of 8085 Microprocessor

• 8085 Architecture consists of following blocks:– Registers

– ALU logic

– Instruction decoder and machine cycle encoder

– Address buffer

– Address/Data Buffer

– Increment/Decrement address latch

– Interrupt Control

– Serial I/O Logic

– Timing and Control Logic Circuitry

Page 5: 8085 Architecture

Registers• The 8085/8080A-programming model includes six

registers, one accumulator, and one flag register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the program counter.

• The 8085/8080A has six general-purpose registers to store 8-bit data; these are identified as B,C,D,E,H, and L. They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit operations. The programmer can use these registers to store or copy data into the registers by using data copy instructions.

Page 6: 8085 Architecture

Accumulator

• The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A.

Page 7: 8085 Architecture

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The Flags register

– There is also the flags register whose bits are affected by the arithmetic & logic operations.• S-sign flag

– The sign flag is set if bit D7 of the accumulator is set after an arithmetic or logic operation. 1-when msb of result is 1, otherwise 0

• Z-zero flag– Set if the result of the ALU operation is 0. Otherwise is reset. This flag is affected by operations

on the accumulator as well as other registers. (DCR B).

• AC-Auxiliary Carry– This flag is set when a carry is generated from bit D3 and passed to D4 . This flag is used only

internally for BCD operations. (Section 10.5 describes BCD addition including the DAA instruction).

• P-Parity flag– After an ALU operation if the result has an even # of 1’s the p-flag is set. Otherwise it is cleared.

So, the flag can be used to indicate even parity.

• CY-carry flag– When result having carry.

Page 8: 8085 Architecture

S Z X AC X P X C

Auxiliary Carry

Parity

Carry

Zero

Sign

X - Unspecified

Flag

Page 9: 8085 Architecture

Sixteen bit registers

• Program Counter (PC)-This 16-bit register deals with sequencing the execution of

instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16- bit register.

- The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one

to point to the next memory location

Page 10: 8085 Architecture

Contd….

• Stack Pointer (SP)- The stack pointer is also a 16-bit register used as a

memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack pointer.

Page 11: 8085 Architecture

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The ALU

• In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation.(20-airthmetic, 14-logic)

• Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer.

Page 12: 8085 Architecture

Instruction Register/Decoder

• The Microprocessor first fetches the opcode of instruction from memory and stores this opcode in the instruction register. It is then sent to the instruction decoder. The instruction decoder decodes it and accordingly gives the timing and control signals which control the register, the data buffer, ALU depending upon the nature of the instruction.

Page 13: 8085 Architecture

Address Buffer

• This is an 8-bit unidirectional buffer. It is used to drive external high order address bus (A15-A8). It is also used to tristhe higher order address buses under certain conditions such as reset, hold, halt and when address lines are not in use.

Page 14: 8085 Architecture

Address/Data Buffer• This is an 8-bit bidirectional buffer. It is used to drive multiplexed address/data bus, i.e., lower order address bus (A7-A0) and data bus (D7-D0). It is also used to tristate the multiplexed address/data bus under certain conditions such as reset, hold, halt and when bus is not in use.

Page 15: 8085 Architecture

Incrementer /Decrementer Address Latch

• A 16-bit register is used to increment or decrement the contents of program counter or stack pointer as a part of execution of instructions related to them.

Page 16: 8085 Architecture

Interrupt Control• This block accepts different interrupt request inputs such as

TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.

• INTA’ is an acknowledge pin for maskable and non-vectored interrupt i.e. INTR.

• When a valid interrupt request is present it informs control logic to take action in response to each signal. In such a case the processor has to be interrupted in order to service the interrupt.

• The interrupt control units job is to service the interrupt and after completing the interrupt service routine return back the control to the main program where it was interrupted.

Page 17: 8085 Architecture

Serial I/O Logic• During data transmission over a long distances, it is

necessary to transmit data bit by bit, to reduce the cost of cabling.

• In serial communication one bit is transferred at a time over a single line.

• 8085 implements this by using SID and SOD signals.• The serial output data (SOD) line is used to send data

serially and serial input data (SID) line is used to receive data serially.

Page 18: 8085 Architecture

Timing and Control Logic Circuitry

• The control circuitry of the 8085 processor is responsible for all the operations.

• The control circuitry and hence the operations in 8085 are synchronized with the help of clock signal.

Page 19: 8085 Architecture

Contd…

Timing and Control Logic Circuitry

Instruction Register

Instruction Decoder

Timing and Control Unit

Control Signals

Page 20: 8085 Architecture

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The 8085 and Its Busses

• The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory.

• It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.– The pins on the chip can be grouped into 6 groups:

• Address Bus.• Address/Data Bus.• Control and Status Signals.• Power supply and frequency.• Externally Initiated Signals.• Serial I/O ports.

Page 21: 8085 Architecture

Pin Diagram

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Page 22: 8085 Architecture

Pin diagram of 8085 Microprocessor

8085p

Address Bus

Address/Data Bus

Control & Status Signals

Timing and Synchronization Signals

Serial I/O Signals

DMA Signals

Interrupt Signals

VCC VSS

Page 23: 8085 Architecture

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The Address and Data Busses

• The address bus has 8 signal lines A8 – A15 which are unidirectional.

• The other 8 address bits are multiplexed (time shared) with the 8 data bits.(used for dual purpose)– bits AD0 – AD7 are bi-directional and serve as A0 – A7 and

D0 – D7 at the same time.• So, the during the execution of the instruction, these lines carry the

address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.

– In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.

Page 24: 8085 Architecture

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Power Supply and Frequency Signals

• Vcc: +5 V power supply• Vss: Ground Reference.

• There are 3 important pins in the frequency control group.– X0 and X1 are the inputs from the crystal or clock generating

circuit.• The frequency is internally divided by 2.

– So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins.

– CLK (OUT): An output clock pin to drive the clock of the rest of the system.

• We will discuss the rest of the control signals as we get to them.

Page 25: 8085 Architecture

Externally Initiated signals, Including interrupts

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Interrupts

Externally initiated signal

Page 26: 8085 Architecture

Serial Input/output Port

SID – serial input data:

SOD – Serial output data:

-These two signals are used to establish serial communication between the microprocessor and external serial I/O devices.

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