8 7 6 5 4 3 2 1 fix€¦ · cpu core duo thermal gddr3 usb 609 bga sensors smc bootrom spi smbus...
TRANSCRIPT
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TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD
DRAWING
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DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPDENG
DATE
APPDCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OFSHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
12345678
12345678
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
SCHEM,TRUCKEE,M578/16/2006DVT2
Schematic / PCB #’s
ALIASES RESOLVED
03001
?? ?? ?
871
051-7164
SCHEM.TRUCKEE,M57SCHEM,TRUCKEE,M57051-7164 CRITICALSCH1
PCBF,TRUCKEE,M57 CRITICALPCB1820-2059
N/AN/A1 1
Table of Contents 44 M59_MLBFireWire Ports06/27/200646
LAST_MODIFIED=Wed Aug 16 19:10:01 2006
TITLE=TRUCKEE
ABBREV=DRAWING
SYNCDATE
CONTENTS(.CSA)
PAGE(.CSA)
SYNCDATE
CONTENTSPAGE
45 M59_MLBCamera Connector08/08/200649
46 (MASTER)Internal USB Hub(MASTER)50
47 M59_MLBExternal USB Connector08/08/200652
48 (MASTER)Left I/O Board Connector(MASTER)55
49 (MASTER)Current & Thermal Sensors(MASTER)56
50 (MASTER)PCI-E Connections(MASTER)57
51 M59_MLBSMC08/08/200658
52 M59_MLBSMC Support08/08/200659
53 (MASTER)LPC+ Debug Connector(MASTER)60
54 M59_MLBThermal Sensors08/08/200661
55 M59_MLBCurrent & Voltage Sensing08/08/200662
56 M59_MLBSPI BOOTROM08/08/200663
57 (MASTER)ALS Support(MASTER)64
58 (MASTER)Fan Connectors(MASTER)65
59 M59_MLBSudden Motion Sensor (SMS)08/08/200666
60 M59_MLBTPM08/08/200667
61 M59_MLBIMVP6 CPU VCore Regulator08/08/200675
62 M59_MLB5V / 1.5V Power Supply08/08/200676
63 M59_MLB2.5V & 1.2V Regulators08/08/200677
64 (MASTER)1.8V Supply(MASTER)78
65 M59_MLB3.3V / 1.05V Power Supplies08/08/200679
66 M57_MLB_MG3.3V G3Hot Supply & Power Control08/08/200680
67 (MASTER)Power Aliases(MASTER)81
68 (MASTER)DC-In & Battery Connectors(MASTER)82
69 M59_LIOPBus Supply & Batt. Charger08/08/200683
70 (MASTER)ATI M56 PCI-E(MASTER)84
71 (MASTER)GPU (M56) Core Supplies(MASTER)85
72 (MASTER)ATI M56 Core Power(MASTER)86
73 (MASTER)ATI M56 Frame Buffer I/F(MASTER)87
74 M57_MLB_MGGPU Straps08/08/200688
75 (MASTER)GDDR3 Frame Buffer A(MASTER)89
76 (MASTER)GDDR3 Frame Buffer B(MASTER)90
77 (MASTER)ATI M56 GPIO/DVO/Misc(MASTER)91
78 (MASTER)ATI M56 Video Interfaces(MASTER)93
79 M57_MLB_MGInternal Display Connectors08/08/200694
80 M57_MLB_MGExternal Display Connector08/08/200697
81 (MASTER)M57 SPECIFIC CONNECTORS(MASTER)98
82 M57_MLB_MGLVDS Interface Pull-downs08/08/200699
83 (MASTER)Revision History(MASTER)100
84 (MASTER)Napa Platform Constraints(MASTER)101
85 (MASTER)More System Constraints(MASTER)102
86 (MASTER)M9 Spacing & Physical Constraints(MASTER)103
87 (MASTER)M57 NET PROPERTIES(MASTER)104
(MASTER)(MASTER)2 2
System Block Diagram
(MASTER)(MASTER)3 3
Power Block Diagram
(MASTER)(MASTER)4 4
BOM CONFIGURATION
(MASTER)(MASTER)5 5
Functional / ICT Test
(MASTER)(MASTER)6 6
Signal Aliases
M59_MLB08/08/20067 7
CPU 1 OF 2-FSB
M59_MLB08/08/20068 8
CPU 2 OF 2-PWR/GND
M59_MLB08/08/20069 9
CPU Decoupling & VID
M59_MLB08/08/2006
1010
CPU MISC1-TEMP SENSOR
(MASTER)(MASTER)
1111
CPU ITP700FLEX DEBUG
M59_MLB08/08/2006
1212
NB CPU Interface
M59_MLB08/08/2006
1313
NB PEG / Video Interfaces
M59_MLB08/08/2006
1414
NB Misc Interfaces
M59_MLB08/08/2006
1515
NB DDR2 Interfaces
M59_MLB08/08/2006
1616
NB Power 1
M59_MLB08/08/2006
1717
NB Power 2
M59_MLB08/08/2006
1818
NB Grounds
M57_MLB_MG08/08/2006
1919
NB (GM) Decoupling
M59_MLB08/08/2006
2020
NB Config Straps
M59_MLB08/08/200621 21
SB: 1 OF 4
M59_MLB08/08/200622 22
SB: 2 of 4
M57_MLB_MG08/08/200623 23
SB: 3 OF 4
M59_MLB08/08/200624 24
SB: 4 OF 4
M59_MLB08/08/200625 25
SB Decoupling
(MASTER)(MASTER)26 26
SB Misc
(MASTER)(MASTER)27 27
M57 SMBUS CONNECTIONS
M59_MLB08/08/200628 28
DDR2 SO-DIMM Connector A
M59_MLB08/08/200629 29
DDR2 SO-DIMM Connector B
(MASTER)(MASTER)30 30
Memory Active Termination
M59_MLB08/08/200631 31
Memory Vtt Supply
M59_MLB08/08/2006
3232
DDR2 VRef
M59_MLB08/08/2006
3333
CLOCKS
M59_MLB08/08/2006
3434
Clock Termination
M59_MLB08/08/2006
3537
Mobile Clocking
(MASTER)(MASTER)
3638
PATA Connector
M59_MLB08/08/2006
3739
FireWire Link (TSB83AA22)
M59_MLB08/08/2006
3840
FireWire PHY (TSB83AA22)
M59_MLB08/08/2006
3941
ETHERNET CONTROLLER
M59_MLB08/08/2006
4042
Ethernet Connector
M59_MLB08/08/2006
4143
Yukon Power Control
M59_MLB08/08/2006
4244
FW PHY Power Supply
(MASTER)(MASTER)43 45
FireWire Port Power
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
P.46,81
USB 2.0 Hub/Sleep LED IR
ConnectorUSB
USB
P.78
Controller
PCIe x1
P.47Connector
Right USB 2.0
SATAUSB
HDD/BT
P.68
CK410 Clock
Controller
P.33-34
Temperature
Sensors
Connector
LCD Panel
P.79,82
TPM
Connector
LPC
Debug
P.21-26
RT ALS
Expansion/Lower Connector
Factory/Upper Connector
(Merom)
ATI M56P
Yukon Gig-E
P.39P.41
P.37-38Controller
TSB83AA22 FireWire
P.44Connectors
USB x2
w/TV-Out Support
SENSOR
& REGULATOR
DDR2 VTT
DDR2 SO-DIMM A
J2800
J2900
Connector
Audio Board
Left I/O &
DDR2 VREFBUFFER
Azalia (HD-Audio)
PCIe x1
Connector
ITP700FLEX
CPU Debug
479 BGA
CH.A
CH.B
FSB
NB1466UFCBGA
945GM
Core DuoCPU
THERMAL
GDDR3
USB
609 BGA
Sensors
SMC
SPIBootROM
SMBusUSB
USB
SB SMBus
PATA66MHZ16BITS
TP Connector
Geyser KB /
Connector ODD
Connector
CONNECTOR
INVERTER
Yukon Power
PCI
FW
SMS
Fan
ConnectorsPWM/Tach
SMC SMBus
DDR2 SO-DIMM B
Battery SMBus
Analog
SMBus x5
H8S/2116
GPU
128MB/256MB
Frame Buffer
ENET
DVI-I/DL Connector
P.10
P.7-9
P.11
P.12-20P.30-31P.29
P.28
P.32
P.45
P.36
P.27
P.27
Connectors
Power
P.40Connector
RJ45 (Ethernet)
Supplies
1394a/b (FireWire)
P.42
PHY Power
LPC 33MHZ
SB
ICH7-M
PBUS Supply
Batt Chgr/
PCIe x1
DMI x4
PCIe x16
Port Power
P.43
LVDS Graphics
Dual-Channel TMDS
S-Video/Composite
MUX
PWM
Dual-Channel LVDS
P.79
P.80
P.75-76
P.70-74,77-78
P.81
Camera
P.45
P.48,54
P.56
P.58
P.51-52
P. 60 P.53
P.57
P.59
P.55
P.48
P.69
P.61-68,71
051-7164
872
03001
System Block DiagramSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PPBUS_G3H_B
12.6V - 9V
PPBUS_G3H_A
PP1V8_S3
1.8V
Q7615
U8000ENABLE
(LT3470)
SMC_PM_G2_ENABLE
U7900
3.3V
PPVCORE_S0_GPU
PP2V5_S3
PGOOD
IMVP_PWRGD_IN
PPDCIN_G3H
U7530 PP3V3_S5
PP1V05_S0
1.05V
PM_SLP_S3_L
PP3V42_G3H
Q7845
ENABLES
PPVCORE_S0_CPU
NC
U7750
Q7770
Q7720
"IMVP6"
PGOOD
RSMRST_PWRGD
3.3V
PP3V3_S3
Q7610
LIO Power
J5500
Inverter
Connector
PM_SLP_S3_LS5V
PPBUS_S5_FWPORT
12.6V - 9V
FWPWR_EN
5V/1.5V
U8500
PP3V3_S0
NC
1.5V
PGOOD
S5
3.3V
ENABLE
?V
PGOOD
1.05V
U7950
1.2V - 1.0VS0
GPU VCore
ENABLE
3.3V
NC
(LTC3412)
S3
PGOOD
1.2V
ENABLE
1.2V
PP1V2_S3
2.5V
PP2V5_S0
2.5V
PGOOD
U7700
PP5V_S0
5.0V
PP5V_S3
PP1V5_S0
5.0V
PP5V_S5
NC
(LTC3728)
PGOOD
ENABLESU76005
V
1.5V
SMC_PM_G2_ENABLE
VR_PWRGOOD_DELAY
S0CPU VCore
IMVP_VR_ON
S0
PM_SLP_S3_L
PM_SLP_S4_LS5V
PM_SLP_S3_LS5V
PM_SLP_S3_LS5V_L
ENABLE
ENABLE
NC
1.8V
U7800
S3
ENABLE
PGOOD
PM_SLP_S3_L
U3100
0.9V (Vtt)
S0PP0V9_S0
0.9V
Q4565
PP1V2_S0
1.2V
PM_SLP_S3_LS5V_L
PM_SLP_S3_LS5V_L
PP1V8_S0
1.8V
5.0V
3.425VG3Hot
3.425
12.6V - 9V
Connector
PM_SLP_S4_L
IMVP_PWRGD_IN/ALL_SYS_PWRGD
PM_SLP_S3_L
PM_SLP_S4_LS5V
Q7945
Q7947
18.5V - 9VConnector
J8290
MLB DC in
J8290
(ISL9504)
(TPS5117RGY)
(TPS51100)
(ISL6269B)
(ISL6269B)
(ISL6269B)
S3
S5S0
2.5V
ENABLE
(TPS62510)
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
Power Block Diagram
051-7164 03001
873
www.vinafix.vn
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_ALT_ITEM
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_ALT_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
SMC_TPM_PPSMC_TPM_GPIO1SMC_TPM_GPIO2Extra TPM options:
IS
BAR CODE LABELS / EEE #’S
MODULE PARTS
ALTERNATE PARTS
TRUCKEE,2.16GHZ,B2,256VRAM,SAM,M57 VRAM_256SAM,M57_COMMON,CPU_2_16GHZ_B2,EEE_WJH630-7812
VRAM_256SAM,M57_COMMON,CPU_2_33GHZ_B2,EEE_WJKTRUCKEE,2.33GHZ,B2,256VRAM,SAM,M57630-7814
TRUCKEE,2.33GHZ,B2,256VRAM,INF,M57 VRAM_256INF,M57_COMMON,CPU_2_33GHZ_B2,EEE_WJL630-7815
TRUCKEE,2.16GHZ,B2,256VRAM,INF,M57 VRAM_256INF,M57_COMMON,CPU_2_16GHZ_B2,EEE_WJJ630-7813
333S0377 VRAM_256_INFINEONCRITICALU8900,U8950,U9000,U90504 IC,SGRAM,GDDR3,16MX32,600MHZ,136 FBGA
1.86 MAX ALT TO 1.9 MAX128S0083 128S0073 C2516
330UF,2V,9MOHM,D2128S0094 128S0060 ALL
128S0060128S0095 ALL 330UF,2V,6MOHM,D2
ALL Screened ISL6262 for ISL9504353S1465 353S1461
Alternates for E&E Magnetics, TDK157S0111157S0030 ALL
152S0287 Alternates for Coilcraft MSS5131ALL152S0435
KEMET IS ALT TO SANYO128S0092 ALL128S0093 SYNC_MASTER=(MASTER)
4
051-7164
SYNC_DATE=(MASTER)
87
03001
BOM CONFIGURATIONSi7806ADN for FDM6296376S0448 ALL376S0445
IC,ATI,M56P,GRPHSCTRL,880BGA,LF U84001 CRITICAL338S0368
U8900,U8950,U9000,U9050 VRAM_256_HYNIX333S0351 4 CRITICALIC,SGRAM,GDDR3,16MX32,700MHZ,136 FBGA
U8900,U8950,U9000,U9050 VRAM_128_INFINEONCRITICAL333S0376 4 IC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA
128S0061 ALL 150UF,6.3V,25MOHM,C2128S0081
U8900,U8950,U9000,U9050 VRAM_128_HYNIX4333S0358 CRITICALIC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA
U8900,U8950,U9000,U9050333S0354 4 CRITICAL VRAM_128_SAMSUNGIC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA
EEE_WJL[EEE:WDV]LBL,P/N LABEL,PCB,28MM X 6 MM1826-4393 CRITICAL
EEE_WJK[EEE:W3A] CRITICAL1826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM
LBL,P/N LABEL,PCB,28MM X 6 MM826-4393 1 CRITICAL[EEE:W3A] EEE_WJH
1826-4393 CRITICAL[EEE:W9J]LBL,P/N LABEL,PCB,28MM X 6 MM EEE_WJJ
NO_3GM57_NO_3G
M57_3G 3G
M57_DEBUG ITP,ITPCONN,LPCPLUS
M57_COMMON4 BOOTROM_DEVEL,SMC_PRGRM
M57_COMMON3 LVDS_PD,FW_PORT_FAULT_PU
KBDLED_HAS,MEMVREF_S3,MEMVTT_EN_PU,RTUSB_ESD,USB_C_OC_PU,USB_D_OC_PU,USB_E_OC_PUM57_COMMON2
GPU_MEM_NOT_SAM,GPU_MEM_256M,VRAM_256_INFINEONVRAM_256INF
GPU_MEM_NOT_SAM,VRAM_128_INFINEONVRAM_128INF
GPU_MEM_256M,VRAM_256_SAMSUNGVRAM_256SAM
VRAM_128_SAMSUNGVRAM_128SAM
M57_COMMON1 ENET_LOWPWR_EN,ENETPWR_S3AC,GPU_BB_CTL
M57_TPM TPM
ALTERNATE,COMMON,M57_COMMON1,M57_COMMON2,M57_COMMON3,M57_COMMON4,M57_DEBUG,ISL6255A,M57_NO_3GM57_COMMON
IC,ICH7M,BGA U2100 CRITICAL343S0385 1
IC,945GM,NORTHBRIDGE U1200 CRITICAL338S0269 1
IC, TPM, 28-PIN TSSOP TPM1341S1789 U6700 CRITICAL
IC,MDC,B2,PRQ,2.16GHZ,34W,667M,4M,479 BGA337S3391 CRITICALU07001 CPU_2_16GHZ_B2
IC,MDC,B2,PRQ,2.33GHZ,34W,667M,4M,479 BGA CPU_2_33GHZ_B2CRITICALU07001337S3393
IC,88E8053,GIGABIT ENET XCVR,64P QFN, NO338S0270 1 U4101 CRITICAL
IC,SMC,HS8/21161338S0274 U5800 SMC_BLANKCRITICAL
IC,PRGRM,SMC(NEW),M571 U5800 CRITICAL341S1931 SMC_PRGRM
335S0384 1 CRITICAL BOOTROM_BLANKIC,16MBIT 8-PIN SPI SERIAL FLASH,SOIC8 U6301
353S1461 U75301 CRITICALIC,ISL9504,SYNC REG CTL,QFN 48
U3301359S0109 CRITICAL1 IC,LOW POWER CLOCK SYNTHESIZER,68PIN
1341S1924 BOOTROM_DEVELCRITICALIC, BOOTROM, DEVELOPMENT, UNLOCKED ,M57 U6301
1 IC,EEPROM,SERIAL IIC,8KBIT,SO8341S1797 U4102 CRITICAL
U8900,U8950,U9000,U9050IC,SGRAM,GDDR3,16MX32,700MHZ,136 FBGA333S0350 VRAM_256_SAMSUNGCRITICAL4
341S1925 1 BOOTROM_FINALCRITICALIC, BOOTROM, FINAL, LOCKED, M57 U6301
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
FUNC_TEST
FUNC_TEST
FUNC_TEST
SMC TPs
Thermal Sensors
Left I/O Data Connector
FUNC_TEST
LPC+ Debug Connector
FUNC_TEST
(=PP2V5_S3_ENET)(=PP3V3_S3_ENET)(=PP1V2_S3_ENET)
FUNC_TEST
MAC-1 TPsFUNC_TEST
Fan Connectors
FUNC_TEST
Battery Connector
Functional Test Points
FUNC_TEST
(=PP3V3_S0_CK410)
Power NetsFUNC_TEST
Characterization TPs
Request for at least 10 GND TPs
Request for at least 10 GND test points
FUNC_TEST
Resistor Calibration
Left I/O Power Connector
FUNC_TEST
Request for at least 2 GND TPs per resistor
Camera Connector
Inverter Connector
Misc EXPOSED_VIA Nets
CPU FSB NO_TESTs
Misc NO_TESTs
EXPOSED_VIANO_TEST
EXPOSED_VIA
NO_TEST
EXPOSED_VIANO_TEST
Power Supply NO_TESTs
EXPOSED_VIA property indicates that the net
should have a via with 10-mil soldermask
opening for use as engineering probe point.
EXPOSED_VIA
I134
I135
I138
I139
I140
I141
I142
I143
I164
I165
I166
I167
I168
I169
I172
I173
I174
I175
I176
I177
I178
I179
I182
I183
I184
I185
I186
I187
I188
I189
I190
I191
I192
I193
I194
I195
I197
I198
I199
I200
I201
I202
I203
I204
I205
I206
I207
I208
I209
I210
I211
I212
I213
I214
I215
I216
I217
I218
I219
I220
I221
I222
I223
I224
I225
I227
I228
I229
I230
I231
I232
I233
I234
I235
I236
I237
I238
I239
I240
I241
I242
I243
I244
I245
I246
I247
I248
I249
I250
I251
I252
I253
I254
I255
I256
I257
I258
I259
I260
I261
I262
I263
I264
I267
I269
I273
I275
I276
I277
I278
I279
I280
I281
I282
I283
I285
I286
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
051-7164 03001
875
Functional / ICT Test
TRUE USB2_CAMERA_P_F
TRUE USB2_CAMERA_N_F
TRUE TP_FW_CTL<0>
TRUE USB_BT_N
GPUBBP_ADJTRUE
P3V42G3H_FBTRUE
P1V05S0_FSETTRUE
TRUE P3V3S5_FSETTRUE P3V3S5_COMP
TRUE P5VS5_RUNSS
IMVP6_RBIASTRUE
GPUVCORE_COMPTRUE
TRUE P2V5S3_SHDNRT
TRUE P1V2S3_RTP1V2S3_RUNSSTRUE
P1V8S3_COMPTRUE
TRUE P2V5S3_MODE
P1V05S0_COMPTRUE
TRUE GPUVCORE_FSET
P1V8S3_FSETTRUE
TRUE P1V5S0_RUNSS
TRUE USB_BT_P
TRUE SB_CLK100M_SATA_P
TRUE SB_CLK100M_SATA_N
DMI_N2S_N<1..0>TRUETRUE DMI_N2S_P<1..0>
TRUE FSB_REQ_L<4..0>FSB_LOCK_LTRUE
TRUE FSB_HITM_LFSB_HIT_LTRUE
TRUE TRUE FSB_DSTBP_L<3..0>FSB_DSTBN_L<3..0>TRUE TRUE
FSB_DRDY_LTRUETRUE TRUE FSB_DINV_L<3..0>
FSB_DBSY_LTRUETRUE FSB_D_L<63..0>
TRUE FSB_BNR_L
TRUE FSB_BREQ0_L
TRUE FSB_ADSTB_L<1..0>TRUETRUE FSB_ADS_LTRUE FSB_A_L<31..3>
TRUE PP5V_S0_ISENSECAL
TRUE PPVCORE_D3C_GPU
TRUE GND
PP5V_S3_CAMERA_FTRUE
GND_CHASSIS_INVERTERTRUETRUE PPBUS_S0_INVERTER
PP5V_INVERTER_SWTRUEINVERTER_PWMTRUEGND_CHASSIS_INVERTERTRUE
TRUE PPVCORE_S0_CPUPP1V05_S0TRUE
PP1V8_S3TRUE
TRUE PP5V_S3
TRUE USB2_CAMERA_N
TRUE USB2_CAMERA_P
PM_SUS_STAT_LTRUESMC_TDITRUESMC_TCKTRUESMC_RST_LTRUE
TRUE SMC_NMI
TRUE SMC_RX_L
TRUE SV_SET_UP
TRUE ISENSE_CAL_EN
TRUE PCIE_WAKE_L
TRUE SMC_BC_ACOK
SMBUS_SMC_A_S3_SDATRUE
TRUE ACZ_SDATAIN<0>ACZ_SDATAOUTTRUE
LT2USB_OC_LTRUEPM_SLP_S3_LS5VTRUEPM_SLP_S4_LTRUESYS_ONEWIRETRUEMINI_CLKREQ_LTRUESMC_EXCARD_CPTRUE
TRUE EXCARD_CLKREQ_L
LIO_PLT_RESET_LTRUEACZ_SYNCTRUEUSB2_LT_NTRUEUSB2_LT_PTRUE
TRUE USB2_EXCARD_NUSB2_EXCARD_PTRUE
TRUE PCIE_EXCARD_R2D_C_N
TRUE PCIE_EXCARD_D2R_N
PCIE_CLK100M_EXCARD_PTRUEPCIE_CLK100M_EXCARD_NTRUE
PCIE_MINI_R2D_C_NTRUE
USB2_LT2_PTRUE
ACZ_RST_LTRUEEXCARD_OC_LTRUELTUSB_OC_LTRUE
TRUE SMC_EXCARD_PWR_EN
TRUE PM_DPRSLPVR
TRUE GND
TRUE IMVP_VR_ON
TRUE PM_SLP_S3BATT
PM_SLP_S5_LTRUEP1V5P1V05S0_PGOODTRUE
FSB_CLK_CPU_PTRUE
CPU_STPCLK_LTRUEFSB_CLK_NB_PTRUE
PLT_RST_LTRUE
PP1V8_S3TRUEPP1V8_D3CTRUE
PP3V3_S5TRUEPP5V_S0TRUEPP5V_S3TRUEPP5V_S5TRUEPPBUS_G3HTRUE
TRUE PP3V3_S3
PP1V05_S0TRUE
PP1V2_S3TRUE
PP1V5_S0_NBTRUE
PP1V5_S0TRUE
PP1V2_D3CTRUE
PP0V9_S0TRUE
TRUE FSB_SLPCPU_L
PP2V5_S0TRUE
TRUE FAN_LT_PWMFAN_LT_TACHTRUE
FAN_RT_PWMTRUE
TRUE PM_CLKRUN_L
TRUE SMC_TMS
TRUE DEBUG_RST_L
TRUE SMC_TRST_L
TRUE SMC_TDOSMC_MD1TRUE
TRUE SMC_TX_L
PCI_CLK_PORT80_LPCTRUE
PP3V3_FWPHYTRUEPP3V3_FWPHY_AVDDTRUE
TRUE PP3V3_FWPHY_PLLVDDPP1V95_FWPHYTRUEPP1V95_FWPHY_PLLVDDTRUEPP1V2_S3TRUEPP3V3_S3ACTRUE
TRUE BATT_POS
TRUE SMBUS_SMC_BSA_SCL
PP5V_S0TRUE
SMC_BS_ALRT_LTRUE
TRUE SMBUS_SMC_BSA_SDA
PP2V5_D3CTRUEPP3V3_S0TRUE
TRUE INT_SERIRQ
TRUE FWH_INIT_L
TRUE LPC_AD<3>TRUE LPC_AD<2>
IMVP_DPRSLPVRTRUE
PM_SLP_S4_LTRUE
CPU_DPRSTP_LTRUE
FSB_CLK_CPU_NTRUE
TRUE TPM_LRESET_L
FSB_CLK_NB_NTRUETRUE CLK_NB_OE_L
TRUE NB_CLK100M_GCLKIN_P
TRUE NB_CLK100M_GCLKIN_N
TRUE NB_CLK_DREFCLKIN_P
TRUE NB_CLK_DREFCLKIN_N
TRUE NB_CLK_DREFSSCLKIN_NTRUE NB_CLK_DREFSSCLKIN_P
TRUE CPU_THERMTRIP_R
TRUE TP_SB_SUS_CLK
TRUE TP_CPU_CPUSLP_L
TRUE CPU_DPSLP_L
TRUE PM_LAN_ENABLE
TRUE PCI_RST_L
TRUE PM_SB_PWROKTRUE PM_RSMRST_L
TRUE SB_RTC_RST_L
TRUE PM_STPCPU_L
TRUE PM_STPPCI_L
TRUE VR_PWRGD_CK410
TRUE VR_PWRGOOD_DELAY
TRUE FSB_CPURST_L
TRUE FSB_DPWR_L
TRUE NB_SB_SYNC_L
TRUE CPU_PWRGD
TRUE PP2V5_S0_GPU_TPVDD
TRUE PP2V5_S0_GPU_TXVDDR
TRUE PP2V5_S0_GPU_AVDD
TRUE PP2V5_S0_GPU_A2VDD
TRUE PP2V5_S0_GPU_LPVDD
TRUE PP2V5_S0_GPU_LVDDRPP3V3_S0TRUE
PP3V3_S0_CK410_VDD_REFTRUE
TRUE PP3V3_S0_CK410_VDD48
TRUE PP3V3_S0_CK410_VDD_PCI
TRUE PP3V3_S0_CK410_VDD_CPU_SRC
PM_SLP_S3_LTRUE
TRUE PP3V3_S0_CK410_VDDA
PP2V5_S3_ENET_AVDDTRUE
PP2V5_S3TRUE
PEG_RESET_LTRUETRUE PLT_RST_L
TRUE IMVP6_VID<6..0>
SMC_LRESET_LTRUE
GNDTRUE
TRUE BATT_NEG
FAN_RT_TACHTRUE
TRUE ALS_GAIN
PCIE_EXCARD_D2R_PTRUE
TRUE USB2_LT2_N
PCIE_MINI_D2R_PTRUE
TRUE PP18V5_DCIN
TRUE PPBUS_G3H
TRUE PP1V5_S0
RSFSTHMSNS_D_PTRUE
TRUE HSTHMSNS_DX_P
TRUE HSTHMSNS_DX_N
RSFSTHMSNS_D_NTRUE
TRUE SMC_ONOFF_LTRUE PM_SYSRST_L
PP5V_S0TRUE
PP3V42_G3HTRUE
LPC_AD<0>TRUELPC_AD<1>TRUELPC_FRAME_LTRUE
TRUE BOOT_LPC_SPI_L
TRUE SMBUS_SMC_A_S3_SCL
SMBUS_SB_SDATRUE
SMBUS_SB_SCLTRUE
TRUE PCIE_EXCARD_R2D_C_P
TRUE LTALS_OUT
ACZ_BITCLKTRUE
PCIE_MINI_R2D_C_PTRUE
PCIE_CLK100M_MINI_PTRUEPCIE_CLK100M_MINI_NTRUE
PCIE_MINI_D2R_NTRUE
82D5 82C6 82B3 82A4
79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6
66B5 66B1 65D6 65B3 62A6
61D8 61A5 60D4 60C7 58C7 58C4 57B6 54D4
54B5 52D3 49C7 49C4 49B5
40B6 36D6 34A8 33D8 33D3 33C7
29A6 29A3
67D8
67D8
28A6
67D6
67D6
27D8
65A2
65A2
27D5
55A4
55A4
27D3
34C8
34C8
27C3
34C6
34C6
26D1
34B8
34B8
26B8
25D3
25D3
26B6
25C4
79D5
25C4
26B4
24D3
67D5
24D3
25D8
24C3
67D3
24C3
25D3
21C1
67C3
21C1
25C6
19D7
66C5
19D7
25C4
81D4
19D6
65D8
19D6
81B3
25B8
81B3
69C8
19D5
65D2
19D5
67C8
80B5
25B4
80B5
69B8
19D2
65D1
19D2
67C6
80A1
25A4
67C8
80A1
69A8
19D1
65C8
79B7
19D1
67B6
79B8
24D3
79B7
67C6
79B8
68B8
19C8
67B8
63D8
71D7
19C8
62A7
71A6
24C3
71D7
66C5 71A6
67D5
17D6
67B6
56D4
71D7
69C1
17D6
19D7
67B3
24B5
69C1
62C1 67B3
67D3
17D3
64C1
26C5
67C3
68D5
17D3
19D6
67B1
24B3
68D5
62A8 67B1
66D2
16D3
64A6
25D2
67C1
67C3
16D3
19D5
82D3
67A1
23D5
67C3
48B6
67A1
66C8
16C8
37B2
82D7
25C8
67B1
67C1
16C8
19D2
82C5
66B5
23B3
67C1
25D6
66B5
66A8
13B5
32C6
76D8
25B6
66D8
65D6
13B5
19D1
67B6
62B1
22B5
65D6
25C8
62B1
53C4
81C3
81C3
12C2
66B8
82A4
31C5
76D5
24C3
66B8
65B7
12C2
19C5
67A8
61D7
66B8
21D3
66C8
82A4
65B7
25C6 61D7
52D7
48B3
48B3
12B7
66A6
79A8
29D6
75D8
24B3
65D6
64D7
12B7
19C4
67A6
58C7
66A6
21C3
66C6
79A8
64D7
25C2 58C7
52B7
46B6
46B6
12A7
64C8
26C3
29D3
75D5
24A5
65B7
64A6
12A7
19C1
66B5
44B8
67D3
58C4
64C8
20B4
66B6
26C3
64A6
25B6 58C4
52B5
33B6
33B6
87D6
77A7
67D3
11C5
81C6
51C5
26C1
29B2
73B8
23D8
81C6
64C8
62D7
11C5
19B8
63D1
44A8
67D1
57B5
51C5
20A4
65B8
26C1
62D7
25B2
57B5
52B1
29A6
29A6
12D6
72D8
79A6
79A6
67D1
11B3
81C4
81C3
48C3
26B1
28D6
73B5
23D4
81C4
62C8
61D7
11B3
19B5
19D7
43B8
41C4
55A8
82D7
48C3
19C7
55C3
26B1
61D7
25A8
55A8
51D4
28A6
28A6
87D6
87D6
87D6
12C6
71C1
79A5
79A5
61D1
9B7
67B3
51B5
66C7
47C7
52B3
26A4
28D3
73A8
23D1
67B3
62B6
61D4
9B7
67D8
19A5
19C5
42C4
42C1
67D8
39D8
53C4
78C8
47C7
19C6
51C5
67B8
26A4
61D4
24B5
53C4
51D3
81C3
27D8 27D8
81A4
81A4
12B4
12B4
12B4
12B6
87D6
71B7
45C5
45C5
55D7
8C7
67B1
45C3
45B3
60C6
53B5
69A6
48B6
48C3
66C6
41B6
48C6
48C6
48C6
48C6
50B6
48C6
48C3
48C3
66B5
22A6
28B2
73A5
23B7
67B1
62B2
55D3
8C7
67D6
17C6
19A8
53B4
38D7
38D5
67D6
39D6
68B2
36D6
68B2
77C6
53C5
41B6
17C6
43C8
67B6
22A6
50C6
48C6
50C6
55D3
24A5 36D6
51C2
51B5
27D7
27D7
50C6
22C2
22C2
34C5
34C5
87D6
7C4
7C4
7C4
7C4
87C6
12D4
67A8
45B5
45B5
55A6
7D5
62A2
22C2
22C2
53B5
52B3
68A6
27C6
22D8
62B3
23C3
48C3
48C3
22C2
22C2
22C2
22C2
50B5
48B6
48B6
22C2
22D8
22D8
87C6
66B3
34D5
34D5
14B7
19D7
72B8
23A7
62A2
62A4
43D8
7D5
63B3
17B6
19A6
60C6
52B3
38B5
38B2
63B3
39B8
51B5
31C5
51B5
77A8
60C6
52D5
60C6
60C6 23C3
34D5
34D5
34C5
34C5
34B5
34B5
87D6
14D6
42A8
63D4
14B7
50C5
22C2
50C5
43D8
24A3
81C4
31C5
47B5
60C6
60C6
60C6
48B6
27D6
27D6
48C6
48C6
50C5
6C3
6C3
34C3
34C3
12B4
87D6
87D6
87D6
7C3
7C3
87D6
7C3
87D6
7C3
87D6
87D6
12C4
87D6
12C4
67A6
6A8
6A8
9D7
7B6
52B8
6D3
6D3
52A2
53B5
53B5
53B5
52B2
53B5
48C3
52A2
27C5
87B4
87B4
22C4
48C3
6A2
52B2
34A4
52A2
34A4
87B4
6D3
6D3
6C3
6C3
50C6
50B3
34C5
34B5
50C6
6C3
87B4
22C4
22C4
61C8
52A2
66B2
34D3
87C6
34D3
6C7
16B6
67B8
22D8
52B8
52B5
42B8
7B6
39D7
16D1
19A4
53C4
53B4
53B4
52B2
6C6
6C6
39D7
39B5
69B1
27C3
25D8
68B2
27C3
67A8
53C5
52D3
53C5
53C5 6A2
61C7
34D3
34D3
34C4
34C4
34B4
34B4
34B4
34B4
23C3
87C6
61C7
12C4
87D6
87C6
14C7
39C8
63D3
6C7
51B5
50C3
6C3
50C3
42B8
9B7
52C6
51B7
25D8
35B7
53C4
53C4
53C4
53B4
27C6
27C6
27C6
50C6
87B4
50C6
34D5
34D5
50C3
6C2
66A6
63B7
66C6
6C2
33B4
33B4
22D2
22D2
12A4
12B4
12B4
12B4
7B4
7B4
12B4
7B4
12B4
7B4
12C4
12C4
7D8
12C4
7D8
55C7
6A6
6A6
8D7
7B5
45C3
6D2
6D2
51C5
52B2
52B2
52D6
53B5
51C7
23C3
55A8
39C6
51C5
27C3
48B3
48B3
6C3
6A2
6A1
51B7
34A3
51B7
34A3
48C3
48B3
6D2
6D2
6C2
6C2
50C5
48B6
34C3
34B3
50C5
6C2
48B3
6C3
6D3
51B7
23C3
61C7
51C5
65B8
33C4
21C4
33C4
6C6
14C2
67B6
22C6
45C3
47C7
41C6
7B5
39A8
13D2
12A4
17D6
51C5
52B2
53B4
53B4
52B2
53B4
51C7
53C5
6C5
6C5
39A8
39B4
68A2
27C2
5D4
52B2
27C2
67A6
51C7
51D5
51C7
51C7
87C6
6A1
21C4
33C4
60B7
33C4
33B4
33B4
33B4
34B2
34B2
33B4
33B4
6C7
21C4
51D7
37C2
26A6
51D7
26D4
33C4
33C4
26B8
26B5
11B5
12B4
22A6
21C4
10C5
32B3
40D5
63C3
70A5
6C6
61C7
51C7
68B2
48C4
48B6
6C2
48C6
68C5
41C6
8B7
52B2
26C5
5D4
27C3
51D7
51D7
51C7
51C7
27C5
27B6
27B6
50C5
57C7
48B3
50C5
34D4
34D4
48C6
45B5
45B5
37C3
6C1
71B7
66C3
65B7
65D6
65C6
62C5
61C7
71C7
63B6
41C4
65A7
71C7
62C4
6C1
21B6
21B6
14B4
14B4
7D8
7D6
7D6
7D6
7B3
7B3
7D6
7B3
7D6
7B3
7D6
7D6
7C8
7D6
7C8
55A5
45C5
5B2
79B5
79B5
79A5
5B2
8B5
5D4
5D4
6D1
6D1
23C5
51B5
51C5
51C3
51C1
47B5
23B6
51B7
23C8
48C3
27B3
21C7
21C7
6C1
6A1
5C4
48C3
33B4
48C3
33B4
26C1
21C7
6D1
6D1
6C1
6C1
48B6
22D4
33B4
33B4
48C6
6C1
21C7
6C1
6D1
48C3
14B7
51D7
41B5
23C3
61C7
7C6
7C8
12A6
5C4
5B2
64A4
11B5
5B2
25C8
5A1
5B2
5A4
13C5
7A3
17C6
58B6
58B6
58B3
23C8
51B5
26B1
51C1
51B5
51C1
47B5
34D6
6C3
38D5
38C6
6C3
38D3
5D4
39A5
68A1
27C1
5D2
51C5
27C1
63C1
23C8
21C4
21D4
21D4
61C7
5C1
7B3
7C6
26B1
12A6
14B6
14C4
14C4
14C4
14C4
14C4
14B4
21C2
6C6
21C4
7B3
23C3
22A6
23C3
23C1
21D6
23C8
23C8
23C5
14B6
7D6
7B3
14B6
7B3
78C7
78C7
78C7
78B7
78B7
78B7
5D4
33C5
23C3
39D5
39D3
26B1
5C4
9C1
26B1
68B1
58B3
6D5
22D4
6C1
22D4
68B8
5C4
5D4
54D5
54C5
54C5
51C5
23C5
5D2
26D6
21D4
21D4
21C5
22B3
27C3
23D5
23D5
48B6
48C3
21C7
48C6
33B4
33B4
22D4
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Chassis connection to be made at the fan cutout near the right ALS. Not stuffed at Proto.
Chassis connection to be made on FW shell
Chassis connection to be made at the mounting hole east of the LVDS connector
Chassis connection to be made at the mounting hole southwest of the USB connector. Plated hole.
USB Port "G" = Bluetooth (M13P)
USB Port "H" = 2nd Left USB 2.0 Port
LVDS Pull Down Aliases
LEFT CLUTCH BARREL CABLING
Inverter PWM Reset Alias
NOTE: NB_CFG<13..12> require test access
FireWire Aliases
Add one through via per hole to GND or 2 blind vias per side per hole to GND
Top CPU TM HoleTop GPU Right TM Hole
Right CPU TM Hole
NOTE: BOM options "USB_G_OC_PU" and"ENET_LOWPWR_EN" are mutually-exclusive.
USB Port "E" = ExpressCard
USB Port "F" = USB 1.1 Hub
USB Port "D" = Camera
USB Port "B" = Trackpad (Geyser)
USB Port "A" (Debug Port) = Right USB 2.0 Port
USB Port "C" = Left USB 2.0 Port
Ethernet Powr Management Support
Lower Left GPU TM Hole
Thermal Module Holes
Frame holes
Left CPU TM Hole
Base net is PM_SLP_S4_L
Base net is PM_SLP_S3_LS5V
Chassis connection to be made at the mounting hole northwest of the DVI connector. Plated hole.
195R106ZT0600
HOLE-VIA-P5RP25ZT0603
1
HOLE-VIA-P5RP25ZT0602
1
0
5%1/16WMF-LF402
R06001 2
402
5%1/16W
0
MF-LF
ENET_LOWPWR_EN
R06901 2
5%1/16W
0
402MF-LF
NO STUFFR06011 2
0G-502620R
EMI-SPRING
NO STUFF
SH06011
402X7R50V10%0.01UFC06131
2
402X7R50V10%0.01UFC06191
2
10%50VX7R402
0.01UFC06151
2
HOLE-VIA-P5RP25ZT0612
1
HOLE-VIA-P5RP25ZT0611
1
HOLE-VIA-P5RP25ZT0610
1
50V10%
0.01UF
X7R402
C0600 1
2
50V
0.01UF10%
X7R402
C0602 1
2
195R106ZT0601
402X7R50V10%0.01UFC06121
2
10%50VX7R402
0.01UFC06141
2
0.01UF10%50VX7R402
C06161
2
0.01UF10%50VX7R402
C06111
2
0.01UF10%50VX7R402
C06101
2
HOLE-VIA-P5RP25ZT0613
1
0.01UF10%50VX7R402
C06181
2
0.01UF10%50VX7R402
C06171
2
HOLE-VIA-P5RP25ZT0614
1
SHLD-SM-LFOG-503040SH0600
1
2
3
HOLE-VIA-P5RP25ZT0604
1MF-LF402
0
1/16W5%
NO STUFFR06021 2
Signal AliasesSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
051-7164 03001
876
VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmGND_CHASSIS_FANFRAME
VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmGND_CHASSIS_DVI_TOP
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
MAKE_BASE=TRUEVOLTAGE=0V
GND_CHASSIS_DVI_BOT
NC_CPU_A34_L
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_A36_LMAKE_BASE=TRUENO_TEST=TRUE
NC_CPU_A37_L
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_APM1_L
NO_TEST=TRUEMAKE_BASE=TRUE
USB_HUB_P
USB_HUB_N
LT2USB_OC_L
USB2_LT2_N
=LVDS_PD_U_CLK_N
=LVDS_PD_U_CLK_P
LVDS_U_DATA_N<0>
=LVDS_PD_U_DATA_N<1>
LVDS_U_CLK_N
MIN_NECK_WIDTH=0.25 mmVOLTAGE=0V
MIN_LINE_WIDTH=0.5 mmGND_CHASSIS_LNDACARD_HOLE GND_CHASSIS_LEFT_DIMM_HOLE
MIN_NECK_WIDTH=0.25 mmVOLTAGE=0V
MIN_LINE_WIDTH=0.5 mm
GND_CHASSIS_ODD_HOLE
MIN_NECK_WIDTH=0.25 mmVOLTAGE=0V
MIN_LINE_WIDTH=0.5 mm
GND_CHASSIS_BATTCONN_HOLEMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0VMAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=0V
GND_CHASSIS_LIOFLEX_HOLE
MIN_NECK_WIDTH=0.25 mm
GND_CHASSIS_BATTCONN_HOLE
PCI_GNT3_LMAKE_BASE=TRUE
MAKE_BASE=TRUEPCI_REQ3_L
LVDS_L_DATA_N<1>MAKE_BASE=TRUE
NC_CPU_A33_LMAKE_BASE=TRUENO_TEST=TRUE
USB_BT_N
USB2_LT2_P
USB2_LT2_N
MAKE_BASE=TRUELT2USB_OC_L
MIN_NECK_WIDTH=0.20 mm
PP3V3_FWPHY
MIN_LINE_WIDTH=0.38 mm
MAKE_BASE=TRUE
VOLTAGE=3.3V
VOLTAGE=1.95VMIN_LINE_WIDTH=0.38 mm
MAKE_BASE=TRUE
PP1V95_FWPHY
MIN_NECK_WIDTH=0.25 mm
NC_CPU_SPARE4MAKE_BASE=TRUENO_TEST=TRUE
MAKE_BASE=TRUEPPFW_PORTB_VP_UF
PP1V95_FWPHY
SMC_RSTGATE_L
=FW_PCI_IDSEL
PCI_GNT3_L
PCI_REQ3_L
NC_CPU_EXTBREF
NB_CFG<6>
NB_CFG<4..3>
ALS_GAIN
NC_CPU_APM0_LMAKE_BASE=TRUENO_TEST=TRUE
NC_CPU_A39_L
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_A38_L
NC_CPU_A35_L
NC_CPU_A34_L
PP3V3_FWPHY
MAKE_BASE=TRUESMC_RSTGATE_L
PP1V95_FWPHY
PP3V3_FWPHY
PP3V3_FWPHY
PP3V3_FWPHY
PP3V3_FWPHY
PP3V3_FWPHY
PPFW_PORTB_VP_UF
ENET_LOWPWR_EN
MAKE_BASE=TRUENO_TEST=TRUE
NC_ENET_CTRL12 NC_ENET_CTRL12
MAKE_BASE=TRUENO_TEST=TRUE
NC_ENET_CTRL25
RTALS_GAINMAKE_BASE=TRUE
RTALS_GAIN
NC_CPU_SPARE0NC_CPU_SPARE0
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_HFPLLMAKE_BASE=TRUENO_TEST=TRUE
NC_CPU_SPARE2
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_SPARE2
NC_CPU_SPARE1
NC_CPU_EXTBREF
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_A38_L
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_SPARE1
NO_TEST=TRUEMAKE_BASE=TRUE
NC_CPU_SPARE4
MEM_B_A<15..14>
NB_CFG<15..14>
NB_CFG<8>
MEM_A_A<15..14>NC_CPU_A32_LMAKE_BASE=TRUENO_TEST=TRUE
PP1V95_FWPHY
NB_CFG<13..12>
MAKE_BASE=TRUEPCI_AD<19>
NB_CFG<17>
NC_CPU_HFPLL
NC_CPU_A32_L
MAKE_BASE=TRUENO_TEST=TRUE
NC_MEM_B_A<15..14>
MAKE_BASE=TRUETP_NB_CFG<4..3>
NO_TEST=TRUEMAKE_BASE=TRUE
NC_MEM_A_A<15..14>
SB_GPIO30
USB2_RT_PUSB2_RT_PMAKE_BASE=TRUE
USB2_RT_P
USB2_RT_N
RTUSB_OC_L
USB_TRACKPAD_N
USB_TRACKPAD_P
UNUSED_USB_B_OC_LMAKE_BASE=TRUE
UNUSED_USB_B_OC_L
USB2_LT_P
USB2_LT_N
LTUSB_OC_LMAKE_BASE=TRUE
LTUSB_OC_L
USB2_CAMERA_P
MAKE_BASE=TRUEUSB2_RT_NUSB2_RT_N
RTUSB_OC_LMAKE_BASE=TRUE
RTUSB_OC_L
MAKE_BASE=TRUEUSB_TRACKPAD_PUSB_TRACKPAD_P
MAKE_BASE=TRUEUSB_TRACKPAD_NUSB_TRACKPAD_N
USB2_LT_PMAKE_BASE=TRUE
USB2_LT_P
MAKE_BASE=TRUEUSB2_LT_NUSB2_LT_N
USB2_CAMERA_PMAKE_BASE=TRUE
USB2_CAMERA_P
UNUSED_USB_D_OC_LUNUSED_USB_D_OC_LMAKE_BASE=TRUE
USB2_CAMERA_N
USB2_EXCARD_N
USB2_EXCARD_P
EXCARD_OC_LEXCARD_OC_LMAKE_BASE=TRUE
USB_BT_P
USB_BT_N
USB2_CAMERA_NMAKE_BASE=TRUE
USB2_CAMERA_N
MAKE_BASE=TRUEUSB2_EXCARD_PUSB2_EXCARD_P
MAKE_BASE=TRUEUSB2_EXCARD_N
USB_BT_P
USB_BT_NMAKE_BASE=TRUE
USB2_LT2_PMAKE_BASE=TRUEUSB2_LT2_P
LVDS_L_DATA_P<1>MAKE_BASE=TRUE
=LVDS_PD_L_CLK_N
=LVDS_PD_L_CLK_P
MAKE_BASE=TRUELVDS_L_DATA_P<0>LVDS_L_DATA_P<0>
LVDS_L_DATA_N<0>MAKE_BASE=TRUE
LVDS_L_DATA_N<0>
MAKE_BASE=TRUELVDS_L_CLK_NLVDS_L_CLK_N
MAKE_BASE=TRUELVDS_L_CLK_PLVDS_L_CLK_P
LVDS_L_DATA_N<2>MAKE_BASE=TRUE
=LVDS_PD_L_DATA_P<2>
LVDS_L_DATA_P<2>MAKE_BASE=TRUE
=LVDS_PD_L_DATA_N<2>
MAKE_BASE=TRUELVDS_U_DATA_N<1>
MAKE_BASE=TRUELVDS_U_DATA_P<1>
MAKE_BASE=TRUELVDS_U_DATA_N<0>
LVDS_U_DATA_P<0>MAKE_BASE=TRUE
LVDS_U_DATA_P<0>
MAKE_BASE=TRUELVDS_U_DATA_P<2>=LVDS_PD_U_DATA_P<1>
LVDS_U_DATA_N<2>MAKE_BASE=TRUE
MAKE_BASE=TRUELVDS_U_CLK_N
LVDS_U_CLK_PMAKE_BASE=TRUE
LVDS_U_CLK_P
PM_SLP_S4_LPM_SLP_S4_L
PM_SLP_S3_LS5VPM_SLP_S3_LS5V
USB_HUB_P USB_HUB_PMAKE_BASE=TRUE
TP_USB2_3G_N
USB_HUB_N
USB2_EXCARD_N
TP_USB2_3G_P
NC_ENET_CTRL25
PPFW_PORTA_VP_UFMAKE_BASE=TRUE
PPFW_PORTA_VP_UF
NC_CPU_A36_L
NC_CPU_A33_L
GND_CHASSIS_INVERTER
NC_CPU_A39_L
TP_SB_SUS_CLK
MAKE_BASE=TRUETP_NB_CFG<13..12>
NB_CFG<11..10>
MAKE_BASE=TRUETP_SB_SUS_CLK
MAKE_BASE=TRUETP_NB_CFG<17>
MAKE_BASE=TRUETP_NB_CFG<15..14>
MAKE_BASE=TRUETP_NB_CFG<11..10>
MAKE_BASE=TRUETP_NB_CFG<8>
MAKE_BASE=TRUETP_NB_CFG<6>
PLT_RST_LPLT_RST_L
NC_CPU_APM1_L
NC_CPU_APM0_L
NC_CPU_A35_L
NO_TEST=TRUEMAKE_BASE=TRUE
TP_USB2_3G_NMAKE_BASE=TRUE
TP_USB2_3G_PMAKE_BASE=TRUE
MAKE_BASE=TRUEUSB2_LT2_N
MAKE_BASE=TRUEUSB_BT_P
USB_HUB_NMAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mm
MAKE_BASE=TRUEVOLTAGE=0VMIN_NECK_WIDTH=0.25 mm
GND_CHASSIS_INVERTERGND_CHASSIS_INVERTERGND_CHASSIS_INVERTER
NC_CPU_A37_L
GND_CHASSIS_INVERTER
GND
MIN_LINE_WIDTH=0.5 mmGND_CHASSIS_USB
MAKE_BASE=TRUEVOLTAGE=0VMIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUE
GND_CHASSIS_LVDS
MIN_NECK_WIDTH=0.25 mmVOLTAGE=0V
MIN_LINE_WIDTH=0.5 mm
GND_CHASSIS_USBGND_CHASSIS_USBGND_CHASSIS_USB
GND_CHASSIS_LVDSGND_CHASSIS_LVDS
GND_CHASSIS_LVDSGND_CHASSIS_LVDS
GND_CHASSIS_ENETGND_CHASSIS_ENETGND_CHASSIS_ENET
GND_CHASSIS_DVI_BOTGND_CHASSIS_DVI_BOT
GND_CHASSIS_DVI_TOPGND_CHASSIS_DVI_TOP
GND_CHASSIS_ENET
VOLTAGE=0VMAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
66B8 66B8
44B8
44B8
44B8
44B8
44B8
44B8
66A6 66A6
82A4 82A4
44A8 44B8
44A8
44A8
44A8
44A8
44A8
64C8 64C8
79A8 79A8
43B8 44A8
43B8
43B8
43B8
43B8
43B8
51C5 51C5
26C3 26C3
42C4
42C1
42C1
43B8
42C1
42C4
42C4
42C4
42C4
42C4
48C3 48C3
79A6
26C1 26C1
79A6
79A6
79A6
38D7
38D5
38D5
42C4
38D5
38D7
38D7
38D7
38D7
38D7
42C1
47C5
48C6
48C6
45B3
52B3 52B3
45C3
48C6
48C6
81A4
48C6
47C7 47C7
66C7 66C7
46B7
79A5
26B1 26B1
48C6
81A4
46B3
79A6
79A5
79A5
79A5
79D3
79D3
79D3
79D3
46B7
46B3
48C3
48C6
82C8
82C3
81A4
48C6
48C6
48C3
38B5
38B2
38B2
38D7
38B2
38B5
38B5
38B5
38B5
38B5
38D5
47B5
47C5
48C6
48C6
48C3 48C3
45B3
47B5
22D8 47C5
81C4
81C4
22C2 48C6
22C2 48C6
22C2 45B3
45C3
48C6
48C6
48C3 48C3
81A4
81A4
22C2 45C3
22C2 48C6
22C2
81A4
22C2
48C6 22C2
82D8 82D8
82D8 82D8
82D8 82D8
82C8 82C8
82C8
82C8 82C8
82C3
82C3 82C3
41B6 41B6
66C6 66C6
46B3
48C6
45C5
26A4 26A4
22C2
22C2
46A7
79A5
45C5
45C5
45C5
79D3
47B2
47B2
47B2
79D2
79D2
79D2
79D2
44C1
44C1
44C1
80B5
46B3
46A7
22D8
22C2
82C3
82B8
37D3
22C2
22C2
22C2
22D8
6C6
6C6
6C6
37D3
38B5
6C6
6C6
6C6
6C6
6C6
6C6
38B2
47B5 22C2
47B5
47B5
22D8
81C4
81C4
22C2
22C2
22D8 22D8
22C2
22C2 47B5
22C4 22D8
22C2 81C4
22C2 81C4
6D3 22C2
6D3 22C2
6D3 22C2
22C2
22C2
22C2
22D8 22D8
22C2
22C2
6D3 22C2
6C3 22C2
6C3
22C2
6C3
22C2 6C3
82C3 82C3
82C3 82C3
82C3 82C3
82C3 82C3
82C3
82C3 82C3
82B8
82B8 82B8
23C3 23C3
62B3 62B3
22C2
22C2
45B5
22A6 22A6
6C3
6C3
22C2
45C5
45B5
45B5
45B5
47B2
79D2
44A3
44A3
44A3
79C3
79C3
79C3
79C3
44A1
44A1
44A1
80B5
80B5
80A5
80A5
44C1
80A5
80A2
22C2
22C2
22C4
6C3
79D7
79D7
37D3
26D2
82C3
6C2
6C2
6C2
22C4
6C3
6C3
44B3
6C5
51D7
37D3
26D2
51B5
6C5
51D7
6C5
6C5
6C5
6C5
6C5
6C5
44B3
6C5
22C2 6D3
22C2
22C2
22C4
22C2
22C2
22D8 22D8
6D3
6D3
22C4 22C4
6D3
6D3 22C2
6D3 22C4
6D3 22C2
6D3 22C2
6D1 6D2
6D1 6D2
6D1 6D2
22D8 22D8
6D3
6C3
6C3
22C4 22C4
6C3
6C3
6D1 6D2
6C1 6C2
6C1
6C2
6C1
6C3 6C1
82C3
79D7 79D7
79D7 79D7
79D7 79D7
79D7 79D7
82C3
82C3
82C3
82C3
79D7
79D7 79D7
82B3
82C3
79D7
79D7 79D7
6A2 6A1
48C3 48C3
6C3
6C2 44D3 44D3
6A8
23C3 23C3
14B7 14B7
6C1
6C1
6C3
45B5
6A8
6A8
6A8
44A3
79C3
44A1
44A1
44A1
79B2
79B2
79B2
79B2
40B2
40B2
40B2
80A2
80A2
80A3
80A3
44A1
80A3
6B6
7B8
7B8
7B8
7B8
6C3
6C3
6C3
6C2
78B3
78B3
69A1 69A1
22B6
22B6
79D7
7B8
6C1
6C1
6C1
6C1
5A4
5A4
7B6
43A2
6C3
37A8
22B6
22B6
7B6
48C4
7B8
7B8
7B8
7B8
7B8
6C3
37A8
6C3
6C3
6C3
6C3
6C3
6C3
43A2
39C8 39C8
39C8
57C4
7B6 7B6
7B8
7B6 7B6
7B6
7B6
7B8
7B6
7B6
7C8
6C3
37C6
7B8
7C8
22D8
6D3 6D1
6D2
6D3
6D3
6D3
6D3
22C4 22C4
6D2
6D2
6D3 6D1
6D2
6D1 6D2
6D1 6D2
6D1 6D2
6D1 6D2
5C1 6D1
5C1 6D1
5B2 6D1
22C4 22C4
6D2
6C2
6C2
6C3 6C1
6C2
6C2
5B2 6D1
5C1 6C1
5C1
6C1
5A7
6C2 5B1
79D7
78A3 78A3
78A3 78A3
78A3 78A3
78A3 78A3
79D7
79D7
79D7
79D7
78B3
78B3 78B3
79D7
79D7
78B3
78B3 78B3
5C4 5C4
6A2 6A1
6C1
46C3
6C1
46C3
39C8
43B2 43B2
7B8
7B8
6A6
7B8
6C7 6C6
6C7 6C6
7B8
7B8
7B8
46C3
46C3
5B1
5A7
6C1
6A6
6A6
6A6
7B8
6A6
44A1
79B2
6A8
6A8
6A8
6A8
6A8
6A8
6A8
6A8
6A8
6A8
6B8
6B8
6B8
6B8
40B2
6B6
6A6
6D7
6D7
6D7
6C7
6C2
6C2
5C1
5B1
82B8
82B8
6B1
82B8
6A1
6A4 6A6
6B3
6B3
78A3
6D7
5A7
5B1
5B1
5C1
6C7
6C3
5A4
6C5
37B7
6B5
6B5
6C8
14C6
14C6
5C1
6D7
6D7
6D8
6D8
6D8
5A4
6C3
5A4
5A4
5A4
5A4
5A4
5A4
6C5
39B8
6D4 6D5
6D4
6D4
6C8 6C7
6C7
6C7 6C8
6C8
6C7
6D7
6C7
6C8
14C6
6D7
5A4
14C6
22A7
14C6
6C8
6D8
29C3
28C3
22C4
6D2 6D1
6D2
6D2
6D2
6D2
6D3 6D1
5C1
5C1
5C1 5C1
5B2
6D1
6D1
6D1
6D1
5C1
5C1
5B2
6C3 6C1
5B2
5C1
5C1
5C1 5C1
5A7
5A7
5B2
5C1
5A7
5B1
78A3 82C8
82C8
6B2 6B1
6B2 6B1
6B2 6B1
6B2 6B1
78A3 82C8
78A3 82C8
78B3
78B3
6B2
6B2 6B1
78B3 82B8
78B3
6A2
6A2 6A1
5C1 5C1
5C1 5C1
6B2
5C1
6B2
6D5
6C5 6C3
6D8
6D8
5B2
6D8
5B4
14C6
5B4
14C6
5C4 5C4
6C8
6D8
6D7
6B3
6B3
5B2
5B2
5B2
6D8
5B2
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6A6
6B6
6B6
6B6
6A6
www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
A7*
RSVD14RSVD15
BCLK1BCLK0
RSVD20
RSVD17RSVD18
RSVD19
RSVD16
RSVD13
RSVD12
THERMTRIP*
THERMDC
THERMDA
PROCHOT*
DBR*
TRST*TMS
TDO
TDITCK
PREQ*PRDY*
BPM3*
BPM1*BPM2*
BPM0*
HITM*
HIT*
TRDY*
RS2*RS1*
RS0*RESET*
LOCK*
INIT*
IERR*
BR0*
DBSY*
DRDY*DEFER*
BPRI*
BNR*ADS*
RSVD11
RSVD6
RSVD7RSVD8
RSVD1
RSVD2RSVD3
RSVD4RSVD5
RSVD9
RSVD10
SMI*
LINT0LINT1
STPCLK*
IGNNE*
FERR*A20M*
ADSTB1*
A30*A31*
A27*A28*
A29*
A26*
A25*A24*
A22*
A23*
A21*
A20*A19*
A18*
A17*
REQ4*REQ3*
REQ1*REQ0*
REQ2*
ADSTB0*
A14*A15*
A16*
A13*
A12*A11*
A10*
A9*A8*
A6*
A5*
A4*A3*
(1 OF 4)
THERM
HCLK
RESERVED
ADDR GROUP1
ADDR GROUP0
CONTROL
XDP/ITP SIGNALS
PSI*SLP*
PWRGOOD
DPRSTP*
DPSLP*DPWR*
COMP2COMP3
COMP1
COMP0
DSTBP3*
DSTBN3*
DINV3*
D63*D62*
D61*D60*
D59*
D58*D57*
D56*
D55*D54*
D52*
D53*
D51*
D50*D49*
D48*
DINV2*
DSTBN2*
D47*
DSTBP2*
D45*D46*
D44*D43*
D42*
D41*D40*
D39*
D38*D37*
D36*
D35*D34*
D33*D32*
BSEL2
DSTBN1*
BSEL0BSEL1
TEST2
TEST1
DINV1*DSTBP1*
D31*D30*
D29*
D26*
D27*
D28*
D24*
D25*
D23*
D21*
D22*
D20*D19*
D18*
D16*
D17*
DINV0*
DSTBP0*DSTBN0*
D15*
D14*D13*
D12*D11*
D10*
D9*D8*
D7*
D6*D5*
D4*
D3*D2*
D1*D0*
GTLREF
NC
(2 OF 4)
MISC
DATA GRP0
DATA GRP2
DATA GRP1
DATA GRP3
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
0.1" AWAY
ROUTE TO TP VIA ANDSPARE[7-0],HFPLL:
STUB)
PM_THRMTRIP#SHOULD CONNECT TO
CPU_PROCHOT_L TO SMC
COMP1,3 CONNECT WITH ZO=55OHM, MAKE
LAYOUT NOTE:COMP0,2 CONNECT WITH ZO=27.4OHM, MAKETRACE LENGTH SHORTER THAN 0.5".
TRACE LENGTH SHORTER THAN 0.5".
ICH7-M AND GMCH
LAYOUT NOTE: 0.5" MAX LENGTH
PLACE TESTPOINT ONFSB_IERR_L WITH A GND
PLACE GND VIA W/IN 1000 MILS
TCK PULL DOWN THROUGH 54.9 OHM(FOLLOW UP XDP DESIGN REFERENCE)SO THE TDI PULL UP THROUGH 54.9 OHM,TMS PULL UP THROUGH 54.9 OHM WE THROUGH THE ITP700FLEX CONNECTOR CONNECT TO PDB XDP BUFFER BOARD--ECM*50
CHANGE THE PULLS RESISTOR VALUE PER NAPA PLATFORM DG REV 0.9
WITHOUT T-ING (NO
AND CPU VR TO INFORMCPU IS HOT
1%54.9
MF-LF4021/16W
R07021
2
681/16W5%
402MF-LF
R07041
2
1K
MF-LF402
1%1/16W
R07051
2
2.0K
MF-LF402
1%1/16W
R07061
21%402
54.9R07191 2
27.4R07181 2
1% 402
54.9R07171 2
27.4
402
R07161 2
NOSTUFF
402
0R07301 2
1/16W5%
402MF-LF
1K
NOSTUFFR07071
2
511/16W5%
402MF-LF
R07121
2
402MF-LF1/16W1%54.9R07031
2
1%402
54.9R07201 2
54.9
4021%
R07211 2
1%402
54.9R07221 2
OMIT
CPUYONAH
BGA
U0700
N3P5
P2
L1P4
P1R1
Y2
U5R3
W6
A6
U4
Y5
U2R4
T5
T3W3
W5
Y4
J4
W2
Y1
L4M3
K5
M1N2
J1
H1
L2
V4
A22
A21
E2
AD4AD3
AD1AC4
G5
F1
C20
E1
H5
F21
A5
G6E4
D20
C4
B3
C6
B4
H4
AC2
AC1
D21
K3
H2
K2J3
L5
B1
F3F4
G3
AA1
C3
B25
T22
D2F6
D3
C1AF1
D22
C23
AA4
C24
AB2AA3
M4
N5T2
V3
B2
A3
D5
AC5
AA6
AB3
A24
A25
C7
AB5
G2
AB6
OMIT
BGA
YONAHCPU
U0700
B22
B23
C21
R26
U26U1
V1
E22
F24
J24
J23
H26F26
K22
H25
N22K25
P26R23
E26
L25
L22L23
M23
P25P22
P23
T24R24
L26
H22
T25
N24
AA23
AB24V24
V26
W25U23
U25
U22
F23
AB25
W22Y23
AA26
Y26Y22
AC26
AA24
AC22AC23
G25
AB22AA21
AB21
AC25AD20
AE22
AF23AD24
AE21
AD21
E25
AE25
AF25AF22
AF26
E23K24
G24
J26
M26
V23
AC20
E5B5
D24
H23
M24
W24
AD23
G22
N25
Y25
AE24
AD26
A2
AE6
D6D7
C26
D25
CPU 1 OF 2-FSB
7
03001051-7164
87
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
FSB_RS_L<0>FSB_RS_L<1>
XDP_BPM_L<5>
FSB_HITM_LFSB_HIT_L
FSB_RS_L<2>FSB_TRDY_L PP1V05_S0
XDP_BPM_L<1>
FSB_DBSY_L
PP1V05_S0
PP1V05_S0
PP1V05_S0
XDP_TMS
XDP_TDI
XDP_TCK
FSB_A_L<3>FSB_A_L<4>FSB_A_L<5>FSB_A_L<6>
FSB_A_L<8>FSB_A_L<9>FSB_A_L<10>FSB_A_L<11>FSB_A_L<12>FSB_A_L<13>
FSB_A_L<16>FSB_A_L<15>FSB_A_L<14>
FSB_ADSTB_L<0>
FSB_REQ_L<2>
FSB_REQ_L<0>FSB_REQ_L<1>
FSB_REQ_L<3>FSB_REQ_L<4>
FSB_A_L<17>FSB_A_L<18>FSB_A_L<19>FSB_A_L<20>FSB_A_L<21>
FSB_A_L<23>FSB_A_L<22>
FSB_A_L<24>FSB_A_L<25>FSB_A_L<26>
FSB_A_L<29>FSB_A_L<28>FSB_A_L<27>
FSB_A_L<31>FSB_A_L<30>
FSB_ADSTB_L<1>
CPU_A20M_LCPU_FERR_LCPU_IGNNE_L
CPU_STPCLK_L
CPU_NMICPU_INTR
CPU_SMI_L
NC_CPU_APM1_LNC_CPU_APM0_L
NC_CPU_A36_LNC_CPU_A35_LNC_CPU_A34_LNC_CPU_A33_LNC_CPU_A32_L
NC_CPU_A39_LNC_CPU_A38_LNC_CPU_A37_L
NC_CPU_HFPLL
FSB_DEFER_LFSB_DRDY_L
FSB_BREQ0_L
FSB_IERR_LCPU_INIT_L
FSB_LOCK_L
FSB_CPURST_L
XDP_BPM_L<0>
XDP_BPM_L<2>XDP_BPM_L<3>XDP_BPM_L<4>
XDP_TCKXDP_TDIXDP_TDOXDP_TMSXDP_TRST_LXDP_DBRESET_L
CPU_PROCHOT_LCPU_THERMD_PCPU_THERMD_N
PM_THRMTRIP_L
NC_CPU_EXTBREF
NC_CPU_SPARE0
TP_CPU_SPARE3
TP_CPU_SPARE6TP_CPU_SPARE5NC_CPU_SPARE4
TP_CPU_SPARE7
FSB_CLK_CPU_PFSB_CLK_CPU_N
NC_CPU_SPARE2NC_CPU_SPARE1
FSB_A_L<7>
CPU_GTLREF
FSB_D_L<0>FSB_D_L<1>FSB_D_L<2>FSB_D_L<3>FSB_D_L<4>FSB_D_L<5>FSB_D_L<6>FSB_D_L<7>FSB_D_L<8>FSB_D_L<9>FSB_D_L<10>FSB_D_L<11>FSB_D_L<12>FSB_D_L<13>FSB_D_L<14>FSB_D_L<15>FSB_DSTBN_L<0>FSB_DSTBP_L<0>FSB_DINV_L<0>
FSB_D_L<17>FSB_D_L<16>
FSB_D_L<18>FSB_D_L<19>FSB_D_L<20>
FSB_D_L<22>FSB_D_L<21>
FSB_D_L<23>
FSB_D_L<25>FSB_D_L<24>
FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>
FSB_D_L<29>FSB_D_L<30>FSB_D_L<31>
FSB_DSTBP_L<1>FSB_DINV_L<1>
CPU_TEST1
CPU_TEST2
CPU_BSEL<1>CPU_BSEL<0>
FSB_DSTBN_L<1>
CPU_BSEL<2>
FSB_D_L<32>FSB_D_L<33>FSB_D_L<34>FSB_D_L<35>FSB_D_L<36>FSB_D_L<37>FSB_D_L<38>FSB_D_L<39>FSB_D_L<40>FSB_D_L<41>FSB_D_L<42>FSB_D_L<43>FSB_D_L<44>
FSB_D_L<46>FSB_D_L<45>
FSB_DSTBP_L<2>
FSB_D_L<47>FSB_DSTBN_L<2>
FSB_DINV_L<2>
FSB_D_L<48>FSB_D_L<49>FSB_D_L<50>FSB_D_L<51>
FSB_D_L<53>FSB_D_L<52>
FSB_D_L<54>FSB_D_L<55>FSB_D_L<56>FSB_D_L<57>FSB_D_L<58>FSB_D_L<59>FSB_D_L<60>FSB_D_L<61>FSB_D_L<62>FSB_D_L<63>
FSB_DINV_L<3>
FSB_DSTBN_L<3>FSB_DSTBP_L<3>
CPU_COMP<0>CPU_COMP<1>
CPU_COMP<3>CPU_COMP<2>
FSB_DPWR_LCPU_DPSLP_LCPU_DPRSTP_L
CPU_PWRGDFSB_SLPCPU_LCPU_PSI_L
FSB_ADS_LFSB_BNR_LFSB_BPRI_L
67D8
67D8
67D6
67D8
67D8
67D6
65A2
67D6
67D6
65A2
55A4
65A2
65A2
55A4
34C8
55A4
55A4
34C8
34C6
34C8
34C8
34C6
34B8
34C6
34C6
34B8
25D3
34B8
34B8
25D3
25C4
25D3
25D3
25C4
24D3
25C4
25C4
24D3
24C3
24D3
24D3
24C3
21C1
24C3
24C3
21C1
19D7
21C1
21C1
19D7
19D6
19D7
19D7
19D6
19D5
19D6
19D6
19D5
19D2
19D5
19D5
19D2
19D1
19D2
19D2
19D1
19C8
19D1
19D1
19C8
17D6
19C8
19C8
17D6
17D3
17D6
17D6
17D3
16D3
17D3
17D3
16D3
16C8
16D3
16D3
16C8
13B5
16C8
16C8
13B5
12C2
13B5
13B5
12C2
12B7
12C2
12C2
12B7
12A7
12B7
12B7
12A7
11C5
12A7
12A7
11C5
11B3
11C5
11C5
11B3
9B7
11B3
11B3
9B7
8C7
9B7
9B7
8C7
7D5
8C7
8C7
7D5
7B6
7D5
7D5
7B6
87D6
34D5
34D5
87D6
87D6
7B5
87D6
7B5
7B6
7B5 87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87C6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87C6
87C6
87D6
87D6
87D6
12C4
52C1
34D3
34D3
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87C6
61C7
87C6
87D6
87D6
87D6
87D6
87C6
12B4
12B4
87D6
87D6 5D4
87C6
12B4
5D4
5D4
5D4
11B3
11B3
11B3
12D4
12D4
12D4
12D4
12D4
12D4
12D4
12D4
12D4
12D4
12C4
12D4
12D4
12C4
12A4
12B4
12B4
12A4
12A4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
87C6
87C6
21C4
87C6
87C6
87C6
6C8
6D8
6D8
6D8
6D8
6D8
6D8
6D8
6D8
6D8
6C8
87D6
12B4
12C4
87C6
12B4
11B5
87C6
87C6
87C6
87C6
11B3
11B3
11B3
26C6
52D3
21C2
6C8
6C8
6C8
33C4
33C4
6C8
6C8
12D4
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12D6
12C6
12C6
12C6
12B4
12B4
12B4
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12B4
12B4
12B4
12C6
12C6
12C6
12C6
12C6
12C6
12C6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B4
12B6
12B4
12B4
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B6
12B4
12B4
12B4
12B4
21C4
21C4
21C4
12A4
12C4
12C4
87D6
12A4
12A4
11B3
5B7
5B7
12A4
12A4 5B2
11B3
5B7
5B2
5B2
5B2
7C6
7C6
7C6
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5A7
5A7
5A7
5A7
5A7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
21C4
21C2
21C4
5C4
21C4
21C4
21C4
6C7
6D7
6D7
6D7
6D7
6D7
6D7
6D7
6D7
6D7
6C7
12B4
5B7
5B7
87C6
21C4
5A7
5A4
11B3
11B3
11B3
11B3
7A8
7B8
11B5
7B8
11B3
11B4
52C1
10B6
10B6
14B6
6C7
6C7
6C7
5C4
5C4
6C7
6C7
5B7
87C6
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
34B6
34C6
5B7
34B6
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
87C6
87C6
87C6
87C6
5A4
5B4
5C4
5B4
5A4
61C7
5B7
5B7
12C4
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
VSS_82
VSS_83
VSS_84VSS_85
VSS_87VSS_86
VSS_88
VSS_89VSS_90
VSS_92
VSS_91
VSS_93
VSS_94
VSS_95
VSS_97
VSS_96
VSS_100
VSS_98
VSS_99
VSS_102
VSS_101
VSS_105
VSS_103VSS_104
VSS_106VSS_107
VSS_110
VSS_109VSS_108
VSS_111VSS_112
VSS_115VSS_114
VSS_113
VSS_116
VSS_117VSS_118
VSS_120VSS_119
VSS_123
VSS_121
VSS_122
VSS_124
VSS_125
VSS_128
VSS_126
VSS_127
VSS_129
VSS_130
VSS_133
VSS_131
VSS_132
VSS_134
VSS_135
VSS_138
VSS_136VSS_137
VSS_139VSS_140
VSS_141
VSS_143
VSS_142
VSS_146
VSS_144VSS_145
VSS_147VSS_148
VSS_151VSS_150
VSS_149
VSS_152VSS_153
VSS_156VSS_155
VSS_154
VSS_157
VSS_158VSS_159
VSS_161
VSS_160
VSS_162
VSS_1
VSS_2
VSS_3
VSS_5
VSS_4
VSS_6
VSS_7
VSS_8
VSS_10
VSS_9
VSS_11VSS_12
VSS_15
VSS_13
VSS_14
VSS_16VSS_17
VSS_18
VSS_19VSS_20
VSS_23VSS_22
VSS_21
VSS_24
VSS_25
VSS_28VSS_27
VSS_26
VSS_29
VSS_30
VSS_33
VSS_32
VSS_31
VSS_34
VSS_35
VSS_38
VSS_37VSS_36
VSS_39
VSS_40
VSS_41VSS_42
VSS_43
VSS_46
VSS_44VSS_45
VSS_47VSS_48
VSS_51
VSS_49VSS_50
VSS_52VSS_53
VSS_56
VSS_54
VSS_55
VSS_57
VSS_58VSS_59
VSS_60VSS_61
VSS_63
VSS_62
VSS_64
VSS_65
VSS_66
VSS_69
VSS_68
VSS_67
VSS_70
VSS_71
VSS_74
VSS_73
VSS_72
VSS_75
VSS_76
VSS_79
VSS_78VSS_77
VSS_80VSS_81
(4 OF 4)
VCC_67
VCC_64
VCC_66VCC_65
VCC_63VCC_62
VCC_61
VCC_59VCC_60
VCC_58
VCC_57VCC_56
VCC_54VCC_55
VCC_53
VCC_51VCC_52
VCC_49
VCC_50
VCC_48
VCC_47
VCC_46
VCC_44
VCC_45
VCC_43
VCC_41
VCC_42
VCC_40
VCC_39
VCC_38
VCC_36
VCC_37
VCC_33
VCC_35VCC_34
VCC_31
VCC_32
VCC_29VCC_30
VCC_28
VCC_26VCC_27
VCC_23
VCC_25
VCC_24
VCC_22VCC_21
VCC_20
VCC_18VCC_19
VCC_17
VCC_16VCC_15
VCC_13
VCC_14
VCC_12
VCC_10VCC_11
VCC_8
VCC_9
VCC_7
VCC_6
VCC_5
VCC_3
VCC_4
VCC_2VCC_1 VCC_68
VCC_69
VCC_71
VCC_70
VCC_72
VCC_74
VCC_76
VCC_75
VCC_78VCC_77
VCC_79
VCC_81
VCC_80
VCC_84
VCC_82VCC_83
VCC_86VCC_85
VCC_87
VCC_89VCC_88
VCC_90VCC_91
VCC_92
VCC_94VCC_93
VCC_95
VCC_96VCC_97
VCC_99
VCC_98
VCC_100
VCCP_1
VCCP_2
VCCP_3VCCP_4
VCCP_5
VCCP_6VCCP_7
VCCP_9
VCCP_8
VCCP_11
VCCP_10
VCCP_12
VCCP_13
VCCP_14
VCCP_16
VCCP_15
VCCA
VID0
VID1VID2
VID3
VID4VID5
VID6
VSSSENSE
VCCSENSE
VCC_73(3 OF 4)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
VCCA=1.5 ONLY
LAYOUT NOTE: CONNECT R0803
PULL-DOWNIF NO USE, NEED PULL-UP ORVID FOR CPU POWER SUPPLY
TRANSMISSION LINERESISTORS TERMINATE THE 55 OHM
LAYOUT NOTE:
(CPU CORE POWER)
(CPU IO POWER 1.05V)
STUB.
LAYOUT NOTE:VCCSENSE AND VSSSENSE LINESSHOULD BE OF EQUAL LENGTH
LOCATION WHERE THE TWO 54.9 OHMBETWEEN VCCSENSE AND VSSSENSE AT THETO CONNECT A DIFFERENCTIAL PROBEPROVIDE A TEST POINT (WITH NO STUB)
LAYOUT NOTE:
TO TP_VSSSENSE WITH NO
(CPU INTERNAL PLL POWER 1.5V)
ZO=27.4 OHM DIFFERNTIAL TRACE ROUTING.CPU_VCCSENSE_P/CPU_VCCSENSE_N USE
9C2 87B6
9C2 87B6
9C2 87B6
9C2 87B6
9C2 87B6
9C2 87B6
100
MF-LF402
1%1/16W
R08031
2
9C2 87B6
61A1 87B6
61B1 87B6
1/16W1%
402MF-LF
100R08021
2
CPUYONAH
BGA
OMIT
U0700A4
B8
V25
W1
W4W23
W26
Y3Y6
Y21Y24
AA2
B11
AA5AA8
AA11
AA14AA16
AA19
AA22AA25
AB1AB4
B13
AB8
AB11AB13
AB16
AB19AB23
AB26
AC3AC6
AC8
B16
AC11
AC14
AC16AC19
AC21
AC24AD2
AD5
AD8AD11
B19
AD13AD16
AD19
AD22AD25
AE1
AE4AE8
AE11
AE14
B21
AE16
AE19AE23
AE26
AF3AF6
AF8
AF11AF13
AF16
B24
AF19AF21
AF24
C5
C8C11
A8
C14
C16C19
C2
C22C25
D1D4
D8
D11
A11
D13
D16
D19D23
D26
E3E6
E8E11
E14
A14
E16E19
E21
E24F5
F8
F11F13
F16F19
A16
F2
F22F25
G4
G1G23
G26
H3H6
H21
A19
H24
J2
J5J22
J25
K1K4
K23
K26L3
A23
L6L21
L24
M2M5
M22
M25N1
N4
N23
A26
N26
P3
P6
P21P24
R2R5
R22
R25T1
B6 T4
T23T26
U3
U6U21
U24V2
V5
V22
CPUYONAH
BGA
OMIT
U0700A7
B7
AF20
B9
B10
B12B14
B15
B17B18
B20
C9
A9
C10
C12C13
C15
C17C18
D9
D10D12
D14
A10
D15D17
D18E7
E9
E10E12
E13
E15E17
A12
E18
E20F7
F9F10
F12
F14F15
F17
F18
A13
F20
AA7
AA9AA10
AA12AA13
AA15
AA17AA18
AA20
A15
AB9AC10
AB10
AB12AB14
AB15AB17
AB18
AB20
AB7
A17
AC7
AC9
AC12AC13
AC15
AC17AC18
AD7AD9
AD10
A18
AD12AD14
AD15
AD17AD18
AE9
AE10AE12
AE13AE15
A20
AE17
AE18AE20
AF9
AF10AF12
AF14
AF15AF17
AF18
B26
V6
N6
R21
R6T21
T6
V21W21
G21
J6
K6M6
J21
K21M21
N21
AF7
AD6
AF5
AE5AF4
AE3
AF2AE2
AE7
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
878
03001051-7164
CPU 2 OF 2-PWR/GND
PPVCORE_S0_CPU
CPU_VCCSENSE_P
CPU_VCCSENSE_N
CPU_VID<6>CPU_VID<5>CPU_VID<4>CPU_VID<3>CPU_VID<2>CPU_VID<1>CPU_VID<0>
PP1V5_S0
PP1V05_S0
PPVCORE_S0_CPU
67D8 67D6
65A2 55A4 34C8 34C6 34B8 25D3 25C4 24D3 24C3 21C1
19D7 19D6 19D5
67C8
19D2
67C6
19D1
66C5
19C8
62C1
17D6
62A8
17D3
48B6
16D3
25D6
16C8
25C8
13B5
25C6
12C2
25C2
12B7
25B6
12A7
67D3
25B2
11C5
67D3
67D1
25A8
11B3
67D1
61D1
24B5
9B7
61D1
55D7
24A5
7D5
55D7
55A6
24A3
7B6
55A6
9D7
9B7
7B5
9D7
8D7
5D4
5D4
8B5
5B2
5D1
5B2
5B2
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CPU VCORE VID Connections
NC NC
NOTE: This cap is shared
CPU VCORE HF AND BULK DECOUPLING
VCCP (CPU I/O) Decoupling
Will probably be removed before productionResistors to allow for override of CPU VID
1x 10uF, 1x 0.01uF
between CPU and NB
1x 470uF, 6x 0.1uF 0402
VCCA (CPU AVdd) Decoupling
4x 330uF. 20x 22uF 0805
22UF
805CERM
20%6.3V
C09061
2805
22UF
CERM
20%6.3V
C09041
2
805
22UF
CERM
20%6.3V
C09161
2805
22UF
CERM
20%6.3V
C09141
2
805
22UF
CERM
20%6.3V
C09081
2805
22UF
CERM
20%6.3V
C09031
2805
22UF
CERM
20%6.3V
C09071
2805
22UF
CERM
20%6.3V
C09021
2
22UF
805CERM
20%6.3V
C09011
2
22UF
805CERM
20%6.3V
C09131
2805
22UF
CERM
20%6.3V
C09121
2805
22UF
CERM
20%6.3V
C09111
2805
22UF
CERM
20%6.3V
C09191
2
805
22UF
CERM
20%6.3V
C09001
2
805
22UF
CERM
20%6.3V
C09101
2
10V20%
402CERM
0.1UFC09361
220%
2.5VTANTD2T
CRITICAL
470uFC0935 1
2 3
805
22UF
CERM
20%6.3V
C09051
2805
22UF
CERM
20%6.3V
C09091
2
805
6.3V
22UF
CERM
20%
C09151
2805
22UF
CERM
20%6.3V
C09171
2
10V20%
402CERM
0.1UFC09371
210V20%
402CERM
0.1UFC09381
210V20%
402CERM
0.1UFC09391
210V20%
402CERM
0.1UFC09401
210V20%
402CERM
0.1UFC09411
2
805
6.3V20%
CERM
22UFC09181
2
20%
402CERM
0.01UF16V
C09811
2603
6.3V20%
10uF
X5R
C0980 1
2
05%
1/16WSM-LF
RP0990
1
2
3
4
8
7
6
5
05%
1/16WSM-LF
RP0991
1
2
3
4
8
7
6
5
CRITICAL
D2TPOLY2.5V20%330UFC09501
23
330UF20%2.5VPOLYD2T
CRITICAL
C09521
23
CRITICAL
D2TPOLY2.5V20%330UFC09531
23
330UF20%2.5VPOLYD2T
CRITICAL
C09541
23
879
03001
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
051-7164
CPU Decoupling & VID
PPVCORE_S0_CPU
PP1V5_S0
PP1V05_S0
CPU_VID<0>CPU_VID<1>CPU_VID<2>CPU_VID<3>
IMVP6_VID<0>IMVP6_VID<1>IMVP6_VID<2>IMVP6_VID<3>
CPU_VID<4>CPU_VID<5>CPU_VID<6>
IMVP6_VID<4>IMVP6_VID<5>IMVP6_VID<6>
67D8 67D6 65A2 55A4
34C8 34C6 34B8 25D3 25C4 24D3 24C3 21C1 19D7
19D6 19D5
67C8
19D2
67C6
19D1
66C5
19C8
62C1
17D6
62A8
17D3
48B6
16D3
25D6
16C8
25C8
13B5
25C6
12C2
25C2
12B7
25B6
12A7
67D3
25B2
11C5
67D1
25A8
11B3
61D1
24B5
8C7
55D7
24A5
7D5
55A6
24A3
7B6
8D7
8B7
7B5
8B5
5D4
5D4
87B6
87B6
87B6
87B6
61C7
61C7
61C7
61C7
87B6
87B6
87B6
61C7
61C7
61C7
5B2
5D1
5B2
8B7
8B7
8B7
8B7
5C4
5C4
5C4
5C4
8B7
8B7
8B7
5C4
5C4
5C4
www.vinafix.vn
IO
IO
IN
OUT
GND
VDD
SDATASCLK
THM*
ALERT*/
D+D-
THM2*
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(TC0D)(TO CPU INTERNAL THERMAL DIODE)
ROUTE CPU_THERMD_P AND
CPU_THERMD_N ON SAME
LAYER.
10 MIL TRACE
LAYOUT NOTE:
10 MIL SPACING
LAYOUT NOTE:
CPU_THERMD_N
FOR CPU_THERMD_P AND
ADD GND GUARD TRACE
CPU ZONE THERMAL SENSOR
PLACE U1001 NEAR THE U1200
50VCERM402
10%0.001UFC10011
2
402
10%16VX5R
0.1UFC1002 1
2
MSOPTMP401
CRITICAL
U10016
32
5
87
4
1
10K5%1/16W
402MF-LF
R10051
2MF-LF
10K
402
5%1/16W
R10061
2
402MF-LF1/16W1%
499R10011 2
1%1/16WMF-LF402
499R10021 2
CPU MISC1-TEMP SENSOR
8710
03001051-7164
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
PP3V3_S0
CPU_THERMD_P THRM_CPU_DX_P
CPU_THERMD_N
THRM_CPU_DX_N
SMBUS_SMC_B_S0_SDA
SMBUS_SMC_B_S0_SCLTHRM_ALERT
THRM_ALERT_L
82D5 82C6 82B3 82A4 79D3 79A8 71D2 67C5
67C3 67B3 67A3 66B6 66B5 66B1 65D6 65B3
62A6 61D8 61A5 60D4 60C7 58C7 58C4 57B6 54D4
54B5 52D3 49C7 49C4 49B5 40B6 36D6 34A8 33D8
33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3
26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8
25B4 25A4 24D3 24C3 24B5 24B3 23D5 23B3 22B5 21D3 21C3 20B4 20A4 19C7 19C6 17C6
51B5
51B5
14D6
49B5
49B5
14C7
27D3
27D3
5D4
27D2
27D2
5A4
7C6
7C6
27D1
27D1
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IO
IO
IO
IO
IO
IO
OUT
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’STCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX
INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.
(FROM CK410M HOST 133/167MHZ)
(DEBUG PORT RESET)(AND WITH RESET BUTTON) TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC
NC
NC
NC
(DBA#)
(DBR#)(DEBUG PORT ACTIVE)
CPU ITP700FLEX DEBUG SUPPORT
(FBO)
(TCK)
518S0320
CONNECTOR’S FBO PIN.
ITP TCK SIGNAL LAYOUT NOTE:
MF-LF
22.6
1%1/16W
402
ITP
R11001 2
ITP
402
1%
22.6
1/16WMF-LF
R11021 2
54.91/16W1%
402MF-LF
ITP
R11031
2
402X5R16V10%0.1UFC11001
2
1/16W
240
402MF-LF
5%
R11041
2
F-RT-SM52435-2872
CRITICAL
ITPCONN
J1101
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
4
5
6
7
8
9
1/16W
402
54.91%
MF-LF
R11011
2
680
402
5%1/16WMF-LF
R11061
2
CPU ITP700FLEX DEBUG
051-7164 03001
11 87
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PP1V05_S0
FSB_CPURST_L
XDP_BPM_L<0>
XDP_TCK
XDP_TDI
XDP_TDO
PP3V3_S5
PP1V05_S0
XDP_TMS
CPU_XDP_CLK_N
XDP_TRST_L
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>
XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_TCKCPU_XDP_CLK_P
ITP_TDO
XDP_DBRESET_L
ITPRESET_L
67D8
67D8
67D6
67D6
65A2
65A2
55A4
55A4
34C8
34C8
34C6
34C6
34B8
34B8
25D3
25D3
25C4
79D5
25C4
24D3
67D5
24D3
24C3
67D3
24C3
21C1
67C3
21C1
19D7
66C5
19D7
19D6
65D8
19D6
19D5
65D2
19D5
19D2
65D1
19D2
19D1
65C8
19D1
19C8
63D8
19C8
17D6
56D4
17D6
17D3
26C5
17D3
16D3
25D2
16D3
16C8
25C8
16C8
13B5
25B6
13B5
12C2
24C3
12C2
12B7
24B3
12B7
12A7
24A5
12A7
11C5
23D8
11B3
9B7
23D4
9B7
8C7
23D1
8C7
7D5
23B7
7D5
7B6
87D6
23A7
7B6
87C6
87C6
7B5
12C4
11B3
22D8
7B5
34D5
11B3
34D5
5D4
7D6
87C6
7C6
7C6
22C6
5D4
7C6
34D3
87C6
87C6
87C6
87C6
87C6
7C6
34D3
26C6
5B2
5A4
7C6
7A8
7B8
7C6
5D4
5B2
7B8
33C4
7C6
7C6
7C6
7C6
7C6
7C6
7A8
33C4
7C6
87C6
www.vinafix.vn
IO
IO
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
IO
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IN
IO
IN
IO
IO
HD4*
HD6*
HD16*
HTRDY*HSLPCPU*
HRS1*HRS0*
HHITM*HLOCK*
HHIT*
HDSTBP2*HDTSBP3*
HDSTBP1*HDSTBP0*
HDSTBN3*
HDSTBN1*HDSTBN2*
HDSTBN0*
HDINV2*HDINV3*
HDINV1*HDINV0*
HDVREFHDRDY*HDPWR*
HDEFER*HDBSY*
HCPURST*HBREQ0*HBPRI*HBNR*HAVREF
HCLKIN*HCLKIN
HYSWING
HYRCOMPHYSCOMP
HXSWINGHXSCOMPHXRCOMP
HA13*
HADS*HADSTB0*
HD3*HD2*HD1*HD0*
HD63*HD62*HD61*HD60*HD59*HD58*HD57*HD56*HD55*HD54*HD53*HD52*HD51*HD50*HD49*HD48*HD47*HD46*HD45*HD44*HD43*HD42*HD41*HD40*HD39*HD38*HD37*HD36*HD35*HD34*HD33*HD32*HD31*
HD29*HD28*HD27*HD26*HD25*HD24*HD23*HD22*HD21*HD20*HD19*HD18*HD17*
HD15*
HD10*HD11*HD12*HD13*HD14*
HD5*
HD7*HD8*HD9*
HA30*HA29*HA28*HA27*HA26*HA25*HA24*HA23*
HA31*
HA20*HA19*HA18*
HA16*HA15*HA14*
HA21*HA22*
HA17*
HA9*HA8*HA7*HA6*HA5*HA4*HA3*
HA10*HA11*HA12*
HADSTB1*
HREQ0*HREQ1*HREQ2*HREQ3*
HD30*
HREQ4*
HRS2*
(1 OF 10)
HOST
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
0.1uF10%16VX5R402
C1211 1
2402MF-LF1/16W1%200R12111
2
402MF-LF1/16W1%100R12101
2
402MF-LF1/16W
1%54.9
R12201
2
24.91%
1/16WMF-LF402
R12211
2
402MF-LF1/16W1%221R12251
2
100
402MF-LF1/16W1%
R12261
2
10%16VX5R402
0.1uFC12261
2
0.1uF10%16VX5R402
C12361
2
402MF-LF1/16W1%221R12351
2402MF-LF1/16W
1%54.9
R12301
2
100
402MF-LF1/16W1%
R12361
2
24.91%
1/16WMF-LF402
R12311
2
OMIT
945GM
NBBGA
U1200
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
H9
C14
D14
C9
E11
G11
F11
G12
F9
E8
B9
C13
J13
C6
F6
C7
AG2
AG1
B7
F1
J1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
H1
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
J6
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
H3
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
K2
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
G1
AB5
AD10
AD4
AC8
G2
K9
K1
A7
C3
J7
W8
U3
AB10
J9
H8
K4
T7
Y5
AC4
K3
T6
AA5
AC5
K13
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
E1
E2
E4
Y1
U1
W1
051-7164
8712
03001
NB CPU InterfaceSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
NB_FSB_XRCOMP
PP1V05_S0
PP1V05_S0
PP1V05_S0
FSB_RS_L<2>
FSB_REQ_L<4>
FSB_D_L<30>
FSB_REQ_L<3>FSB_REQ_L<2>FSB_REQ_L<1>FSB_REQ_L<0>
FSB_ADSTB_L<1>
FSB_A_L<12>FSB_A_L<11>FSB_A_L<10>
FSB_A_L<3>FSB_A_L<4>FSB_A_L<5>FSB_A_L<6>FSB_A_L<7>FSB_A_L<8>FSB_A_L<9>
FSB_A_L<17>
FSB_A_L<22>FSB_A_L<21>
FSB_A_L<14>FSB_A_L<15>FSB_A_L<16>
FSB_A_L<18>FSB_A_L<19>FSB_A_L<20>
FSB_A_L<31>
FSB_A_L<23>FSB_A_L<24>FSB_A_L<25>FSB_A_L<26>FSB_A_L<27>FSB_A_L<28>FSB_A_L<29>FSB_A_L<30>
FSB_D_L<14>FSB_D_L<13>FSB_D_L<12>FSB_D_L<11>
FSB_D_L<15>
FSB_D_L<18>FSB_D_L<19>FSB_D_L<20>FSB_D_L<21>FSB_D_L<22>FSB_D_L<23>FSB_D_L<24>FSB_D_L<25>FSB_D_L<26>FSB_D_L<27>FSB_D_L<28>FSB_D_L<29>
FSB_D_L<31>FSB_D_L<32>FSB_D_L<33>FSB_D_L<34>FSB_D_L<35>FSB_D_L<36>FSB_D_L<37>FSB_D_L<38>FSB_D_L<39>FSB_D_L<40>FSB_D_L<41>FSB_D_L<42>FSB_D_L<43>FSB_D_L<44>FSB_D_L<45>FSB_D_L<46>FSB_D_L<47>FSB_D_L<48>FSB_D_L<49>FSB_D_L<50>FSB_D_L<51>FSB_D_L<52>FSB_D_L<53>FSB_D_L<54>FSB_D_L<55>FSB_D_L<56>FSB_D_L<57>FSB_D_L<58>FSB_D_L<59>FSB_D_L<60>FSB_D_L<61>FSB_D_L<62>FSB_D_L<63>
FSB_ADSTB_L<0>FSB_ADS_L
FSB_A_L<13>
NB_FSB_XSCOMPNB_FSB_XSWING
NB_FSB_YSCOMPNB_FSB_YRCOMP
NB_FSB_YSWING
FSB_CLK_NB_PFSB_CLK_NB_N
FSB_BNR_LFSB_BPRI_LFSB_BREQ0_LFSB_CPURST_LFSB_DBSY_LFSB_DEFER_LFSB_DPWR_LFSB_DRDY_L
FSB_DINV_L<3>
FSB_DSTBN_L<1>
FSB_DSTBP_L<0>
FSB_HIT_L
FSB_LOCK_LFSB_HITM_L
FSB_RS_L<0>FSB_RS_L<1>
FSB_SLPCPU_LFSB_TRDY_L
FSB_D_L<16>
FSB_D_L<0>
FSB_D_L<3>
FSB_D_L<7>FSB_D_L<8>FSB_D_L<9>FSB_D_L<10>
FSB_D_L<6>FSB_D_L<5>FSB_D_L<4>
FSB_D_L<2>FSB_D_L<1>
NB_FSB_VREF
FSB_DINV_L<2>FSB_DINV_L<1>
FSB_DSTBN_L<0>
FSB_DINV_L<0>
FSB_DSTBP_L<3>FSB_DSTBP_L<2>FSB_DSTBP_L<1>
FSB_DSTBN_L<3>FSB_DSTBN_L<2>
FSB_D_L<17>
67D8
67D8
67D8
67D6
67D6
67D6
65A2
65A2
65A2
55A4
55A4
55A4
34C8
34C8
34C8
34C6
34C6
34C6
34B8
34B8
34B8
25D3
25D3
25D3
25C4
25C4
25C4
24D3
24D3
24D3
24C3
24C3
24C3
21C1
21C1
21C1
19D7
19D7
19D7
19D6
19D6
19D6
19D5
19D5
19D5
19D2
19D2
19D2
19D1
19D1
19D1
19C8
19C8
19C8
17D6
17D6
17D6
17D3
17D3
17D3
16D3
16D3
16D3
16C8
16C8
16C8
13B5
13B5
13B5
12B7
12C2
12C2
12A7
12B7
12A7
11C5
11C5
11C5
11B3
11B3
11B3
9B7
9B7
9B7
8C7
8C7
8C7
7D5
7D5
7D5
7B6
7B6
7B6
34D5
34D5
7B5
7B5
7B5
87D6
87D6
87D6
87D6
87D6
87D6
87C6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87C6
87D6
87D6
34D3
34D3
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
87D6
5D4
5D4
5D4
7D8
7B4
7D8
7D8
7D8
7D8
7C8
7D8
7D8
7D8
7D8
7D8
7D8
7D8
7D8
7D8
7D8
7C8
7C8
7C8
7D8
7D8
7D8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C8
7C4
7C4
7C4
7C4
7C4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7B4
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7C3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7B3
7D8
7D6
7D8
33C4
33C4
7B3
7B4
7C4
7D6
7D6
7D6
7A3
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C4
7C3
7B4
7C4
7C4
7B3
7C3
7B4
7B3
7C3
7C4
5B2
5B2
5B2
5A7
5B7
5A7
5A7
5A7
5A7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5C4
5B4
5B7
5B7
5B7
5B7
5A7
5B7
5A4
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
5B7
www.vinafix.vn
CRT_BLUE*
CRT_BLUE
CRT_GREEN*CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_RED*
HSYNC
CRT_DDC_DATA
CRT_VSYNCCRT_IREF
TV_IRTNC
TV_IRTNB
TV_IREF
TV_IRTNA
TV_DACB_OUT
TV_DACC_OUT
TV_DACA_OUT
LB_DATA2LB_DATA1
LB_DATA0
LB_DATA2*
LB_DATA1*LB_DATA0*
LA_DATA2
LA_DATA1
LA_DATA0
LA_DATA2*LA_DATA1*
LA_DATA0*
LB_CLKLB_CLK*
LA_CLK
LA_CLK*
L_VDDEN
L_VREFLL_VREFH
L_VBGL_IBG
L_DDC_CLKL_DDC_DATA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN0EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3EXP_A_RXN4
EXP_A_RXN5EXP_A_RXN6
EXP_A_RXN7
EXP_A_RXN8EXP_A_RXN9
EXP_A_RXN10
EXP_A_RXN11EXP_A_RXN12
EXP_A_RXN13
EXP_A_RXN15EXP_A_RXN14
EXP_A_RXP0
EXP_A_RXP1EXP_A_RXP2
EXP_A_RXP4
EXP_A_RXP3
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXP10EXP_A_RXP9
EXP_A_RXP8
EXP_A_RXP11
EXP_A_RXP12
EXP_A_RXP14
EXP_A_RXP13
EXP_A_RXP15
EXP_A_TXN1EXP_A_TXN0
EXP_A_TXN3
EXP_A_TXN2
EXP_A_TXN6EXP_A_TXN5
EXP_A_TXN4
EXP_A_TXN7
EXP_A_TXN8EXP_A_TXN9
EXP_A_TXN10
EXP_A_TXN11EXP_A_TXN12
EXP_A_TXN14
EXP_A_TXN13
EXP_A_TXN15
EXP_A_TXP0
EXP_A_TXP2EXP_A_TXP1
EXP_A_TXP3
EXP_A_TXP4EXP_A_TXP5
EXP_A_TXP7
EXP_A_TXP6
EXP_A_TXP8
EXP_A_TXP9EXP_A_TXP10
EXP_A_TXP12
EXP_A_TXP11
EXP_A_TXP13
EXP_A_TXP14
EXP_A_TXP15
L_CLKCTLB
L_BKLTENL_CLKCTLA
L_BKLTCTL
(3 OF 10)
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
IN
IN
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
IO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is usedCan leave all signals NC if LVDS is not implemented
CRT Disable
TV-Out Disable
Composite: DACA only
TV-Out Signal Usage:
HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core
Unused DAC outputs must remain powered, but can omit
S-Video: DACB & DACC only
connect to GND through 75-ohm resistors.
Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and
Component: DACA, DACB & DACC
rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.
VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.
Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.
filtering components. Unused DAC outputs should
Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie
VCCD_LVDS must remain powered with proper decoupling.
LVDS Disable
Otherwise, tie VCCD_LVDS to GND also.
SDVOC_CLKPSDVOC_BLUESDVOC_GREENSDVOC_RED
SDVOB_BLUESDVOB_CLKP
SDVOB_RED#SDVOB_GREEN#SDVOB_BLUE#SDVOB_CLKNSDVOC_RED#SDVOC_GREEN#SDVOC_BLUE#SDVOC_CLKN
SDVOB_REDSDVOB_GREEN
SDVO_FLDSTALLSDVO_INTSDVO_TVCLKIN
SDVO_INT#SDVO_TVCLKIN#
SDVO Alternate Function
SDVO_FLDSTALL#
OMIT
945GMNBBGA
U1200
E23
D23
C26
C25
C22
B22
J22
A21
B21
H23
D40
D38
F34
G38
V34
W38
Y34
AA38
AB34
AC38
H34
J38
L34
M38
N34
P38
R34
T38
D34
F38
T34
V38
W34
Y38
AA34
AB38
G34
H38
J34
L38
M34
N38
P34
R38
F36
G40
V36
W40
Y36
AA40
AB36
AC40
H36
J40
L36
M40
N36
P40
R36
T40
D36
F40
T36
V40
W36
Y40
AA36
AB40
G36
H40
J36
L40
M36
N40
P36
R40
G23
D32
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A32
A33
B37
C37
B34
B35
A36
A37
E26
E27
F30
G30
D29
D30
F28
F29
A16
C18
A19
J20
B16
B18
B19
24.91%1/16WMF-LF402
R13101
2
NB PEG / Video InterfacesSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
13 87
03001051-7164
GND
GND
TP_LVDS_CLKCTLB
PP1V5_S0_NB
LVDS_BKLTCTL
TP_LVDS_CLKCTLALVDS_BKLTEN
PEG_R2D_C_P<15>PEG_R2D_C_P<14>PEG_R2D_C_P<13>
PEG_R2D_C_P<11>PEG_R2D_C_P<12>
PEG_R2D_C_P<10>PEG_R2D_C_P<9>PEG_R2D_C_P<8>
PEG_R2D_C_P<6>PEG_R2D_C_P<7>
PEG_R2D_C_P<5>PEG_R2D_C_P<4>PEG_R2D_C_P<3>
PEG_R2D_C_P<1>PEG_R2D_C_P<2>
PEG_R2D_C_P<0>
PEG_R2D_C_N<15>
PEG_R2D_C_N<13>PEG_R2D_C_N<14>
PEG_R2D_C_N<12>PEG_R2D_C_N<11>PEG_R2D_C_N<10>PEG_R2D_C_N<9>PEG_R2D_C_N<8>PEG_R2D_C_N<7>
PEG_R2D_C_N<4>PEG_R2D_C_N<5>PEG_R2D_C_N<6>
PEG_R2D_C_N<2>PEG_R2D_C_N<3>
PEG_R2D_C_N<0>PEG_R2D_C_N<1>
PEG_D2R_P<15>
PEG_D2R_P<13>PEG_D2R_P<14>
PEG_D2R_P<12>PEG_D2R_P<11>
PEG_D2R_P<8>PEG_D2R_P<9>PEG_D2R_P<10>
PEG_D2R_P<7>PEG_D2R_P<6>PEG_D2R_P<5>
PEG_D2R_P<3>PEG_D2R_P<4>
PEG_D2R_P<2>PEG_D2R_P<1>PEG_D2R_P<0>
PEG_D2R_N<14>PEG_D2R_N<13>PEG_D2R_N<12>PEG_D2R_N<11>PEG_D2R_N<10>
PEG_D2R_N<8>
PEG_D2R_N<6>PEG_D2R_N<5>PEG_D2R_N<4>PEG_D2R_N<3>PEG_D2R_N<2>PEG_D2R_N<1>PEG_D2R_N<0>
PEG_COMP
LVDS_CONN_DDC_DATALVDS_CONN_DDC_CLK
LVDS_IBGTP_LVDS_VBG
GNDGND
LVDS_VDDEN
LVDS_A_CLK_NLVDS_A_CLK_PLVDS_B_CLK_NLVDS_B_CLK_P
LVDS_A_DATA_N<0>LVDS_A_DATA_N<1>LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>LVDS_A_DATA_P<1>LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>LVDS_B_DATA_N<1>LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>LVDS_B_DATA_P<1>LVDS_B_DATA_P<2>
PP1V05_S0
TP_CRT_DDC_DATA
PP1V05_S0
TP_CRT_DDC_CLK
PP1V05_S0
PP1V05_S0PP1V05_S0
PP1V05_S0PP1V05_S0
PEG_D2R_N<15>
PEG_D2R_N<9>
PEG_D2R_N<7>
PP1V5_S0_NBPP1V5_S0_NBPP1V5_S0_NBPP1V5_S0_NB
PP1V5_S0_NBPP1V5_S0_NBPP1V5_S0_NB
67D8
67D8
67D8
67D8
67D8
67D6
67D6
67D6
67D6
67D6
65A2
65A2
65A2
65A2
65A2
55A4
55A4
55A4
55A4
55A4
34C8
34C8
34C8
34C8
34C8
34C6
34C6
34C6 34C6
34C6
34B8
34B8
34B8
34B8
34B8
25D3
25D3
25D3
25D3 25D3
25C4
25C4
25C4
25C4 25C4
24D3
24D3
24D3
24D3
24D3
24C3
24C3
24C3
24C3
24C3
21C1
21C1
21C1
21C1
21C1
19D7
19D7
19D7
19D7
19D7
19D6
19D6
19D6 19D6
19D6
19D5
19D5
19D5
19D5
19D5
67C8
67C8
67C8
67C8
67C8 67C8
67C8
19D2
19D2
19D2
19D2
19D2
67C6
67C6
67C6
67C6
67C6 67C6
67C6
19D1
19D1
19D1
19D1
19D1
67B6 67B6
67B6
67B6 67B6
67B6
67B6
19C8
19C8
19C8
19C8
19C8
62A7
62A7
62A7
62A7
62A7
62A7
62A7
17D6
17D6
17D6
17D6
17D6
19D7
19D7
19D7
19D7
19D7
19D7
19D7
17D3
17D3
17D3
17D3
17D3
19D6
19D6
19D6
19D6
19D6
19D6
19D6
16D3
16D3
16D3
16D3
16D3
19D5
19D5
19D5
19D5
19D5
19D5
19D5
16C8
16C8
16C8
16C8
16C8
19D2
19D2
19D2
19D2
19D2
19D2
19D2
13B5
13B5
13B5
13B5
13B5
19D1
19D1
19D1
19D1
19D1
19D1
19D1
12C2
12C2
12C2
12C2
12C2
19C5
19C5
19C5
19C5
19C5
19C5
19C5
12B7
12B7
12B7
12B7
12B7
19C4
19C4
19C4
19C4
19C4
19C4
19C4
12A7
12A7
12A7
12A7
12A7
19C1
19C1
19C1
19C1
19C1
19C1
19C1
11C5
11C5
11C5
11C5
11C5
19B8
19B8
19B8
19B8
19B8
19B8
19B8
11B3
11B3
11B3
11B3
11B3
19B5
19B5
19B5
19B5
19B5
19B5
19B5
9B7
9B7
9B7
9B7
9B7
19A5
19A5
19A5
19A5
19A5
19A5
19A5
8C7
8C7
8C7
8C7
8C7
17C6
17C6
17C6
17C6
17C6
17C6
17C6
7D5
7D5
7D5
7D5
7D5
17B6
17B6
17B6
17B6
17B6
17B6
17B6
7B6
7B6
7B6
7B6
7B6
16D1
16D1
16D1
16D1
16D1
16D1
16D1
82A7
82A7
7B5
7B5
7B5
7B5
7B5
13D2
13D2
13D2
13D2
13D2
13D2
19D4
13C5
19D4
82A5
82A5
5D4
19D6
5D4
19D6
5D4
5D4
5D4
13C5
13C5
13C5
13C5
13C5
13C5
19D3
5D4
82A4
19D3
82A4
70B5
70B5
70B5
70B5
70B5
70B5
70C5
70C5
70C5
70C5
70C5
70D5
70D5
70D5
70D5
70D5
70B5
70B5
70B5
70B5
70B5
70B5
70C5
70C5
70C5
70C5
70C5
70C5
70D5
70D5
70D5
70D5
70B1
70B1
70B1
70B1
70B1
70C1
70C1
70C1
70C1
70C1
70C1
70D1
70D1
70D1
70D1
70D1
70B1
70B1
70B1
70B1
70B1
70C1
70C1
70C1
70C1
70D1
70D1
70D1
70D1
79C3
79C3
19D3
82A4
82D3
82D3
82C3
82C3
82D3
82D3
82D3
82D3
82D3
82D3
82D3
82C3
82D3
82D3
82C3
82C3
5B2
19D5
5B2
19D5
5B2
5B2
5B2
70B1
70C1
70C1
5D4
5D4
5D4
5D4
5D4
5D4
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SM_CS0*RSVD15
RSVD14
SM_CKE2
RSVD2RSVD3
RSVD6
RSVD4RSVD5
RSVD8RSVD7
RSVD9
RSVD1
RSVD10RSVD11
RSVD12
RSVD13
CFG1CFG0
CFG2
CFG3CFG4
CFG6
CFG5
CFG7
CFG8
CFG9CFG10
CFG11CFG12
CFG13
CFG14
CFG17
CFG16
CFG15
CFG18
CFG19
CFG20
PM_BM_BUSY*
PM_EXTTS0*
PM_EXTTS1*PW_THRMTRIP*
PWROK
RSTIN*
SDVO_CTRLCLKSDVO_CTRLDATA
ICH_SYNC*
CLK_REQ*
NC2NC3
NC4
NC5NC6
NC7
NC8NC9
NC0
NC1
NC13
NC12
NC11NC10
NC18
NC17NC16
NC15
NC14
SM_CK0
SM_CK1SM_CK2
SM_CK0*
SM_CK3
SM_CK1*
SM_CK2*
SM_CK3*
SM_CKE0SM_CKE1
SM_CKE3
SM_CS1*
SM_CS2*SM_CS3*
SMOCDCOMP0
SMOCDCOMP1
SM_ODT1
SM_ODT0
SM_ODT2
SMRCOMP*
SM_ODT3
SMRCOMP
SMVREF0
SMVREF1
G_CLKIN*
G_CLKIND_REFCLKIN*
D_REFCLKIN
D_REFSSCLKIN*D_REFSSCLKIN
DMI_RXN0
DMI_RXN1DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP2
DMI_TXP1
DMI_TXP3
DDR MUXING
CFG
NC
PM
CLK
DMI
MISC
(2 OF 10)
RSVD
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
IN
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCNC
IPD
IPD
(LA_DATAN3)(LA_DATAP3)(LB_DATAN3)(LB_DATAP3)
(H_EDRDY#)(D_PLLMON1)
(H_PROCHOT#)(TESTIN#)
(TV_DCONSEL0)(TV_DCONSEL1)
(H_PLLMON1)(H_PLLMON1#)(H_PCREQ#)
(VSS_MCHDETECT)
(D_PLLMON1#) NCNCNC
NC
NCNC
NCNCNCNCNCNCNCNCNC
NC
NCNCNCNCNC
IPU
IPD
IPU
IPU
IPUIPU
IPU
IPUIPUIPU
IPUIPUIPUIPU
NCNC
IPU
IPU
NC
NC
NC
BGA
NB945GM
OMIT
U1200
K16
K18
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J18
J26
F18
E15
F15
E18
D19
D16
G16
H32
A26
A27
D41
C40
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
AG33
AF33
K28
D1
C41
B2
AY41
AY1
AW41
AW1
A40
A4
A39
A3
C1
BA41
BA40
BA39
BA3
BA2
BA1
B41
G28
F25
H26
G6
AH33
AH34
T32
J29
A41
A35
A34
D28
D27
R32
F3
F7
AG11
AF11
H7
J19
K30
H28
H27
AY35
AW35
AR1
AT1
AW7
AY7
AW40
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
BA13
BA12
AY20
AU21
AL20
AF10
AT9
AV9
AK1
AK41
402MF-LF1/16W5%
100R14301 2
10K
402
5%
MF-LF1/16W
R14411
2
10K
402
5%1/16WMF-LF
R14401
2
0.1uF
402CERM10V20%
C14161
2
0.1uF
402CERM10V20%
C1415 1
2
1/16W1%
402MF-LF
80.6R14101
2
1/16W1%
402MF-LF
80.6R14111
2
1/16W5%
402MF-LF
10KR14201
2
NB Misc InterfacesSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
051-7164 03001
8714
TP_NB_XOR_FSB2_H7
NC_NB_XOR_LVDS_D27NC_NB_XOR_LVDS_D28NC_NB_XOR_LVDS_A34
MEMVREF_OUTMEMVREF_OUT
MEM_RCOMPMEM_RCOMP_L
PP1V8_S3
MEM_CKE<2>
MEM_CS_L<1>MEM_CS_L<2>MEM_CS_L<3>
MEM_ODT<1>MEM_ODT<2>
NB_CFG<12>
MEM_CS_L<0>
NB_BSEL<1>NB_BSEL<0>
NB_BSEL<2>NB_CFG<3>NB_CFG<4>
NB_CFG<6>NB_CFG<5>
NB_CFG<7>
NB_CFG<9>NB_CFG<10>
TP_NB_CFG<14>
NB_CFG<17>NB_CFG<16>TP_NB_CFG<15>
NB_CFG<19>NB_CFG<20>
PM_BMBUSY_L
PM_THRMTRIP_LVR_PWRGOOD_DELAY
TP_SDVO_CTRLCLKTP_SDVO_CTRLDATANB_SB_SYNC_L
MEM_CLK_P<0>MEM_CLK_P<1>MEM_CLK_P<2>
MEM_CLK_N<0>
MEM_CLK_P<3>
MEM_CLK_N<1>MEM_CLK_N<2>MEM_CLK_N<3>
MEM_CKE<0>MEM_CKE<1>
MEM_CKE<3>
MEM_ODT<0>
MEM_ODT<3>
NB_CLK100M_GCLKIN_NNB_CLK100M_GCLKIN_P
DMI_S2N_N<0>DMI_S2N_N<1>DMI_S2N_N<2>DMI_S2N_N<3>
DMI_S2N_P<0>DMI_S2N_P<1>DMI_S2N_P<2>DMI_S2N_P<3>
DMI_N2S_N<0>DMI_N2S_N<1>DMI_N2S_N<2>DMI_N2S_N<3>
DMI_N2S_P<0>
DMI_N2S_P<2>DMI_N2S_P<1>
DMI_N2S_P<3>
PLT_RST_L
NB_CFG<8>
NB_CFG<11>
NB_CFG<13>
NB_CFG<18>
PP3V3_S0
PM_DPRSLPVR
TP_NB_TESTIN_L
NC_NB_XOR_LVDS_A35
NB_TV_DCONSEL0NB_TV_DCONSEL1
PP3V3_S0
NB_CLK_DREFSSCLKIN_PNB_CLK_DREFSSCLKIN_NNB_CLK_DREFCLKIN_PNB_CLK_DREFCLKIN_N
CLK_NB_OE_L
NB_RST_IN_L_R
PM_EXTTS_L
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
25D8
25D3
25D3
25C6
25C6
25C4
25C4
25B8
25B8
25B4
25B4
25A4
25A4
24D3
24D3
67B8
24C3
24C3
67B6
24B5
24B5
64C1
24B3
24B3
64A6
23D5
23D5
37B2
23B3
23B3
32C6
22B5
22B5
31C5
21D3
21D3
29D6
82A4
21C3
21C3
29D3
79A8
20B4
20B4
29B2
26C3
20A4
20A4
28D6
26C1
19C7
19C7
28D3
26B1
19C6
19C6
32B4
32B4
28B2
26A4
17C6
17C6
52D5
32B3
32B3
19D7
34C5
34C5
22A6
14D6
87C6
14C7
34B5
34B5
52D3
29D6
29D6
16B6
52C1
61C7
34C4
34C4
6C7
10C5
61C8
10C5
34B4
34B4
34B4
34B4
51B7
19D4
19D4
19D4
28D6
28D6
5D4
30D6
30D6
30D6
30D6
30C6
30C6
30D6
21C2
26B5
19D4
19D4
22A6
30D6
30D6
30D6
30C6
30C6
33B4
33B4
6C6
5D4
23C3
19D4
5D4
33B4
33B4
34B2
34B2
33B4
29C3
19D3
19D3
19D3
14C2
14C2
5B2
29C6
28B6
29B3
29B6
28B6
29B3
6C6
28B3
34B7
34C7
34B7
6D6
6D6
6D6
20C7
20C7
20B7
6D6
6D7
6D6
20C5
6D7
20B5
20A5
23C5
7C6
5A4
19D3
19D3
5A4
28D3
28A3
29A3
28D3
29D3
28A3
29A3
29D3
28C6
28C3
29C3
28B3
29B6
5B4
5B4
22D2
22D2
22D2
22D2
22D2
22D2
22D2
22D2
22D2
22D2
22D2
22D2
5C4
6D6
6D6
6C6
20B5
5A4
5B4
19D3
5A4
5B4
5B4
5B4
5B4
5B4
28C3
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SA_DQ1
SA_DQ0
SA_DQ2
SA_DQ3SA_DQ4
SA_DQ5
SA_DQ6SA_DQ7
SA_DQ8
SA_DQ9SA_DQ10
SA_DQ12
SA_DQ11
SA_DQ13
SA_DQ14SA_DQ15
SA_DQ16
SA_DQ17SA_DQ18
SA_DQ19
SA_DQ20SA_DQ21
SA_DQ22
SA_DQ23SA_DQ24
SA_DQ25SA_DQ26
SA_DQ27
SA_DQ29SA_DQ28
SA_DQ30
SA_DQ31SA_DQ32
SA_DQ33
SA_DQ35SA_DQ34
SA_DQ36SA_DQ37
SA_DQ38
SA_DQ39SA_DQ40
SA_DQ41
SA_DQ42SA_DQ43
SA_DQ44
SA_DQ46SA_DQ45
SA_DQ47SA_DQ48
SA_DQ49
SA_DQ50SA_DQ51
SA_DQ52
SA_DQ53SA_DQ54
SA_DQ55
SA_DQ56SA_DQ57
SA_DQ58SA_DQ59
SA_DQ60
SA_DQ61SA_DQ62
SA_DQ63
SA_BS1
SA_BS0
SA_BS2
SA_CAS*
SA_DM0SA_DM1
SA_DM2
SA_DM3
SA_DM5
SA_DM4
SA_DM7SA_DM6
SA_DQS0
SA_DQS2
SA_DQS1
SA_DQS3
SA_DQS5
SA_DQS4
SA_DQS6
SA_DQS7
SA_DQS3*SA_DQS2*
SA_DQS4*
SA_DQS5*SA_DQS6*
SA_DQS7*
SA_MA1
SA_MA0
SA_MA2SA_MA3
SA_MA5SA_MA4
SA_MA6
SA_MA7
SA_MA9
SA_MA8
SA_MA10SA_MA11
SA_MA12
SA_MA13
SA_RAS*SA_RCVENIN*
SA_RCVENOUT*
SA_WE*
SA_DQS1*SA_DQS0*
(4 OF 10)
DDR SYSTEM MEMORY A
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
SB_DQ1
SB_DQ0
SB_DQ2
SB_DQ3SB_DQ4
SB_DQ5
SB_DQ6SB_DQ7
SB_DQ8
SB_DQ9SB_DQ10
SB_DQ12
SB_DQ11
SB_DQ13
SB_DQ14SB_DQ15
SB_DQ16
SB_DQ17SB_DQ18
SB_DQ19
SB_DQ20SB_DQ21
SB_DQ22
SB_DQ23SB_DQ24
SB_DQ25SB_DQ26
SB_DQ27
SB_DQ29SB_DQ28
SB_DQ30
SB_DQ31SB_DQ32
SB_DQ33
SB_DQ35SB_DQ34
SB_DQ36SB_DQ37
SB_DQ38
SB_DQ39SB_DQ40
SB_DQ41
SB_DQ42SB_DQ43
SB_DQ44
SB_DQ46SB_DQ45
SB_DQ47SB_DQ48
SB_DQ49
SB_DQ50SB_DQ51
SB_DQ52
SB_DQ53SB_DQ54
SB_DQ55
SB_DQ56SB_DQ57
SB_DQ58SB_DQ59
SB_DQ60
SB_DQ61SB_DQ62
SB_DQ63
SB_BS1
SB_BS0
SB_BS2
SB_CAS*
SB_DM0SB_DM1
SB_DM2
SB_DM3
SB_DM5
SB_DM4
SB_DM7SB_DM6
SB_DQS0
SB_DQS2
SB_DQS1
SB_DQS3
SB_DQS5
SB_DQS4
SB_DQS6
SB_DQS7
SB_DQS3*SB_DQS2*
SB_DQS4*
SB_DQS5*SB_DQS6*
SB_DQS7*
SB_MA1
SB_MA0
SB_MA2SB_MA3
SB_MA5SB_MA4
SB_MA6
SB_MA7
SB_MA9
SB_MA8
SB_MA10SB_MA11
SB_MA12
SB_MA13
SB_RAS*SB_RCVENIN*
SB_RCVENOUT*
SB_WE*
SB_DQS1*SB_DQS0*
(5 OF 10)
DDR SYSTEM MEMORY B
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCNC
NCNC
OMIT
NB945GM
BGA
U1200AU12
AV14
BA20
AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AJ35
AJ34
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AM31
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AM33
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AJ36
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AK35
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AJ32
AG9
AH6
AF4
AF8
AH31
AN35
AP33
AK33
AK32
AT33
AU33
AN28
AN27
AM22
AM21
AN12
AM12
AN8
AL8
AP3
AN3
AG5
AH5
AY16
AU14
AU13
AT17
AV20
AV12
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AW14
AK23
AK24
AY14
OMIT
NB945GM
BGA
U1200AT24
AV23
AY28
AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AK39
AJ37
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
AP39
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AR41
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ38
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
AK38
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AN41
AT4
AK5
AJ5
AJ3
AP41
AT40
AV41
AM39
AM40
AT39
AU39
AU35
AT35
AR29
AP29
AR16
AP16
AR10
AT10
AR7
AT7
AN5
AP5
AY23
AW24
AV24
BA27
AY27
AR23
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AU23
AK16
AK18
AR27
15 87
03001051-7164
NB DDR2 InterfacesSYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
MEM_A_DQ<5>
MEM_A_DQS_N<0>MEM_A_DQS_N<1>
MEM_A_WE_L
MEM_A_RAS_L
MEM_A_A<13>MEM_A_A<12>MEM_A_A<11>MEM_A_A<10>
MEM_A_A<8>MEM_A_A<9>
MEM_A_A<7>MEM_A_A<6>
MEM_A_A<4>MEM_A_A<5>
MEM_A_A<3>MEM_A_A<2>
MEM_A_A<0>MEM_A_A<1>
MEM_A_DQS_N<7>MEM_A_DQS_N<6>MEM_A_DQS_N<5>MEM_A_DQS_N<4>
MEM_A_DQS_N<2>MEM_A_DQS_N<3>
MEM_A_DQS_P<7>MEM_A_DQS_P<6>
MEM_A_DQS_P<4>MEM_A_DQS_P<5>
MEM_A_DQS_P<3>
MEM_A_DQS_P<1>MEM_A_DQS_P<2>
MEM_A_DQS_P<0>
MEM_A_DM<6>MEM_A_DM<7>
MEM_A_DM<4>MEM_A_DM<5>
MEM_A_DM<3>MEM_A_DM<2>MEM_A_DM<1>MEM_A_DM<0>MEM_A_CAS_L
MEM_A_BS<2>
MEM_A_BS<0>MEM_A_BS<1>
MEM_A_DQ<63>MEM_A_DQ<62>MEM_A_DQ<61>MEM_A_DQ<60>MEM_A_DQ<59>MEM_A_DQ<58>MEM_A_DQ<57>MEM_A_DQ<56>MEM_A_DQ<55>MEM_A_DQ<54>MEM_A_DQ<53>MEM_A_DQ<52>MEM_A_DQ<51>MEM_A_DQ<50>MEM_A_DQ<49>MEM_A_DQ<48>MEM_A_DQ<47>
MEM_A_DQ<45>MEM_A_DQ<46>
MEM_A_DQ<44>MEM_A_DQ<43>MEM_A_DQ<42>MEM_A_DQ<41>MEM_A_DQ<40>MEM_A_DQ<39>MEM_A_DQ<38>MEM_A_DQ<37>MEM_A_DQ<36>
MEM_A_DQ<34>MEM_A_DQ<35>
MEM_A_DQ<33>MEM_A_DQ<32>MEM_A_DQ<31>MEM_A_DQ<30>
MEM_A_DQ<28>MEM_A_DQ<29>
MEM_A_DQ<27>MEM_A_DQ<26>MEM_A_DQ<25>MEM_A_DQ<24>MEM_A_DQ<23>MEM_A_DQ<22>MEM_A_DQ<21>MEM_A_DQ<20>MEM_A_DQ<19>MEM_A_DQ<18>MEM_A_DQ<17>MEM_A_DQ<16>MEM_A_DQ<15>MEM_A_DQ<14>MEM_A_DQ<13>
MEM_A_DQ<11>MEM_A_DQ<12>
MEM_A_DQ<10>MEM_A_DQ<9>MEM_A_DQ<8>MEM_A_DQ<7>MEM_A_DQ<6>
MEM_A_DQ<4>MEM_A_DQ<3>MEM_A_DQ<2>
MEM_A_DQ<0>MEM_A_DQ<1>
MEM_B_DQS_N<0>MEM_B_DQS_N<1>
MEM_B_WE_L
MEM_B_RAS_L
MEM_B_A<13>MEM_B_A<12>MEM_B_A<11>MEM_B_A<10>
MEM_B_A<8>MEM_B_A<9>
MEM_B_A<7>MEM_B_A<6>
MEM_B_A<4>MEM_B_A<5>
MEM_B_A<3>MEM_B_A<2>
MEM_B_A<0>MEM_B_A<1>
MEM_B_DQS_N<7>MEM_B_DQS_N<6>MEM_B_DQS_N<5>MEM_B_DQS_N<4>
MEM_B_DQS_N<2>MEM_B_DQS_N<3>
MEM_B_DQS_P<7>MEM_B_DQS_P<6>
MEM_B_DQS_P<4>MEM_B_DQS_P<5>
MEM_B_DQS_P<3>
MEM_B_DQS_P<1>MEM_B_DQS_P<2>
MEM_B_DQS_P<0>
MEM_B_DM<6>MEM_B_DM<7>
MEM_B_DM<4>MEM_B_DM<5>
MEM_B_DM<3>MEM_B_DM<2>MEM_B_DM<1>MEM_B_DM<0>MEM_B_CAS_L
MEM_B_BS<2>
MEM_B_BS<0>MEM_B_BS<1>
MEM_B_DQ<63>MEM_B_DQ<62>MEM_B_DQ<61>MEM_B_DQ<60>MEM_B_DQ<59>MEM_B_DQ<58>MEM_B_DQ<57>MEM_B_DQ<56>MEM_B_DQ<55>MEM_B_DQ<54>MEM_B_DQ<53>MEM_B_DQ<52>MEM_B_DQ<51>MEM_B_DQ<50>MEM_B_DQ<49>MEM_B_DQ<48>MEM_B_DQ<47>
MEM_B_DQ<45>MEM_B_DQ<46>
MEM_B_DQ<44>MEM_B_DQ<43>MEM_B_DQ<42>MEM_B_DQ<41>MEM_B_DQ<40>MEM_B_DQ<39>MEM_B_DQ<38>MEM_B_DQ<37>MEM_B_DQ<36>
MEM_B_DQ<34>MEM_B_DQ<35>
MEM_B_DQ<33>MEM_B_DQ<32>MEM_B_DQ<31>MEM_B_DQ<30>
MEM_B_DQ<28>MEM_B_DQ<29>
MEM_B_DQ<27>MEM_B_DQ<26>MEM_B_DQ<25>MEM_B_DQ<24>MEM_B_DQ<23>MEM_B_DQ<22>MEM_B_DQ<21>MEM_B_DQ<20>MEM_B_DQ<19>MEM_B_DQ<18>MEM_B_DQ<17>MEM_B_DQ<16>MEM_B_DQ<15>MEM_B_DQ<14>MEM_B_DQ<13>
MEM_B_DQ<11>MEM_B_DQ<12>
MEM_B_DQ<10>MEM_B_DQ<9>MEM_B_DQ<8>MEM_B_DQ<7>MEM_B_DQ<6>MEM_B_DQ<5>MEM_B_DQ<4>MEM_B_DQ<3>MEM_B_DQ<2>
MEM_B_DQ<0>MEM_B_DQ<1>
30B6
30B6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30C6
30B6
30B6
30B6
30B6
30A6
30A6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30A6
30A6
30A6
30A6
28D6
28D6
28D6
28B6
28B3
28B3
28C6
28C3
28B6
28C6
28C6
28C3
28C3
28B3
28B6
28B6
28B3
28B3
28B6
28B3
28A3
28A6
28B6
28C6
28C3
28A3
28A3
28B6
28A6
28C3
28D6
28C6
28D6
28A6
28A6
28B3
28A3
28C6
28C3
28D3
28D3
28B6
28C6
28B6
28B3
28B3
28A3
28A6
28B6
28B6
28A6
28B3
28A3
28A3
28A3
28A6
28A3
28A6
28A6
28A3
28A6
28A3
28A6
28A6
28A3
28A6
28A3
28A6
28A3
28B6
28B3
28B6
28B3
28B3
28B6
28B6
28B3
28C3
28C6
28C6
28C3
28C6
28C3
28C6
28C3
28C3
28C3
28C3
28C6
28C6
28C6
28C3
28C6
28D3
28D6
28D6
28D6
28D3
28D6
28D3
28D3
28D6
28D6
28D6
28D3
28D3
28D3
28D3
29D6
29D6
29B6
29B3
29B3
29C6
29C3
29B6
29C6
29C6
29C3
29C3
29B3
29B6
29B6
29B3
29B3
29B6
29A6
29A3
29B3
29B6
29C6
29C3
29A6
29A3
29B6
29A3
29C3
29D6
29C6
29D6
29A6
29A3
29B3
29A6
29C6
29C3
29D3
29D3
29B6
29C6
29B6
29B3
29A3
29A6
29A6
29A6
29A6
29A3
29A3
29A3
29A3
29A6
29A3
29A6
29A6
29A3
29A6
29A3
29A3
29B3
29A3
29B3
29A6
29A6
29B6
29B6
29B3
29B3
29B3
29B6
29B6
29B6
29B6
29B3
29C3
29C3
29C3
29C6
29C6
29C3
29C6
29C6
29C6
29C3
29C6
29C6
29C6
29C3
29C3
29C3
29D6
29D6
29D6
29D3
29D3
29D6
29D3
29D3
29D6
29D3
29D3
29D6
29D3
29D6
29D3
29D6
www.vinafix.vn
VCC_SM19
VCC_SM107
VCC_SM105
VCC_SM106
VCC_SM102
VCC_SM104
VCC_SM103
VCC_SM100
VCC_SM101
VCC_SM98
VCC_SM99
VCC_SM97
VCC_SM95
VCC_SM96
VCC_SM93
VCC_SM94
VCC_SM92
VCC_SM91
VCC_SM90
VCC_SM89
VCC_SM88
VCC_SM86
VCC_SM87
VCC_SM85
VCC_SM84
VCC_SM83
VCC_SM81
VCC_SM80
VCC_SM82
VCC_SM79
VCC_SM78
VCC_SM77
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM73
VCC_SM72
VCC_SM70
VCC_SM71
VCC_SM68
VCC_SM67
VCC_SM69
VCC_SM65
VCC_SM66
VCC_SM64
VCC_SM63
VCC_SM62
VCC_SM61
VCC_SM60
VCC_SM59
VCC_SM58
VCC_SM56
VCC_SM57
VCC_SM55
VCC_SM53
VCC_SM54
VCC_SM52
VCC_SM50
VCC_SM51
VCC_SM49
VCC_SM48
VCC_SM46
VCC_SM47
VCC_SM44
VCC_SM45
VCC_SM43
VCC_SM41
VCC_SM42
VCC_SM40
VCC_SM39
VCC_SM37
VCC_SM38
VCC_SM36
VCC_SM34
VCC_SM35
VCC_SM32
VCC_SM33
VCC_SM30
VCC_SM31
VCC_SM28
VCC_SM29
VCC_SM27
VCC_SM26
VCC_SM25
VCC_SM23
VCC_SM24
VCC_SM22
VCC_SM21
VCC_SM20
VCC_SM18
VCC_SM16
VCC_SM17
VCC_SM15
VCC_SM13
VCC_SM14
VCC_SM11
VCC_SM12
VCC_SM10
VCC_SM9
VCC_SM8
VCC_SM7
VCC_SM6
VCC_SM5
VCC_SM4
VCC_SM3
VCC_SM0
VCC_SM1
VCC_SM2
VCC_110
VCC_109
VCC_108
VCC_105
VCC_106
VCC_107
VCC_104
VCC_103
VCC_101
VCC_100
VCC_102
VCC_98
VCC_99
VCC_96
VCC_97
VCC_95
VCC_94
VCC_93
VCC_92
VCC_91
VCC_90
VCC_88
VCC_89
VCC_87
VCC_86
VCC_85
VCC_83
VCC_84
VCC_82
VCC_80
VCC_81
VCC_79
VCC_78
VCC_76
VCC_77
VCC_74
VCC_73
VCC_75
VCC_72
VCC_71
VCC_70
VCC_69
VCC_68
VCC_67
VCC_66
VCC_65
VCC_64
VCC_62
VCC_63
VCC_61
VCC_60
VCC_59
VCC_57
VCC_58
VCC_55
VCC_56
VCC_53
VCC_54
VCC_52
VCC_50
VCC_51
VCC_49
VCC_46
VCC_47
VCC_48
VCC_44
VCC_45
VCC_43
VCC_42
VCC_41
VCC_40
VCC_39
VCC_38
VCC_37
VCC_36
VCC_34
VCC_35
VCC_33
VCC_32
VCC_31
VCC_30
VCC_28
VCC_29
VCC_25
VCC_26
VCC_27
VCC_24
VCC_23
VCC_21
VCC_20
VCC_22
VCC_13
VCC_14
VCC_12
VCC_16
VCC_15
VCC_17
VCC_18
VCC_19
VCC_11
VCC_10
VCC_9
VCC_8
VCC_7
VCC_4
VCC_5
VCC_6
VCC_2
VCC_3
VCC_0
VCC_1
(6 OF 10)
VCC
VCCAUX_NCTF57VCCAUX_NCTF56
VCCAUX_NCTF55
VCCAUX_NCTF54VCCAUX_NCTF53
VCCAUX_NCTF52
VCCAUX_NCTF51VCCAUX_NCTF50
VCCAUX_NCTF49
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF45
VCCAUX_NCTF44
VCCAUX_NCTF46
VCCAUX_NCTF40VCCAUX_NCTF39
VCCAUX_NCTF37VCCAUX_NCTF38
VCCAUX_NCTF36
VCCAUX_NCTF34VCCAUX_NCTF35
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF31
VCCAUX_NCTF30
VCCAUX_NCTF29
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF26
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF22
VCCAUX_NCTF21
VCCAUX_NCTF23
VCCAUX_NCTF42VCCAUX_NCTF43
VCCAUX_NCTF41
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF18VCCAUX_NCTF17
VCCAUX_NCTF16
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF13VCCAUX_NCTF12
VCCAUX_NCTF11
VCCAUX_NCTF9VCCAUX_NCTF10
VCCAUX_NCTF8
VCCAUX_NCTF7VCCAUX_NCTF6
VCCAUX_NCTF5VCCAUX_NCTF4
VCCAUX_NCTF3
VCCAUX_NCTF1
VCCAUX_NCTF0
VCCAUX_NCTF2
VSS_NCTF12VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF7
VSS_NCTF8
VSS_NCTF5VSS_NCTF6
VSS_NCTF4
VSS_NCTF2VSS_NCTF3
VSS_NCTF0VSS_NCTF1
VCC_NCTF72VCC_NCTF71
VCC_NCTF70
VCC_NCTF69VCC_NCTF68
VCC_NCTF67VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF60
VCC_NCTF57VCC_NCTF58
VCC_NCTF59
VCC_NCTF56VCC_NCTF55
VCC_NCTF53
VCC_NCTF54
VCC_NCTF52
VCC_NCTF50
VCC_NCTF51
VCC_NCTF49
VCC_NCTF48
VCC_NCTF46VCC_NCTF47
VCC_NCTF45VCC_NCTF44
VCC_NCTF43
VCC_NCTF41
VCC_NCTF40
VCC_NCTF42
VCC_NCTF38VCC_NCTF39
VCC_NCTF36
VCC_NCTF37
VCC_NCTF34
VCC_NCTF35
VCC_NCTF33
VCC_NCTF31
VCC_NCTF32
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28VCC_NCTF27
VCC_NCTF26
VCC_NCTF25VCC_NCTF24
VCC_NCTF23VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF18
VCC_NCTF19
VCC_NCTF17VCC_NCTF16
VCC_NCTF15
VCC_NCTF13VCC_NCTF14
VCC_NCTF11VCC_NCTF12
VCC_NCTF10
VCC_NCTF8VCC_NCTF9
VCC_NCTF7
VCC_NCTF6VCC_NCTF5
VCC_NCTF4
VCC_NCTF3VCC_NCTF2
VCC_NCTF0VCC_NCTF1
(7 OF 10)
NCTF
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCTF balls are Not Critical To Function
These connections can break withoutimpacting part performance.
Layout Note:Place near pin BA23
Place near pin BA15Layout Note:
Layout Note:Place in cavity
1.05V or 1.5V
1.05V, External Graphics: 1500mA Max1.5V, Internal Graphics: 5500mA Max
1.05V, Internal Graphics: 3500mA Max
667MTs 1700mA 3200mA533MTs 1500mA 2800mA400MTs 1300mA 2400mASpeed 1 Channel 2 Channel
1.8V Max Current
BGA
NB
945GM
OMIT
U1200
AA33
W33
P32
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
N32
L16
M32
L32
J32
AA31
W31
V31
T31
R31
P33
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
N33
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
L33
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
J33
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
AA32
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
Y32
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
W32
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
V32
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
AU41
AT41
AR34
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM41
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
AU40
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
BA34
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AY34
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AW34
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AV34
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AU34
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AT34
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
CERM-X5R6.3V
402
0.47UF10%
C16101
2
603
20%
X5R6.3V
10uFC16211
2
10uF6.3VX5R
20%
603
C1620 1
2
945GMNBBGA
OMIT
U1200AD27
AC27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AB27
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AA27
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
Y27
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
W27
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
V27
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
U27
V18
U18
T18
T27
R27
AG27
AF27
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AG26
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
AF26
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
AG25
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AF25
AB15
AA15
Y15
W15
V15
U15
T15
R15
AG24
AF24
AG23
AF23
AE27
AE26
AC17
Y17
U17
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
10%0.47UF
402
6.3VCERM-X5R
C16111
2CERM-X5R6.3V
402
0.47UF10%
C1612 1
2CERM-X5R6.3V
402
0.47UF10%
C16131
2CERM-X5R6.3V
402
0.47UF10%
C1614 1
2
CERM-X5R6.3V
402
0.47UF10%
C16151
2
NB Power 1SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
051-7164 03001
8716
PP1V8_S3NB_VCCSM_LF1NB_VCCSM_LF2
NB_VCCSM_LF5NB_VCCSM_LF4
PP1V05_S0
PP1V05_S0
PP1V5_S0_NB
67D8
67D8
67D6
67D6
65A2
65A2
55A4
55A4
34C8
34C8
34C6
34C6
34B8
34B8
25D3
25D3
25C4
25C4
24D3
24D3
24C3
24C3
21C1
21C1
19D7
19D7
19D6
19D6
19D5
19D5
67C8
19D2
19D2
67C6
19D1
19D1
67B6
67B8
19C8
19C8
62A7
67B6
17D6
17D6
19D7
64C1
17D3
17D3
19D6
64A6
16D3
16C8
19D5
37B2
13B5
13B5
19D2
32C6
12C2
12C2
19D1
31C5
12B7
12B7
19C5
29D6
12A7
12A7
19C4
29D3
11C5
11C5
19C1
29B2
11B3
11B3
19B8
28D6
9B7
9B7
19B5
28D3
8C7
8C7
19A5
28B2
7D5
7D5
17C6
19D7
7B6
7B6
17B6
14C2
7B5
7B5
13D2
5D4
5D4
5D4
13C5
5B2
5B2
5B2
5D4
www.vinafix.vn
VTT0
VTT1VTT2
VTT3VTT4
VTT5
VTT6VTT7
VTT8
VTT9VTT10
VTT11
VTT12VTT13
VTT15VTT14
VTT16
VTT18VTT17
VTT19
VTT20VTT21
VTT22
VTT23VTT24
VTT25
VTT27
VTT26
VTT28VTT29
VTT31
VTT30
VTT32
VTT34
VTT33
VTT35
VTT36VTT37
VTT39
VTT38
VTT40
VTT41
VTT42VTT43
VTT44
VTT45
VTT48
VTT46
VTT47
VTT49
VTT50
VTT52
VTT51
VTT53
VTT55
VTT54
VTT57VTT56
VTT58VTT59
VTT60
VTT61VTT62
VTT64
VTT63
VTT65
VTT66
VTT67
VTT69
VTT68
VTT70
VTT71
VTT73VTT72
VTT74
VTT76VTT75
VCCSYNC
VCC_TXLVDS0VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G3
VCC3G2
VCC3G4
VCC3G6
VCC3G5
VCCA_3GPLLVCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLB
VCCA_DPLLA
VCCA_HPLL
VSSA_LVDS
VCCA_LVDS
VCCA_MPLL
VCCA_TVBGVSSA_TVBG
VCCA_TVDACC0
VCCA_TVDACC1
VCCA_TVDACB0VCCA_TVDACB1
VCCA_TVDACA0
VCCA_TVDACA1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS2
VCCD_LVDS0
VCCD_LVDS1
VCCD_TVDAC
VCC_HV1
VCC_HV2
VCC_HV0
VCCD_QTVDAC
VCCAUX19
VCCAUX18
VCCAUX17VCCAUX16
VCCAUX14
VCCAUX15
VCCAUX13
VCCAUX12
VCCAUX11VCCAUX10
VCCAUX0
VCCAUX1
VCCAUX2VCCAUX3
VCCAUX4
VCCAUX6VCCAUX5
VCCAUX9VCCAUX8
VCCAUX7
VCCAUX21
VCCAUX20
VCCAUX23
VCCAUX24
VCCAUX22
VCCAUX25
VCCAUX26
VCCAUX29
VCCAUX28VCCAUX27
VCCAUX30VCCAUX31
VCCAUX33VCCAUX32
VCCAUX34
VCCAUX35VCCAUX36
VCCAUX38
VCCAUX37
VCCAUX39
VCCAUX40
POWER
(8 OF 10)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1500mA Max VCC3G/3GPLL
800mA Max
2mA Max
60mA Max
70mA Max VCCA_CRTDAC/VCCSYNC
20mA Max
24mA Max
10mA Max
50mA Max50mA Max
45mA Max
45mA Max
120mA Max
150mA Max
See VCCSYNC
40mA Max
1900mA Max
945GMNBBGA
OMIT
U1200
AJ41
AB41
Y41
V41
R41
N41
L41
A23
B23
B25
C30
B30
A30
G41
AC33
F21
E21
B26
C39
AF1
A38
AF2
H20
E19
F19
C20
D20
E20
F20
AK31
AF31
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE31
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
AC31
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AL30
AD12
AK30
AJ30
AH30
AG30
AF30
AH1
AH2
A28
B28
C28
H19
D21
H22
H41
G21
B39
G20
AC14
AB14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
W14
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
V14
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
T14
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
R14
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
P14
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
N14
M2
D2
AB1
R1
P1
N1
M1
M14
L14
402CERM-X5R
6.3V
0.47UF10%
C1711 1
2 X5R402
6.3V
0.22uF20%
C17121
2
402
6.3VCERM-X5R
0.47UF10%
C1713 1
2
17 87
03001051-7164
NB Power 2SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
PP1V5_S0_NB
PP1V5_S0_NB
PP1V05_S0
NB_VTTLF_CAP3
NB_VTTLF_CAP2NB_VTTLF_CAP1
GND
PP2V5_S0
PP1V5_S0_NB_VCC3G
PP1V5_S0_NB_VCCA_3GPLLPP2V5_S0GND
GND
PP1V5_S0_NB_VCCA_DPLLBPP1V5_S0_NB_VCCA_DPLLA
PP1V5_S0_NB_VCCA_HPLL
GNDPP2V5_S0
PP1V5_S0_NB_VCCA_MPLL
PP1V5_S0_NBGND
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
PP3V3_S0
PP1V5_S0_NB
PP1V5_S0_NB
PP1V05_S0
82D5 82C6 82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6 66B5 66B1 65D6 65B3 62A6 61D8 61A5 60D4 60C7 58C7
58C4 57B6 54D4 54B5 52D3 49C7 49C4 49B5 40B6 36D6
34A8 33D8 33D3 33C7 29A6 29A3
67D8
28A6
67D8
67D6
27D8
67D6
65A2
27D5
65A2
55A4
27D3
55A4
34C8
27C3
34C8
34C6
26D1
34C6
34B8
26B8
34B8
25D3
26B6
25D3
25C4
26B4
25C4
24D3
25D8
24D3
24C3
25D3
24C3
21C1
25C6
21C1
19D7
25C4
19D7
67C8
67C8
19D6
67C8
67C8
67C8
67C8
67C8
25B8
67C8
67C8
19D6
67C6
67C6
19D5
67C6
67C6
67C6
67C6
67C6
25B4
67C6
67C6
19D5
67B6
67B6
19D2
67B6
67B6
67B6
67B6
67B6
25A4
67B6
67B6
19D2
62A7
62A7
19D1
62A7
62A7
62A7
62A7
62A7
24D3
62A7
62A7
19D1
19D7
19D7
19C8
19D7
19D7
19D7
19D7
19D7
24C3
19D7
19D7
19C8
19D6
19D6
17D6
19D6
19D6
19D6
19D6
19D6
24B5
19D6
19D6
17D3
19D5
19D5
16D3
82D3
82D3
19D5
19D5
19D5
19D5
19D5
24B3
19D5
19D5
16D3
19D2
19D2
16C8
82C5
82C5
82D3
19D2
19D2
19D2
19D2
19D2
23D5
19D2
19D2
16C8
19D1
19D1
13B5
67B6
67B6
82C5
19D1
19D1
19D1
19D1
19D1
23B3
19D1
19D1
13B5
19C5
19C5
12C2
67A8
67A8
67B6
19C5
19C5
19C5
19C5
19C5
22B5
19C5
19C5
12C2
19C4
19C4
12B7
67A6
67A6
67A8
19C4
19C4
19C4
19C4
19C4
21D3
19C4
19C4
12B7
19C1
19C1
12A7
66B5
66B5
67A6
19C1
19C1
19C1
19C1
19C1
21C3
19C1
19C1
12A7
19B8
19B8
11C5
63D1
63D1
66B5
19B8
19B8
19B8
19B8
19B8
20B4
19B8
19B8
11C5
19B5
19B5
11B3
19D7
19D7
63D1
19B5
19B5
19B5
19B5
19B5
20A4
19B5
19B5
11B3
19A5
19A5
9B7
19C5
19C5
19D7
19A5
19A5
19A5
19A5
19A5
19C7
19A5
19A5
9B7
17C6
17C6
8C7
19A8
19A8
19C5
17C6
17C6
17C6
17C6
17C6
19C6
17C6
17C6
8C7
17B6
17B6
7D5
19A6
19A6
19A8
17B6
17B6
17B6
17B6
17B6
14D6
17B6
17B6
7D5
16D1
16D1
7B6
19A4
19A4
19A6
16D1
16D1
16D1
16D1
16D1
14C7
16D1
16D1
7B6
13D2
13D2
7B5
17D6
17D6
19A4
13D2
13D2
13D2
13D2
13D2
10C5
13D2
13D2
7B5
13C5
13C5
5D4
17C6
17C6
34B2
17D6
13C5
13C5
13C5
13C5
13C5
5D4
13C5
13C5
5D4
5D4
5D4
5B2
5D4
19B3
19B3
5D4
19A6
19A6
19B6
5D4
19B6
5D4
5D4
5D4
5D4
5D4
5A4
5D4
5D4
5B2
www.vinafix.vn
VSS_1
VSS_0
VSS_2
VSS_3
VSS_4VSS_5
VSS_6VSS_7
VSS_9
VSS_8
VSS_10
VSS_11
VSS_12VSS_13
VSS_14
VSS_15VSS_16
VSS_17
VSS_19
VSS_18
VSS_20VSS_21
VSS_22
VSS_23VSS_24
VSS_25
VSS_26
VSS_28
VSS_27
VSS_29
VSS_30
VSS_31VSS_32
VSS_33
VSS_34VSS_35
VSS_37
VSS_36
VSS_39
VSS_38
VSS_40
VSS_41
VSS_42VSS_43
VSS_44
VSS_45VSS_46
VSS_47
VSS_49VSS_48
VSS_50VSS_51
VSS_52
VSS_53VSS_54
VSS_55
VSS_57VSS_56
VSS_59
VSS_58
VSS_61
VSS_60
VSS_64
VSS_63
VSS_62
VSS_65
VSS_66
VSS_67VSS_68
VSS_69
VSS_70VSS_71
VSS_73VSS_72
VSS_74
VSS_75VSS_76
VSS_77
VSS_78VSS_79
VSS_82
VSS_80
VSS_81
VSS_84VSS_83
VSS_85
VSS_87VSS_86
VSS_89
VSS_88
VSS_91
VSS_90
VSS_92VSS_93
VSS_94
VSS_96
VSS_95
VSS_97
VSS_98VSS_99
VSS_100
VSS_101VSS_102
VSS_103VSS_104
VSS_105
VSS_106VSS_107
VSS_108
VSS_109VSS_110
VSS_111
VSS_112
VSS_114
VSS_113
VSS_115
VSS_117
VSS_116
VSS_118
VSS_119
VSS_120VSS_121
VSS_122
VSS_123VSS_124
VSS_125
VSS_127
VSS_126
VSS_128VSS_129
VSS_130
VSS_131VSS_132
VSS_133
VSS_134VSS_135
VSS_137VSS_136
VSS_138
VSS_139VSS_140
VSS_141
VSS_143VSS_142
VSS_144
VSS_145VSS_146
VSS_147VSS_148
VSS_149
VSS_150VSS_151
VSS_152
VSS_153VSS_154
VSS_155
VSS_156
VSS_158
VSS_157
VSS_159
VSS_160
VSS_161VSS_162
VSS_164
VSS_163
VSS_165
VSS_166
VSS_167VSS_168
VSS_169VSS_170
VSS_172
VSS_171
VSS_173
VSS_174
VSS_175VSS_176
VSS_177
VSS_178VSS_179
VSS
(9 OF 10)
VSS_272
VSS_271
VSS_269
VSS_270
VSS_268
VSS_266
VSS_267
VSS_265VSS_264
VSS_263
VSS_261VSS_262
VSS_260VSS_259
VSS_258
VSS_256VSS_257
VSS_255
VSS_254VSS_253
VSS_251
VSS_252
VSS_250
VSS_248VSS_249
VSS_247
VSS_246VSS_245
VSS_243
VSS_244
VSS_242
VSS_241
VSS_240
VSS_238
VSS_239
VSS_237
VSS_236
VSS_235
VSS_233
VSS_234
VSS_232VSS_231
VSS_230
VSS_228VSS_229
VSS_227
VSS_225
VSS_226
VSS_224VSS_223
VSS_222
VSS_220VSS_221
VSS_219
VSS_218VSS_217
VSS_215VSS_216
VSS_214
VSS_213VSS_212
VSS_210
VSS_211
VSS_209
VSS_207
VSS_208
VSS_205
VSS_206
VSS_204
VSS_202
VSS_203
VSS_201
VSS_200
VSS_199
VSS_197
VSS_198
VSS_196VSS_195
VSS_194
VSS_192
VSS_193
VSS_191VSS_190
VSS_189
VSS_187VSS_188
VSS_186
VSS_184VSS_185
VSS_183VSS_182
VSS_180
VSS_181
VSS_273
VSS_274
VSS_276VSS_275
VSS_277
VSS_279
VSS_278
VSS_281VSS_280
VSS_282
VSS_283VSS_284
VSS_286
VSS_285
VSS_287
VSS_288VSS_289
VSS_291
VSS_290
VSS_293
VSS_292
VSS_294
VSS_296
VSS_295
VSS_297
VSS_299
VSS_298
VSS_301
VSS_302
VSS_300
VSS_304
VSS_303
VSS_305VSS_306
VSS_307
VSS_309VSS_308
VSS_311VSS_310
VSS_312
VSS_313VSS_314
VSS_315
VSS_317VSS_316
VSS_318
VSS_319VSS_320
VSS_322VSS_321
VSS_323
VSS_324VSS_325
VSS_327
VSS_326
VSS_328
VSS_329
VSS_330
VSS_332
VSS_331
VSS_334
VSS_333
VSS_335
VSS_337
VSS_336
VSS_338VSS_339
VSS_340
VSS_342
VSS_343
VSS_341
VSS_345
VSS_344
VSS_346VSS_347
VSS_348
VSS_350VSS_349
VSS_352
VSS_351
VSS_353
VSS_354VSS_355
VSS_356
VSS_357VSS_358
VSS_359
VSS_360
VSS
(10 OF 10)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NB
945GM
BGA
OMIT
U1200AC41
AA41
AN40
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
AK40
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AJ40
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AH40
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
AG40
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AF40
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
AE40
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
B40
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AY39
AW39
W41
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T41
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
P41
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
M41
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
J41
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
F41
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AV40
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
AP40
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34
NB945GM
BGA
OMIT
U1200AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
NB Grounds
051-7164 03001
8718
www.vinafix.vn
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
NR/FBINEN
OUT
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
800mA Max
These are the power signals that leave the NB "block"Power Interface
40mA Max
MCH VCC_HV BYPASS(MCH HV BUFFER 3.3V PWR)
Layout Note: Route to caps, then GND
(MCH MEMORY PLL 1.5V PWR)
1500mA Max
1500mA Max 10mA Max?
GMCH CORE PWR 1.05V BYPASS
1900mA Max
3200mA Max
(MCH TVDAC DEDICATED PWR 1.5V)
(MCH TVDAC DIGITAL QUIET 1.5V PWR)
(MCH TV OUT CHANNEL A 3.3V PWR)
(MCH TV OUT CHANNEL B 3.3V PWR)
(MCH TV DAC BAND GAP 3.3V PWR)
(MCH TV OUT CHANNEL C 3.3V PWR)
(MCH CRTDAC ANALOG 2.5V PWR)
(MCH H/V SYNC 2.5V PWR)
Rail Totals:
2310mA Max?
?mA Max
?mA Max 100mA Max
800mA Max
3674mA Max
40mA Max 40mA Max?
2mA Max
150mA Max
3200mA Max
1500mA Max
24mA Max
70mA Max
?mA Max
Layout Note: Route to caps, then GND
10MA MAX
(MCH LVDS ANALOG 2.5V PWR)MCH VCCA_LVDS BYPASS
132mA Max
?mA Max
60mA Max
GMCH VCC3G FILTER(PCI-E/DMI ANALOG 1.5V PWR)
1500mA Max
(3GIO PLL 1.5V PWR)GMCH VCCA_3GPLL FILTER
Layout Note:
be close to MCH10uF caps should
on opposite side.
(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V)GMCH VCCAUX FILTER
1900mA Max
(MCH PCIE/DMI BAND GAP 2.5V PWR)
2mA Max
MCH VCCA_3GBG BYPASS
be placed in cavity3GPLL 10uF cap shouldLayout Note:
Layout Note:Place L and Cclose to MCH
Place on the edgeLayout Note:
(SHARE C0940 470UF)
45mA Max
45mA Max
GMCH VCCA_HPLL FILTER(HOST PLL 1.5V PWR)
GMCH VCCA_MPLL FILTER
MCH VTT BYPASS(MCH FSB 1.05V PWR)
Layout Note:Place in cavity
100mA Max
(MCH LVDS DIGITAL 1.5V PWR)MCH VCCD_LVDS BYPASS
20MA MAX
GMCH VCCA_DPLLA FILTER
50MA MAX
50MA MAX
(CRT/TVOUT PLL 1.5V PWR)
GMCH VCCA_DPLLB FILTER(LVDS PLL 1.5V PWR)
1500mA Max
60MA MAX
(MCH LVDS TRANSMITTER 2.5V PWR)MCH VCC_TXLVDS BYPASS
402
20%6.3VX5R
0.22uFC19071
2
10uF6.3V20%
603X5R
C19721
2
6.3V20%
402X5R
0.22uFC19671
26.3V
603
2.2uF20%
CERM1
C19661
26.3V20%
603CERM
4.7uFC19651
2
20%2.5VTANTD2T
470uF
CRITICAL
C19001
23
1210
91nHL1970
1 2
0.1uF
402
20%10V
CERM
C1916 1
2
0.22uF
X5R402
20%6.3V
C19061
2
0.1uF
CERM402
20%10V
C19911
2
4.7UF6.3V20%
603CERM
C1990 1
2 10V20%
402CERM
0.1uFC19931
2
10uF
X5R603
20%6.3V
C1992 1
2
0.1uF
CERM402
20%10V
C19951
2
20%16V
CERM402
0.01UFC1994 1
220%10uF6.3VX5R603
C19521
2
402MF-LF1/16W1%1.5KR19901
2
SOT23-5TPS73115
CRITICAL
U1900
3
2
145
402CERM
1uF10%
6.3V
C1950 1
2402
CERM
0.01uF10%16V
C1951 1
2
402MF-LF1/16W5%
0R19541 2
402MF-LF1/16W5%
0
NO STUFF
R19531 2
0.1uF
402
10V20%
NO STUFF
CERM
C1953 1
2
10V20%
402CERM
0.1uFC19151
2
0.1uF
402CERM10V20%
C19541
2
CASE-B2
220UF20%2.5VPOLY
C19701
2
20%6.3V
603X5R
10uFC1914 1
2
402
0.22uF
X5R
20%6.3V
C19051
2
20%10V
402CERM
0.1uFC19351
2
FERR-120-OHM-0.2A
0603
L1934
1 2
402CERM
20%0.1uF10V
C19371
2
10%
CERM
1uF6.3V
402
C19041
2
0603
FERR-120-OHM-0.2AL1936
1 2
22UF
CERM805
20%6.3V
C1934 1
2
22UF
CERM805
20%6.3V
C1936 1
2
603
10uF20%
X5R6.3V
C19031
2
10uF
603
20%6.3VX5R
C19021
2
0.1uF10V20%
402CERM
C1918 1
2
0.1uF
CERM402
20%10V
C19761
2
0805
1.0UH-220MA-0.12-OHML1975
1 2
10uF
X5R603
20%6.3V
C1975 1
2
1%1/16W
0.51
402MF-LF
R19751 2
6.3V20%
603X5R
10uFC19711
2
19 87
03001051-7164
SYNC_MASTER=M57_MLB_MG SYNC_DATE=08/08/2006
NB (GM) Decoupling
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPP1V5_S0_NB_VCC3G
VOLTAGE=1.5V
PP2V5_S0
TPS73115_NRVOLTAGE=1.5V
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
PP1V5_S0_NB_VCCA_DPLLB PP2V5_S0VOLTAGE=1.5V
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
PP1V5_S0_NB_DPLL
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.5V
PP1V5_S0_NB_VCCA_DPLLA
PP2V5_S0
PP1V5_S0_NB
MIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mmPP1V5_S0_NB_3GPLL_F
VOLTAGE=1.5VVOLTAGE=1.5V
PP1V5_S0_NB_VCCA_MPLLMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
PP1V5_S0_NB_VCCA_HPLL
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
VOLTAGE=1.5V
PP1V5_S0_NB_VCCA_3GPLL
PP1V5_S0_NB
PP1V5_S0_NB
PP1V05_S0
PP2V5_S0
GND
GND
GND
LVDS_IBG
GND
TP_CRT_DDC_DATA
MAKE_BASE=TRUETP_SDVO_CTRLDATA TP_SDVO_CTRLDATAMAKE_BASE=TRUE
TP_SDVO_CTRLCLK TP_SDVO_CTRLCLK
MAKE_BASE=TRUE NO_TEST=TRUENC_NB_XOR_LVDS_D28 NC_NB_XOR_LVDS_D28MAKE_BASE=TRUE NO_TEST=TRUE
NC_NB_XOR_LVDS_D27 NC_NB_XOR_LVDS_D27
MAKE_BASE=TRUE NO_TEST=TRUENC_NB_XOR_LVDS_A34 NC_NB_XOR_LVDS_A34
MAKE_BASE=TRUE NO_TEST=TRUENC_NB_XOR_LVDS_A35 NC_NB_XOR_LVDS_A35
MAKE_BASE=TRUETP_LVDS_CLKCTLB TP_LVDS_CLKCTLBMAKE_BASE=TRUE
TP_LVDS_CLKCTLA TP_LVDS_CLKCTLA
PP1V5_S0_NBPP1V5_S0_NB
PP1V5_S0_NB
PP1V05_S0
PP1V5_S0_NB
PP1V05_S0
PP3V3_S0PP3V3_S0
PP1V5_S0_NB
MAKE_BASE=TRUETP_CRT_DDC_CLK TP_CRT_DDC_CLK
PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0
PP1V05_S0
PP1V5_S0_NB
PP1V5_S0_NBPP1V5_S0_NB
GND
PP1V5_S0_NB
PP1V05_S0
PP1V5_S0_NB
GND
PP1V05_S0
GND
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
GND
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
MAKE_BASE=TRUETP_CRT_DDC_DATA
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NB
GND
PP3V3_S0
PP1V05_S0
PP2V5_S0PP2V5_S0GND
PP1V8_S3
PP1V5_S0_NB
PP1V05_S0
PP1V5_S0_NBPP1V5_S0_NB
PP1V05_S0
82D5 82C6
82D5
82B3
82C6
82A4
82B3
79D3
82A4
79A8
79D3
71D2
79A8
67C5
71D2
67C3
67C5
67B3
67C3
67A3
67B3
66B6
67A3
66B5
66B6
66B1
66B5
65D6
66B1
65B3
65D6
62A6
65B3
61D8
62A6
61A5
61D8
60D4
61A5
60C7
60D4
58C7
60C7
58C4
58C7
57B6
58C4
54D4
57B6
54B5
54D4
52D3
54B5
49C7
52D3
49C4
49C7
49B5
49C4
40B6
49B5
36D6
40B6
34A8
36D6
33D8
34A8
33D3
33D8
33C7
33D3
29A6
33C7
29A3
29A6
67D8
67D8
28A6
67D8
67D8
67D8
67D8
67D8
29A3
67D8
67D8
67D8
67D6
67D6
27D8
67D6
67D6
67D6
67D6
67D6
67D8
67D8 67D8
28A6
67D6
67D6
67D6
65A2
65A2
27D5
65A2
65A2
65A2
65A2
65A2
67D6 67D6
67D6
27D8
65A2
65A2
65A2
55A4
55A4
27D3
55A4
55A4 55A4
55A4
55A4
65A2 65A2
65A2
27D5
55A4
55A4
55A4
34C8
34C8
27C3
34C8
34C8 34C8
34C8
34C8
55A4 55A4
55A4
27D3
34C8
34C8
34C8
34C6
34C6
26D1
34C6
34C6
34C6 34C6
34C6 34C8
34C8
34C8
27C3
34C6
34C6
34C6
34B8
34B8
26B8
34B8
34B8
34B8 34B8
34B8 34C6
34C6
34C6
26D1
34B8
34B8
34B8
25D3
25D3
26B6
25D3
25D3
25D3 25D3
25D3 34B8
34B8
34B8
26B8
25D3
25D3
25D3
25C4
25C4
26B4
25C4
25C4
25C4 25C4
25C4 25D3
25D3
25D3
26B6
25C4
25C4
25C4
24D3
24D3
25D8
24D3
24D3
24D3 24D3
24D3 25C4
25C4
25C4
26B4
24D3
24D3
24D3
24C3
24C3
25D3
24C3
24C3
24C3
24C3
24C3 24D3
24D3
24D3
25D8
24C3
24C3
24C3
21C1
21C1
25C6
21C1
21C1
21C1
21C1
21C1 24C3
24C3
24C3
25D3
21C1
21C1
21C1
19D7
19D7
25C4
19D7
19D7
19D7
19D7
19D7 21C1 21C1
21C1
25C6
19D7
19D7
19D7
19D6
19D6
25B8
19D6
19D6
19D6
19D6
19D6 19D7 19D7
19D7
25C4
19D6
19D6
19D6
67C8
19D5
67C8
67C8
19D5
67C8
25B4
67C8
19D5
19D5
19D5
19D5
19D5
19D5
67C8
67C8
67C8
67C8
19D6
19D6
67C8
67C8
67C8
67C8
67C8
67C8
67C8
67C8
67C8
67C8
25B8
19D5
67C8
19D5
67C8
19D5
67C8
67C6
67C8
19D2
67C6
67C6
67C8
19D2
67C6
25A4
67C6
19D2
19D2
19D2
19D2
19D2 19D2
67C6
67C6
67C6
67C6
19D5
67C8
19D5
67C6
67C6
67C6
67C6
67C6
67C6
67C6
67C6
67C6
67C6
67C8
25B4
19D2
67C6
19D2
67C6
19D2
67C6
67B6
67C6
19D1
67B6
67B6
67C6
19D1
67B6
24D3
67B6
19D1
19D1
19D1
19D1
19D1 19D1
67B6
67B6
67B6
67B6
19D1
67C6
19D2
67B6
67B6
67B6
67B6
67B6
67B6
67B6
67B6
67B6
67B6
67C6
25A4
19D1
67B6
19D1
67B6
19D1
67B6
62A7
67B6
19C8
62A7
62A7
67B6
19C8
62A7
24C3
62A7
19C8
19C8
19C8
19C8
19C8 19C8
62A7
62A7
62A7
62A7
19C8
67B6
19C8
62A7
62A7
62A7
62A7
62A7
62A7
62A7
62A7
62A7
62A7
67B6
24D3
19C8
62A7
19C8
62A7
19C8
62A7
19D7
62A7
17D6
19D7
19D7
62A7
17D6
19D7
24B5
19D7
17D6
17D6
17D6
17D6
17D6 17D6
19D7
19D7
19D7
19D7
17D6
62A7
17D6
19D7
19D7
19D7
19D7
19D7
19D7
19D7
19D7
19D7
19D7
62A7
24C3
17D6
19D7
17D6
19D7
17D6
19D7
19D6
19D7
17D3
19D6
19D6
19D7
17D3
19D6
24B3
19D6
17D3
17D3
17D3
17D3
17D3 17D3
19D6
19D6
19D6
19D6
17D3
19D7
17D3
19D6
19D6
19D6
19D6
19D6
19D6
19D6
19D6
19D6
19D6
19D7
24B5
17D3
19D6
17D3
19D6
17D3
19D6
19D5
19D6
16D3
19D5
19D5
19D5
16D3
19D5
23D5
19D5
16D3
16D3
16D3
16D3
16D3 16D3
19D5
19D5
19D5
19D5
16D3
19D6
16D3
19D5
19D5
19D5
19D5
19D5
19D5
19D5
19D5
19D5
19D5
19D6
24B3
16D3
82D3
82D3
19D5
16D3
19D5
16D3
82D3
82D3
82D3
19D5
19D2
19D5
16C8
82D3
19D2
19D2
19D2
16C8
19D2
23B3
19D2
16C8
16C8
16C8
16C8
16C8 16C8
19D2
19D2
19D2
19D2
16C8
19D5
16C8
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19D2
19D5
23D5
16C8
82C5
82C5
19D2
16C8
19D2
16C8
82C5
82C5
82C5
19D2
19D1
19D2
13B5
82C5
19D1
19D1
19D1
13B5
19D1
22B5
19D1
13B5
13B5
13B5
13B5
13B5 13B5
19D1
19D1
19D1
19D1
13B5
19D1
13B5
19D1
19D1
19D1
19D1
19D1
19D1
19D1
19D1
19D1
19D1
19D2
23B3
13B5
67B6
67B6
19D1
13B5
19D1
13B5
67B6
67B6
67B6
19D1
19C5
19D1
12C2
67B6
19C5
19C5
19C5
12C2
19C5
21D3
19C5
12C2
12C2
12C2
12C2
12C2 12C2
19C5
19C5
19C5
19C5
12C2
19C5
12C2
19C5
19C5
19C5
19C5
19C5
19C5
19C5
19C5
19C5
19C5
19D1
22B5
12C2
67A8 67A8
19C5
12C2
19C5
12C2
67A8
67A8
67A8
19C5
19C4
19C5
12B7
67A8
19C4
19C4
19C4
12B7
19C4
21C3
19C4
12B7
12B7
12B7
12B7
12B7
12B7
19C4
19C4
19C4
19C4
12B7
19C4
12B7
19C4
19C4
19C4
19C4
19C4
19C4
19C4
19C4
19C4
19C4
19C5
21D3
12B7
67A6 67A6
19C4
12B7
19C4
12B7
67A6
67A6
67A6
19C4
19C1
19C1
12A7
67A6
19C1
19C1
19C1
12A7
19C1
20B4
19C1
12A7
12A7
12A7
12A7
12A7
12A7
19C1
19C1
19C1
19C1
12A7
19C1
12A7
19C1
19C1
19C1
19C1
19C1
19C1
19C1
19C1
19C1
19C1
19C4
21C3
12A7
66B5 66B5
19C1
12A7
19C1
12A7
66B5
66B5
66B5
19C1
19B8
19B8
11C5
66B5
19B8
19B8
19B8
11C5
19B8
20A4
19B8
11C5
11C5
11C5
11C5
11C5
11C5
19B8
19B8
19B8
19B8
11C5
19B8
11C5
19B8
19B8
19B8
19B8
19B8
19B8
19B8
19B8
19B8
19B8
19C1
20B4
11C5
63D1 63D1
19B8
11C5
19B8
11C5
63D1
63D1
63D1
19B8
19B5
19B5
11B3
63D1
19B5
19B5
19B5
11B3
19B5
19C7
19B5
11B3
11B3
11B3
11B3
11B3
11B3
19B5
19B5
19B5
19B5
11B3
19B5
11B3
19B5
19B5
19B5
19B5
19B5
19B5
19B5
19B5
19B5
19B5
19B5
20A4
11B3
19D7 19D7
19B5
11B3
19B5
11B3
19D7 19D7
19D7
19B5
19A5
19A5
9B7
19D7
19A5
19A5
19A5
9B7
19A5
19C6
19A5
9B7
9B7
9B7
9B7
9B7
9B7
19A5
19A5
19A5
19A5
9B7
19A5
9B7
19A5
19A5
19A5
19A5
19A5
19A5
19A5
19A5
19A5
19A5
19A5
19C7
9B7
19C5 19C5
19A5
9B7
19A5
9B7
19C5 19C5
19A8
17C6
17C6
17C6
8C7
19C5
17C6
17C6
17C6
8C7
17C6
17C6
17C6
8C7
8C7
8C7
8C7
8C7
8C7
17C6
17C6
17C6
17C6
8C7
17C6
8C7
17C6
17C6
17C6
17C6
17C6
17C6
17C6
17C6
17C6
17C6
17C6
17C6
8C7
19A8 19A8
17C6
8C7
17C6
8C7
19A6
19A8
19A6
17B6
17B6
17B6
7D5
19A8
17B6
17B6
17B6
7D5
17B6
14D6
17B6
7D5
7D5
7D5
7D5
7D5
7D5
17B6
17B6
17B6
17B6
7D5
17B6
7D5
17B6
17B6
17B6
17B6
17B6
17B6
17B6
17B6
17B6
17B6
17B6
14D6
7D5
19A6 19A6
17B6
7D5
17B6
7D5
19A4 19A4
19A4
16D1
16D1
16D1
7B6
19A6
16D1
16D1
16D1
7B6
16D1
14C7
16D1
7B6
7B6 7B6
7B6
7B6
7B6
16D1
16D1
16D1
16D1
7B6
16D1
7B6
16D1
16D1
16D1
16D1
16D1
16D1
16D1
16D1
16D1
16D1
16D1
14C7
7B6
19A4 19A4
16D1
7B6
16D1
7B6
17D6 17D6
17D6
13D2
13D2
13D2
7B5
17D6
13D2
13D2
13D2
7B5
13D2
10C5
13D2
7B5
7B5
7B5
7B5
7B5
7B5
13D2
13D2
13D2
13D2
7B5
13D2
7B5
13D2
13D2
13D2
13D2
13D2
13D2
13D2
13D2
13D2
13D2
13D2
10C5
7B5
17D6
17D6
13D2
7B5
13D2
7B5
17C6 17C6
34B2
17C6
13C5
13C5
13C5
5D4
17C6
19D6
19D3 19D4
19D3 19D4
19D3 19D4
19D3 19D4
19D3 19D4
19D3 19D4
19D3 19D4
19D3 19D4
13C5
13C5
13C5
5D4
13C5
5D4
13C5
19D5 19D6
5D4
5D4
5D4
5D4
5D4
5D4
13C5
13C5
13C5
13C5
5D4
13C5
5D4
13C5
13C5
13C5
13C5
13C5
13C5
13C5
13C5
19D5
13C5
13C5
13C5
5D4
5D4
17C6
17C6
13C5
5D4
13C5
5D4
17D6
5D4 17C6 5D4
17C6
5D4
5D4
17C6
17C6
17D6
5D4
5D4
5B2
5D4
13D5 13B5
14B6 14B6
14B6 14B6
14C6 14C6
14C6 14C6
14C6 14C6
14C6 14C6
13D5 13D5
13D5 13D5
5D4
5D4
5D4
5B2
5D4
5A4
5D4
13B5 13B5
5B2
5B2
5B2
5B2
5B2
5B2
5D4
5D4
5D4
5D4
5B2
5D4
5B2
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5D4
13B5
5D4
5D4
5D4
5A4
5B2
5D4
5D4
5D4
5B2
5D4
5B2
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Internal pull-ups
Internal pull-up
RESERVED
RESERVED
NB_CFG<11>
NB_CFG<10>
High = Mobile CPUNB_CFG<7>
RESERVED
Internal pull-up
DMI x2 Select
PROBABLY NOT NEEDED
PROBABLY NOT NEEDED
Lane Reversal
NB_CFG<4>
NB_CFG<3>
RESERVED
NB_CFG<13:12>
NB_CFG<14>
NB_CFG<5>NB_CFG<15>
NB_CFG<16>NB_CFG<6>
NB_CFG<17>
NB_CFG<18>NB_CFG<8>
NB_CFG<9> NB_CFG<19>
NB_CFG<20>
Low = DMIx2
High = DMIx4
Low = RESERVED
High = NormalPCIE Graphics
RESERVED
CPU Strap
RESERVED
Low = Reversed
Internal pull-up
11 = Normal Operation10 = All-Z Mode Enabled01 = XOR Mode Enabled00 = Partial Clock Gating Disable
RESERVED
Internal pull-up
RESERVED
High = Enabled
Low = Disabled
RESERVED
FSB DynamicODT
or PCIe x1Low = Only SDVO
High = Both active
945 External Design Spec says reserved
Internal pull-down
Internal pull-down
Internal pull-down
Low = 1.05V
High = 1.5V
Low = Normal
High = ReversedDMI LaneReversal
VCC Select
Interop. ModePCIe Backward
NBCFG_DMI_X2
MF-LF1/16W
2.2K5%
402
R20751
2
NBCFG_DYN_ODT_DISABLE
402MF-LF1/16W
2.2K5%
R20851
2
MF-LF
NBCFG_VCC_1V5
2.2K5%1/16W
402
R20581
2
NBCFG_DMI_REVERSE
2.2K5%1/16WMF-LF402
R20591
2
2.2K5%1/16WMF-LF402
NBCFG_SDVO_AND_PCIE
R20601
2
402MF-LF1/16W5%2.2K
NO STUFF
R20771
2
NBCFG_PEG_REVERSE
2.2K5%1/16WMF-LF402
R20791
2
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
NB Config Straps
051-7164 03001
8720
PP3V3_S0
PP3V3_S0
PP3V3_S0
NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
NB_CFG<16>
NB_CFG<5>
NB_CFG<9>
NB_CFG<7>
82D5
82D5
82C6
82C6
82D5
82B3
82B3
82C6
82A4
82A4
82B3
79D3
79D3
82A4
79A8
79A8
79D3
71D2
71D2
79A8
67C5
67C5
71D2
67C3
67C3
67C5
67B3
67B3
67C3
67A3
67A3
67B3
66B6
66B6
67A3
66B5
66B5
66B6
66B1
66B1
66B5
65D6
65D6
66B1
65B3
65B3
65D6
62A6
62A6
65B3
61D8
61D8
62A6
61A5
61A5
61D8
60D4
60D4
61A5
60C7
60C7
60D4
58C7
58C7
60C7
58C4
58C4
58C7
57B6
57B6
58C4
54D4
54D4
57B6
54B5
54B5
54D4
52D3
52D3
54B5
49C7
49C7
52D3
49C4
49C4
49C7
49B5
49B5
49C4
40B6
40B6
49B5
36D6
36D6
40B6
34A8
34A8
36D6
33D8
33D8
34A8
33D3
33D3
33D8
33C7
33C7
33D3
29A6
29A6
33C7
29A3
29A3
29A6
28A6
28A6
29A3
27D8
27D8
28A6
27D5
27D5
27D8
27D3
27D3
27D5
27C3
27C3
27D3
26D1
26D1
27C3
26B8
26B8
26D1
26B6
26B6
26B8
26B4
26B4
26B6
25D8
25D8
26B4
25D3
25D3
25D8
25C6
25C6
25D3
25C4
25C4
25C6
25B8
25B8
25C4
25B4
25B4
25B8
25A4
25A4
25B4
24D3
24D3
25A4
24C3
24C3
24D3
24B5
24B5
24C3
24B3
24B3
24B5
23D5
23D5
24B3
23B3
23B3
23D5
22B5
22B5
23B3
21D3
21D3
22B5
21C3
21C3
21D3
20B4
20B4
21C3
20A4
20A4
20B4
19C7
19C7
19C7
19C6
19C6
19C6
17C6
17C6
17C6
14D6
14D6
14D6
14C7
14C7
14C7
10C5
10C5
10C5
5D4
5D4
5D4
5A4
5A4
5A4
14C6
14C6
14B6
14C6
14C6
14C6
14C6
www.vinafix.vn
IO
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IO
IO
IO
IO
IN
IO
DDACK*
SATARBIASNSATARBIASP
SATA_CLKNSATA_CLKP
SATA_2TXPSATA_2TXN
SATA_2RXNSATA_2RXP
SATA_0TXPSATA_0TXNSATA_0RXPSATA_0RXN
SATALED*
ACZ_SDOUT
ACZ_SDIN1ACZ_SDIN2
ACZ_SDIN0
ACZ_SYNCACZ_BIT_CLK
LAN_TXD2
LAN_TXD0LAN_TXD1
LAN_RXD1LAN_RXD2
LAN_RSTSYNC
LAN_RXD0
LAN_CLK
EE_SHCLKEE_CS
INTVRMENINTRUDER*
RTCRST*
RTCX2RTCX1
THRMTRIP*
STPCLK*
NMISMI*
RCIN*
INTRINIT*
INIT3_3V*IGNNE*
GPIO49/CPUPWRGD
FERR*
TP1/DPRSTP*TP2/DPSLP*
A20M*
CPUSPL*
A20GATE
LFRAME*
LDRQ1*/GPIO23LDRQ0*
LAD3LAD2
LAD0LAD1
EE_DOUTEE_DIN
ACZ_RST*
DIOR*
IDEIRQ
DIOW*
IORDYDDREQ
DD0DD1
DD3DD2
DD5DD4
DD6DD7DD8
DD11
DD9DD10
DD12DD13DD14DD15
DA0DA1DA2
DCS3*DCS1*
AC-97/
AZALIA
RTC
LPC
LAN
CPU
IDE
SATA
(1 OF 6)
OUT
OUT
OUT
IN
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
IN
IN OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(WEAK INT PU)
NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S
LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE
NOTE: DDREQ HAS INTERNAL 11.5K PD
NOTE: LAD<0-3> HAVE INTERNAL 20K PU
INTEL HIGH DEFINITION AUDIO
ACZ_SDOUT
ACZ_SYNC
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN[0-2]
INTERNAL 20K PD ENABLED WHEN
INTERNAL 20K PD
AC ’07
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
INTERNAL 20K PD ENABLED DURING RESET AND WHEN
INTERNAL 20K PD
INTERNAL 20K PD ENABLED WHEN
- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR
NONE
INTERNAL 20K PD
INTERNAL 20K PD ONLY ENABLED IN S3COLD
NOTE: ENABLE INTERNAL 1.05V SUSPEND REG
NOTE: DD<7> HAS INTERNAL 11.5K PD
(HSTROBE)(STOP)
20K PD
20K PD
20K PD
(DSTROBE)
< 2 IN OF R2107 W/O STUBLAYOUT NOTE: R2108 TO BE
CHANGED TO 54.9 FOR
LAYOUT NOTE: R2107 TO BE< 2 IN OF SB
BOM CONSOLIDATIONNOTE: RISING-EDGE TRIGGERED AT CPU
NOTE: KEYBOARD CONTROLLER RESET CPU
POR IS SMC WILL PUT LAN INT’FNOTE:
INTO RESET STATE TO SAVE PWR.
- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED
INTEL CONFIRMS OK TO LEAVE PINS AS NC
NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU
NOTE: PULLED UP PER INTELNOTE: R2110=56 IN CV. CHANGED TO 54.9 FORBOM CONSOLIDATION
NOTE: R2108=56 IN CV.
(WEAK INT PD)
(INT PU)
(INT PU)
NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L
NOSTUFF
1/16WMF-LF
0
5%402
R21001 2
NOSTUFF
402
2.2K
5%1/16WMF-LF
R21011 2
MF-LF
5%
39402
1/16W
R2195 1 2
39R2198 1 2
39R2197 1 2
39R2196 1 2
402
10K5%1/16WMF-LF
R21991
2
BGASB
ICH7-M
OMIT
U2100
AE22AH28
U1
R5T2T3T1
T4
R6
AG27
AH17AE17AF17
AE16AD16
AB15AE14
AB13AC14AF14AH13AH14AC15
AG13AF13AD14AC13AD12AC12AE12AF12
AF16
AE15
AF15AH15
W1
W3Y2Y1
AG26
AG24
AH16
AG22
AF22AG21
AF25
Y5W4
AG16
AA6AB5AC4Y6
V3
U3
U5V4T5
U7V6V7
AC3AA5
AB3
AH24
AG23
AA3
AB1AB2
AF3AE3AG2AH2
AF7AE7AG6AH6
AF1AE1
AF18
AH10AG10
AF23
AH22
AF26
AF24AH25
402
10K5%1/16WMF-LF
R21941
2
332K402
1%1/16WMF-LF
R2105
1
2
24.9
MF-LF1/16W 1%
402
R21071 2
402MF-LF1/16W 1%
54.9R2108
1
2
MF-LF1/16W
40254.9
1%
R2110
12
03001
21 87
051-7164
SB: 1 OF 4SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
TP_SB_XOR_V7TP_SB_XOR_V6TP_SB_XOR_U7
TP_SB_XOR_Y2TP_SB_XOR_Y1TP_SB_XOR_W1
SB_INTVRMEN
PP1V05_S0
CPU_FERR_L
SB_A20GATE
CPU_RCIN_L
SATA_C_D2R_P
IDE_PDDACK_L
SATA_RBIASSATA_RBIAS
SB_CLK100M_SATA_NSB_CLK100M_SATA_P
SATA_C_R2D_C_PSATA_C_R2D_C_N
SATA_C_D2R_N
TP_SATA_A_R2DPTP_SATA_A_R2DNTP_SATA_A_D2RPTP_SATA_A_D2RN
TP_SB_SATALED_L
SB_ACZ_SDATAOUT
TP_SB_ACZ_SDIN1TP_SB_ACZ_SDIN2
ACZ_SDATAIN<0>
SB_ACZ_SYNCSB_ACZ_BITCLK
SB_SM_INTRUDER_L
SB_RTC_X1
CPU_THERMTRIP_R
CPU_STPCLK_L
CPU_NMICPU_SMI_L
CPU_INTRCPU_INIT_LFWH_INIT_L
CPU_IGNNE_L
CPU_PWRGD
CPU_DPRSTP_LCPU_DPSLP_L
CPU_A20M_L
TP_CPU_CPUSLP_L
SB_ACZ_RST_L
IDE_PDIOR_L
IDE_IRQ14
IDE_PDIOW_L
IDE_PDIORDYIDE_PDDREQ
IDE_PDD<0>IDE_PDD<1>
IDE_PDD<5>IDE_PDD<4>
IDE_PDD<7>IDE_PDD<8>
IDE_PDD<11>
IDE_PDD<9>IDE_PDD<10>
IDE_PDD<12>IDE_PDD<13>IDE_PDD<14>IDE_PDD<15>
IDE_PDA<0>IDE_PDA<1>IDE_PDA<2>
IDE_PDCS3_LIDE_PDCS1_L
ACZ_SYNC SMC_RCIN_L
PP1V05_S0
PM_THRMTRIP_LACZ_SDATAOUT
IDE_PDD<6>
PP3V3_S0
PP3V3_S0
LPC_AD<0>LPC_AD<1>LPC_AD<2>LPC_AD<3>
TP_SB_DRQ0_LLVDS_MUX_SEL_GPU
LPC_FRAME_L
SB_RTC_X2
SB_RTC_RST_L
ACZ_BITCLK
ACZ_RST_L
PP3V3_G3C_SB_RTC_D
TP_SB_XOR_U3
TP_SB_XOR_U5TP_SB_XOR_V4TP_SB_XOR_T5
TP_SB_XOR_W3
TP_SB_XOR_V3
IDE_PDD<2>IDE_PDD<3>
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
67D8
67D8 29A3
29A3
67D6
67D6 28A6
28A6
65A2
65A2 27D8
27D8
55A4
55A4 27D5
27D5
34C8
34C8
27D3
27D3
34C6
34C6
27C3
27C3
34B8
34B8
26D1
26D1
25D3
25D3 26B8
26B8
25C4
25C4 26B6
26B6
24D3
24D3 26B4
26B4
24C3
24C3 25D8
25D8
21C1
21C1 25D3
25D3
19D7
19D7 25C6
25C6
19D6
19D6 25C4
25C4
19D5
19D5
25B8
25B8
19D2
19D2
25B4
25B4
19D1
19D1 25A4
25A4
19C8
19C8 24D3
24D3
17D6
17D6 24C3
24C3
17D3
17D3 24B5
24B5
16D3
16D3 24B3
24B3
16C8
16C8 23D5
23D5
13B5
13B5 23B3
23B3
12C2
12C2 22B5
22B5
12B7
12B7 21D3
21C3
12A7
12A7 20B4
20B4
11C5
11C5 20A4
20A4
11B3
11B3 19C7
19C7
9B7
9B7 19C6
19C6
8C7
8C7 17C6
17C6
7D5
53C5
7D5 14D6
14D6
7B6
34C5
34C5
52D5
7B6 14C7
14C7
60C6
60C6
60C6
26D4
7B5
36A5
36A5
34C3
34C3
87B4
87C6
52D3
87C6
61C7
87C6
87B4
7B5
52C1
87B4
10C5
10C5
53C4
53C5
53C4
87B4
87B4
26D3
5D4
36A4
36A4
33B4
33B4
36A5
36A5
36A5
36A5
48B3
7C8
87C6
87C6
87C6
87C6
51D5
87C6
7B3
7B3
7B3
87C6
48B3
5D4
14B6 48B3
5D4
5D4
51D7
51C7
51C7
26D4
48B3
48B3
25A4
5B2
7C8
81A7
36C4
21B6
21B6
5A7
5A7
81B7
81B7
81A7
36A4
36A4
36A4
36A4
87B4
5C1
87B4
87B4
26D4
26C8
5B4
5C4
7C8
7C8
7C8
7D6
5C2
7C8
5B4
5C4
5B4
7C8
5B4
87B4
36C5
36C4
36C4
36C5
36C5
36C5
36C5
36C5
36C5
36C5
36D4
36C4
36C4
36C4
36C4
36C4
36C4
36C4
36C4
36C4
36C5
36C4
36C5
5C1 51C7
5B2
7C6 5C1
36C5
5A4
5A4
5D2
5C2
5C2
26C8
5B4
5C1
5C1
24B3
36C5
36C5
www.vinafix.vn
IN
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
DMI_ZCOMP
DMI_CLKP
DMI_IRCOMP
USBRBIAS*USBRBIAS
DMI0RXNDMI0RXPDMI0TXNDMI0TXP
DMI2TXNDMI2TXP
DMI3RXN
DMI3TXPDMI3TXNDMI3RXP
USBP0NUSBP0PUSBP1NUSBP1PUSBP2NUSBP2PUSBP3NUSBP3P
USBP4PUSBP5NUSBP5PUSBP6NUSBP6PUSBP7NUSBP7P
USBP4N
OC0*OC1*OC2*OC3*OC4*
OC6*/GPIO30OC5*/GPIO29
SPI_CLKSPI_CS*
SPI_MOSISPI_MISO
SPI_ARB
DMI_CLKN
DMI2RXPDMI2RXN
DMI1TXPDMI1TXN
DMI1RXNDMI1RXP
PERN1PERP1PETN1PETP1
PERN2PERP2PETN2PETP2
PERN3PERP3PETN3PETP3
PERN4PERP4PETN4PETP4
PERN5PERP5PETN5PETP5
PERN6PERP6PETN6PETP6
OC7*/GPIO31
PCI-EXP
(3 OF 6)
DMI
SPI
USB
REQ4*/GPIO22
REQ0*
MCH_SYNC*RSVD8RSVD7RSVD6RSVD5
RSVD4
GPIO5/PIRQH*GPIO4/PIRQG*GPIO3/PIRQF*GPIO2/PIRQE*
GPIO17/GNT5*GPIO1/REQ5*GNT4*/GPIO48
C/BE0*C/BE1*
DEVSEL*PERR*
STOP*
PCIRST*PME*
PLTRST*
TRDY*
FRAME*
IRDY*
PCICLKPAR
PLOCK*SERR*
AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31
C/BE2*C/BE3*
GNT0*REQ1*GNT1*REQ2*GNT2*REQ3*GNT3*
PIRQA*PIRQB*PIRQC*PIRQD*
RSVD0RSVD1RSVD2RSVD3
MISC
INT I/F
PCI
(2 OF 6)
IO
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IO
IO
IO
IO
OUT
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
BLUETOOTH
TRACKPAD (GEYSER)
CAMERA
IR
AND PWROK=H
NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L
BOM NOTE FOR PD ON PCI_GNT3_L:
EXTERNAL 2
EXTERNAL 1
EXTERNAL 0
NOTE:
STUFF - A16 SWAP OVERRIDE(STRAPPED TO TOP-BLOCK SWAP MODEIE SB INVERTS A16 FOR ALL CYCLESTARGETING FWH BIOS SPACE)
SB BOOT BIOS SELECTGNT4#GNT5#
TO RSVD[1-9]NOTE: CHANGE SYMBOL
R2210STRAP
11
10
01 STUFF
UNSTUFF
UNSTUFF UNSTUFF
STUFF
UNSTUFFSPI
PCI
LPC (DEFAULT)
NOTE:
LAYOUT NOTE:PLACE R2203 < 1/2 IN FROM SB
LAYOUT NOTE:PLACE R2204 < 1/2 IN FROM SB
GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H
(INT PD)
(INT PD)
GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)
NOTE: FWH_WP_L NOT USED
R2211
ENABLED ONLY WHEN PCIRST#=0
SB: 2 OF 4
(AKA TP3, INTERNAL 20K PU)
(INT 20K PU)
GNT[0-3]# HAVE INT 20K PU
NO STUFF - DEFAULT
NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD
1%MF-LF
24.9
4021/16W
R22031 2
USB_G_OC_PU
402
5%
MF-LF1/16W
10KR22221
2
MF-LF1/16W1%
22.6
402
R22041 2
402MF-LF
10K5%1/16W
R22231
2402MF-LF1/16W5%10KR22251
2
5%10K1/16WMF-LF402
R22261
2
402MF-LF1/16W5%10KR22991
2
ICH7-MSBBGA
OMIT
U2100V26V25U28U27
Y26Y25W28W27
AB26AB25AA28AA27
AD25AD24AC28AC27
AE28AE27
D25C25
D3C4D5D4E5C3A2B3
F26
H26
K26
M26
P26
T25
F25
H25
K25
M25
P25
T24
E28
G28
J28
L28
N28
R28
E27
G27
J27
L27
N27
R27
P1
R2P6
P2P5
F1F2G4G3H1H2J4J3K1K2L4L5M1M2N4N3
D1D2
OMIT
ICH7-M
BGASB
U2100E18C18
E14D14B12C13G15G13E12C11D11A11
A16
A10F11F10E9D9B9A8A6C7B6
F18
E6D6
E16A18E17A17A15C14
B15C12D12C15
A12
F16
E7
D16
D17
F13
A14C8D8
G8F7F8G7
A7
AH20
E10A9
B18
C9
A3B4C5B5
E11
C26
B19
D7
C16
C17
E13
A13
AE5AD5AG4AH4AD9
AE9AG8AH8F21
B10F15F14
402
10K5%1/16WMF-LF
R22001
2
USB_C_OC_PU
10K5%1/16WMF-LF402
R22501
2
USB_E_OC_PU
402MF-LF1/16W5%10KR22511
2402
10K5%1/16WMF-LF
USB_D_OC_PU
R22551
2
10K5%1/16W
402MF-LF
R22981
2
1/16W
10K
5%402
MF-LF
R2205
1
2NOSTUFF
1/16W5%
MF-LF10K
402
R2206
1
2
5%402
10K1/16WMF-LF
R2207
1
2
VOLTAGE=0V
402
1K5%
MF-LF1/16W
R22111
2
03001
22 87
051-7164
PCI_PME_FW_L
PP3V3_S0
SPI_SI
SPI_CE_L
SB_GPIO30
PCI_REQ2_L
BOOT_LPC_SPI_L
PCI_C_BE_L<2>
SPI_SCLK
PCI_STOP_L
PCI_REQ3_L
PCI_REQ1_L
PCI_REQ0_LPCI_AD<1>
PCI_AD<6>
EXCARD_OC_L
SB_GPIO29
TP_SB_XOR_AE9TP_SB_XOR_AG8
SB_CRT_TVOUT_MUX
TP_SB_XOR_AH8
TP_SB_XOR_AE5
TP_SB_XOR_AD9TP_SB_XOR_AH4TP_SB_XOR_AG4TP_SB_XOR_AD5
INT_PIRQD_L
USB2_LT2_P
SPI_SO
SPI_ARB
LTUSB_OC_LUNUSED_USB_D_OC_L
UNUSED_USB_B_OC_LRTUSB_OC_L
LTUSB_OC_L
PP3V3_S5PP1V5_S0_SB_VCC1_5_B
LT2USB_OC_L
TP_PCIE_F_R2DPTP_PCIE_F_R2DNTP_PCIE_F_D2RPTP_PCIE_F_D2RN
TP_PCIE_E_R2DPTP_PCIE_E_R2DNTP_PCIE_E_D2RPTP_PCIE_E_D2RN
TP_PCIE_D_R2DPTP_PCIE_D_R2DNTP_PCIE_D_D2RPTP_PCIE_D_D2RN
PCIE_C_R2D_C_PPCIE_C_R2D_C_NPCIE_EXCARD_D2R_PPCIE_EXCARD_D2R_N
PCIE_B_R2D_C_PPCIE_B_R2D_C_NPCIE_MINI_D2R_PPCIE_MINI_D2R_N
PCIE_A_R2D_C_PPCIE_A_R2D_C_NPCIE_A_D2R_PPCIE_A_D2R_N
DMI_N2S_P<1>DMI_N2S_N<1>
DMI_S2N_N<1>DMI_S2N_P<1>
DMI_N2S_N<2>DMI_N2S_P<2>
SB_CLK100M_DMI_N
SB_GPIO29SB_GPIO30
USB2_EXCARD_N
USB2_LT2_NUSB_BT_PUSB_BT_NUSB_HUB_PUSB_HUB_NUSB2_EXCARD_P
USB2_CAMERA_PUSB2_CAMERA_NUSB2_LT_PUSB2_LT_NUSB_TRACKPAD_PUSB_TRACKPAD_NUSB2_RT_PUSB2_RT_N
DMI_N2S_P<3>DMI_S2N_N<3>DMI_S2N_P<3>
DMI_N2S_N<3>
DMI_S2N_P<2>DMI_S2N_N<2>
DMI_S2N_P<0>DMI_S2N_N<0>DMI_N2S_P<0>DMI_N2S_N<0>
USB_RBIAS_PN
SB_CLK100M_DMI_P
DMI_IRCOMP_R
INT_PIRQC_LINT_PIRQB_LINT_PIRQA_L
PCI_C_BE_L<3>
PCI_AD<31>PCI_AD<30>PCI_AD<29>PCI_AD<28>PCI_AD<27>PCI_AD<26>PCI_AD<25>PCI_AD<24>PCI_AD<23>PCI_AD<22>PCI_AD<21>PCI_AD<20>PCI_AD<19>PCI_AD<18>PCI_AD<17>PCI_AD<16>PCI_AD<15>PCI_AD<14>PCI_AD<13>PCI_AD<12>PCI_AD<11>PCI_AD<10>PCI_AD<9>PCI_AD<8>PCI_AD<7>
PCI_AD<5>PCI_AD<4>PCI_AD<3>PCI_AD<2>
PCI_AD<0>
PCI_SERR_LPCI_LOCK_L
PCI_PARPCI_CLK_SB
PCI_IRDY_L
PCI_FRAME_L
PCI_TRDY_L
PLT_RST_L
TP_PCI_PME_LPCI_RST_L
PCI_PERR_LPCI_DEVSEL_L
PCI_C_BE_L<1>PCI_C_BE_L<0>
SB_GPIO2SB_GPIO3SB_DVI_HPDODD_PWR_EN_L
TP_SB_RSVD9NB_SB_SYNC_L
RTUSB_OC_L
EXCARD_OC_L
UNUSED_USB_B_OC_L
UNUSED_USB_D_OC_L
PP3V3_S5
TP_PCI_GNT1_L
TP_PCI_GNT0_L
TP_PCI_GNT2_L
PCI_GNT3_L
TP_PCI_GNT4_L
LT2USB_OC_L
82D5
82C6 82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3
66B6 66B5 66B1 65D6 65B3 62A6 61D8 61A5 60D4 60C7
58C7 58C4 57B6 54D4 54B5 52D3 49C7 49C4 49B5 40B6
36D6 34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5
27D3 27C3 26D1 26B8 26B6 26B4
79D5
79D5
25D8
67D5
67D5
25D3
67D3
67D3
25C6
67C3
67C3
25C4
66C5
66C5
25B8
65D8
65D8
25B4
65D2
65D2
25A4
65D1
65D1
24D3
65C8
65C8
24C3
63D8
63D8
24B5
56D4
56D4
24B3
26C5
26C5
23D5
25D2
25D2
23B3
25C8
25C8
21D3
25B6
25B6
21C3
24C3
24C3
20B4
24B3
82A4
24B3
20A4
24A5
79A8
24A5
19C7
23D8
26C3
23D8
19C6
23D4
26C1
23D4
17C6
52B3
23D1
26B1
52B3
23D1
14D6
48C3
48C3
47C5
48C3
23B7
48C3
50C6
50B6
50C6
50C6
26A4
47C5
48C3
23B7
48C3
14C7
22C4
22C4
22C4
22D8
23A7
22D8
50C5
50B5
50C5
50C5
81C4
81C4
47B5
47B5
14B7
22D8
22D8
23A7
22C4
10C5
53B4
6C3
6D3
22C4
22C4
6D3
6D3
22D8
6C3
50C3
50B3
50C3
50C3
34C5
6D3
6D3
6D3
6D3
34C5
6C7
6D3
6C3
22D8
22D8
22C6
6C3
5D4
56C1
56C7
22C4
51C7
56C7
37C3
6C1
37D3
56C1
6D1
6C3
6D3
6D2
6D1
11B5 25B6
6C1
50B6
50B6
50B6
50A6
50B6
50B6
50B6
50B6
50B6
50B6
50B6
50B6
48B6
48B6
48C6
48C6
14B4
14B4
34C3
22D8
6D2
6D2
6D2
6D2
14B4
14B4
34C3
37C6
37C3
37D3
37D3
37C3
6C6
37C2
37D3
37D3
6D2
6C1
6D3
6C3
11B5
6C1
37D3
5A4
51D5
51B5
6D5
26D2
5C2
37B6
51D5
26D2
26D2
26D2
37D6
37D6
5C1
22C4
26D2
51D5
51D5
5C1
6C1
6D1
6D1
5C1
5D4 24D5
5C1
50B3
50B3
50B3
50A3
50B3
50B3
50B3
50B3
50B3
50B3
50B3
50B3
50C3
50C3
5B1
5B1
50C3
50C3
5B1
5B1
39C5
39C5
39D5
39D5
5A7
5A7
14B4
14B4
14B4
14B4
33B4
22D8
6D5
6D1
6D1
6D1
6D1
14B4
14B4
14B4
14B4
14B4
14B4
14B4
14B4
5A7
5A7
33B4
26D2
26D2
26D2
37B6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
6C5
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37C6
37D6
37D6
37D6
37D6
37D6
37D6
26D2
26D2
37B6
34D6
26D2
26D2
26D2
5C4
5B4
26D2
26D2
37B6
37C6
26D2
26C2
80A1
36C7
6D1
5C1
6D1
6C1
5D4
5C1
www.vinafix.vn
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IO
IO
OUT
OUT
OUT
IN
IN
IO
IN
IN
IO
IN
IN
IN
IN
IO
IO
IN
OUT
IN
OUT
IN
OUT
GPIO19/SATA1GPGPIO21/SATA0GP
GPIO36/SATA2GP
CLK48
GPIO37/SATA3GP
CLK14
SUSCLK
SLP_S3*SLP_S4*SLP_S5*
PWROK
TP0/BATLOW*
GPIO16/DPRSLPVR
PWRBTN*
LAN_RST*
RSMRST*
GPIO10GPIO9
GPIO12
GPIO14GPIO13
GPIO24GPIO15
GPIO25GPIO35GPIO38GPIO39
SMBCLKSMBDATALINKALERT*
SMLINK1SMLINK0
RI*
SYS_RST*
SPKRSUS_STAT*
GPIO0/BM_BUSY*
GPIO18/STPPCI*
GPIO11/SMBALERT*
GPIO20/STPCPU*
GPIO26
GPIO28GPIO27
GPIO32/CLKRUN*
GPIO33/AZ_DOCK_EN*
WAKE*
GPIO34/AZ_DOCK_RST*
SERIRQTHRM*
GPIO7GPIO6
VRMPWRGD
GPIO8
(4 OF 6)
SMB
GPIO
PWR MNGT
SYS GPIO
CLKS
SATA GPIO
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(INT 20K PU)
PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE
NOTE FOR R2323 (DEF=NOSTUFF)
SB WILL DISABLE TCO TIMERSTRAPPING @ PWROK RISING:
SYSTEM REBOOT FEATURE
NOT USED
NOTE: RESERVED FOR FUTURE
LAYOUT NOTE:
NOTE FOR GPIO25:
OD
DEF=GPI
IN RESET STATE TO SAVE PWRSMC WILL DRIVE 0-1-0 TO KEEP LAN INT’FNOTE:
NOTE: SV_SET_UP IS LINDACARD DETECT
LO = NOT PRESENTHI = PRESENT
(INT WEAK PD)
NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN
DEF=GPI
- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS
DEF=GPI
100 R23021 2
100 R23031 2
100 R23051 2
NOSTUFF
402
5%MF-LF
1/16W10KR23061
2
10K402
5%MF-LF
1/16W
R23071
2
4021/16W
MF-LF5%
10KR23081
2
5%MF-LF
1/16W0402
NOSTUFF
R23091
2
402
5%MF-LF
1/16W10KR23101
2
1/16W
MF-LF5%
NOSTUFF
402
10KR23111
2
10K1/16W
MF-LF5%
402
R23131
2
402
NOSTUFF
01/16W
MF-LF5%
R23141
2
402
10K1/16W
MF-LF5%
R2316
1
2MF-LF402
10K1/16W
5%
R2317
1
2
10K4021/16W
MF-LF5%
R23181
2
10K1/16W
MF-LF5%
402
R23191
2
402
5%MF-LF
1/16W10KR2320
1
2
1/16W5%10K
SM-LF
RP2300
1 2 3 4
8 7 6 5
5%402 MF-LF
1/16W
100KR23991 2
1/16W
MF-LF5%
402
1KR2398
1
2
5%MF-LF
8.2K4021/16W
R23971
2MF-LF5%
1/16W10K402
R23961
2
8.2K1/16W
MF-LF402
5%
R23951
2
OMIT
BGASB
ICH7-MU2100
AC1B2
AB18
A20
B23
F19E19R4E22
AC22AC20
AH18
AF21
AF19
R3D20
A21
B21E23
AG18
AC19U2
AD21
AH19AE19
AD20AE20
AC21AC18E21
E20
C19
A26
C23
AA4
A28
Y4
AH21
B24D23F22
C22B22
B25A25
A19A27
C20
A22
AF20
C21
AD22
F20
402
1/16WMF-LF
5%10KR23881
2
MF-LF402
5%
1K1/16W
NO_REBOOT_MODE
R23231
2
NOSTUFF
10K1/16WMF-LF4025%
R23261
2
NOSTUFF
5%MF-LF
1/16W402
10KR23271
2
5%
402
8.2K1/16WMF-LF
R23431
2
SB: 3 OF 4SYNC_DATE=08/08/2006SYNC_MASTER=M57_MLB_MG
051-7164
8723
03001
INT_SERIRQ
PP3V3_S0
SATA_C_PWR_EN_L
PM_DPRSLPVR
PM_BATLOW_L
SB_CLK48M_USBCTLR
SV_SET_UP
SMBUS_SB_SCL
SATA_C_DET_LSB_GPIO19SB_GPIO21
SB_GPIO37
SB_CLK14P3M_TIMER
TP_SB_SUS_CLK
PM_SLP_S3_LPM_SLP_S4_LPM_SLP_S5_L
PM_SB_PWROK
PM_SYSRST_LPM_SUS_STAT_L
BIOS_REC
VR_PWRGD_CK410
PP3V3_S5
PP3V3_S5
TP_SB_GPIO6
CRB_SV_DET
PP3V3_S5
FWH_MFG_MODEBIOS_REC
PP3V3_S0
SATA_C_PWR_EN_L
PM_BMBUSY_L
SB_SPKR
SMBUS_SB_SDA
PP3V3_S5
SMC_RUNTIME_SCI_L
PM_RSMRST_L
PM_LAN_ENABLE
PM_PWRBTN_L
PCIE_WAKE_L
FWH_MFG_MODE
PM_STPPCI_L
SMB_ALERT_L
PM_THRM_L
SMC_EXTSMI_L
PM_CLKRUN_L
PM_STPCPU_L
TP_AZ_DOCK_RST_LGPU_D3COLD_RESET_L
PP3V3_S5
SMS_INT_L
IDE_RESET_LSV_SET_UP
CRB_SV_DETTP_SB_GPIO25_DO_NOT_USE
SB_CLK100M_SATA_OE_LSB_GPUVCORE_DISABLE_L
SB_GPIO26
SMC_WAKE_SCI_LLAN_ENERGY_DET
SMC_SB_NMI
SMLINK<1>SMLINK<0>SMB_LINK_ALERT_L
PM_RI_L
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
79D5
79D5
79D5
26B4
79D5
79D5
25D8
67D5
67D5
67D5
25D8
67D5
67D5
25D3
67D3
67D3
67D3
25D3
67D3
67D3
25C6
67C3
67C3
67C3
25C6
67C3
67C3
25C4
66C5
66C5
66C5
25C4
66C5
66C5
25B8
65D8
65D8
65D8
25B8
65D8
65D8
25B4
65D2
65D2
65D2
25B4
65D2
65D2
25A4
65D1
65D1
65D1
25A4
65D1
65D1
24D3
65C8
65C8
65C8
24D3
65C8
65C8
24C3
63D8
63D8
63D8
24C3
63D8
63D8
24B5
56D4
56D4
56D4
24B5
56D4
56D4
24B3
26C5
26C5
26C5
24B3
26C5
26C5
23B3
25D2
25D2
25D2
23D5
25D2
25D2
22B5
25C8
25C8
25C8
22B5
25C8
25C8
21D3
81C3
25B6
25B6
25B6
21D3
81C3
25B6
25B6
21C3
48B3
66C8
24C3
24C3
24C3
21C3
48B3
24C3
24C3
20B4
46B6
66C6
24B3
24B3
24B3
20B4
46B6
24B3
24B3
20A4
33B6
66B6
24A5
24A5
24A5
20A4
33B6
24A5
24A5
19C7
29A6
65B8
23D8
23D8
23D8
19C7
29A6
23D8
23D4
19C6
28A6
55C3
23D4
23D4
23D4
19C6
28A6
23D1
23D1
17C6
27D8
51C5
23D1
23B7
23D1
17C6
27D8
23B7
23B7
14D6
27D7
43C8
60C6
23A7
23A7
23B7
14D6
27D7
23A7
23A7
60C6
14C7
87C6
27D6
42A8
53B5
22D8
22D8
22D8
14C7
27D6
22D8
60C6
22D8
53C5
10C5
61C8
53B5
27C6
6C7
39C8
52A2
51B7
52A2
22C6
22C6
22C6
10C5
27C6
22C6
48C3
53C4
22C6
53B5
51C7
5D4
14B7
23C3
27B6
6C6
32B3
51C5
26A6
26C5
51C5
26B8
11B5
11B5
11B5
5D4
27B6
11B5
51D7
51D7
39C6
33C4
51C5
33C4
11B5
52B2
23B6
66B7
5C2
5A4
23A3
5B4
51B7
34C7
5C2
5B1
36B5
34A6
5B4
5C4
5C4
5B4
5A2
5C2
23A6
5A4
5D4
5D4
23C3
5D4
23C5
23C5
5A4
23B3
14B6
5B1
5D4
51B7
5B4
5B4
51D7
5B1
23A6
5B4
51B7
51B7
5C2
5B4
26A4
5D4
51B5
36D5
5C2
23B6
33B4
66B6
51D5
40A3
51D7
www.vinafix.vn
(6 OF 6)
VSS
V5REF_SUS
VCC3_3
VCCDMIPLL
VCCSATAPLL
VCC3_3
VCCRTC
VCCUSBPLL
VCCSAUS1_5
VCC PAUX
USB COREVCC1_5_A
ARXUSB
PCI
IDE
VCCA3GP
CORE
ATX
VCC1_5_A
VCC3_3
VCC3_3
VCCSUS3_3
VCC1_5_A
VCCSUS3_3
VCCSUS3_3
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCLAN1_5
V_CPU_IO
VCC3_3/VCCHDAVCCSUS3_3/VCCSUSHDA
VCCLAN_3_3
VCC1_05
V5REF
VCC1_5_B
(5 OF 6)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CODEC IC’S CONSIDERED SO FAR ARE 3.3VDEPENDING ON VIO OF AZALIA INTERFACEVCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3VNOTE:
VOLTAGE GENERATED INTERNALLYSO NO CONNECT HERE
VOLTAGE GENERATED INTERNALLYSO NO CONNECT HERE
CHANGE SYMBOL TO 1.05
CHANGE SYMBOL TO 1.05
S0 OR S3 IF NOTS3 IF INTERNAL LAN IS USEDNOTE FOR VCCLAN_3_3:
0 0
OMIT
BGA
ICH7-MSB
U2100A4A23
B1
B8B11B14B17B20B26B28C2C6C27
D10
D13D18D21D24E1E2E4E8E15F3
F4
F5F12F27F28G1G2G5G6G9G14
G18
G21G24G25G26H3H4H5H24H27H28
J1
J2J5J24J25J26K24K27K28L13L15
L24
L25L26M3M4M5M12M13M14M15M16
M17
M24M27M28N1N2N5N6N11N12N13
N14
N15N16
AE24AE25AF2AF4AF8
AF11AF27AF28
N17
AG1AG3AG7
AG11AG14AG17AG20AG25AH1AH3
N18
AH7AH12AH23AH27
N24
N25N26P3P4P12P13P14P15P16P17
P24
P27P28R1R11R12R13R14R15R16R17
R18
T6T12T13T14T15T16T17U4U12U13
U14
U15U16U17U24U25U26V2V13V15V24
V27
V28W6W24W25W26Y3Y24Y27Y28AA1
AA24
AA25AA26AB4AB6
AB11AB14AB16AB19AB21AB24
AB27
AB28AC2AC5AC9
AC11AD1
AD3AD4AD7AD8
AD11
AD15AD19AD23AE2AE4AE8AE11AE13AE18AE21
OMIT
BGASB
ICH7-MU2100
G10AD17
F6
AE23AE26AH26
L11
P18T11T18U11U18V11V12V14V16V17
L12
V18
L14L16L17L18M11M18P11
AB7AC6
AB9AC10AD10AE10AF10AF9AG9AH9
AB17AC17
AC7
T7F17G17
AB8AC8
A1H6H7J6J7
AD6AE6AF5AF6AG5AH5
AB10
AA22AA23
AD28D26D27D28E24E25E26F23F24G22
AB22
G23H22H23J22J23K22K23L22L23M22
AB23
M23N22N23P22P23R22R23R24R25R26
AC23
T22T23T26T27T28U22U23V22V23W22
AC24
W23Y22Y23
AC25AC26AD26AD27
U6
B27
AH11
AG19
A5B13B16B7C10D15F9G11G12
AA7
G16
AB12AB20AC16AD13AD18AG12AG15
AG28
AA2Y7
V5V1W2W7
W5
AD2
K7
C28G20
R7
P7
A24
L1L2L3L6L7M6M7N7
E3
C24D19D22G19
K3K4K5K6
C1
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
SB: 4 OF 4
03001
24 87
051-7164
PP1V5_S0
PP1V5_S0
PP1V5_S0
PP3V3_S5
PP3V3_S5
PP3V3_G3C_SB_RTC_D
PP3V3_S0
PP3V3_S0
PP3V3_S5
PP1V5_S0
PP3V3_S0
PP1V5_S0
PP1V5_S0
PP1V5_S0_SB_VCCDMIPLL
PP3V3_S0
PP1V05_S0
PP3V3_S5PP3V3_S0
PP3V3_S0
PP1V05_S0
PP5V_S5_SB_V5REF_SUS
PP5V_S0_SB_V5REF
PP1V5_S0_SB_VCC1_5_B
82D5
82D5
82D5
82D5
82C6
82C6
82C6
82D5
82C6
82B3
82B3
82B3
82C6
82B3
82A4
82A4
82A4
82B3
82A4
79D3
79D3
79D3
82A4
79D3
79A8
79A8
79A8
79D3
79A8
71D2
71D2
71D2
79A8
71D2
67C5
67C5
67C5
71D2
67C5
67C3
67C3
67C3
67C5
67C3
67B3
67B3
67B3
67C3
67B3
67A3
67A3
67A3
67B3
67A3
66B6
66B6
66B6
67A3
66B6
66B5
66B5
66B5
66B6
66B5
66B1
66B1
66B1
66B5
66B1
65D6
65D6
65D6
66B1
65D6
65B3
65B3
65B3
65D6
65B3
62A6
62A6
62A6
65B3
62A6
61D8
61D8
61D8
62A6
61D8
61A5
61A5
61A5
61D8
61A5
60D4
60D4
60D4
61A5
60D4
60C7
60C7
60C7
60D4
60C7
58C7
58C7
58C7
60C7
58C7
58C4
58C4
58C4
58C7
58C4
57B6
57B6
57B6
58C4
57B6
54D4
54D4
54D4
57B6
54D4
54B5
54B5
54B5
54D4
54B5
52D3
52D3
52D3
54B5
52D3
49C7
49C7
49C7
52D3
49C7
49C4
49C4
49C4
49C7
49C4
49B5
49B5
49B5
49C4
49B5
40B6
40B6
40B6
49B5
40B6
36D6
36D6
36D6
40B6
36D6
34A8
34A8
34A8
36D6
34A8
33D8
33D8
33D8
34A8
33D8
33D3
33D3
33D3
33D8
33D3
33C7
33C7
33C7
33D3
33C7
29A6
29A6
29A6
33C7
29A6
29A3
29A3
29A3
29A6
29A3
28A6
28A6
28A6
29A3
28A6
27D8
27D8
27D8
67D8
28A6
67D8
27D8
27D5
27D5
27D5
67D6
27D8
67D6
27D5
27D3
27D3
27D3
65A2
27D5
65A2
27D3
27C3
27C3
27C3
55A4
27D3
55A4
27C3
26D1
26D1
26D1
34C8
27C3
34C8
26D1
26B8
26B8
26B8
34C6
26D1
34C6
26B8
26B6
26B6
26B6
34B8
26B8
34B8
79D5
79D5
26B6
26B4
26B4
26B4
25D3
26B6
25D3
67D5
67D5
26B4
25D8
79D5
25D8
25D8
25C4
79D5
26B4
25C4
67D3
67D3
25D8
25D3
67D5
25D3
25D3
24D3
67D5
25D8
24C3
67C3
67C3
25D3
25C6
67D3
25C6
25C6
21C1
67D3
25D3
21C1
66C5
66C5
25C6
25C4
67C3
25C4
25C4
19D7
67C3
25C6
19D7
65D8
65D8
25C4
25B8
66C5
25B8
25B8
19D6
66C5
25C4
19D6
65D2
65D2
25B8
25B4
65D8
25B4
25B4
19D5
65D8
25B8
19D5
67C8
67C8
67C8
65D1
65D1
25B4
25A4
65D2
67C8
25A4
67C8
67C8
25A4
19D2
65D2
25B4
19D2
67C6
67C6
67C6
65C8
65C8
25A4
24D3
65D1
67C6
24D3
67C6
67C6
24D3
19D1
65D1
25A4
19D1
66C5
66C5
66C5
63D8
63D8
24D3
24C3
65C8
66C5
24C3
66C5
66C5
24C3
19C8
65C8
24C3
19C8
62C1
62C1
62C1
56D4
56D4
24C3
24B5
63D8
62C1
24B5
62C1
62C1
24B5
17D6
63D8
24B5
17D6
62A8
62A8
62A8
26C5
26C5
24B5
24B3
56D4
62A8
24B3
62A8
62A8
24B3
17D3
56D4
24B3
17D3
48B6
48B6
48B6
25D2
25D2
23D5
23D5
26C5
48B6
23D5
48B6
48B6
23D5
16D3
26C5
23D5
16D3
25D6
25D6
25D6
25C8
25C8
23B3
23B3
25D2
25D6
23B3
25D6
25D6
23B3
16C8
25D2
23B3
16C8
25C8
25C8
25C8
25B6
25B6
22B5
22B5
25C8
25C8
22B5
25C8
25C8
22B5
13B5
25C8
22B5
13B5
25C6
25C6
25C6
24C3
24C3
21D3
21D3
25B6
25C6
21D3
25C6
25C6
21D3
12C2
25B6
21D3
12C2
25C2
25C2
25C2
24B3
24B3
21C3
21C3
24C3
25C2
21C3
25C2
25C2
21C3
12B7
24B3
21C3
12B7
25B6
25B6
25B6
24A5
24A5
20B4
20B4
24B3
25B6
20B4
25B6
25B6
20B4
12A7
24A5
20B4
12A7
25B2
25B2
25B2
23D8
23D8
20A4
20A4
23D8
25B2
20A4
25B2
25B2
20A4
11C5
23D8
20A4
11C5
25A8
25A8
25A8
23D4
23D4
19C7
19C7
23D4
25A8
19C7
25A8
25A8
19C7
11B3
23D4
19C7
11B3
24B5
24B5
24B5
23D1
23D1
19C6
19C6
23D1
24B5
19C6
24B5
24B5
19C6
9B7
23D1
19C6
9B7
24A5
24A5
24A5
23B7
23B7
17C6
17C6
23B7
24A5
17C6
24A5
24A5
17C6
8C7
23B7
17C6
8C7
24A3
24A3
24A3
23A7
23A7
14D6
14D6
23A7
24A3
14D6
24A3
24A3
14D6
7D5
23A7
14D6
7D5
9B7
9B7
9B7
22D8
22D8
26D4
14C7
14C7
22D8
9B7
14C7
9B7
9B7
14C7
7B6
22D8
14C7
7B6
8B7
8B7
8B7
22C6
22C6
26D3
10C5
10C5
22C6
8B7
10C5
8B7
8B7
10C5
7B5
22C6
10C5
7B5
5D4
5D4
5D4
11B5
11B5
25A4
5D4
5D4
11B5
5D4
5D4
5D4
5D4
5D4
5D4
11B5
5D4
5D4
25B6
5D1
5D1
5D1
5D4
5D4
21D6
5A4
5A4
5D4
5D1
5A4
5D1
5D1
25A5
5A4
5B2
5D4
5A4
5B2
25C7
25D7
22C1
www.vinafix.vn
NC
NC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ICH CORE/VCC1_05 BYPASS(ICH CORE 1.05V PWR)
(ICH LAN I/F BUFFER 3.3V PWR)
(ICH USB PLL 1.5V PWR)ICH VCCUSBPLL BYPASS
(ICH LOGIC&IO[ATX] 1.5V PWR)ICH VCC1_5_A/ATX BYPASS
ICH V5REF BYPASS(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT)
SECONDARY SIDE OR 3.56MM ON PRIMARY
ICH VCCDMIPLL BYPASS
PLACE C2520 NEAR PIN E3 OF SB
PLACEMENT NOTE:PLACE C2503 < 2.54MM OF PIN AD17 OF SBON SECONDARY SIDE OR 3.56MM ON PRIMARY
ON SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE C2504 < 2.54MM OF PIN F6 OF SBPLACEMENT NOTE:
(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)ICH V5REF_SUS BYPASS
(ICH SUSPEND 3.3V PWR)ICH VCCSUS3_3 BYPASS
(ICH LOGIC&IO[ARX] 1.5V PWR)ICH VCC1_5_A/ARX BYPASS
ICH VCC3_3 BYPASS
PLACE C2509 NEAR PIN B27 OF SBPLACEMENT NOTE:
ICH VCC3_3 BYPASS
(ICH RTC 3.3V PWR)ICH VCCRTC BYPASS
V5, W2, OR W7
3.56MM ON PRIMARY NEAR PINS AA7 ... AG19
3.56MM ON PRIMARY NEAR PIN AD2
ICH VCC_PAUX/VCCLAN3_3 BYPASS
PLACEMENT NOTE:PLACE CAPS NEAR PINSAB8 AND AC8 OF SB
ICH USB/VCCSUS3_3 BYPASS(ICH SUSPEND USB 3.3V PWR)
PLACE CAPS NEAR PINSK3 ... N7 OF SB
PLACE C2520 NEAR PIN C1 OF SB
NEAR PINS D28, T28, AD28
PLACEMENT NOTE:
(ICH IO BUFFER 3.3V PWR)
ICH VCCSATAPLL BYPASS(ICH SATA PLL 1.5V PWR)
PLACE < 2.54MM OF SB ON SECONDARY OR
ICH V_CPU_IO BYPASS(ICH CPU I/O 1.05V PWR)
ICH IDE/VCC3_3 BYPASS
PLACE < 2.54MM OF SB ON SECONDARY OR
(ICH PCI I/O 3.3V PWR)
A24 ... G19 AND P7 OF SB
DISTRIBUTE IN PCI SECTION OF SBNEAR PINS A5 ... G16
(ICH IO BUFFER 3.3V PWR)
3.56MM ON PRIMARY NEAR PIN AG9
3.56MM ON PRIMARY NEAR PIN AG5
PLACEMENT NOTE:
PLACEHOLDERFOR 270UF
PLACE CAPS NEAR PINSPLACEMENT NOTE:
PLACE CAPS NEAR PIN W5 OF SB
PLACEMENT NOTE:
PLACEMENT NOTE:
SB: 4 OF 4
PLACE < 2.54MM OF SB ON SECONDARY OR
PLACEMENT NOTE:
PLACEMENT NOTE:PLACE CAP UNDER SB NEAR PINS V1,
3.56MM ON PRIMARY NEAR PIN U6
PLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:
(ICH SUSPEND 3.3V PWR)ICH VCCSUS3_3 BYPASS
PLACEMENT NOTE:
PLACEMENT NOTE:
ICH VCC1_5A BYPASS(ICH LOGIC&IO 1.5V PWR)
(ICH USB CORE 1.5V PWR)
3.56MM ON PRIMARY NEAR PINS A1 ... J7 PLACE < 2.54MM OF SB ON SECONDARY OR
ICH USB CORE/VCC1_5_A BYPASS
PLACEMENT NOTE:
PLACEMENT NOTE:
PLACEMENT NOTE:
3.56MM ON PRIMARY NEAR PIN AH11 PLACE < 2.54MM OF SB ON SECONDARY ORPLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY ORPLACEMENT NOTE:
(ICH IDE I/O 3.3V PWR)
ICH PCI/VCC3_3 BYPASS
(ICH DMI PLL 1.5V PWR)
ON SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE C2500 & C2505-07 < 2.54MM OF SB
PLACE NEAR PINS AE23, AE26 & AH26 OF SB
(ICH INTEL HDA CORE 3.3V PWR)ICH VCC3_3/VCCHDA BYPASS
PLACE CAPS AT EDGE OF SBPLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
PLACE < 2.54MM OF SB ON
ICH VCCA3GP(VCC1_5_B BYPASS(ICH IO,LOGIC 1.5V PWR)
402
0.1UF10%16VX5R
C25101
2
0
X5R16V10%0.1UF
402
C25121
2
0
603MF-LF1/10W 5%
1R25001 2
603CERM6.3V20%4.7UFC25241
2402X5R16V10%0.1UFC25221
2
SOT-363BAT54DWD2502
1
6
5
SOT-363BAT54DWD2502
4
3
2
0.28-OHM
1206
L25071 2
20%220UF
POLY2.5V
CASE-B2
C25001
2
X5R16V10%
402
0.1UFC25031
2
0
402
0.1UF10%16VX5R
C25041
2
0
10
402
1/16WMF-LF
5%
R2501
12
SM-3100-OHM-EMIL2500
1 2
0
402X5R16V10%0.1UFC25051
2402
0.1UF10%16VX5R
C25061
2402X5R
10%16V
0.1UFC25071
2
402CERM16V10%0.01UFC25011
2 X5R6.3V20%10UF
603
C25081
2
0
0.1UF
402X5R16V10%
C25091
2
0
0.1UF10%16V
402X5R
C25111
2
0
10%16VX5R402
0.1UFC25171
2
0
402X5R16V10%0.1UFC25131
2
0
0
1UF10%
CERM6.3V
402
C25141
2
0
402X5R16V10%0.1UFC25201
2
0.1UF10%16VX5R402
C25151
2
0
0
330UF2.5V20%
POLYCASE-C2
C25161
2
100MF-LF402
1/16W
5%
R2502
1
2
402CERM6.3V10%1UFC25021
2X5R16V10%0.1UF
402
C25181
2
0
402
0.1UF10%16VX5R
C25191
2
0
X5R402
16V10%0.1UFC25211
2
0
402
0.1UF10%16VX5R
C25231
2
0
402
10%16VX5R
0.1UFC25251
2
0
402
0.1UF10%16VX5R
C25261
2402
0.1UF10%16VX5R
C25271
2402
0.1UF10%16VX5R
C25281
2
X5R16V10%0.1UF
402
C25291
2
0
X5R16V10%0.1UF
402
C25301
2
X5R16V10%0.1UF
402
C25341
2
0
X5R16V10%0.1UF
402
C25311
2
X5R16V10%0.1UF
402
C25321
2
0
X5R16V10%0.1UF
402
C25331
2
03001
25 87
051-7164
PP1V5_S0
PP1V5_S0
PP1V05_S0
PP3V3_S0
PP1V05_S0
PP1V5_S0_SB_VCCDMIPLLVOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MMVOLTAGE=1.5V
PP1V5_S0_SB_VCCDMIPLL_F
PP3V3_S0
PP1V5_S0
PP3V3_S5
PP1V5_S0
PP3V3_S0
PP1V5_S0
PP3V3_S0
PP3V3_S0
PP1V5_S0
PP3V3_S5
PP1V5_S0
PP3V3_S0
PP3V3_G3C_SB_RTC_D
PP5V_S5
PP3V3_S0
PP3V3_S5
PP5V_S0
MIN_LINE_WIDTH=0.3MMVOLTAGE=5V
MIN_NECK_WIDTH=0.25MM
PP5V_S5_SB_V5REF_SUS
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.3MM
VOLTAGE=5VPP5V_S0_SB_V5REF
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
VOLTAGE=1.5VPP1V5_S0_SB_VCC1_5_B
PP3V3_S5
PP1V5_S0
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82B3
82B3
82B3
82B3
82B3
82B3
82B3
82A4
82A4
82A4
82A4
82A4
82A4
82A4
79D3
79D3
79D3
79D3
79D3
79D3
79D3
79A8
79A8
79A8
79A8
79A8
79A8
79A8
71D2
71D2
71D2
71D2
71D2
71D2
71D2
67C5
67C5
67C5
67C5
67C5
67C5
67C5
67C3
67C3
67C3
67C3
67C3
67C3
67C3
67B3
67B3
67B3
67B3
67B3
67B3
67B3
67A3
67A3
67A3
67A3
67A3
67A3
67A3
66B6
66B6
66B6
66B6
66B6
66B6
66B6
66B5
66B5
66B5
66B5
66B5
66B5
66B5
66B1
66B1
66B1
66B1
66B1
66B1
66B1
65D6
65D6
65D6
65D6
65D6
65D6
65D6
65B3
65B3
65B3
65B3
65B3
65B3
65B3
62A6
62A6
62A6
62A6
62A6
62A6
62A6
61D8
61D8
61D8
61D8
61D8
61D8
61D8
61A5
61A5
61A5
61A5
61A5
61A5
61A5
60D4
60D4
60D4
60D4
60D4
60D4
60D4
60C7
60C7
60C7
60C7
60C7
60C7
60C7
58C7
58C7
58C7
58C7
58C7
58C7
58C7
58C4
58C4
58C4
58C4
58C4
58C4
58C4
57B6
57B6
57B6
57B6
57B6
57B6
57B6
54D4
54D4
54D4
54D4
54D4
54D4
54D4
54B5
54B5
54B5
54B5
54B5
54B5
54B5
52D3
52D3
52D3
52D3
52D3
52D3
52D3
49C7
49C7
49C7
49C7
49C7
49C7
49C7
49C4
49C4
49C4
49C4
49C4
49C4
49C4
49B5
49B5
49B5
49B5
49B5
49B5
49B5
40B6
40B6
40B6
40B6
40B6
40B6
40B6
36D6
36D6
36D6
36D6
36D6
36D6
36D6
34A8
34A8
34A8
34A8
34A8
34A8
34A8
33D8
33D8
33D8
33D8
33D8
33D8
33D8
33D3
33D3
33D3
33D3
33D3
33D3
33D3
33C7
33C7
33C7
33C7
33C7
33C7
33C7
29A6
29A6
29A6
29A6
29A6
29A6
29A6
29A3
29A3
29A3
29A3
29A3
29A3
29A3
67D8
28A6
67D8
28A6
28A6
28A6
28A6
28A6
28A6
67D6
27D8
67D6
27D8
27D8
27D8
27D8
27D8
27D8
65A2
27D5
65A2
27D5
27D5
27D5
27D5
27D5
27D5
55A4
27D3
55A4
27D3
27D3
27D3
27D3
27D3
27D3
34C8
27C3
34C8
27C3
27C3
27C3
27C3
27C3
27C3
34C6
26D1
34C6
26D1
26D1
26D1
26D1
26D1
26D1
34B8
26B8
34B8
26B8
26B8
26B8
26B8
26B8
26B8
25C4
26B6
25D3
26B6
79D5
26B6
26B6
26B6
79D5
26B6
26B6
24D3
26B4
24D3
26B4
67D5
26B4
26B4
26B4
67D5
26B4
26B4
79D5
79D5
24C3
25D8
24C3
25D8
67D3
25D8
25D8
25D8
67D3
25D8
25D3
67D5
67D5
21C1
25D3
21C1
25D3
67C3
25D3
25D3
25D3
67C3
25C6
25C6
67D3
67D3
19D7
25C6
19D7
25C6
66C5
25C6
25C6
25C4
66C5
25C4
25C4
67C3
67C3
19D6
25B8
19D6
25C4
65D8
25C4
25C4
25B8
65D8
25B8
25B8
66C5
66C5
19D5
25B4
19D5
25B8
65D2
25B4
25B8
25B4
65D2
25B4
25B4
65D8
65D8
19D2
25A4
19D2
25A4
65D1
25A4
67C8
25B4
25A4
67C8
65D1
25A4
25A4
65D2
81B3
65D2
67C8
67C8
19D1
24D3
19D1
24D3
67C8
65C8
67C8
24D3
67C6
24D3
24D3
67C6
65C8
67C8
24D3
24D3
65D1
80B5
65D1
67C8
67C6
67C6
19C8
24C3
19C8
24C3
67C6
63D8
67C6
24C3
66C5
24C3
24C3
66C5
63D8
67C6
24C3
24C3
65C8
80A1
65C8
67C6
66C5
66C5
17D6
24B5
17D6
24B5
66C5
56D4
66C5
24B5
62C1
24B5
24B5
62C1
56D4
66C5
24B5
24B5
63D8
79B8
63D8
66C5
62C1
62C1
17D3
24B3
17D3
24B3
62C1
26C5
62C1
24B3
62A8
24B3
24B3
62A8
26C5
62C1
24B3
71D7
24B3
56D4
71A6
56D4
62C1
62A8
62A8
16D3
23D5
16D3
23D5
62A8
25D2
62A8
23D5
48B6
23D5
23D5
48B6
25D2
62A8
23D5
67C3
23D5
26C5
67B3
26C5
62A8
48B6
48B6
16C8
23B3
16C8
23B3
48B6
25C8
48B6
23B3
25D6
23B3
23B3
25D6
25C8
48B6
23B3
67C1
23B3
25D2
67B1
25D2
48B6
25D6
25D6
13B5
22B5
13B5
22B5
25D6
25B6
25D6
22B5
25C8
22B5
22B5
25C8
25B6
25D6
22B5
67B1
22B5
25B6
67A1
25C8
25D6
25C6
25C8
12C2
21D3
12C2
21D3
25C8
24C3
25C8
21D3
25C6
21D3
21D3
25C6
24C3
25C8
21D3
66D8
21D3
24C3
66B5
24C3
25C8
25C2
25C2
12B7
21C3
12B7
21C3
25C6
24B3
25C6
21C3
25C2
21C3
21C3
25C2
24B3
25C6
21C3
66B8
21C3
24B3
62B1
24B3
25C6
25B6
25B6
12A7
20B4
12A7
20B4
25C2
24A5
25C2
20B4
25B6
20B4
20B4
25B6
24A5
25B6
20B4
65D6
20B4
24A5
61D7
24A5
25C2
25B2
25B2
11C5
20A4
11C5
20A4
25B6
23D8
25B6
20A4
25B2
20A4
20A4
25B2
23D8
25B2
20A4
65B7
20A4
23D8
58C7
23D8
25B2
25A8
25A8
11B3
19C7
11B3
19C7
25A8
23D4
25B2
19C7
25A8
19C7
19C7
25A8
23D4
25A8
19C7
64C8
19C7
23D4
58C4
23D4
25A8
24B5
24B5
9B7
19C6
9B7
19C6
24B5
23D1
24B5
19C6
24B5
19C6
19C6
24B5
23D1
24B5
19C6
62C8
19C6
23D1
57B5
23D1
24B5
24A5
24A5
8C7
17C6
8C7
17C6
24A5
23B7
24A5
17C6
24A5
17C6
17C6
24A5
23B7
24A5
17C6
62B6
17C6
23B7
55A8
23B7
24A5
24A3
24A3
7D5
14D6
7D5
14D6
24A3
23A7
24A3
14D6
24A3
14D6
14D6
24A3
23A7
24A3
14D6
62B2
14D6
23A7
53C4
23A7
24A3
9B7
9B7
7B6
14C7
7B6
14C7
9B7
22D8
9B7
14C7
9B7
14C7
14C7
9B7
22D8
9B7
14C7
26D4
62A4
14C7
22D8
36D6
22D8
9B7
8B7
8B7
7B5
10C5
7B5
10C5
8B7
22C6
8B7
10C5
8B7
10C5
10C5
8B7
22C6
8B7
10C5
26D3
52B5
10C5
22C6
31C5
22C6
8B7
5D4
5D4
5D4
5D4
5D4
5D4
5D4
11B5
5D4
5D4
5D4
5D4
5D4
5D4
11B5
5D4
5D4
24B3
47C7
5D4
11B5
5D4
24D5
11B5
5D4
5D1
5D1
5B2
5A4
5B2
24B5
5A4
5D1
5D4
5D1
5A4
5D1
5A4
5A4
5D1
5D4
5D1
5A4
21D6
5D4
5A4
5D4
5D2
24D5
24D5
22C1
5D4
5D1
www.vinafix.vn
IO
IO
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
OUT
OUT IN
IN
OUT
IN OUT
IN
NCNC
IN
OUT
OUT
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Initial resistor values are based on CRB,but may change after characterization.
fault protection for RTC battery.
for use as DVI_HPD in muxed graphics solution.Pullup on SB_GPIO4 removed as it now defaults low
Platform Reset Connections
NC
518S0452 NOTE: R2607 and D2600 form the double-
NC
Silk: "SYS RST"
Unbuffered
NC
NC
SB RTC Crystal Circuit
1G00 used as small & cheap inverter
100-ohm on NB page
Linda Card represents 3 loads
This part is never stuffed,
NCNC
on the board to short or
LIO represents X loads (2?)
Hook to inverter PWM AND gate (except M59)This RST is used to mask a glitch output fromthe NB PWM output during reset.
On M59 this RST is used for layout reasons
Buffered
D3Cold Reset for GPU
to solder a reset button.
it provides a set of pads
RTC Battery Connector
20K
1/16W
402
5%
MF-LF
R26001 2
20%10VCERM402
0.1UFC2611 1
2
1UF10%6.3VCERM402
C26051
2
OMIT
402MF-LF
100K
1/16W5%
R26981
2
5%1/16WMF-LF402
1MR26061
2
1/16W5%
402
10K
MF-LF
R26971
2
1K
1/16WMF-LF
5%
402
R26072 1
50V5%
402CERM
12pFC2608
1 2
402
5%50V
12pF
CERM
C2609
1 2
32.768K
CRITICAL
SM-2
Y2600
24
13
5%1/16WMF-LF402
0R26101 2
5%1/16WMF-LF402
10MR26091
2
10V
402CERM
20%0.1UFC26801
2
5%1/16W
100K
402MF-LF
R26801
2
MF-LF
0
402
1/16W5%
R26811 2
5%
100
402MF-LF1/16W
R26831 2
402
5%1/16W
0
MF-LF
R26841 2
5%1/16WMF-LF402
0R26851 2
0
1/16W5%
402MF-LF
R26821 2
MF-LF1/16W5%
402
ITP
1KR26961 2
SC70-5MC74VHC1G00
U2603
3
2
1
4
5
SC70MC74VHC1G08
U2680
3
2
1
4
5
MC74VHC1G08SC70
U2601
3
2
1
4
5
SOT-363BAT54DWD2600
1
4
6
3
5 2
CRITICAL
M-RT-SMBM02B-ACHKS-A-GAN-TF-LF
J2600
3
4
1
2
5%1/16W
402MF-LF
100KR26881
2
MC74VHC1G08SC70
U2685
3
2
1
4
5
402
10V20%
CERM
0.1UFC26851
2
10K
402
5%
MF-LF1/16W
R26861
2
0
402MF-LF1/16W5%
R26871 2
1K
MF-LF1/16W5%
402
R26891 2
0.001UF
CERM402
50V10%
C26891
2
1.8K5%
MF-LF402
1/16W
R26111
2
20%10VCERM402
0.1UFC2607 1
2
10K5%
1/16WMF-LF402
R26121
2
402MF-LF1/16W5%10KR26221
2
8.2KR2623 1 2
8.2KR2624 1 2
8.2KR2625 1 2
8.2KR2626 1 2
8.2KR2627 1 2
8.2KR2628 1 2
8.2KR2629 1 2
8.2KR2630 1 2
8.2KR2631 1 2
8.2KR2632 1 2
8.2KR2633 1 2
8.2KR2634 1 2
8.2KR2636 1 2
8.2KR2637 1 2
8.2KR2638 1 2
8.2KR2639 1 2
8.2KR2640 1 2
8.2KR2642 1 2
1UF
CERM
10%6.3V
402
C26101
2
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
87
03001051-7164
26
SB Misc
GPU_SIGNAL_ENABLE
GPU_SIGNAL_ENABLEMAKE_BASE=TRUE
PP3V3_S5
PLTRST_D3COLD_L
GPU_SIGNAL_ENABLE
PEG_RESET_L
PP3V3_S0
GPU_D3COLD_RESET_L
PLT_RST_LMAKE_BASE=TRUE
PP3V3_S0
TPM_LRESET_L
PLT_RST_L
GPU_D3COLD_RESET_LMAKE_BASE=TRUE
MAKE_BASE=TRUELIO_PLT_RESET_L
LIO_PLT_RESET_L
PLT_RST_L
PLT_RST_L
PP3V3_S0
PCI_IRDY_L
PCI_SERR_LPCI_DEVSEL_LPCI_PERR_L
PCI_REQ0_LPCI_REQ1_LPCI_REQ2_LPCI_REQ3_L
INT_PIRQA_LINT_PIRQB_LINT_PIRQC_LINT_PIRQD_LSB_GPIO2SB_GPIO3
PP3V3_S0
VOLTAGE=3.3VPPVBATT_G3C_RTC
SB_RTC_X2
ENET_RST_L
PP3V3_G3C_SB_RTC_D
VOLTAGE=3.3VMAKE_BASE=TRUE
PCI_LOCK_L
PCI_STOP_LPCI_TRDY_L
PCI_FRAME_LPP3V3_G3C_SB_RTC_D
PP3V42_G3H
VOLTAGE=3.3VPPVBATT_G3C_RTC_R
VR_PWRGOOD_DELAY
ALL_SYS_PWRGDPM_SB_PWROKVR_PWRGD_CK410_L
MAKE_BASE=TRUE
PM_SYSRST_LMAKE_BASE=TRUE
SB_SM_INTRUDER_L
SB_RTC_X1
DEBUG_RST_L
SMC_LRESET_L
PLT_RST_L
VR_PWRGD_CK410
VR_PWRGD_CK410_L
SB_RTC_RST_L
SB_RTC_X1_R
XDP_DBRESET_L
PP3V3_S0
PLT_RST_BUF_L
82D5
82D5
82C6
82C6
82D5
82D5
82D5
82B3
82B3
82C6
82C6
82C6
82A4
82A4
82B3
82B3
82B3
79D3
79D3
82A4
82A4
82A4 79A8
79A8
79D3
79D3
79D3
71D2
71D2
79A8
79A8
79A8
67C5
67C5
71D2
71D2
71D2
67C3
67C3
67C5
67C5
67C5
67B3
67B3
67C3
67C3
67C3
67A3
67A3
67B3
67B3
67B3
66B6
66B6
67A3
67A3
67A3
66B5
66B5
66B6
66B6
66B6
66B1
66B1
66B5
66B5
66B5
65D6
65D6
66B1
66B1
66B1
65B3
65B3
65D6
65D6
65D6
62A6
62A6
65B3
65B3
65B3
61D8
61D8
62A6
62A6
62A6
61A5
61A5
61D8
61D8
61D8
60D4
60D4
61A5
61A5
61A5
60C7
60C7
60D4
60D4
60D4
58C7
58C7
60C7
60C7
60C7
58C4
58C4
58C7
58C7
58C7 57B6
57B6
58C4
58C4
58C4
54D4
54D4
57B6
57B6
57B6
54B5
54B5
54D4
54D4
54D4
52D3
52D3
54B5
54B5
54B5
49C7
49C7
52D3
52D3
52D3
49C4
49C4
49C7
49C7
49C7
49B5
49B5
49C4
49C4
49C4
40B6
40B6
49B5
49B5
49B5
36D6
36D6
40B6
40B6
40B6
34A8
34A8
36D6
36D6
36D6
33D8
33D8
34A8
34A8
34A8
33D3
33D3
33D8
33D8
33D8
33C7
33C7
33D3
33D3
33D3
29A6
29A6
33C7
33C7
33C7
29A3
29A3
29A6
29A6
29A6
28A6
28A6
29A3
29A3
29A3
27D8
27D8
28A6
28A6
28A6
27D5
27D5
27D8
27D8
27D8
27D3
27D3
27D5
27D5
27D5
27C3
27C3
27D3
27D3
27D3
26D1
26D1
27C3
27C3
27C3
26B8
26B8
26D1
26B8
26D1
26B6
26B6
26B6
26B6
26B8
26B4
26B4
26B4
26B4
26B4
79D5
25D8
25D8
25D8
25D8
25D8
67D5
25D3
25D3
25D3
25D3
25D3
67D3
25C6
25C6
25C6
25C6
25C6
67C3
25C4
25C4
25C4
25C4
25C4
66C5
25B8
25B8
25B8
25B8
81D4
25B8
65D8
25B4
25B4
25B4
25B4
69C8
25B4
65D2
25A4
25A4
25A4
25A4
69B8
25A4
65D1
24D3
24D3
24D3
24D3
69A8
24D3
65C8
24C3
24C3
24C3
24C3
68B8
24C3
63D8
24B5
24B5
24B5
24B5
67D5
24B5
56D4
24B3
24B3
24B3
24B3
67D3
24B3
25D2
23D5
23D5
23D5
23D5
66D2
23D5
25C8
23B3
23B3
23B3
23B3
66C8
23B3
25B6
22B5
22B5
22B5
22B5
66A8
22B5
24C3
21D3
21D3
21D3
21D3
53C4
21D3
24B3
21C3
21C3
82A4
21C3
21C3
52D7
82A4
21C3
24A5
20B4
82A4
20B4
82A4
82A4
79A8
20B4
20B4
52B7
79A8
20B4
23D8
20A4
79A8
20A4
79A8
79A8
26C3
20A4
20A4
52B5
26C3
20A4
23D4
19C7
26C1
19C7
26C3
26C3
26C1
19C7
19C7
52B1
26C1
19C7
23D1
19C6
26B1
19C6
26C1
26C1
26B1
19C6
19C6
51D4
26B1
19C6
23B7
17C6
26A4
17C6
26B1
26A4
26A4
17C6
17C6
51D3
26A4
17C6
23A7
14D6
22A6
14D6
22A6
22A6
22A6
14D6
14D6
51C2
22A6
14D6
82A7
22D8
82A7
14C7
14B7
14C7
14B7
14B7
14B7
14C7
37D3
14C7
26D3 26D4
47B5
14B7
61C7
14C7
80B2
82A7
22C6
80B2
10C5
6C7
10C5
6C7
48C3
48C3
6C7
6C7
10C5
22B6
10C5
25A4 25A4
35B7
61C7
6C7
33A4
10C5
26A2
80B2
11B5
26A2
70A5
5D4
26A4
6C6
5D4
60B7
6C6
26C1
26C1
6C6
6C6
5D4
37D3
37C3
37D3
37D3
6B5
37D3
5D4
24B3
37C3
37C3
37D3
24B3
27C3
66B1
33A4
53B4
51C7
6C6
26A7
5D4
26A1
26A1
5D4
26A1
5C4
5A4
23C5
5C4
5A4
5C4
5C4
5C1
5C1
5C4
5C4
5A4
22A6
22A6
22A6
22A6
22B6
22B6
22B6
6B3
22A7
22A7
22A7
22A7
22A6
22A6
5A4
21D6
39C6
21D6
22A6
22A6
22A6
22A7
21D6
5D2
51D7
26A8
21D6
21D6
5C2
5C4
5C4
5A4
37A7
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(Write: 0x92 Read: 0x93)
SMC "Battery B" SMBus Connections
NOTE: SMC RMT bus remains powered and may be active in S3 stateSMC "A" SMBus Connections
Battery
SMC "Battery A" SMBus Connections
(Write: 0x16 Read: 0x17)
(See Table)
Left I/O Board
USB Hub
Top-Case
SMC "B" SMBus Connections
TMP106: U5650Battery Chgr
(Write: 0x98 Read: 0x99)TMP401: U1001CPU Temp
SMC "0" SMBus Connections
GPU TempU5800
(MASTER)
SO-DIMM "B"
ICH7-M SMBus Connections
(WRITE: 0X98 READ: 0X99)
(WRITE: 0X92 READ: 0X93)
LIO/ALS TempTMP106: J5500
(Write: 0xD2 Read: 0xD3)
SO-DIMM "A"
M35B - TMP106
(Write: 0x72 Read: 0x73)
Left I/O SMBus Connections:
(Write: 0x92 Read: 0x93)
ExpressCard Slot(Address determined by ARP)
(See Table)J4900
Trackpad
(See Table)U4900
(Write: 0x70 Read: 0x71)
(Write: 0x58 Read: 0x59)USB_HUB - U4900
U1 - Trackpad Controller
J5500
(MASTER)U5800SMC
TMP275: J4900
ICH7-M
(Write: 0xA0 Read: 0xA1)
U2100(MASTER) (Write: 0x98 Read: 0x99)
TMP401: U6150
Remote TempsMAX6695: U6100
U2 - Keyboard Controller
SMC
SMC
(MASTER)U5800
U5800(MASTER)
J2800
(MASTER)
SMCU5800
J2900
J8250SMC
Trackpad I2C Connections:
(Write: 0x30 Read: 0x31)
(Write: 0xA4 Read: 0xA5)
CY28445-5: U3301Clock Chip
4.7K5%
MF-LF402
1/16W
R27001
2
5%
402
1/16W
4.7K
MF-LF
R27011
2
3.3K
MF-LF402
5%1/16W
R27801
2
3.3K
MF-LF402
5%1/16W
R27811
2
MF-LF402
1/16W5%100KR27911
2
5%100K
402MF-LF1/16W
R27901
2
MF-LF402
1/16W5%4.7KR27611
2
4.7K
MF-LF402
1/16W5%
R27601
2
5%
402MF-LF1/16W
4.7KR27711
2
4.7K5%
MF-LF402
1/16W
R27701
2
402MF-LF1/16W5%4.7KR27511
2402
4.7K
1/16W5%
MF-LF
R27501
2
CERM
15pF
NO STUFF
5%50V
402
C27011
2CERM
5%50V
402
15pFC27611
25%50VCERM402
15pFC27511
2
051-7164 03001
27 87
M57 SMBUS CONNECTIONSSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
SMBUS_SMC_BSA_SCL
PP3V3_S0
SMBUS_SB_SDA
SMBUS_SMC_0_S0_SDA
PP3V3_S0
SMBUS_SB_SDA
SMBUS_SMC_0_S0_SCL SMBUS_SMC_B_S0_SCL
SMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA
SMBUS_SMC_BSB_SDA
SMBUS_SMC_BSA_SCL
SMBUS_SMC_BSB_SDAMAKE_BASE=TRUE
SMBUS_SMC_BSB_SCLMAKE_BASE=TRUE
PP3V42_G3H
PP3V3_S0
SMBUS_SMC_B_S0_SDA
PP3V3_S0
SMBUS_SMC_BSB_SCL
SMBUS_SMC_0_S0_SDA
SMBUS_SMC_0_S0_SCL
SMBUS_SMC_BSA_SDAMAKE_BASE=TRUE
SMBUS_SMC_0_S0_SCL
MAKE_BASE=TRUESMBUS_SMC_0_S0_SCL
SMBUS_SMC_A_S3_SDA
SMBUS_SMC_A_S3_SCL
SMBUS_SMC_A_S3_SDA
SMBUS_SB_SDA
SMBUS_SB_SCL
SMBUS_SB_SCL
SMBUS_SB_SDA
MAKE_BASE=TRUESMBUS_SB_SDA
SMBUS_SB_SCL
SMBUS_SB_SDA
SMBUS_SB_SCL
SMBUS_SMC_A_S3_SDA
SMBUS_SMC_A_S3_SCL
SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUE
SMBUS_SMC_A_S3_SDAMAKE_BASE=TRUE
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDA
SMBUS_SB_SCL
SMBUS_SB_SCL
SMBUS_SB_SDA
SMBUS_SB_SCL
SMBUS_SB_SCLMAKE_BASE=TRUE
SMBUS_SB_SDA
SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUESMBUS_SMC_BSA_SCL
SMBUS_SMC_0_S0_SDA
MAKE_BASE=TRUESMBUS_SMC_0_S0_SDA
PP3V3_S3
SMBUS_SMC_B_S0_SDA
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDAMAKE_BASE=TRUE
SMBUS_SMC_B_S0_SCLMAKE_BASE=TRUE
82D5
82D5
82D5 82D5 82C6
82C6
82C6 82C6 82B3
82B3
82B3 82B3 82A4
82A4
82A4 82A4 79D3
79D3
79D3 79D3 79A8
79A8
79A8 79A8 71D2
71D2
71D2 71D2 67C5
67C5
67C5 67C5 67C3
67C3
67C3 67C3 67B3
67B3
67B3 67B3 67A3
67A3
67A3 67A3 66B6
66B6
66B6 66B6 66B5
66B5
66B5 66B5 66B1
66B1
66B1 66B1 65D6
65D6
65D6 65D6 65B3
65B3
65B3 65B3 62A6
62A6
62A6 62A6 61D8
61D8
61D8 61D8 61A5
61A5
61A5 61A5 60D4
60D4
60D4 60D4
60C7
60C7
60C7 60C7 58C7
58C7
58C7 58C7 58C4
58C4
58C4 58C4 57B6
57B6
57B6 57B6 54D4
54D4
54D4 54D4 54B5
54B5
54B5 54B5 52D3
52D3
52D3 52D3 49C7
49C7
49C7 49C7 49C4
49C4
49C4 49C4
49B5
49B5
49B5 49B5 40B6
40B6
40B6 40B6 36D6
36D6
36D6 36D6 34A8
34A8
34A8 34A8 33D8
33D8
33D8 33D8 33D3
33D3
33D3 33D3 33C7
33C7
33C7 33C7 29A6
29A6
29A6 29A6
29A3
29A3
29A3 29A3 28A6
28A6
28A6 28A6 27D5
27D8
27D8 27D8 27D3
27D5
27D3 27D5 27C3
27D3
27C3 27C3 26D1
26D1
26D1 26D1 26B8
26B8
26B8 26B8 26B6
26B6
26B6 26B6 26B4
26B4
26B4 26B4
25D8
25D8
25D8 25D8 25D3
25D3
25D3 25D3 25C6
25C6
25C6 25C6 25C4
25C4
25C4 25C4 25B8
25B8
81D4
25B8 25B8 25B4
25B4
69C8
25B4 25B4
81D4
25A4
25A4
69B8
25A4 25A4
81A5
24D3
24D3
69A8
24D3 24D3
67C5
24C3
24C3
68B8
24C3 24C3
67C3
24B5
24B5
67D5
24B5 24B5
66C6
24B3
24B3
67D3
24B3 24B3
65D1
23D5
23D5
66D2
23D5 23D5
63B7
23B3
23B3
66C8
23B3 23B3
60C2
22B5
81C3
22B5
81C3
66A8
22B5 22B5
81C3
81C3
81C3
81C3
59C6
21D3
48B3
21D3
48B3
53C4
21D3 21D3
81C3
48B3
48B3
48B3
48B3
81C3
57D4
21C3
46B6
21C3
46B6
52D7
21C3 21C3
48B3
46B6
46B6
46B6
46B6
48B3
52B1
20B4
33B6
20B4
33B6
52B7
20B4 20B4
46B6
33B6
33B6
33B6
33B6
46B6
46D6
20A4
29A6
20A4
29A6
52B5
20A4 20A4
33B6
29A6
29A6
29A6
29A6
33B6
46C3
19C7
28A6
19C7
28A6
52B1
19C7 19C7
29A6
28A6
28A6
28A6
28A6
29A6
46B3
19C6
27D8
19C6
27D8
51D4
19C6 19C6
81C3
81C3
28A6
27D8
27D8
81C3
81C3
27D8
27D8
28A6
81C3
41C5
17C6
27D7
17C6
27D7
51D3
17C6 17C6
54C2
54C2
54C2
51B5
81C3
51B5
27D7
27D7
27D7
51B5
81C3
51B5
51B5
51B5
27D7
27D7
27D8
51B5
37D7
51B5
51B5
68B2
14D6
27D6
54C2
14D6
27D6
54C2 51B5
68B2 68B2
68B2
51C2
14D6
51B5
14D6
54B3
54B3
68B2
54B3
54C2
48B6
51B5
48B6
27D6
27D6
27D6
48B6
51B5
48B6
49B5
49B5
27D6
27D6
27D6
48B6
68B2
54C2
37D5
49B5
49B5
51B5
51B5
51B5
14C7
27C6
54B3
14C7
27C6
54B3 49B5
51B5 51B5
51B5
47B5
14C7
49B5
14C7
51C5
51C7
51B5
51C7
54B3
27C6
48B6
27C5
27C6
27C6
27C6
27C6
48B6
27C6
27D3
27D3
27C6
27C6
27C6
27C6
51B5
54B3
37C3
27D3
27D3
49B5
49B5
27C2
10C5
27B6
51C5
10C5
27B6
51C7 27D2
27C2 27C3
27C3
35B7
10C5
27D2
10C5
27D6
27D6
27C3
27D6
51C7
27C5
27C5
27C3
27B6
27B6
27B6
27C5
27C6
27C3
27D2
27D2
27B6
27B6
27B6
27C5 27C3
51C5
37A7
27D2
27D2
27D3
27D3
27C1
5D4
23D5
27D5
5D4
23D5
27D5 27D1
27C1 27C2
51C7
27C2
51C7
51C5
26D6
5D4
27D1
5D4
51C5
27D5
27D5
27C1
27D5
27D6
27B3
27C3
27B3
23D5
23D5
23D5
27C3
27C3
27B3
27D1
27D1
23D5
23D5
23D5
27C3 27C1
27D6
32C5
27D1
27D1
27D1
27D1
5D1
5A4
5B1
27D3
5A4
5B1
27D3 10B3
5D1 5D1
27B2
5D1
27B3
27B3
5D2
5A4
10B3
5A4
27B2
27D3
27D3
5D1
27D3
27D3
5B1
5B1
5B1
5B1
5B1
5B1
5B1
5B1
5B1
10B3
10B3
5B1
5B1
5B1
5B1 5D1
27D3
5D4
10B3
10B3
10B3
10B3
www.vinafix.vn
VSS2
DQS0*
DQ5
VSS0DQ4
VSS5
DQ6
VSS29
DM0
VSS7
DM1
DQ7
VDD1
DQ30
DQ23
VSS22
NC/ODT1
RAS*
SA1
SA0VSS58
DQ63
DQ62VSS56
DQS7DQS7*
VSS54
DQ60
VSS52
DQ54
VSS50
VSS48
CK1*CK1
VSS46
DQ53DQ52
VSS44
VSS42
DQS5DQS5*
VSS39DQ45
DQ44
VSS37DQ39
DQ38
VSS35DM4
VSS34
DQ37DQ36
VSS32NC3
VDD11
NC/A13ODT0
VDD9
S0*
BA1
VDD7A0
A2A4
VDD5
A6A7
A11
VDD3NC/A14
NC/A15
NC/CKE1
VSS30DQ31
DQS3
DQ29
DQ28
VSS24
DQ22
DM2
NC0VSS19
DQ21
DQ20VSS17
VSS15
DQ15DQ14
VSS13
CK0*CK0
VSS11
DQ13
DQ12
DQ47DQ46
DQ61
DQ55
DM6
VDDSPD
SCLSDA
VSS57
DQ59DQ58
VSS55DM7
VSS53
DQ56
VSS51
DQ50
VSS49
DQS6*
VSS47NC_TEST
VSS45
DQ49DQ48
VSS43
VSS41
DM5VSS40
DQ41
VSS38
DQ35
VSS36
DQS4DQS4*
VSS33
DQ33DQ32
VSS31
VDD10
NC/S1*CAS*
VDD8
WE*BA0
A10/AP
VDD6A1
A3A5
VDD4
A8A9
A12
VDD2BA2
NC2
VDD0CKE0
DQ27
DQ26
VSS27NC1
DM3
DQ25
DQ24
VSS23DQ19
DQ18VSS21
DQS2
DQS2*VSS18
DQ17
DQ16VSS16
VSS14
DQ11DQ10
VSS12
DQS1DQS1*
DQ9DQ8
VSS8
DQ3DQ2
VSS6DQS0
VREF
DQ34
DQ40
DQ42DQ43
DQS6
DQ51
DQ57
KEY
VSS9
DQ1VSS4
DQ0
VSS1
DQS3*
VSS26
VSS28
VSS25
VSS10
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
DDR2 Bypass Caps(For return current)
ADDR=0xA0(WR)/0xA1(RD)
NC
NC
NC
NC
- =PPSPD_S0_MEM (2.5V - 3.3V)- =PP1V8_S3_MEM
BOM options provided by this page:(NONE)
Power aliases required by this page:
NC
- =I2C_SODIMMA_SCL- =I2C_SODIMMA_SDA
NOTE: This page does not supply VREF.The reference voltage must be providedby another page.
Signal aliases required by this page:
Page Notes
516S0471
"Expansion" (surface-mount) slot
402
6.3VCERM
1UF10%
C28131
2402
6.3VCERM
1UF10%
C28121
2
10UF
X5R603
20%6.3V
C28091
2
402
6.3VCERM
1UF10%
C28111
2
10UF
X5R603
20%6.3V
C28081
2
402
6.3VCERM
1UF10%
C28101
2
402
10%6.3VCERM
1UFC28191
2402
10%6.3VCERM
1UFC28181
2
402
6.3VCERM
1UF10%
C28171
2402
6.3VCERM
1UF10%
C28161
2
402
10%6.3VCERM
1UFC28211
2402
10%6.3VCERM
1UFC28201
2
402
6.3VCERM
1UF10%
C28151
2402
6.3VCERM
1UF10%
C28141
2
0.1uF
CERM402
20%10V
C28001
2
F-RT-SM-M9
CRITICAL
DDR2-SODIMM-DUAL
J2800
102A
105A
90A89A
101A
100A99A
98A97A
94A
92A
93A
91A
107A
106A
85A
113A
30A
32A
164A
166A
79A
10A
26A
52A
67A
130A
147A
170A
185A
5A
35A
37A
20A
22A
36A
38A
43A
45A
55A
57A
7A
44A
46A
56A
58A
61A
63A
73A
75A
62A
64A
17A
74A
76A
123A
125A
135A
137A
124A
126A
134A
136A
19A
141A
143A
151A
153A
140A
142A
152A
154A
157A
159A
4A
173A
175A
158A
160A
174A
176A
179A
181A
189A
191A
6A
180A
182A
192A
194A
14A
16A
23A
25A
13A
11A
31A
29A
51A
49A
70A
68A
131A
129A
148A
146A
169A
167A
188A
186A
201
202
203
204
116A
86A
84A
80A
119A
115A
50A
69A
83A
120A
163A
114A
108A
110A
198A
200A
197A
195A
81A
117A 118A
82A
87A 88A
95A 96A
103A 104A
111A 112A
199A
1A 2A
27A 28A
33A 34A
39A 40A
41A 42A
47A 48A
3A
53A 54A
59A 60A
65A 66A
71A 72A
77A
8A
78A
121A 122A
127A 128A
132A
133A
138A
139A
144A
145A
149A 150A
155A 156A
161A 162A
165A
168A
171A
9A
172A
177A 178A
183A 184A
187A
190A
193A
196A
12A
15A
18A
21A
24A
109A
2.2uF20%
603CERM16.3V
C2801 1
2
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
DDR2 SO-DIMM Connector A
051-7164 03001
8728
PP1V8_S3
MEM_A_DQ<28>MEM_A_DQ<25>
MEM_A_DQ<30>
MEM_A_A<10>
MEM_A_DQ<43>
MEM_A_DQ<56>
MEM_A_DQS_N<7>
MEM_A_DQ<63>
MEM_A_DQS_P<7>
MEM_A_DQ<62>
MEM_A_DQ<57>MEM_A_DQ<60>
MEM_A_DQ<55>
MEM_A_DQ<45>
MEM_A_DQ<61>
MEM_A_DQ<59>
MEM_A_DQS_N<1>MEM_A_DQS_P<1>
MEM_A_DQ<10>
MEM_A_DM<1>
MEM_A_DQ<15>MEM_A_DQ<9>
MEM_A_DQ<3>
MEM_A_DQ<26>
MEM_A_DQS_P<3>
MEM_A_DQ<44>
PM_EXTTS_L
MEM_A_DQ<49>MEM_A_DQ<52>
MEM_A_DQS_P<6>MEM_A_DQS_N<6>
MEM_A_DQ<54>
MEM_A_DQ<47>
MEM_A_DM<5>
MEM_CLK_N<1>
MEM_A_DQ<42>MEM_A_DQ<40>
MEM_A_DQ<36>MEM_A_DQ<32>
MEM_A_DM<4>
MEM_A_DQ<34>MEM_A_DQ<38>
MEM_A_A<13>
MEM_CS_L<0>
MEM_A_A<2>MEM_A_A<4>
MEM_A_A<6>MEM_A_A<7>
NC_MEM_A_A<14>NC_MEM_A_A<15>
MEM_A_DQ<21>
MEM_A_DQ<0>
MEM_CLK_N<0>MEM_CLK_P<0>
MEM_A_DQ<8>
SMBUS_SB_SCLSMBUS_SB_SDA
MEM_A_DQ<48>MEM_A_DQ<53>
MEM_A_DM<6>
MEM_A_DQ<50>MEM_A_DQ<51>
MEM_A_DQ<46>MEM_A_DQ<41>
MEM_A_DQS_P<5>MEM_A_DQS_N<5>
MEM_A_DQ<58>
MEM_A_DM<7>
MEM_A_DQ<33>MEM_A_DQ<37>
MEM_A_DQS_P<4>MEM_A_DQS_N<4>
MEM_A_DQ<39>MEM_A_DQ<35>
MEM_ODT<1>
MEM_A_DQ<7>
MEM_A_WE_LMEM_A_BS<0>
MEM_A_A<1>MEM_A_A<3>MEM_A_A<5>
MEM_A_A<8>MEM_A_A<9>MEM_A_A<12>
MEM_A_BS<2>
MEM_CKE<0>
MEM_A_DQ<27>
MEM_A_DM<3>
MEM_A_DQ<16>MEM_A_DQ<20>
MEM_A_DQS_P<2>MEM_A_DQS_N<2>
MEM_A_DQ<18>MEM_A_DQ<19>
MEM_A_DQ<6>
MEM_A_DQS_P<0>MEM_A_DQS_N<0>
MEM_A_DQ<4>MEM_A_DQ<5>
MEM_A_DQ<11>
MEM_A_DQ<14>
MEM_CKE<1>
MEM_A_BS<1>
MEM_A_DQ<1>
MEM_A_DQ<22>
MEM_A_DM<2>
MEM_A_DQ<17>
MEM_A_DQ<29>MEM_A_DQ<24>
MEM_A_DQ<31>
MEM_A_A<11>
MEM_A_A<0>
MEM_A_RAS_L
MEM_ODT<0>MEM_CS_L<1>MEM_A_CAS_L
MEM_A_DQ<23>
MEM_A_DQS_N<3>
MEM_A_DQ<12>MEM_A_DQ<13>
MEM_A_DQ<2>
PP1V8_S3
PP3V3_S0
PP1V8_S3
MEM_CLK_P<1>
MEM_A_DM<0>
MEMVREF_OUT
82D5 82C6 82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6 66B5 66B1 65D6 65B3 62A6 61D8 61A5 60D4 60C7 58C7 58C4 57B6 54D4
54B5 52D3 49C7 49C4 49B5 40B6 36D6 34A8 33D8 33D3 33C7 29A6 29A3 27D8 27D5 27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8 25B4
25A4 24D3 24C3
67B8
67B8
24B5
67B8
67B6
67B6
24B3
67B6
64C1
64C1
23D5
64C1
64A6
64A6
23B3
64A6
37B2
37B2
22B5
37B2
32C6
81C3
81C3
32C6
21D3
32C6
31C5
48B3
48B3
31C5
21C3
31C5
29D6
46B6
46B6
29D6
20B4
29D6
29D3
33B6
33B6
29D3
20A4
29D3
29B2
29A6
29A6
29B2
19C7
29B2
28D6
27D8
27D8
28D3
19C6
28D6
28D3
27D7
27D7
28B2
17C6
28B2
19D7
52D5
27D6
27D6
19D7
14D6
19D7
16B6
52D3
27C6
27C6
16B6
14C7
16B6
32B4
14C2
51B7
27B6
27B6
14C2
10C5
14C2
32B3
5D4
30C6
29C3
30C6
30D6
30C6
30C6
30C6
30C6
23D5
23D5
30C6
30B6
30B6
30C6
30C6
30C6
30C6
30C6
30C6
30B6
30D6 30D6
30B6
30C6
30C6
30B6
30C6
30D6
30B6
5D4
5D4
5D4
29D6
5B2
15C7
15C7
15C7
15B5
15B7
15B7
15C5
15A7
15C5
15A7
15B7
15A7
15B7
15B7
15A7
15B7
15C5
15C5
15C7
15D5
15C7
15C7
15D7
15C7
15C5
15B7
14B7
15B7
15B7
15C5
15C5
15B7
15B7
15C5
14D4
15B7
15B7
15B7
15C7
15C5
15B7
15B7
15B5
14C4
15C5
15B5
15B5
15B5
6D7
6D7
15C7
15D7
14D4
14D4
15C7
5B1
5B1
15B7
15B7
15C5
15B7
15B7
15B7
15B7
15C5
15C5
15B7
15C5
15C7
15B7
15C5
15C5
15B7
15B7
14C4
15D7
15B5
15D5
15C5
15B5
15B5
15B5
15B5
15B5
15D5
14C4
15C7
15C5
15C7
15C7
15C5
15C5
15C7
15C7
15D7
15C5
15C5
15D7
15D7
15C7
15C7
14C4
15D5
15D7
15C7
15D5
15C7
15C7
15C7
15C7
15B5
15C5
15B5
14C4
14C4
15D5
15C7
15C5
15C7
15C7
15D7
5B2
5A4
5B2
14D4
15D5
14C2
www.vinafix.vn
VSS7
VSS12
VSS9
KEY
DQ57
DQ51
DQS6
DQ43DQ42
DQ40
DQ34
DQ1
DQ0
VSS1
DQS0*
DQS0VSS6
DQ2DQ3
DQ8DQ9
VSS10
DQS1*DQS1
DQ10DQ11
VSS14
VSS16DQ16
DQ17
VSS18DQS2*
DQS2
VSS21DQ18
DQ19VSS23
DQ24
DQ25VSS25
DM3
NC1VSS27
DQ26
DQ27VSS29
CKE0VDD0
NC2
BA2VDD2
A12
A9A8
VDD4
A5A3
A1VDD6
A10/AP
BA0WE*
VDD8
CAS*NC/S1*
VDD10
NC/ODT1VSS31
DQ32DQ33
VSS33
DQS4*DQS4
VSS36
DQ35
VSS38
DQ41
VSS40DM5
VSS41
VSS43
DQ48DQ49
VSS45
NC_TESTVSS47
DQS6*
VSS49
DQ50
VSS51
DQ56
VSS53
DM7VSS55
DQ58DQ59
VSS57
SDASCL
VDDSPD
DM6
DQ55
DQ61
DQ46DQ47
DQ12
DM1
DM0
DQ7
DQ13
VSS11
CK0CK0*
VSS13
DQ14DQ15
VSS15
VSS17DQ20
DQ21
VSS19NC0
DM2
VSS22DQ22
DQ23VSS24
DQ28
DQ29VSS26
DQS3*
DQS3VSS28
DQ30
DQ31VSS30
NC/CKE1VDD1
NC/A15
NC/A14VDD3
A11
A7A6
VDD5
A4A2
A0VDD7
BA1
RAS*S0*
VDD9
ODT0NC/A13
VDD11
NC3VSS32
DQ36DQ37
VSS34
DM4VSS35
DQ38
DQ39VSS37
DQ44
DQ45VSS39
DQS5*DQS5
VSS42
VSS44
DQ52DQ53
VSS46
CK1CK1*
VSS48
VSS50
DQ54
VSS52
DQ60
VSS54
DQS7*DQS7
VSS56DQ62
DQ63
VSS58SA0
SA1
DQ5
VSS2
VREF
VSS4
VSS8
VSS0DQ4
VSS5
DQ6
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
"Factory" (thru-hole) slot
DDR2 Bypass Caps(For return current)
ADDR=0xA4(WR)/0xA5(RD)
Resistor prevents pwr-gnd short
NC
NC
NC
NC
NC
BOM options provided by this page:
- =PPSPD_S0_MEM (2.5V - 3.3V)- =PP1V8_S3_MEMPower aliases required by this page:
(NONE)
Signal aliases required by this page:
NC
Page Notes
- =I2C_SODIMMB_SCL- =I2C_SODIMMB_SDA
by another page.The reference voltage must be providedNOTE: This page does not supply VREF.
516-0140
6.3V10%1UF
CERM402
C29131
26.3V10%1UF
CERM402
C29121
2
10UF
X5R603
20%6.3V
C29091
2
20%
402CERM
0.1uF10V
C29111
2
10UF
X5R6.3V20%
603
C29081
2
6.3V10%1UF
CERM402
C29101
2
20%
402CERM
0.1uF10V
C29191
2
20%
402CERM
0.1uF10V
C29181
2
10V20%
402CERM
0.1uFC29171
26.3V10%1UF
CERM402
C29161
2
20%
402CERM
0.1uF10V
C29211
2
20%
402CERM10V
0.1uFC29201
2
6.3V10%1UF
CERM402
C29151
26.3V10%1UF
CERM402
C29141
2
10K5%1/16WMF-LF402
R29001
2
F-RT-TH1
DDR2-SODIMM-DUAL
CRITICAL
J2900
102B
105B
90B89B
101B
100B99B
98B97B
94B
92B
93B
91B
107B
106B
85B
113B
30B
32B
164B
166B
79B
10B
26B
52B
67B
130B
147B
170B
185B
5B
35B
37B
20B
22B
36B
38B
43B
45B
55B
57B
7B
44B
46B
56B
58B
61B
63B
73B
75B
62B
64B
17B
74B
76B
123B
125B
135B
137B
124B
126B
134B
136B
19B
141B
143B
151B
153B
140B
142B
152B
154B
157B
159B
4B
173B
175B
158B
160B
174B
176B
179B
181B
189B
191B
6B
180B
182B
192B
194B
14B
16B
23B
25B
13B
11B
31B
29B
51B
49B
70B
68B
131B
129B
148B
146B
169B
167B
188B
186B
201
202
116B
86B
84B
80B
119B
115B
50B
69B
83B
120B
163B
114B
108B
110B
198B
200B
197B
195B
81B
117B 118B
82B
87B 88B
95B 96B
103B 104B
111B 112B
199B
1B 2B
27B 28B
33B 34B
39B 40B
41B 42B
47B 48B
3B
53B 54B
59B 60B
65B 66B
71B 72B
77B
8B
78B
121B 122B
127B 128B
132B
133B
138B
139B
144B
145B
149B 150B
155B 156B
161B 162B
165B
168B
171B
9B
172B
177B 178B
183B 184B
187B
190B
193B
196B
12B
15B
18B
21B
24B
109B
10V20%
402CERM
0.1uFC29001
26.3V
CERM1603
20%2.2uFC2901 1
2
DDR2 SO-DIMM Connector BSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
03001051-7164
29 87
MEM_B_DQ<1>
MEM_CLK_N<3>
MEM_B_DQ<0>
PP1V8_S3
MEM_B_DQ<20>
PP1V8_S3
MEM_B_DQ<27>
NC_MEM_B_A<15>
MEM_B_DQ<31>MEM_B_DQ<30>
MEM_B_DQ<26>
MEM_B_DQ<7>
MEM_B_DQ<5>
MEM_B_DQ<2>
MEM_B_DQ<3>MEM_B_DQ<6>
MEM_B_DQ<4>
MEM_CLK_P<3>
MEM_B_DM<0>
MEM_B_DQ<10>MEM_B_DQ<13>
MEM_B_DQS_P<1>MEM_B_DQS_N<1>
MEM_B_DQ<22>
PM_EXTTS_L
MEM_B_DQS_P<0>
MEM_B_DQ<8>
MEM_B_DQ<59>MEM_B_DQ<58>MEM_B_DQ<63>
MEM_B_DQ<62>
MEM_CLK_P<2>
MEM_B_DM<7>
MEM_B_DQ<56>MEM_B_DQ<60>MEM_B_DQ<57>MEM_B_DQ<61>
MEM_B_DQ<47>
MEM_B_DQS_N<7>
MEM_B_DQS_N<6>MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_A<5>
MEM_CKE<3>
NC_MEM_B_A<14>
MEM_B_DM<3>
MEM_B_DQ<19>
MEM_B_DQ<11>MEM_B_DQ<9>
MEM_B_BS<1>
MEM_B_A<0>MEM_B_A<2>MEM_B_A<4>
MEM_B_A<6>MEM_B_A<7>MEM_B_A<11>
MEM_B_DQS_P<3>MEM_B_DQS_N<3>
MEM_B_DQ<28>
MEM_B_DQ<16>MEM_B_DQ<17>
MEM_B_DM<2>
MEM_B_DQ<12>
MEM_B_DQ<32>
MEM_B_DQ<55>
MEM_CLK_N<2>
MEM_B_DQ<46>
MEM_B_DQS_P<5>MEM_B_DQS_N<5>
MEM_B_DQ<45>MEM_B_DQ<44>
MEM_B_DQ<39>MEM_B_DQ<38>
MEM_B_DM<4>
MEM_B_DQ<37>
MEM_B_A<13>MEM_ODT<2>
MEM_CS_L<2>MEM_B_RAS_L
MEM_B_DQ<42>
MEM_B_DQ<49>MEM_B_DQ<52>
MEM_B_DM<6>
MEM_B_DQ<51>MEM_B_DQ<54>
MEM_B_DQ<43>
MEM_B_DM<5>
MEM_B_DQ<41>MEM_B_DQ<40>
MEM_B_DQ<35>MEM_B_DQ<34>
MEM_B_DQS_P<4>MEM_B_DQS_N<4>
MEM_B_DQ<33>MEM_B_DQ<36>
MEM_ODT<3>
MEM_CS_L<3>MEM_B_CAS_L
MEM_B_WE_LMEM_B_BS<0>MEM_B_A<10>
MEM_B_A<1>MEM_B_A<3>
MEM_B_A<8>MEM_B_A<9>MEM_B_A<12>
MEM_B_BS<2>
MEM_CKE<2>
MEM_B_DQ<25>
MEM_B_DQ<24>MEM_B_DQ<29>
MEM_B_DQ<23>
MEM_B_DQS_P<2>MEM_B_DQS_N<2>
MEM_B_DQ<21>
MEM_B_DQS_N<0>
MEM_B_DQ<14>MEM_B_DM<1>
MEM_B_DQ<15>
PP3V3_S0
SMBUS_SB_SCLSMBUS_SB_SDA
MEM_B_DQ<48>MEM_B_DQ<53>
MEM_B_DQ<50>
SODIMM_A_SA1
PP3V3_S0
MEMVREF_OUT
MEM_B_DQ<18>
PP1V8_S3
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A3
29A6
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
25D8
25D3
25D3
25C6
25C6
25C4
25C4
25B8
25B8
25B4
25B4
25A4
25A4
24D3
24D3
24C3
24C3
67B8 67B8
24B5
24B5
67B8
67B6 67B6
24B3
24B3
67B6
64C1 64C1
23D5
23D5
64C1
64A6 64A6
23B3
23B3
64A6
37B2 37B2
22B5
22B5
37B2
32C6 32C6
21D3
81C3
21D3
32C6
31C5 31C5
21C3
48B3
21C3
31C5
29D6 29D3
20B4
46B6
20B4
29D6
29B2 29B2
20A4
33B6
20A4
29D3
28D6 28D6
19C7
28A6
19C7
28D6
28D3 28D3
19C6
27D8
19C6
28D3
28B2 28B2
17C6
27D7
17C6
28B2
19D7 19D7
52D5
14D6
27D6
14D6
19D7
16B6 16B6
52D3
14C7
27C6
14C7
32B4
16B6
14C2 14C2
51B7
10C5
27B6
10C5
32B3
14C2
5D4 5D4
28C3
30B6
30D6
30A6
30B6
30B6
30B6
30B6
30B6
30B6
30B6
30C6
30D6
30A6
30C6
30D6
30A6
30A6
30A6
30B6
30B6
30B6
30B6
30B6
30B6
30A6
30D6
5D4
23D5
5D4
28D6
5D4
15D4
14D4
15D4
5B2
15C4
5B2
15C4
6D7
15C4
15C4
15C4
15D4
15D4
15D4
15D4
15D4
15D4
14D4
15D2
15C4
15C4
15C2
15C2
15C4
14B7
15C2
15C4
15B4
15B4
15A4
15A4
14D4
15C2
15B4 15A4
15B4 15A4
15B4
15C2
15C2
15C2
15C2
15B2
14C4
6D7
15C2
15C4
15C4
15C4
15D2
15C2
15C2
15B2
15B2
15B2
15B2
15C2
15C2
15C4
15C4
15C4
15D2
15C4
15C4
15B4
14D4
15B4
15C2
15C2
15B4
15B4
15B4
15B4
15C2
15B4
15B2
14C4
14C4
15B2
15B4
15B4
15B4
15C2
15B4
15B4
15B4
15C2
15B4
15B4
15B4
15B4
15C2
15C2
15C4
15B4
14C4
14C4
15D2
15B2
15D2
15B2
15C2
15B2
15B2
15B2
15B2
15D2
14C4
15C4
15C4
15C4
15C4
15C2
15C2
15C4
15C2
15C4
15D2
15C4
5A4
5B1
15B4
15B4
15B4
5A4
14C2
15C4
5B2
www.vinafix.vn
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
One cap for each side of every RPAK, one cap for every two discrete resistors
Ensure CS_L and ODT resistors are close to SO-DIMM connector
0.1uF
CERM
20%10V
402
C30511
2
20%10VCERM402
0.1uFC30531
2
20%
402
10VCERM
0.1uFC30521
2
402
10V20%0.1uF
CERM
C30501
2
0.1uF
402CERM10V20%
C30551
2
20%10VCERM402
0.1uFC30571
2
0.1uF
402CERM10V20%
C30591
210V20%0.1uF
402CERM
C30581
2
0.1uF20%10VCERM402
C30561
2
20%10VCERM
0.1uF
402
C30541
2
0
1
2
3
5
4
6
7
8
9
10
11
12
13
0
2
1
15B2 15C2 29B3 29B6 29C3 29C6
15D2 29B3 29B6 29C6
15B2 29B3
15D2 29B6
15B2 29B6
561/16W5% SM-LF
RP3004 2 7
5% 1/16W56
SM-LFRP3001 3 6
SM-LF5% 1/16W56RP3010 2 7
565% 1/16W SM-LF
RP3012 4 5
565% 1/16W SM-LF
RP3012 3 6
SM-LF
561/16W5%
RP3003 4 5
SM-LF1/16W5%56RP3012 2 7
1/16W SM-LF
565%
RP3001 1 8
5% 1/16W56
SM-LFRP3004 1 8
561/16W5% SM-LF
RP3002 2 7
565% 1/16W SM-LF
RP3006 1 8
561/16W5% SM-LF
RP3007 1 8
561/16W5% SM-LF
RP3002 4 5
561/16W SM-LF5%
RP3010 1 8
5% SM-LF1/16W56RP3003 1 8
565% 1/16W SM-LF
RP3006 4 5
5% 1/16W56
SM-LFRP3005 3 6
561/16W5% SM-LF
RP3005 4 5
5% 1/16W56
SM-LFRP3003 2 7
5% 1/16W SM-LF
56RP3006 3 6
5% 1/16W SM-LF
56RP3005 2 7
56SM-LF1/16W5%
RP3006 2 7
1/16W56
5% SM-LFRP3002 3 6
5% 1/16W56
SM-LFRP3003 3 6
565% 1/16W SM-LF
RP3001 2 7
56SM-LF1/16W5%
RP3004 4 5
5% SM-LF1/16W56RP3012 1 8
SM-LF1/16W5%56RP3001 4 5
SM-LF1/16W5%56RP3005 1 8
SM-LF
561/16W5%
RP3004 3 6
SM-LF5% 1/16W56RP3008 2 7
SM-LF5% 1/16W56RP3002 1 8
561/16W5% SM-LF
RP3013 4 5
565% 1/16W SM-LF
RP3008 3 6
561/16W5% SM-LF
RP3008 4 5
565% 1/16W SM-LF
RP3009 1 8
SM-LF5% 1/16W56RP3011 2 7
SM-LF
561/16W5%
RP3011 1 8
SM-LF1/16W56
5%RP3009 2 7
SM-LF
561/16W5%
RP3011 3 6
5% SM-LF1/16W56RP3008 1 8
1/16W SM-LF5%56RP3009 3 6
565% 1/16W SM-LF
RP3007 4 5
1/16W5%56
SM-LF
RP3013 2 7
SM-LF
561/16W5%
RP3011 4 5
1/16W5%56
SM-LFRP3010 4 5
5% 1/16W56
SM-LFRP3009 4 5
SM-LF5% 1/16W56RP3007 2 7
SM-LF5% 1/16W56RP3010 3 6
5% 1/16W56
SM-LFRP3013 1 8
561/16W5% SM-LF
RP3007 3 6
SM-LF5% 1/16W56RP3013 3 6
0
1
0
1
1
0
2
0
1
2
3
4
5
6
7
10
11
9
8
13
12
14C4 28B3 28B6 29B3 29B6
14C4 28C3 28C6 29C3 29C6
15B5 15C5 28B3 28B6 28C3 28C6
15D5 28B3 28B6 28C6
15B5 28B3
15D5 28B6
15B5 28B6
2
3
2
3
0.1uF
402CERM10V20%
C30391
210V
402CERM
20%0.1uFC30381
2
0.1uF
402CERM10V20%
C30331
2
0.1uF
CERM10V20%
402
C30321
2
0.1uF20%10VCERM402
C30311
2
402
10V20%0.1uF
CERM
C30301
2
CERM
20%10V
0.1uF
402
C30111
2CERM10V20%
402
0.1uFC30101
2
10V
0.1uF
402CERM
20%
C30071
2
0.1uF20%10VCERM402
C30051
2
0.1uF
402CERM10V20%
C30021
2
0.1uF20%10VCERM402
C30001
2
20%10VCERM402
0.1uFC30371
2
0.1uF20%10VCERM402
C30361
2
0.1uF
402CERM10V20%
C30351
2
0.1uF20%10VCERM402
C30341
2
0
1
2
3
14C4 28B3 28B6 29B3 29B6
051-7164 03001
8730
Memory Active TerminationSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
MEM_B_BS<2..0>
MEM_B_A<13..0>
MEM_ODT<3..0>
MEM_CKE<3..0>
MEM_CS_L<3..0>
MEM_A_BS<2..0>
MEM_A_A<13..0>
PP0V9_S0
MEM_A_WE_L
MEM_B_RAS_L
MEM_A_CAS_LMEM_A_RAS_L
MEM_B_WE_LMEM_B_CAS_L
67D8 67D6 66B5 31C2 5D4
www.vinafix.vn
VLDOIN VIN
VTT
VTTSNS
VTTREF
VDDQSNS
S3
S5
PGNDTHRML GNDPAD
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DDR2 Vtt Regulator
If power inputs are not S0,MEMVTT_EN can be used todisable MEMVTT in sleep.
leave 1.8V powered in S3.Okay to turn off 5V and
(NONE)
(NONE)
Power aliases required by this page:
Signal aliases required by this page:
BOM options provided by this page:
- =PP5V_S0_MEMVTT- =PP1V8_S0_MEMVTT- =PP0V9_S0_MEMVTT_LDO
Page Notes
402
25V
0.1UF
X5R
20%
C31021
2
CRITICAL
TPS51100MSOP
U3100
84
7
9
11
1
10
2
3
6
5
20%
CERM603
6.3V
4.7UFC3104 1
2
603
6.3VX5R
20%10UF
C3101 1
2
MEMVTT_EN_PU
5%1/16WMF-LF402
1KR31001
2
805X5R6.3V20%22UFC31051
2805X5R6.3V20%22UFC31061
2
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
Memory Vtt Supply
051-7164 03001
8731
PP5V_S0
MEMVTT_EN
PP1V8_S3
MEMVTT_VREF
PP0V9_S0
81B3 80B5 80A1 79B8
67B8
71A6
67B6
67B3
64C1
67B1
64A6
67A1
37B2
66B5
32C6
62B1
29D6
61D7
29D3
58C7
29B2
58C4
28D6
57B5
28D3
55A8
28B2
53C4
19D7
67D8
36D6
16B6
67D6
25D8
14C2
66B5
5D4
5D4
30D5
5D2
5B2
5D4
www.vinafix.vn
V+
V-
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SOT23-6-LFMAX4236EUTT
CRITICALU3200
3
4
1
5
6
2
CERM10V
402
0.1UF20%
C3200 1
2
5%25V
220pF
402CERM
C3205 1
2MF-LF402
1%1/16W
10KR32061
2
1/16W1%
402MF-LF
10KR32051
2
1/16W5%
402MF-LF
MEMVREF_S3
100KR32021
2
MEMVREF_S0
0
402MF-LF1/16W5%
R320312
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
DDR2 VRef
051-7164 03001
8732
MEMVREF_SHDN_L
PP3V3_S3
PM_SLP_S3_L
MEMVREF_OUTMEMVREF_OUTMEMVREF_OUT
VOLTAGE=0.9VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmMEMVREF_UNBUF
PP1V8_S3
MEMVREF_OUT
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.2 mm
VOLTAGE=0.9VMIN_NECK_WIDTH=0.15 mm
81D4
81A5 67C5 67C3 66C6
67B8
65D1
67B6
63B7
64C1
60C2
64A6
59C6
37B2
57D4
31C5
52B1
29D6
46D6
29D3
46C3
29B2
46B3
28D6
41C5
28D3
37D7
28B2
37D5
32B4
32B4
32B4
19D7
37C3
32B3
32B3
32B3
16B6
37A7
29D6
29D6
29D6
14C2
27C5
28D6
28D6
28D6
5D4
5D4
14C2
14C2
14C2
5B2
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OUT
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OUT
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OUT
OUT
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OUT
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OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
IO
OUT
IN
IO
IO
OUT
OUT
IN
IN
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
VSS_SRC
THRML_PAD
VSS_REF
VSS_PCI
VSS_CPU
VSS_48
NC
SDA
PCIF_1
PCIF_0/ITP_EN
PCI_5/FCT_SEL_1PCI_4
PCI_3
PCI_2PCI_1
FS_B_TEST_MODE
REF_1/FCT_SEL_0REF_0/FS_C/TEST_SEL
48M/FS_A
VTT_PWRGD*/PD
VDD_AVSS_A
XTAL_IN
XTAL_OUT
CLKREQ_8*
CLKREQ_6*
CLKREQ_5*
CLKREQ_4*
CLKREQ_3*
CLKREQ_1*
CPU_STOP*
PCI_STOP*
VDD_CPU
VDD_48
SCL
CPU_0*
CPU_0
CPU_1CPU_1*
CPU_ITP/SRC_11*
CPU_ITP/SRC_11
SRC_0/LCD_CLKSRC_0/LCD_CLK*
SRC_1
SRC_1*
SRC_2*SRC_2
SRC_3
SRC_3*
SRC_4
SRC_4*
SRC_5*
SRC_5
SRC_7*SRC_7
SRC_8*
SRC_6*SRC_6
SRC_8
DOT_96*/27M_SS*DOT_96/27M
VDD_SRC
VDD_REF
VDD_PCI
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(FW PCI 33MHZ)
(FOR PCI-E CARD)
NEED TO CHECK CAP VALUE
(ICH7M USB 48MHZ)(FROM CPU VCORE PWR GOOD)
(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)
(WIRELESS PCI-E 100 MHZ )
(FROM GMCH CLK_REQ*)
(FROM ICH7 GPIO35)
(ICH7M DMI 100 MHZ )NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?
(GPU PCI-E 100 MHZ )
(INT PU)(INT PU)
(EACH POWER PIN PLACED ONE 0.1UF)
(SMC LPC 33MHZ)(TPM LPC 33MHZ)
(ICH SATA 100 MHZ)
FCTSEL0
SRCC0
SRCC0
SRCC0
SRCT0
TBD
SPREAD27M
11
1
10
0 0
FCTSEL1
100MC_SST
PIN 11PIN 7
DOT96C
SRCT0
SRCT0
* FOR INT. GRAPHIC SYSTEM
PIN 6
(INT PU)
(INT PD)
(INT PD)
(CPU HOST 133/167MHZ)
(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)
(ITP HOST 133/167MHZ)
(FROM ICH7 GPIO20 STPCPU* )(FROM ICH7 GPIO18 STPPCI* )
(GMCH G_CLKIN 100 MHZ )
(INT PD)
(ICH7M,SIO,LPC REF. 14.318MHZ)
(INT PU)
0
(ICH7M PCI 33MHZ)
(ICH SM BUS)
(PULL UP PIN 68 TO ENABLE ITP HOST CLK)
(NO USED)
(PORT80 LPC 33MHZ)
(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)
OFF LOW
SPREAD27M NON
DOT96T
DOT96T
DOT96C 100MT_SST
PIN 10
* FOR EXT. GRAPHIC SYSTEM
(GMCH HOST 133/167MHZ)
(INT PU)
(INT PU)
(INT PU)
(INT PU)
(GIGA LAN PCI-E 100 MHZ )
(NB CRT/TV GRAPHICS DOTCLK 100MHZ)
603X5R
10UF20%6.3V
C33091
2
0.1UF10%X5R16V402
C33051
2 16VX5R402
10%0.1UFC33061
2
16VX5R
0.1UF10%
402
C33071
2
0.1UF10%
40216VX5R
C33081
2
MF-LF1%475
4021/16W
NO STUFF
R33001
2
20%10UF6.3VX5R603
C33121
2 16V0.1UF
402X5R10%
C33111
2
0.1UF
X5R16V10%
402
C33041
210%0.1UF
40216VX5R
C33031
2402X5R16V10%0.1UFC33021
210%0.1UF16VX5R402
C33011
2
1UF6.3VCERM
10%
402
C33101
2
603X5R20%6.3V10UFC33161
2
0.1UF
40216VX5R10%
C33151
2
1UF10%
CERM6.3V
402
C33141
2
402
1/16W5%
MF-LF
1R33031 2
6036.3V20%10UF
X5R
C33171
2
10K5%MF-LF4021/16W
R33011
2
CRITICAL
5X3.2-SM
14.31818Y33011 2
OMITQFN
SLG8LP436
CRITICAL
U3301
4
9
59
20
60
25
34
4544
42
41
37
36
55
6
7
8
40
5758
63
64
65
56
68
1
5453
4748
1011
13
14
15
16
1819
2122
23
24
26
27
2930
33
32
69
3
38
43
61
67
49
12
1728
35
5
39
46
62
66
52
31
2
51
50
FERR-120-OHM-1.5A
0402-LF
L33021 2
FERR-120-OHM-1.5A
0402-LF
L33011 2
50V5%CERM402
12PFC33891
2 50V402CERM5%12PFC33901
2
03001051-7164
33 87
CLOCKSSYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm
PP3V3_S0_CK410_VDD_CPU_SRC_APP3V3_S0
PP3V3_S0MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3VPP3V3_S0_CK410_VDD48_PCI
SMBUS_SB_SCLSMBUS_SB_SDA
CK410_PCI2_CLK
CK410_IREF
CK410_PCI1_CLK
CK410_PCIF0_CLK
CK410_PCI5_FCTSEL1
PCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_N
FSB_CLK_CPU_P
CK410_SRC_CLKREQ8_L
CK410_27M_SPREAD
CK410_REF1_FCTSEL0
FSB_CLK_CPU_N
FSB_CLK_NB_P
PP3V3_S0_CK410_VDD_REFVOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm
PM_STPPCI_LPM_STPCPU_L
FSB_CLK_NB_N
CPU_XDP_CLK_NCPU_XDP_CLK_P
NB_CLK_DREFSSCLKIN_NNB_CLK_DREFSSCLKIN_P
PEG_CLK100M_GPU_NPEG_CLK100M_GPU_P
CK410_SRC_CLKREQ1_L
SB_CLK100M_DMI_NSB_CLK100M_DMI_P
EXCARD_CLKREQ_L
SB_CLK100M_SATA_NSB_CLK100M_SATA_P
SB_CLK100M_SATA_OE_L
NB_CLK100M_GCLKIN_NNB_CLK100M_GCLKIN_PCLK_NB_OE_L
PCIE_CLK100M_MINI_PPCIE_CLK100M_MINI_N
MINI_CLKREQ_L
CK410_SRC7_NCK410_SRC7_P
ENET_CLK100M_PCIE_NENET_CLK100M_PCIE_P
CK410_27M_NONSPREAD
VR_PWRGD_CK410_L
CK410_USB48_FSACK410_CLK14P3M_TIMER
CK410_FSB_TEST_MODE
CK410_PCI3_CLKTP_CK410_PCI4_CLK
CK410_PCIF1_CLK
PP3V3_S0
CK410_XTAL_OUTCK410_XTAL_IN
82D5
82D5
82D5
82C6
82C6
82C6
82B3
82B3
82B3
82A4
82A4
82A4
79D3
79D3
79D3
79A8
79A8
79A8
71D2
71D2
71D2
67C5
67C5
67C5
67C3
67C3
67C3
67B3
67B3
67B3
67A3
67A3
67A3
66B6
66B6
66B6
66B5
66B5
66B5
66B1
66B1
66B1
65D6
65D6
65D6
65B3
65B3
65B3
62A6
62A6
62A6
61D8
61D8
61D8
61A5
61A5
61A5
60D4
60D4
60D4
60C7
60C7
60C7
58C7
58C7
58C7
58C4
58C4
58C4
57B6
57B6
57B6
54D4
54D4
54D4
54B5
54B5
54B5
52D3
52D3
52D3
49C7
49C7
49C7
49C4
49C4
49C4
49B5
49B5
49B5
40B6
40B6
40B6
36D6
36D6
36D6
34A8
34A8
34A8
33D3
33D8
33D8
33C7
33C7
33D3
29A6
29A6
29A6
29A3
29A3
29A3
28A6
28A6
28A6
27D8
27D8
27D8
27D5
27D5
27D5
27D3
27D3
27D3
27C3
27C3
27C3
26D1
26D1
26D1
26B8
26B8
26B8
26B6
26B6
26B6
26B4
26B4
26B4
25D8
25D8
25D8
25D3
25D3
25D3
25C6
25C6
25C6
25C4
25C4
25C4
25B8
25B8
25B8
25B4
25B4
25B4
25A4
25A4
25A4
24D3
24D3
24D3
24C3
24C3
24C3
24B5
24B5
24B5
24B3
24B3
24B3
23D5
23D5
23D5
23B3
23B3
23B3
22B5
22B5
22B5
21D3
21D3
81C3
81C3
21D3
21C3
21C3
48B3
48B3
21C3
20B4
20B4
46B6
46B6
20B4
20A4
20A4
29A6
29A6
20A4
19C7
19C7
28A6
28A6
19C7
19C6
19C6
27D8
27D8
19C6
17C6
17C6
27D7
27D7
17C6
14D6
14D6
27D6
27D6
14D6
14C7
14C7
27C6
27C6 48B6
48B6
34D5
34D5
34D5
34D5
87C6
34B5
34B5
34C5
34C5
34C5
34C5
48C6
48C6
14C7
10C5
10C5
27B6
27B6 34C5
34B5
34D3
34D3
34D3
34D3
34D5
34B4
34B4
70A5
70A5
34C5
34C5
34C3
34C3
34C4
34C4
34D5
34D5
39C6
39C6
61C7
10C5
5D4
5D4
23D5
23D5 34C3
34B3
7C6
7C6
12A6
23C8
23C8
12A6
34D3
14C4
14B4
34B5
34B5
34C3
34C3
21B6
21B6
14C4
14C4
14B6
34D4
34D4
34C5
34C5
26A8
34D8
5D4
5A4
5A4
5B1
5B1
34D8
34D8
34A8
5B1
5B1
5C4
34A4
34B5
34A8
5C4
5C4
5A4
5B4
5B4
5B4
11B3
5B4
5B4
34B4
34B4
34A4
22C2
22C2
5A7
5A7
23C3
5B4
5B4
5B4
5B1
5B1
34B5
34B5
34C3
34C3
34B5
26A7
34C8
34B8
34B8
34D6
5A4
www.vinafix.vn
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IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUTIN
IN
OUTIN
OUT
OUT
OUTOUT
OUT
IO
IO
OUT
IN
OUT
OUT
IN
IN
IN
IN
IN
OUT
OUT
IN
OUT
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUTIN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(NB LVDS GRAPHICS 100MHZ)
(NB CRT/TV GRAPHICS DOTCLK 100MHZ)
Yukon CLK OE*
GPU CLK OE*
(CPU HOST 133/167MHZ)
(ICH7M SATA 100MHZ)
166M200M
(GPU 27MHz Spread / Non-Spread)
(Yukon PCI-E 100MHZ)
0FS_B CPUFS_C
00 0
00
0 00
0
11
11 11 11 1 1
100M333M
0
01#
#133M266M
(GMCH G_CLKIN 100MHZ)
(ICH7M DMI 100MHZ)
NOSTUFF R3450,R3451,R3453 FOR MANUAL CPU FREQUENCY
(ExpressCard Slot)
(GMCH HOST 133/167MHZ)
(ITP HOST 133/167MHZ)
(WIRELESS PCI-E MINI 100MHZ)
FS_A
1
400MRESERVED
# NAPA PLATFORM ONLY SUPPORT 133M/166M CPU SPEED
(GPU PCI-E Graphics 100MHz)
(FROM CPU FS_A)
(FROM CPU FS_B)
(TO MCH FS_B)
NEED TO CHECK THE BSEL PULLS
(TO MCH FS_A)
(FROM CPU FS_C)
(ICH7M 14.318MHZ)
(TO MCH FS_C)
PLACEMENT of thesecaps should be closeas possible to the resistors
(TO FIREWIRE PCI 33MHZ)
(TO TPM PCI 33MHZ)
(TO SMC PCI 33MHZ)
(TO ICH7M PCI 33MHZ)
(PORT80 LPC 33MHZ)
(TO ICH7M USB 48MHZ)
33A4 34C5 39C6
33A4 34C5 39C6
22C2 33B4 34C5
1/16W5%
402
33
MF-LF
R34291 2
TPM
33
MF-LF402
5%1/16W
R34301 2
1/16W5%
402MF-LF
33R34331 2
MF-LF
5%
402
1/16W
33R34321 2
37B6
60C6
51C7
22A6
5C2 53C5
1/16W5%
MF-LF
33
402
R34631 2
22C2 33B4 34C5
1/16W
402
10K
MF-LF
5%
R34671
2
10K
MF-LF402
5%1/16W
R34661
2
1K
402
5%1/16WMF-LF
R34691
2
1K
MF-LF402
5%1/16W
R34681 2
1K
MF-LF402
5%1/16W
R34721 2
1K
MF-LF402
5%1/16W
R34701
21K
MF-LF402
5%1/16W
R34711 2
1K
MF-LF402
5%1/16W
R34731
2
1K
MF-LF402
5%1/16W
R34751 2
1K
MF-LF402
5%1/16W
R34741 2
23D3
5A7 21B6 33B4 34C5
5A7 21B6 33B4 34C5
402
1K
MF-LF
5%1/16W
NOSTUFFR34801
2
33
MF-LF402
5%1/16W
R34761 2
0
MF-LF402
5%1/16W
R34501 2
0
MF-LF402
5%1/16W
R34531 2
NOSTUFF
1K
MF-LF402
5%1/16W
R34541
2
0
MF-LF402
5%1/16W
R34511 2
MF-LF
1K
402
5%1/16W
NOSTUFFR34521
2
5B1 33B4 34C5 48B6
5B1 33B4 34B5 48B6
5C4 12A6 33C4 34D5
5B4 12A6 33C4 34D5
5C4 7C6 33C4 34D5
MF-LF402
1/16W
1K
5%
R34861 2
402
1/16WMF-LF
1K
5%
R34851 2
5C4 7C6 33C4 34D5
11B3 33C4 34D5 87C6
11B3 33C4 34D5 87C6
5%
0
1/16W
402MF-LF
R34241 2
MF-LF402
1/16W
0
5%
R34251 2
NO STUFF
MF-LF402
0
5%1/16W
R34431 2
0
402MF-LF1/16W5%
NO STUFFR34441 2
NO STUFF
MF-LF402
1/16W
71.5
1%
R34021 2
MF-LF402
1/16W
71.5
1%
R34051 2
1/16W
402MF-LF
121
1%
R34181 2
MF-LF402
1/16W5%
56R34191 2
NO STUFF
100K
402
1/16W5%
MF-LF
R34261
2
50VCERM402
15PF5%
NOSTUFFC34041
2402CERM50V
15PF5%
NOSTUFFC34031
2402CERM50V
15PF5%
NOSTUFFC34021
250V
402CERM
15PF5%
NOSTUFFC34011
2402CERM50V5%15PF
NOSTUFFC34001
2
33
MF-LF402
5%1/16W
R34171 2
2.2K
MF-LF402
5%1/16W
R34011 2
Clock TerminationSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
34 87
03001051-7164
PCI_CLK_SMC
PCI_CLK_TPM
PCI_CLK_FW
PCI_CLK_SB
PCI_CLK_PORT80_LPC
TP_CK410_PCI4_CLKMAKE_BASE=TRUE
NB_BSEL<0>
SB_CLK14P3M_TIMER
CK410_FSB_TEST_MODE
NB_BSEL<2>
CPU_BSEL<2>
NB_BSEL<1>
CPU_BSEL<1>
CPU_BSEL<0>
SB_CLK48M_USBCTLR
CK410_CLK14P3M_TIMER
CPU_BSEL_R<2>
CPU_BSEL_R<1>
CPU_BSEL_R<0>
CK410_USB48_FSA
PP1V05_S0
PP1V05_S0
PP1V05_S0
CK410_PCI3_CLK
TP_CK410_PCI4_CLK
CK410_PCI2_CLK
CK410_PCI1_CLK
CK410_PCIF1_CLK
CK410_PCIF0_CLK
NB_CLK100M_GCLKIN_N
PP1V5_S0_NB_VCCA_DPLLA
NB_CLK_DREFCLKIN_PNB_CLK_DREFCLKIN_P
CK410_SRC7_N
CK410_SRC7_P
NB_CLK_DREFCLKIN_N
SB_CLK100M_SATA_P
FSB_CLK_NB_N
SB_CLK100M_SATA_PMAKE_BASE=TRUE
FSB_CLK_NB_NMAKE_BASE=TRUE
SB_CLK100M_SATA_N SB_CLK100M_SATA_NMAKE_BASE=TRUE
PCIE_CLK100M_MINI_NMAKE_BASE=TRUE
PCIE_CLK100M_MINI_N
SB_CLK100M_DMI_NMAKE_BASE=TRUE
SB_CLK100M_DMI_N
NB_CLK_DREFSSCLKIN_PMAKE_BASE=TRUE
NB_CLK_DREFSSCLKIN_P
MAKE_BASE=TRUENB_CLK_DREFSSCLKIN_NNB_CLK_DREFSSCLKIN_N
PEG_CLK100M_GPU_N PEG_CLK100M_GPU_NMAKE_BASE=TRUE
PEG_CLK100M_GPU_PMAKE_BASE=TRUE
PCIE_CLK100M_EXCARD_NMAKE_BASE=TRUE
PCIE_CLK100M_EXCARD_N
PCIE_CLK100M_EXCARD_PMAKE_BASE=TRUE
PCIE_CLK100M_EXCARD_P
ENET_CLK100M_PCIE_NMAKE_BASE=TRUE
ENET_CLK100M_PCIE_N
ENET_CLK100M_PCIE_PMAKE_BASE=TRUE
ENET_CLK100M_PCIE_P
SB_CLK100M_DMI_PMAKE_BASE=TRUE
SB_CLK100M_DMI_P
NB_CLK100M_GCLKIN_NMAKE_BASE=TRUE
NB_CLK100M_GCLKIN_PMAKE_BASE=TRUE
NB_CLK100M_GCLKIN_P
PCIE_CLK100M_MINI_PMAKE_BASE=TRUE
PCIE_CLK100M_MINI_P
CPU_XDP_CLK_NMAKE_BASE=TRUE
CPU_XDP_CLK_N
CPU_XDP_CLK_PMAKE_BASE=TRUE
CPU_XDP_CLK_P
FSB_CLK_NB_PMAKE_BASE=TRUE
FSB_CLK_NB_P
FSB_CLK_CPU_NMAKE_BASE=TRUE
FSB_CLK_CPU_N
FSB_CLK_CPU_PMAKE_BASE=TRUE
FSB_CLK_CPU_P
PEG_CLK100M_GPU_P
CK410_PCI5_FCTSEL1
CK410_REF1_FCTSEL0
PP3V3_S0
MAKE_BASE=TRUECK410_27M_NONSPREAD
MAKE_BASE=TRUECK410_27M_SPREAD
MAKE_BASE=TRUEEXCARD_CLKREQ_LEXCARD_CLKREQ_L
MAKE_BASE=TRUEMINI_CLKREQ_LMINI_CLKREQ_L
CK410_SRC_CLKREQ8_L
CK410_SRC_CLKREQ1_L
NB_CLK_DREFCLKIN_N
CK410_27M_SPREAD GPU_CLK27MSS_IN
CK410_27M_NONSPREAD GPU_CLK27M GPU_CLK27M
GPU_CLK27MSS_IN
82D5 82C6 82B3 82A4 79D3 79A8
71D2 67C5 67C3 67B3 67A3 66B6
66B5 66B1 65D6 65B3 62A6 61D8
61A5 60D4 60C7 58C7 58C4 57B6
54D4 54B5 52D3 49C7 49C4 49B5
40B6 36D6 33D8 33D3 33C7 29A6
29A3 28A6
67D8
67D8
67D8
27D8
67D6
67D6
67D6
27D5
65A2
65A2
65A2
27D3
55A4
55A4
55A4
27C3
34C8
34C6
34C8
26D1
34C6
34B8
34B8
26B8
25D3
25D3
25D3
26B6
25C4
25C4
25C4
26B4
24D3
24D3
24D3
25D8
24C3
24C3
24C3
25D3
21C1
21C1
21C1
25C6
19D7
19D7
19D7
25C4
19D6
19D6
19D6
25B8
19D5
19D5
19D5
25B4
19D2
19D2
19D2
25A4
19D1
19D1
19D1
24D3
19C8
19C8
19C8
24C3
17D6
17D6
17D6
24B5
17D3
17D3
17D3
24B3
16D3
16D3
16D3
23D5
16C8
16C8
16C8
23B3
13B5
13B5
13B5
22B5
12C2
12C2
12C2
21D3
12B7
12B7
12B7
21C3
12A7
12A7
12A7
20B4
11C5
11C5
11C5
20A4
11B3
11B3
11B3
19C7
9B7
9B7
9B7
19C6
8C7
8C7
8C7
17C6
7D5
7D5
7D5
34C4
34C3
34D3
34C3
48C6 48C6
34B5 34B4
34B5 34B4
48B6
48B6
34C5
34C5 34C4
48C6 48C6
87C6
87C6
34D3
34D3
34D3
14D6
7B6
7B6
7B6
33B4
33B4
33C4
33B4
34D5 34D4
34C3
33B4 33B4
33B4 33B4
70A5 70A5
70A5
34B3
34C3
39C6
39C6
34C3
33B4
33B4 33B4
34D5 34D4
34D3
34D3
33C4
33C4
33C4
70A5
14C7
48C3 48C3
48C3 48C3
77C3
77A5 77A5
77C3
7B5
7B5
7B5
34D6
14C4
34B4 34B2
34B2
21B6
12A6
21B6
33B4 33B4
33B4
14B4 14B4
14C4 14C4
34B4 34B5
34B5
33B4
33B4
34C3
34C3
33B4
14C4
14C4 14C4
33B4 33B4
33C4
33C4
12A6
7C6
7C6
34B4
10C5
34A4 34A3
34A4 34A3
34B4
74C8
74C2 74C2
74C8
34D8
5D4
5D4
5D4
33B6
5B4
19A6
14C4 14C4
14C4
5A7
5B4
5A7
5B1 5B1
22C2
5B4 5B4
5B4 5B4
33B4 33B4
33B4
5B1
5B1
33A4
33A4
22C2
5B4
5B4 5B4
5B1 5B1
11B3
11B3
5C4
5C4
5C4
33B4
5D4
34B5
34B5
33B4 33B4
33B4 33B4
14C4
34B5 74C5
34B5 74C1 74C1
74C5
33B6
14C6
33C6
14C6
7B4
14C6
7B4
7B4
23D3
33A4
33A4
5B2
5B2
5B2
33B6
33B6
33B6
33B6
33B7
17C6
5B4 5B4
33B4
33B4
5B4
33B6
33A4
5A4
33A4
33A4
5C1 5C1
5C1 5C1
33A4
33B4
5B4
33A4 34B2
33A4 34B2 34B4
34B4
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NC7
NC6NC5
NC4
NC2
NC3
OUT
VDD
NC0
NC1
VIO
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NCNC
TPM Crystal Circuit
SMC G3Hot Oscillator
NCNC
NC
NC
NCNC
NC
NC
SM-2
CRITICAL
32.768K
TPM
Y3720
24
13
5%
402
0
1/16WMF-LF
TPMR37211 2
1/16W5%
402MF-LF
NO STUFF
10MR37201
2
SG-3040LC-SM
CRITICAL
32.768KHZ-9-3.6VU3750
6
2
3
4
5
8
9
10
11
7
12
1
10VCERM402
20%0.1uF
C3751 1
2
SM
FERR-EMI-100-OHML3750
1 2
4.7uF20%
CERM603
6.3V
C37501
2
5%1/16WMF-LF
22
402
R37501 2
15pF
50VCERM402
5%
TPMC3720
1 2
15pF
CERM402
5%50V
TPMC3721
1 2
Mobile ClockingSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
051-7164 03001
8735
SMC_CLK32K_SUSCLKSMC_CLK32K_SUSCLKMAKE_BASE=TRUE
VOLTAGE=3.425V
PP3V42_G3H_SMC_CLK_FMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm
TPM_XTALO
PP3V42_G3H
SMC_CLK32K_SUSCLK_R
TPM_XTALO_R
TPM_XTALI
81D4 69C8
69B8 69A8 68B8 67D5 67D3 66D2 66C8 66A8 53C4 52D7 52B7 52B5 52B1 51D4 51D3 51C2 47B5 27C3
51C5 51C5
26D6
35B3 35B2
60C6
5D2
60C6
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IN
IO
IO
IO
IO
IO
IN
IO
IO
IO
IN
IN
IN
IN
OUT
GDS
IN
IO
IO
IO
IO
IO
IO
IO
IO
IN
OUT
OUT
INOUT
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ODD to keep SB GPIO <= 3.3VCounters 10K pull-up to 5V in
(UATA_CS0*)
(UATA_HSTROBE)(UATA_DSTROBE)
NC
(UATA_CS1*)
from ball of SBPlace within 12.7mmPlacement note
(UATA_STOP)
IDE (ODD) Connector
516S0335
Indicates disk presence
5%
MF-LF402
100
1/16W
R38501
2
CRITICAL
M-ST-SM1-LFJ3800
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25 26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
6
7
8
9
402MF-LF1/16W
24.91%
R38601
2
5%4.7K
NO STUFF
MF-LF402
1/16W
R38011
2
1/16W5%
MF-LF
4.7K
402
R38021
2
1/16W5%
402MF-LF
6.2KR38031
2
1/16W5%
402MF-LF
33KR38101
2
FDZ293P
CRITICAL
BGA
Q3820
C1
C2
C3
A1
A2
A3
B1
B2
B3
10K
MF-LF402
5%1/16W
R38201
2
20%6.3VX5R402
0.22uFC3821
1 2
1/16W5%
402MF-LF
10KR38211
2
15K5%
402MF-LF1/16W
R38111
2
051-7164 03001
36 87
PATA ConnectorSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PP3V3_S0
IDE_PDIOW_L
SMC_ODD_DETECT
PP5V_S0_IDE_ODD
VOLTAGE=5VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mm
IDE_PDDREQIDE_PDIOR_LIDE_PDIORDY
IDE_PDD<3>
IDE_IRQ14
ODD_PWR_EN_L_RC
IDE_PDD<0>
PP5V_S0
IDE_PDD<13>
ODD_PWR_EN_L
MAKE_BASE=TRUESATA_RBIAS
MAKE_BASE=TRUETP_SATA_A_R2DN
MAKE_BASE=TRUETP_SATA_A_D2RNTP_SATA_A_D2RNMAKE_BASE=TRUE
TP_SATA_A_D2RPTP_SATA_A_D2RP
MAKE_BASE=TRUETP_SATA_A_R2DPTP_SATA_A_R2DP
SATA_C_DET_L
TP_SATA_A_R2DN
IDE_PDD<4>
IDE_PDCS3_L
IDE_PDA<1>
IDE_PDDACK_L
IDE_PDD<15>IDE_PDD<14>
IDE_PDD<11>IDE_PDD<10>IDE_PDD<9>IDE_PDD<8>
IDE_PDD<1>IDE_PDD<2>
IDE_PDD<5>IDE_PDD<6>IDE_PDD<7>
IDE_PDA<0>IDE_PDCS1_LIDE_PDA<2>
SATA_RBIASSATA_RBIAS
IDE_PDD<12>
IDE_RESET_L
82D5 82C6 82B3 82A4 79D3 79A8
71D2 67C5 67C3 67B3 67A3 66B6 66B5 66B1 65D6
65B3 62A6 61D8 61A5 60D4 60C7 58C7 58C4 57B6
54D4 54B5 52D3 49C7 49C4 49B5 40B6 34A8 33D8
33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3 26D1
26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8 25B4
25A4
81B3
24D3
80B5
24C3
80A1
24B5
79B8
24B3
71A6
23D5
67B3
23B3
67B1
22B5
67A1
21D3
66B5
21C3
62B1
20B4
61D7
20A4
58C7
19C7
58C4
19C6
57B5
17C6
55A8
14D6
53C4
14C7
31C5
10C5
25D8
36A5
36A5
5D4
5D4
36A5
36A5
36A5 36A4
36A5 36A4
36A5 36A4
36A4
36A4
36A4
5A4
21B6
51B7
21B6
21B6
21B6
21B5
21B6
21C5
5D2
21B5
22A6
21B6
21B6
21B6 21B6
21B6 21B6
21B6 21B6
23D2
21B6
21B5
21B5
21B5
21B6
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B5
21B6
21B6
21B5
23C3
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IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
IN
IN
IN
IN
OUT
IO
IO
IO
IO
IO
IO
OUT
IN
IN
IO
IO
OUT
OUT
SDA
SCL
PCI_AD19
PCI_AD18PCI_AD17
PCI_AD16
PCI_AD15PCI_AD14
PCI_AD13PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD31
PCI_AD30
PCI_AD28PCI_AD29
PCI_AD27
PCI_AD25PCI_AD26
PCI_AD24PCI_AD23
PCI_AD21PCI_AD20
PCI_AD9
PCI_AD8
PCI_AD7PCI_AD6
PCI_AD5
PCI_AD4PCI_AD3
PCI_AD2
PCI_PAR
PCI_CLK
PCI_IDSEL
GND
PCI_AD1
PCI_AD0
VCC
MFUNC
G_RST_L
REG18_1
REG18_0REG_EN_L
PHY_PINTPHY_PCLK
PHY_LREQ
PHY_LPSPHY_LINKON
PHY_LCLK
PHY_D7PHY_D6
PHY_D5PHY_D4
PHY_D3
PHY_D1-D1
PHY_D2
PHY_D0-D0
PHY_CTL1-CTL1
PHY_CTL0-CTL0
PCI_ACK64_LPCI_TRDY_L
PCI_STOP_L
PCI_SERR_LPCI_RST_L
PCI_REQ64_L
PCI_REQ_LPCI_PME_L
PCI_PERR_L
PCI_IRDY_LPCI_INTA_L
PCI_GNT_LPCI_FRAME_L
PCI_DEVSEL_L
VCCP
PCI_AD22
PCI_C_BE2_L
PCI_C_BE0_L
PCI_C_BE3_L
PCI_C_BE1_L
IN
DS
G
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
RC Reset Option
From PCI clock generator via 33 Ohms
Gated Platform Reset Option
THIS IS FROM ICH-7M
G_RST* assertion min 2ms
(OK if VCCP and VCC are
It must not be taken high
aliased to the same rail)
G_RST* is clamped to VCCP
when there’s no power on VCCP
Might useMFUNC as aGPIO
402
10%1uF10VX5R
C39081
2 10V
402X5R
1uF10%
C39091
210%1uF
X5R402
10V
C39041
210V
402X5R
10%1uFC39031
210V
1uF10%
X5R402
C39021
210%1uF10VX5R402
C39011
210%
X5R10V
402
1uFC39001
2
402MF-LF1/16W5%4.7KR39021
2
4.7K5%
402MF-LF1/16W
R39011
2
5%1/16WMF-LF402
220R39901
2
5%1/16WMF-LF402
1KR39801
2 402MF-LF1/16W5%220R39911
2
402MF-LF1/16W5%10KR39101
2
1%
1K
MF-LF402
1/16W
R39041 2
402X5R
1UF10V10%
C39771
2
5%1/16WMF-LF402
0R38791 2
TSB83AA22AZAJ
CRITICAL
BGA
(2 OF 2)
U3900
E4
C7
C8
F7
F8
F9
F10
G6
G7
G8
G9
G10
H6
D6
H7
H8
H9
H10
J8
J9
J10
K10
D7
E6
E7
E8
E9
E10
F6
A1
N12
L12N11
N6
M6M7
K9
K8M5
K3N1
L4
M2
M11
M1
L1
J4H3
H4
J3H2
G3H1
F1
N10
F2G4
M10
K12M9
N9
L8M8
N8M3
K5
K2
D3
N2L3
E3
L2
B3K4
N3
L6F4
J13
F3
D1
L7
L5J5
F13
F12
E13
E12
C13
B9B10
C11
B12A11
B7B4
A2
D4B6
A3
G11
G12
C2
C3C4
D5D8
D9E5
F5
H11
J6
J7
J11
E11
F11
5%
MF-LF402
1/16W
10KR39771
2
CERM402
0.001uF10%50V
C39791
2
402MF-LF1/16W5%
10KR39791 2
2N7002SOT23-LF
Q3970
3
1
2
1/16W5%
402MF-LF
22R39001 2
0.1uF
X5R402
10%16V
C39101
2
0.1uF10%16VX5R402
C39111
2
100
1/16W5%
MF-LF402
R39031 2
FireWire Link (TSB83AA22)
051-7164 03001
8737
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
PP3V3_S3
FW_LKON
=FW_PCI_IDSEL
PCI_RST_L
PP3V3_S3
SMC_RSTGATE_RC_L
FW_G_RST_LFW_G_RST_L_RPLT_RST_BUF_L
SMC_RSTGATE_L
PCI_C_BE_L<1>PCI_C_BE_L<2>
PCI_AD<22>
PCI_C_BE_L<3>
PCI_C_BE_L<0>
PP3V3_S3
PCI_DEVSEL_LPCI_FRAME_LPCI_GNT3_LINT_PIRQD_LPCI_IRDY_LPCI_PERR_LPCI_PME_FW_LPCI_REQ3_L
PCI_REQ64_LPCI_RST_FW_LPCI_SERR_LPCI_STOP_LPCI_TRDY_L
PCI_ACK64_L
TP_FW_CTL<0>TP_FW_CTL<1>
TP_FW_DATA<0>
FW_DATA<2>
TP_FW_DATA<1>
FW_DATA<3>FW_DATA<4>FW_DATA<5>FW_DATA<6>FW_DATA<7>CLKFW_PHY_LCLKFW_PHY_LKONFW_LPSFW_LREQCLKFW_LINK_PCLKFW_PINT
FW_LLC_PP1V8LDO_EN_LPP1V8_S3
FW_G_RST_LFW_MFUNC
PCI_AD<0>PCI_AD<1>
FW_PCI_IDSELPCI_CLK_FW
PCI_PAR
PCI_AD<2>PCI_AD<3>PCI_AD<4>PCI_AD<5>PCI_AD<6>PCI_AD<7>PCI_AD<8>PCI_AD<9>
PCI_AD<20>PCI_AD<21>
PCI_AD<23>PCI_AD<24>
PCI_AD<26>PCI_AD<25>
PCI_AD<27>
PCI_AD<29>PCI_AD<28>
PCI_AD<30>PCI_AD<31>
PCI_AD<10>PCI_AD<11>PCI_AD<12>PCI_AD<13>PCI_AD<14>PCI_AD<15>PCI_AD<16>PCI_AD<17>PCI_AD<18>PCI_AD<19>
FW_SCLFW_SDA
PP3V3_S3
81D4
81D4
81D4 81D4
81A5
81A5
81A5 81A5
67C5
67C5
67C5 67C5
67C3
67C3
67C3 67C3
66C6
66C6
66C6
67B8
66C6
65D1
65D1
65D1
67B6
65D1
63B7
63B7
63B7
64C1
63B7
60C2
60C2
60C2
64A6
60C2
59C6
59C6
59C6
32C6
59C6
57D4
57D4
57D4
31C5
57D4
52B1
52B1
52B1
29D6
52B1
46D6
46D6
46D6
29D3
46D6
46C3
46C3
46C3
29B2
46C3
46B3
46B3
46B3
28D6
46B3
41C5
41C5
41C5
28D3
41C5
37D7
37D7
37D7
28B2
37D5
37D5
37D5
37C3
19D7
37C3
37A7
37C3
37A7
26D2
16B6
37A7
32C5
32C5
51D7
32C5
22B6
22B6
14C2
32C5
27C5
38C3
22A6
27C5
46C7
6C5
27C5
26D2
26D2
6B5
26D2
26D2
26D2
6B5
26D2
26D2
26D2
5D4
46C7
22A7
27C5
5D4
38A3
6C3
5B4
5D4
37B2 26B3
6C3
22B6
22B6
22A7
22B6
22B6
5D4
22A6
22A7
6B3
22A7
22A6
22A6
22B5
6B3
22A6
22A6
22A6
5A7
38B6
38B6
38B6
38B6
38B6
38B6
38C5
38C5
38C5
38C3
38C3
5B2
37A5
22B7
22B7
34D6
22A6
22B7
22B7
22B7
22B7
22B7
22B7
22B7
22B7
22A7
22A7
22A7
22A7
22A7
22A7
22A7
22A7
22A7
22A7
22A7
22B7
22B7
22B7
22B7
22B7
22B7
22B7
22B7
22B7
6C5
5D4
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SE
SM
RESET
D7
D5
D6
D4
D3D2
CPS
PD
BMODE
PC2
PC0
PC1
LREQ
LPS
DS1LCLK
DS0
XI
R1R0
TESTMTESTW
TPBIAS0TPBIAS1
TPB1N
TPB1P
TPB0N
TPB0P
TPA1N
TPA1P
TPA0P
TPA0N
PINT
PCLK
AVDD_3P3
DVDD_3P3
DVDD_CORE
PLLVDD_3P3
PLLVDD_CORE
PLLGND
LKON_DS2
CNA
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT TRI-ST/NC
VCC
GND
IN
IN
IN IO
OUT
IO
IO
IO
IO
IO
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
FW_B is BILINGUAL
FW_A is DS_ONLY
DUAL PORT DEVICES ARE POWER CLASS 4 (’100’)
INTERNAL PULLUP PROVIDES
CAPACITOR IN CONJUCTION WITH
RECEIVES POWER
RESET PULSE WHEN PHY FIRST
NC
IMPLEMENT 1K PULLUP OR PULLDOWN ON PORT PAGESINGLE PORT DEVICES ARE POWER CLASS 0 (’000’)
1MA (MAX) BUS HOLDERS
NC6.3V20%
402
0.22uF
X5R
C40501
2
MF-LF402
5%1/16W
390KR40551 2
CRITICAL
BGA
(1 OF 2)
TSB83AA22AZAJU3900
D10
D11
G5
H5
L9
M12
A5
D13
C9
C10
C12
B13
B11
A6
B8
D12
H12
J12
K7
K6
C5
C6
G13
L13
N13
K13
N4
M4
N5
H13
K11
M13
A10
A7
A8
A12
A13
L10
A4
B5
L11
N7
E2
E1
J1
J2
B1
C1
G1
G2
D2
K1
A9
CERM16V
0.01uF
402
20%
C40101
2
402
1uF10%
X5R10V
C40021
2
1uF10%10VX5R402
C40211
2
MF-LF402
1/16W1%
6.34KR40622 1
1uF10%
402
10VX5R
C40011
2402
10%
X5R10V
1uFC40031
2 10V
402
1uF10%
X5R
C40041
2
402
1uF10%
X5R10V
C40111
2402
1uF10%
X5R10V
C40121
2 10VX5R
10%1uF
402
C40131
2 10VX5R
10%1uF
402
C40141
2
SM98P3040MHZ
CRITICAL
G4080
2
3 1
4
MF-LF1/16W
5%
402
1KR40451
2
1K
MF-LF402
5%1/16W
R40421
2
10V10%
402X5R
1uFC4031 1
2402
1uF10%10VX5R
C4030 1
210%2.2uF6.3VCERM1603
C40351
2
10K
1/16W5%
402MF-LF
R405612
4.7
1/16W5%
402MF-LF
R40861 2
1/16W1%
402MF-LF
NO STUFF
1KR40631
2
5%1/16WMF-LF
1
402
R40001 2
5%1/16WMF-LF402
1R40351 2
1
5%1/16WMF-LF402
R40201 2
1/16WMF-LF402
22
5%
R40801 2
X5R402
0.22uF20%6.3V
C40801
2
1%4701/16W
402MF-LF
R4061
2
1
402MF-LF
5%1K
1/16W
R40911
2
1/16W5%
402
1K
MF-LF
R40401
2
MF-LF402
1/16W
1K5%
R40901
2
SYNC_MASTER=M59_MLB
38 87
03001051-7164
SYNC_DATE=08/08/2006
FireWire PHY (TSB83AA22)
PP1V8_FWPHY_OSCVOLTAGE=1.83VMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.20 mm
CLK98P304M_FW_XI_R
PP1V95_FWPHY
FW_LKON
PPBUS_S5_FW_FETFW_PORT1_TPB_P
FW_LKON
MIN_NECK_WIDTH=0.22 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=1.95V
PP1V95_FWPHY_PLLVDD
MIN_NECK_WIDTH=0.25 mm
PP3V3_FWPHY_PLLVDD
MIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V
PP1V95_FWPHYMIN_NECK_WIDTH=0.22 mm
PP3V3_FWPHY_AVDD
MIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V
CLKFW_LINK_PCLK
FW_PINT
FW_PORT2_TPA_NFW_PORT2_TPA_P
FW_PORT1_TPA_PFW_PORT1_TPA_N
FW_PORT2_TPB_PFW_PORT2_TPB_N
FW_PORT1_TPB_N
FW_B_TPBIASFW_A_TPBIAS
FW_TESTWFW_TESTM
FW_R0FW_R1
CLK98P304_FW_XI
CLKFW_PHY_LCLKFW_B_DS
FW_LPS
FW_LREQ
PP3V3_FWPHY
FW_BMODE
FW_CPS
FW_DATA<2>FW_DATA<3>FW_DATA<4>
FW_DATA<6>FW_DATA<5>
FW_DATA<7>
FW_PHY_RESET_L
PP3V3_FWPHY
FW_A_DS
44B8
44B8
44A8
44A8
43B8
43B8
42C1
42C1
42C4
42C4
38D5 67C3
38B2
38D7
38B5
6C6 67C1
44D7
6C6
44D7
44D7
44D7
6C6
6C6
6C5 43D3
44C5
6C5
44C7
44C7
44C5
44C5
44C7
44C7
44C5
6C5
6C5
6C3
38C3
43B5
44B7
38A3
6C3
44C5
44C5
44B7
44B7
44C5
44C5
44B7
6C3
6C3
5A4
37C3
42C8
44B5
37C3
5A4
5A4
5A4
5A4
37C4
37C4
44B4
44B4
44B5
44B5
44B4
44B4
44B5
44D7
44D7
37C4
37C4
37C4
5A4
37C4
37C4
37C4
37C4
37C4
37C4
5A4
www.vinafix.vn
OUT
OUT
AVDDL0
AVDDL4
AVDD
THRML_PAD
VDDO_TTL0
AVDDL6
VDDO_TTL1
RX_N
TESTMODE
TSTPT
LINK*
LED_LINK10/100*
LED_LINK1000*
LED_ACT*
RSET
CTRL25
CTRL12
HSDACNHSDACP
SWITCH_VAUX
SWITCH_VCCVMAIN_AVLBL
VAUX_AVLBL
LOM_DISABLE*
XTALO
XTALI
SPI_DOSPI_CLK
SPI_CS
SPI_DI
VPD_CLK
VPD_DATA
MDIP3
MDIN3
MDIN2MDIP2
MDIN1
MDIP1
MDIN0MDIP0
WAKE*
REFCLKN
TX_N
VDDO_TTL3
VDDO_TTL2
VDDO_TTL4
VDD0
VDD1
VDD3
VDD2
VDD6
VDD5
VDD4
VDD7
AVDDL1
AVDDL2
AVDDL5
VDD25
PERST*
REFCLKP
RX_P
AVDDL3
TX_P
PU_VDDO_TTL0PU_VDDO_TTL1
TEST
TESTTWSI
SPI
MAIN CLK
PCI EXPRESSANALOG
MEDIALED
E2
WC*
NC0NC1
VCC
VSS
SCL
SDA
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
G
D
S
IN
IN
IN
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
find correct topolgyto help constraint managerSetting attribute VOLTAGEto arbitrary value
NC
INTERNAL PULL-UP
NC
NC
1. KEEP ENET_XTALI AND ENET_XTALO
NC
NC
NC
NC
2. DO NOT ROUTE UNDER CRYSTAL
NC
NC
SCHEME MATCHES DOC MVL100258-01 SCHEME MATCHES DOC MVL100258-01
PLACE C4107 NEAR U4101 AVDD
12 MIL OF U4101 PIN 49 AND 50PLACE C4110 AND C4111 WITHIN
SCHEME MATCHES DOC MVL100258-01
PLACE C4100-C4106 NEAR PINS AVDLL0-AVDLL6.
NO PULL-UP NEEDED
PLACE C4135-C4139 NEAR VDDO_TTL0-VDD_TTL4 ON U4101
PLACE C4140 NEAR U4102 VCC
PLACE RESISTORS CLOSE TO U4101
TRACE LENGTH <12MIL
ASF IS UNAVAILABLE ON 8053
PLACE C4127-C4134 NEAR PINS VDD0-VDD7 ON U4101
OPTIONAL EXTERNAL LDO
12 MIL OF U2100 E27 AND E28PLACE C4113 AND C4112 WITHIN
NC
NC
NC
402
5%
CERM50V
27pFC41511
2
1/16W
MF-LF
402
5%10K
R4122
12
MF-LF
5%
402
1/16W
10K
R4123
12
0.1UF10%
X5R16V
402
C41011
2
88E8053QFN
OMITCRITICALU4101
23
19
22
28
32
51
52
57
3
4
25
24
59
60
62
63
10
18
21
27
31
17
20
26
30
5
42
43
56
55
16
53
54
37
36
35
34
9
11
46
65
29
50
49
12
27
13
64
33
39
44
48
58 18
40
45
61
47
38
41
6
15
14
X5R402
0.1UF10%16V
C41401
2
SO8
CRITICAL
M24C08
OMIT
U4102
3
1
2
6
5
8
4
7
402
MF-LF
4.87K
1%
1/16W
R4102
12
16V10%
402X5R
0.1UFC41071
2
0.1UF X5R16V10%
402
C4110
1 2
X5R
402
0.1UF
10%16V C4111
1 2
X5R
16V402
0.1UF 10%C4112
1 2
0.1UF
10%16VX5R402
C4113
1 2
1/16W
49.91%
MF-LF402
R41061
2
49.9
MF-LF1/16W1%
402
R41171
2
1%49.9
1/16WMF-LF402
R41181
2402MF-LF1/16W
49.91%
R41191
2
49.9
MF-LF
1%1/16W
402
R41201
2
1/16W1%
402
49.9
MF-LF
R41031
2
49.91%1/16WMF-LF402
R41041
2
49.91%1/16WMF-LF402
R41051
2
50V10%
402CERM
0.001UFC41161
2 CERM50V
0.001UF10%
402
C41181
250V
402
10%
CERM
0.001UFC41171
2
0.001UF
CERM
10%50V
402
C41151
2
1UF10%6.3VCERM402
C41001
2
402MF-LF1/16W5%4.7KR41311
2
4.7K5%1/16WMF-LF402
R41301
2
2N7002SOT23-LF
Q4100
3
1
2
1/16WMF-LF
402
5%4.7K
R41011
2
FERR-120-OHM-1.5A
0402-LF
L4100
1 2
402MF-LF1/16W
5%100K
R41321
2
402
50V10%
CERM
0.001UFC41051
2
402
16V
0.1UF10%
X5R
C41041
216V10%
X5R
0.1UF
402
C41031
216V
402X5R
0.1UF10%
C41021
2
10%50VCERM402
0.001UFC41061
2
10%
X5R
0.1UF16V
402
C41281
2 CERM50V
402
10%0.001UFC41331
2
10%0.001UF
CERM402
50V
C41341
250V10%0.001UF
CERM402
C41311
250V
402CERM
0.001UF10%
C41321
2
0.1UF
402X5R
10%16V
C41271
2
0.1UF16V
402X5R
10%
C41261
2
10%0.1UF
X5R402
16V
C41291
2
0.1UF
X5R402
10%16V
C41301
2
0.001UF50V10%
CERM402
C41391
210%
402CERM50V
0.001UFC41381
2
10%
402X5R
0.1UF16V
C41371
216V
0.1UF
X5R
10%
402
C41361
216V10%0.1UF
X5R402
C41351
2
CRITICAL
SM-3.2X2.5MM
25.0000M
Y410124
13
5%50VCERM402
27pFC41501
2
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
39
ETHERNET CONTROLLER
87
051-7164 03001
PP2V5_S3PP2V5_S3_ENET_AVDD VOLTAGE=2.5V
MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.22MM
ENET_VPD_DATA
ENET_VPD_CLK
PP3V3_S3AC
PM_SLP_S3_L
ENET_RSET
PP1V2_S3
ENET_MDI_N<0>
ENET_LOM_DIS_L
NC_ENET_CTRL25
ENET_MDI_P<2>ENET_MDI_N<2>
VOLTAGE=1.234VENET_MDI2
ENET_MDI_N<1>
PP1V2_S3
NC_ENET_CTRL12
ENET_VPD_CLK
PP3V3_S3AC
PCIE_A_D2R_P
PCIE_A_D2R_NPCIE_A_D2R_C_N
PP3V3_S3AC
VOLTAGE=1.234VENET_MDI3
PCIE_A_R2D_C_PPCIE_A_R2D_C_N
ENET_PU_VDD_TTL0
PCIE_A_R2D_P
PP3V3_S3AC
ENET_PU_VDD_TTL1
PCIE_WAKE_L
PCIE_A_D2R_C_P
ENET_PU_VDD_TTL1
ENET_CLK100M_PCIE_PENET_CLK100M_PCIE_N
ENET_RST_L
ENET_PU_VDD_TTL0
ENET_VPD_DATA
ENET_MDI_P<0>
PCIE_A_R2D_N
ENET_MDI_P<1>
ENET_MDI_N<3>ENET_MDI_P<3>
ENET_XTALIENET_XTALO
PP3V3_S3AC
VOLTAGE=1.234VENET_MDI1
VOLTAGE=1.234VENET_MDI0
ENET_LOWPWR_EN
PP3V3_S3AC
ENET_LOM_DIS_L
66C8 66C6
67D3
66B6
67D3
67D3
67D3
67D3
67D3
67D1
65B8
67D1
67D1
67D1
67D1
67D1
41C4
55C3
41C4
41C4
41C4
41C4
41C4
67B8
39D8
51C5
67D8
67D8 39D8
39D8
39D8
39D6
39D8
67B6
39D6
43C8
67D6
67D6 39D6
39B8
39D6
39B8
39D6
63D4
39B8
42A8
63B3
63B3 39B8
39B5
39B8
39B5
39B5
63D3
39B5
32B3
39A8
39D7 39B5
39B4
39B4
48C3
34C5
34C5
39B4
39B4
63C3 40D5
39A5
23C3
5D4
40C4
6D5
40C4
5D4
6D5
39B4
39A5
39A5
23C8
34C3
34C3
39A5
39A5
5A4 5A4
39C6
39C6
5A4
5C4
5A4
40B7
39B7
6D4
40C4
40C4
40A7
5A4
6D4
39A2
5A4
22D4
22D4
5A4
22D4
22D4
39C6
5A4
39B6
5B1
39A6
33A4
33A4
26B1
39A6
39A2
40D4
40C4
40B4
40C4
5A4
6D4
5A4
39C8
www.vinafix.vn
SYM_VER2
NC2 NC3NC4
LINE
SIDE
CHIP
SIDENC1
SYM_VER2
NC2 NC3NC4
LINE
SIDE
CHIP
SIDENC1
IN
IO
IO
IO
IO
IO
IO
IO
IO
OUT
V-
V+
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LAN ENERGY DETECT
Short shielded RJ-45
Place close to connector
Transformers should be
sides of the boardmirrored on opposite
Place one cap at each pin of transformer
514-0277
BOM options provided by this page:
PHYSICAL
PROVIDED
ELECTRICAL_CONSTRAINT_SET
NET_TYPE
SPACING
Page NotesPower aliases required by this page:
(NONE)Signal aliases required by this page:
(NONE)
- =PP2V5_ENET
BY
ETHERNET
PHY
- =GND_CHASSIS_ENET
PLACE C4220 & C4221
NEAR ENET_MDI_N<0/1>
find correct topolgyto help constraint managerSetting attribute VOLTAGEto arbitrary value
NO STUFF
402
1/16W5%
MF-LF
0R42101 2
1uF6.3V10%
CERM402
C42031
2
1uF6.3V10%
CERM402
C42021
2
100pF
CERM1808
10%3KV
C4204
21
MF-LF402
1/16W5%75R42031
2
1/16W5%
402MF-LF
75R42021
2
1/16W5%
402MF-LF
75R42011
2
1/16WMF-LF
5%
402
75R42001
2
6.3V
402
1uF10%
CERM
C42011
2
1uF
CERM6.3V10%
402
C42001
2
XFR-SM
CRITICAL1000BT-824-00275
T42001
10
11
14
15
16
2
3
6
7
8 9
4
5 12
13
XFR-SM
1000BT-824-00275CRITICAL
T42011
10
11
14
15
16
2
3
6
7
8 9
4
5 12
13
CRITICAL
JM36113-P2054-7FF-RT-TH-RJ45
J4200
9
10
11
12
1
2
3
4
5
6
7
8
402X5R16V10%0.1uFC42231
21%
402
1/16W
100K
MF-LF
R42241
2
3.3K5%1/16WMF-LF402
R42231
2
LMC7211SM-LF
U42004
3
1
5
2
51.1K
1/16W1%
MF-LF402
R42251
2
100pF
NO STUFF
402CERM50V5%
C42221
2
5%
402
1/16W
2.4K
MF-LF
R42201 2
CERM
68PF
5%50V
402-1
C4220
1 2
5%
402
1/16WMF-LF
2.4KR42211 2
CERM
68PF
5%50V
402-1
C4221
1 2
470K
402MF-LF1/16W1%
R42271
2
SOT-363-LFMMDT3904XFQ42202
6
1
MMDT3904XFSOT-363-LF
Q42205
3
4
402
1/16W
392K
MF-LF
1%
R42281
2
402
1/16W5%10K
MF-LF
R42261
2
03001
40
051-7164
87
Ethernet ConnectorSYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
LAN_ENERGY_DET
ED_MDIN0_CVOLTAGE=1.234V
ENETCONN_P<2>
ENET_MDI_N<2>
ENET_MDI_P<2>
ENETCONN_P<2>ENETCONN ENET_100D
ENETCONN_N<2>ENETCONN ENET_100D
ENETCONN_P<3>ENETCONN ENET_100D
ENETCONN_P<0>ENETCONN ENET_100D
ENETCONN_N<0>ENETCONN ENET_100D
ENETCONN_N<1>ENETCONN ENET_100D
ENETCONN_N<3>ENETCONN ENET_100D
ENETCONN_P<1>ENETCONN ENET_100D
ENETCONN_P<1>
ENETCONN_P<0>
ENETCONN_N<0>
ENETCONN_N<1>
ENETCONN_P<3>
GND_CHASSIS_ENET
ENET_CTAP1
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<3>
ENET_MDI_N<3>
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
ENET_CTAP_COMMON
ENETCONN_N<2>
ENET_CTAP2
ENET_CTAP3
PP2V5_S3_ENET_AVDD
ENET_MDI_N<0>
ED_MDIN1_CVOLTAGE=1.234V
ENET_MDI_N<1> ED_MDIN_R
ENET_CTAP0
ENETCONN_N<3>
EDET_REF
EDET_ACTEDET_MDIN_AMP
PP3V3_S0
82D5 82C6
82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3
66B6 66B5 66B1 65D6 65B3 62A6 61D8 61A5
60D4 60C7 58C7 58C4 57B6 54D4 54B5 52D3 49C7
49C4 49B5
36D6 34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8
27D5 27D3
27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4
25B8 25B4
25A4 24D3 24C3 24B5 24B3 23D5 23B3 22B5 21D3 21C3 20B4 20A4 19C7 19C6 17C6 14D6
44C1
14C7
44A1
10C5
6A8
40B7
40A7
39D5
40C4
40C4
5D4
23C3
40D7
39C3
39C3
40C3
40C3
40C3
40D3
40C3
40C3
40B3
40C3
40D7
40D7
40D7
40D7
40D7
6A6
39C3
39C3
39C3
39C3
39C3
39C3
40D7
5A4
39C3
39C3
40D7
5A4
www.vinafix.vn
N-CHN
S
D
G
P-CHN
G
DS
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Allows powering Yukon down during battery sleep to save power
When ENETPWR_S3 BOMOPTION is active:
When ENETPWR_S3AC BOMOPTION is active:
Yukon Power Control
1.2V enable has pull-up to 3.3V
State FWPWR_EN_L PM_SLP_S4_L PM_SLP_S3BATT PM_SLP_S3BATT_L P2V5S3_EN P1V2S3_RUNSS
S0 AC 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)
S0 Batt 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)
S3 AC 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)
S3 Batt PBUS 3.3V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
S5 AC 0V 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
S5 Batt PBUS 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
G3H Batt PBUS 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
S3 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)
S0 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)
State PM_SLP_S4_L PM_SLP_S3BATT PM_SLP_S3BATT_L P2V5S3_EN P1V2S3_RUNSS
S5 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
G3H 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)
5%1/16WMF-LF402
470KR43021
2
MF-LF
100K
1/16W5%
402
R43041
2
0
ENETPWR_S3AC
402MF-LF1/16W5%
R43001 2
0
402MF-LF1/16W5%
ENETPWR_S3
R43011
2
SC70-6FDG6332C_NLQ4300
6
2
1
SC70-6FDG6332C_NLQ4300
3
5
4
2N7002SOT23-LF
Q4302
3
1
2
SOT23-LF2N7002Q4304
3
1
2
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
Yukon Power Control
051-7164 03001
8741
MAKE_BASE=TRUEPM_SLP_S3BATT_L
PPVIN_S3_P2V5S3_SVIN
PM_SLP_S3BATT_L
PM_SLP_S3BATT
P1V2S3_RUNSS
PP3V3_S3 PP3V3_S3AC
FWPWR_EN_L_OR_GND
PM_SLP_S4_L
PPBUS_G3H
FWPWR_EN_L
81D4
81A5 67C5 67C3
79B7
66C6
71D7
65D1
69C1
63B7
68D5
60C2
67C3
59C6
67C1
57D4
65D6
52B1
66B8
65B7
46D6
66A6
64D7
46C3 67D3
64C8
64A6
46B3 67D1
51C5
62D7
37D7 39D8
48C3
61D7
37D5 39D6
47C7
61D4
37C3 39B8
23C3
55D3
37A7 39B5
6A2
43D8
32C5 39B4
6A1
42B8
63D8
63D8
63B7
27C5 39A5
5C4
5C4
41C3
63D6
41C4
5C4
5D7
5D4 5A4
5C1
5A1
43C7
www.vinafix.vn
OUTINNR
NC THRML
EN
GND PAD
FB
BIASSWSHDN*
NC
VIN BOOST
GND
DSG
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PBUS S0 FET
3.3V Supply for FWPHY
<Rb>
NC<Ra>
200mA max output
Vout = 3.316
NC
Vout = 1.25V * (1 + Ra / Rb)
(Switcher limit)
1.95V Supply for FW PHY
165MA MAX LOAD
4VX5R402
2.2uF20%
C44221
2
0.01uF
402CERM16V10%
C4421 1
2
402CERM
1uF6.3V10%
C4420 1
2
CRITICAL
TPS799195SON
U4420
4
3
6
5
2
1
7
MF-LF402
1%1/16W
324KR44101
2
MF-LF402
1%1/16W
196KR44111
2
50V
22pF
CERM402
5%
C4410 1
2
6.3V20%
402X5R
0.22uFC4405 1
2X7R-CERM
10%
1206
50V
4.7UFC4400 1
2
CRITICAL
TSOT23-8LT3470U4400
7
6
8
4
2
1 5
3SMD20E40C-X-F
SC-59D44001
2
3
CRITICAL
33uH
CDPH4D19F-SM
L4400
1 2
805X5R6.3V20%22UFC44011
2
SOT23IRLML6302PBF
Q4450
3
1
2
470K5%
1/16WMF-LF
402
R44501
2
402MF-LF1/16W
5%330K
R44511
2
2N7002SOT23-LF
Q44513
1
2
0.0022UF10%50V
CERM402
C4450 1
2
42 87
03001051-7164
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
FW PHY Power Supply
PPBU_S0_FW_EN_DIV
PPBU_S0_FW_EN
PM_SLP_S3_L
PPBUS_G3H
SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmFWPHY3V3_SW
FWPHY3V3_FB
PP3V3_FWPHY PP1V95_FWPHY
FWPHY_CORE_NR
FWPHY3V3_BOOSTPP5VR33V_FWPHY3V3
PPBU_S0_FW
PPBUS_S5_FW_FET
PP3V3_FWPHY
VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
PPBU_S0_FW79B7 71D7 69C1 68D5 67C3
67C1 65D6
66C8
65B7
66C6
64D7
44B8
44B8
66B6
64A6
44A8
44A8
65B8
62D7
43B8
43B8
55C3
61D7
42C4
42C4
51C5
61D4
38D7 38D5
38D7
43C8
55D3
38B5 38B2
67C3
38B5
39C8
43D8
6C6 6C6
67C1
6C6
32B3
41C6
6C5 6C5
43D3
6C5
23C3
5C4
6C3 6C3
43B5
6C3
5C4
5A1
5A4 5A4
42B6
38B7
5A4
42C8
www.vinafix.vn
G
D
S
G
D
S
S
G
D
GND
SENSEB
OUTA
FAULTB_L
FAULTA_L
ONB
INB
ONA
ONQ1
INA
GATE1AGATE2A
SENSEA
GATE1BGATE2B
OUTB
V-
V+
S
G
D
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
as +1 if over the limit (at any point during the period)
MAX5944 current limiter trips if integrator (counter)reaches 16. A new sample (taken every 125 us) is weighted
and -1/128 if under the limit. As a result, the devicetends to trip easily on devices that produce periodic currentspikes. Current limit has been set higher to compensate.
Page NotesPower aliases required by this page:
- =FWPWR_PWRON (see related text note below) Port Power Switch
Current Limit/Active Late-VG Protection
Late-VG Event Detection
- =PPBUS_S0_FWPWRSW (system supply for bus power)
Signal aliases required by this page:
BOM options provided by this page:
Enables port power when machineis running or on AC.
- =PP3V3_S0_FWPORTPWRSW
NC
NC
(NONE)
0.020 ohm => 2.4A
Current Limits
0.033 ohm => 1.5A0.030 ohm => 1.66A (Ideal)0.025 ohm => 2A
2.81V when port power is off2.95V when port power is onFWLATEVG_3V_REF:
5%330K
MF-LF1/16W
402
R45661
2
0.01uF
CERM402
20%16V
C4565 1
2MF-LF
5%1/16W
470K
402
R45651
2
SOI-LF
NDS9407
CRITICAL
Q4565
5
6
7
8
4
1
2
3
SOT-3632N7002DW-X-FQ4560
3
5
4
SOT-3632N7002DW-X-FQ4560
6
2
1
MINISMDC
CRITICAL
1.5A-24VF4565
1 2
SI2318DSSOT23-3
Q4520
3
1
2
X7R805
35V10%1uFC45251
235V10%
805X7R
1uFC4520 1
2
MF805
0.25W1%
0.020
CRITICAL
R45201 2
CRITICAL
SOICMAX5944U4520
3
11
15
7
14
6
12
1
9
2
10
4 13
5
16
8
SMB
B340XF
CRITICALD45651 2
SM-LFLMC7211U4500
4
3
1
5
2
200K
MF-LF
1%
402
1/16W
R45001 2
0.1UF20%10VCERM402
C45001
2
0.33uF
603CERM-X5R10V10%
C45091
2
MBR0540XXG
SOD-123
D4500
12
MF-LF
2.0M
1/16W5%
402
R45091
2
10K
1/16WMF-LF402
1%
R45051
2
CRITICAL
0.25W1%
805MF
0.020R45251 2
100pF
CERM402
50V5%
C45011
2
80.6K
402
1%1/16WMF-LF
R45061
2
1/16W
10K5%
402MF-LF
R45011
2
SI2318DSSOT23-3
Q4525
3
1
2
FW_PORT_FAULT_PU
100K
402
5%1/16WMF-LF
R45291
2
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
FireWire Port Power
03001051-7164
43 87
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
VOLTAGE=12.6V
PPBUS_S5_FW_FET_D
VOLTAGE=33VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPFW_PORTB_ISENSE
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPFW_PORTA_ISENSE
VOLTAGE=33V
PP3V3_FWPHY
FW_PORT_FAULT_L
FWLATEGV_3V_REF
LATEVG_EVENT_L FW_PORTPWR_EN
PP2V4_FWLATEVGVOLTAGE=33VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPFW_PORTA_VP_UF
FW_PORTA_PWRCTRL
VOLTAGE=33V
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
PPFW_PORTB_VP_UF
PPBUS_S5_FW_FET
FW_PORTB_PWRCTRL
PPBUS_S5_FW_FET
MIN_NECK_WIDTH=0.2 mm
FWPWR_EN_LMIN_LINE_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.5 mmPPBUS_S5_FWPWRSW_F
VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mm
SMC_ADAPTER_EN
PM_SLP_S3_L
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmFWPWR_EN_L_DIV
MIN_NECK_WIDTH=0.1 mmMIN_LINE_WIDTH=0.1 mm
PP2V4_FWLATEVG_RC
PPBUS_G3H79B7 71D7 69C1 68D5 67C3 67C1 65D6
66C8
65B7
66C6
64D7
44B8
66B6
64A6
44A8
65B8
62D7
42C4
55C3
61D7
38D7
51C5
61D4
38B5
67C3
67C3
42A8
55D3
6C6
67C1
67C1
39C8
42B8
6C5
44D5
44D3
44B3
43D3
43B5
68A6
32B3
41C6
6C3
44B5
6C5
6C5
42C8
42C8
52A2
23C3
5C4
5A4
44A5
6C3
6C3
38B7
38B7
41B6
51D5
5C4
5A1
www.vinafix.vn
TPO#
TPI
TPO
TPI#
VGND
VP
SYM_VER-2
SYM_VER-2
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
(PPFW_PORT2_VP)
(GND_FW_PORT2_VG)
ELECTRICAL_CONSTRAINT_SET
Page Notes
- =PP3V3_S5_FWLATEVG
the necessary aliases to map the FireWire TPA/TPB pairs to their
pin 5 of connectorPlace C4629 close to
DFM rules for only Rs and Csplacement in an area restricted bywere changed to resistors to allowNote: The peaking inductors
Note:Trace PPFW_PORT1_VP should handle up to 5A
(GND_FW_PORT1_VG)
(PPFW_PORT1_VP)
(FW_PORT1_BREF)
TPB+
per 1394b V1.33
Place close to FireWire PHY
Termination
and connection detection currents
BREF should be hard-connected tologic ground for speed signaling
"Snapback" & "Late VG" Protection
"Snapback" & "Late VG" ProtectionCable Power
1394A
(TPA+)
PORT 2
514S0133
BILINGUALPORT 1
OUTPUTTPB<R>
AREF needs to be isolated from
When a bilingual device isconnected to a beta-only device,there is no DC path between them(to avoid ground offset issue)
PAGE
(NONE)
to apply to entire TPA/TPB XNets.
1394b implementation based on Apple
(NONE)
514-0255
(TPB-)
(TPB+)
(TPA-)
all local grounds per 1394b spec Cable Power
TPA-
PP2V4_FWLATEVG needs to be biased
Late-VG Protection Power
to at least 2.1V for FW signal integrityand should be biased to 2.4V for marginR4690 should be 390 Ohms max for a 3.3V rail
- =PPFW_PORT1
BY
PHY
INPUT
TPB-
TPA+
TPA<R>
VP
VG
NCNC
provide the appropriate constraints
FireWire Design Guide (FWDG 0.6, 5/14/03)
PHYSICAL
assumed that FireWire PHY page will constrained on this page. It isNOTE: FireWire TPA/TPB pairs are NOT
NET_TYPE
SPACING
- =GND_CHASSIS_FW_PORT1
PROVIDED
Power aliases required by this page:
Signal aliases required by this page:
NOTE: This page is expected to contain
appropriate connectors and/or to properly terminate unused signals.
BOM options provided by this page:
ESD and late-VG railfor snap-back diodes(Common to all ports)
TI PHYs require 1uF even though
FW spec calls out 0.33uF
to arbitrary valueSetting attribute VOLTAGEto help constraint managerfind correct topolgy
CERM402
6.3V10%1uFC46501
2
1/16W
402MF-LF
1%56.2
R46511
2
MF-LF402
1%1/16W
56.2R46501
2
MF-LF402
56.21%
1/16W
R46531
2
MF-LF402
1%1/16W
56.2R46521
2
1/16W1%
402MF-LF
4.99KR46541
2
220pF25V5%
402CERM
C46541
2
1/16W5%
402MF-LF
0R46991 2
SM
FERR-250-OHML4630
1 2
0.001uF
CERM50V20%
402
C46341
2
BAV99DW-X-FSOT-363
DP4630
4
5
3
1394A
CRITICAL
F-RT-TH-LF
J4630
7 8 9 10
4
3
6
5
2
1
CERM402
16V20%
0.01uFC4636 1
2603
50V
0.01uF
CERM
20%
C46351
2
BAV99DW-X-FSOT-363
DP4631
4
5
3
X7R
10%0.01uF
402
50V
C4631 1
2
SOT-363BAV99DW-X-FDP4630
1
2
6X7R
10%0.01uF
402
50V
C4630 1
2
X7R
10%0.01uF
402
50V
C4633 1
2
SOT-363BAV99DW-X-FDP4631
1
2
6
X7R
10%0.01uF
402
50V
C4632 1
2
56.21%
MF-LF1/16W
402
R46631
2
1/16W
4.99K1%
MF-LF402
R46641
2
56.21%1/16W
402MF-LF
R46621
2
25V5%
402CERM
220pFC46641
2
402
1%56.2
1/16WMF-LF
R46611
2
CERM402
10%6.3V
1uFC46601
2
1%56.2
402MF-LF1/16W
R46601
2
NO STUFF
CERM
20%16V
0.01uF
402
C46271
2
0.1uF10%50VX7R
603-1
C4629 1
2
1M5%
402MF-LF1/16W
R46291
2
0.001uF50V20%
402CERM
C46241
2
SM
FERR-250-OHML4620
1 2
603CERM50V20%
0.01uFC4625 1
2
0.01uF20%16VCERM402
C46261
2
0.01uF10%
X7R402
50V
C4620 1
2
BAV99DW-X-FSOT-363
DP4620
1
2
6
X7R
10%0.01uF
402
50V
C4621 1
2
SOT-363BAV99DW-X-FDP4620
4
5
3
SOT-363BAV99DW-X-FDP4621
1
2
6 BAV99DW-X-FSOT-363
DP4621
4
5
3
402
50V
0.01uF10%
X7R
C4623 1
2
X7R
10%0.01uF
402
50V
C4622 1
2
1%
332
402MF-LF1/16W
R46901 2
0.01UF10%50VX7R402
C4691 1
2
CRITICAL
MMBZ5227BSOT23
D4690
1
3
F-RT-SM1
CRITICAL
1394B-UG31903J4620
1
10
11
2
3
4
5
6
7
8
9
CRITICAL
90-OHM-100MA1210-4SM1
FL4630
1
2 3
4
1210-4SM1
CRITICAL
90-OHM-100MA
FL4631
1
2 3
4
OMIT
1/16W
402MF-LF
05%
L46601
2
OMIT
0
MF-LF402
1/16W5%
L46611
2
OMIT
5%1/16W
402MF-LF
0L46621
2
OMIT
0
MF-LF402
1/16W5%
L46631
2
CRITICAL4 IND,18nH-15mA,0402 L4660,L4661,L4662,L4663152S0414
SYNC_MASTER=M59_MLB SYNC_DATE=06/27/2006
8744
03001051-7164
FireWire Ports
FW_PORT2_TPB_N
FW_PORT2_TPB_PFW_PORT2_TPB_FL_P
FW_PORT2_TPA_N
FW_PORT2_TPA_P
FW_PORT2_TPA_FL_P
FW_PORT2_TPA_FL_N
FW_A_TPBIAS
VOLTAGE=1.234V
VOLTAGE=2.4VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP2V4_FWLATEVG
FW_PORT1_TPB_N
FW_PORT2_TPB_P
PP3V3_FWPHY
FW_PORT1_TPA_N
FW_PORT2_TPB_N
FW_PORT2_TPB_FL_PFW_110DFW
FW_PORT1_TPA_PFW_110DFW
GND_CHASSIS_ENET
PP3V3_FWPHYGND_CHASSIS_USB
FW_PORT1_TPB_P
FW_PORT1_TPA_P
FW_PORT2_TPA_P
FW_PORT2_TPA_NMAKE_BASE=TRUE
FW_PORT2_TPA_PMAKE_BASE=TRUE
FW_PORT2_TPB_NMAKE_BASE=TRUE
FW_PORT2_TPB_PMAKE_BASE=TRUE
FW_PORT1_TPA_PMAKE_BASE=TRUE
FW_PORT1_TPB_PMAKE_BASE=TRUE
FW_PORT1_TPB_NMAKE_BASE=TRUE
VOLTAGE=33VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPFW_PORT2_VP
PPFW_PORTB_VP_UF
FW_PORT1_TPA_P
FW_PORT2_TPA_N
FW_PORT1_TPA_NMAKE_BASE=TRUE
VOLTAGE=1.234VFW_PORT2_TPB_C
PPFW_PORTA_VP_UF
FW_PORT1_AREF
PP2V4_FWLATEVG
FW_PORT2_TPA_FL_NFW_110DFW
FW_PORT2_TPA_FL_PFW FW_110D
FW_PORT1_TPB_PFW_110DFW
FW_PORT1_TPA_NFW_110DFW
FW_PORT1_TPB_N
FW_PORT1_TPB_P
FW_PORT1_TPA_N
PP3V3_FWPHY
PP3V3_FWPHY
VOLTAGE=33VMIN_NECK_WIDTH=0.25 mm
PPFW_PORT1_VPMIN_LINE_WIDTH=0.5 mm
PP2V4_FWLATEVG
VOLTAGE=1.234VFW_B_TPA_L_P
FW_B_TPBIAS
VOLTAGE=1.234V
VOLTAGE=1.234VFW_B_TPA_L_N
VOLTAGE=1.234VFW_B_TPB_L_N
VOLTAGE=1.234VFW_B_TPB_L_P
VOLTAGE=1.234VFW_PORT1_TPB_C
FW_PORT2_TPB_FL_NFW FW_110D
FW_PORT1_TPB_NFW_110DFW
GND_CHASSIS_USB
GND_CHASSIS_ENET
FW_PORT2_TPB_FL_N
44B8
44B8
44A8
44B8
44A8
43B8
43B8
43B8
42C4
42C4
42C4
38D7
38D7
38D7
38B5
38B5
38B5
44D7
6C6
44D7
44C5
44A1
6C6
47B2
44D7
44D7 44D7
44D7
44D7
44D7
44D7
44C5
44C5
44D7
44D7
44D7
6C6
44C5
47B2
44C1
44C7
44C7
44C7
44C7
44D5
44C5
44C5
6C5
44C5
44C5
44B7
40B2
6C5
44A1
44C5
44C5
44C5
44C7
44C7
44C7
44C7
44C5
44C5
44C5
43A2
44B7
44C5
44C5
43B2
44B5
44B7
44B7
44B7
44B7
44B7
6C5
44D5
44B7
44A3
40B2
44C5
44C5
44C5
44C5
44B5
44B5
44B4
6C3
44B5
44B4
44B5
6A8
6C3
6A8
44B5
44B5
44B4
44B4
44B4
44B4
44B4
44B7
44B7
44B7
6C5
44B5
44B4
44B7
6C5
44A5
44B5
44B5
44B5
44B5
44B5
6C3
44A5
44B5
6A8
6A8
38B3
38B3
44D7
38B3
38B3
44D7
44D7
38B3
43B8
38B3
38B3
5A4
38B3
38B3
44B2
38B3
6A6
5A4
6A6
38B3
38B3
38B3
38B3
38B3
38B3
38B3
38B3
38B3
38B3
6C3
38B3
38B3
38B3
6C3
43B8
44B2
44B2
38B3
38B3
38B3
38B3
38B3
5A4
43B8
38B3
44B2
38B3
6A6
6A6
44D7
www.vinafix.vn
IO
IO
SYM_VER-1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Camera Connector
Twin-Ax Pair 2(40 AWG)
(28 AWG)
Twin-Ax Pair 1
Standard wires
Connector shield
(40 AWG)
518S0371
NCNC
Connector shield
402X7R50V10%0.01UFC49321
2
CRITICAL
FERR-220-OHM-2A
0603
L4931
1 2
0402
FERR-220-OHML4930
1 2
F-RT-SMCAMERA-M1-CUS
CRITICALJ4931
7
8
1
2
3
4
5
6
50V20%
402CERM
0.001uF
NO STUFFC4931 1
2
0603
FERR-220-OHM-2A
CRITICALL4950
1 2
1210-4SM190-OHM-100MA
CRITICALFL4935
1
2 3
4
051-7164 03001
8745
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
Camera Connector
GND_CHASSIS_INVERTER
GND_CHASSIS_INVERTER
GND_CHASSIS_INVERTER
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=5VMIN_LINE_WIDTH=0.25 mm
PP5V_S3_CAMERA_F
USB2_CAMERA_N
USB2_CAMERA_PUSB2_CAMERA_N_FUSB2_CAMERA_P_F
PP5V_S3 81C6
79A6
79A6
81C4
79A6
79A5
79A5
67B3
79A5
45C5
45C5
22C2
22C2
67B1
45B5
45B5
45B5
6D3
6D3
62A2
6A8
6A8
6A8
6D2
6D2
52B8
6A6
6A6
6A6
6D1
6D1
5D4
5B2
5B2
5B2
5B2
5B2
5B2
5A7
5A7
5B2
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GR1/NON_REM0GR2/NON_REM1
PRTPWR_POLPRTPWR
CFG_SEL1
SDA/SMBDATASCL/SMBCLK/CFG_SEL0
USBDN0USBDP0
VBUS_DET
OCS*RBIAS
USBDP2USBDN2
USBDN1USBDP1
XTAL2XTAL1/CLKIN
CLKIN_EN
RESET*
SELF_PWR
ATEST/REG_EN
TEST
VDD33CR
VDD18
VDD18PLL
VDDA33PLL
VDDA33
SERIAL PORT
PAD
MISC
UPS USB2.0
VSSTHRML
2-PORT USB2.0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
311S0279
R4912 should be placed as close as possible to U4900.36 and isolated by 0.9mm from other signals.
197S0162
NC
NC
NC
NC
PRTPWR_POL High = PRTPWR goes high whenever USB HUB is enumerated
Test point should be on TOP side.
REG_EN High = internal 1.8V
SM-224.000MHZ-12PF-60PPM
CRITICAL3G
Y5000
2 4
1 3
CERM
12PF5%50V
402
3GC50021
2
12PF5%50VCERM402
3GC50011
2
MF-LF1/16W
1M
402
1%
3GR50011 2
USB2502
QFN
CRITICAL3G
U5000
18
28
12K
5%
MF-LF402
1/16W
3G R50121 2
20%
CERM10V
0.1UF
402
3GC5000 1
2
10V20%
0.1UF
CERM402
3G
C5007 1
2
20%10V
CERM402
0.1UF
3G
C5008 1
2
0.1UF
402CERM10V20%
3G
C5003 1
2
20%
402
10V
0.1UF
CERM
3G
C5004 1
2
CERM402
10V
0.1UF20%
3G
C5005 1
2
10V
0.1UF
CERM
20%
402
3G
C5006 1
2
4.7UF6.3V
603
20%
CERM
3G
C50111
2
20%6.3V
603
4.7UF
CERM
3G
C50101
2
4.7UF6.3V20%
603CERM
3G
C50121
2
603
6.3V20%4.7UF
CERM
3GC50131
2
0
1/16WMF-LF402
5%
3GR50051 2
603
6.3V20%4.7UF
CERM
3G
C50141
2
1/16WMF-LF402
5%
0
3G
R50061 2
1/16WMF-LF402
0
5%
NO_3G
R50041 2
1/16WMF-LF402
0
5%
NO_3G
R50031 2
Internal USB HubSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
051-7164 03001
8746
PP3V3_S3
PP3V3_S3TP_USB_HUB_ENUM
SMBUS_SB_SDASMBUS_SB_SCL
USB_HUB_N
PP3V3_S3
TP_USB2_3G_PTP_USB2_3G_N
USB_IR_NUSB_IR_P
USB_HUB_XTAL_OUT
USB_HUB_G_RST_L
USB_HUB_XTAL_OUT_R
FW_G_RST_L
USB_IR_NUSB_HUB_NUSB_HUB_P USB_IR_P
USB_HUB_RBIAS
USB_HUB_P
USB_HUB_XTAL_IN
PP1V8_USB_HUB_INTERNAL_VDD18PLL
VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MM
PP1V8_USB_HUB_INTERNAL_VDD18
VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MM
81D4
81D4
81D4
81A5
81A5
81A5
67C5
67C5
67C5
67C3
67C3
67C3
66C6
66C6
66C6
65D1
65D1
65D1
63B7
63B7
63B7
60C2
60C2
60C2
59C6
59C6
59C6
57D4
57D4
81C3
57D4
52B1
52B1
48B3
52B1
46C3
46D6
33B6
46D6
46B3
46B3
29A6
46C3
41C5
41C5
28A6
41C5
37D7
37D7
27D8
37D7
37D5
37D5
27D7
37D5
37C3
37C3
27D6
46A7
37C3
46B3
46B3
46B7
37A7
37A7
27C6
22C2
37A7
22C2
22C2
22C2
32C5
32C5
27B6
6C3
32C5
6C3
6C3
6C3
27C5
27C5
23D5
6C2
27C5
6B3
6B3
81C6
81C6
37B2
81C6 6C2
6C2 81C6
6C2
5D4
5D4
5B1
6C1
5D4
6B2
6B2
46A5
46B5
37A5
46C3 6C1
6C1 46C3
6C1
www.vinafix.vn
OUT
VBUS
D-
D+
GND
PADTHRMLGND
OUT_2
OUT_1
OUT_0
OC*EN*
IN_0
IN_1
VDD
THRM_PAD GND
0I0 Y0
SEL1I1
1I0
0I1
Y1IO
IO
IO
IO
SYM_VER-1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SEL=1 Choose USBSEL=0 Choose SMC
514S0115
Right USB PortPort Power Switch
USB/SMC Debug MuxPlace L5200, L5205 and L5206 across moat
FERR-220-OHM-2A
0603
CRITICALL5205
1 2
6.3V20%
B2POLY
100UFC52961
2
10uF
CERM805-1
6.3V20%
C5295 1
2CERM
20%6.3V
10uF
805-1
C5290 1
2 10V20%
402CERM
0.1UFC52911
2
402
16VCERM
20%0.01uFC5205 1
2
0.01uF20%
402
16VCERM
C5206 1
2
0603
FERR-220-OHM-2A
CRITICALL5206
1 2
F-RT-SM-USB-RGT1UAR2X
CRITICALJ5200
1
2
3
4
5
6
7
8RCLAMP0502B
SC-75
RTUSB_ESD
CRITICAL
D5200
3
12
CRITICAL
TPS2051MSOP
U5290
4
1
2
3
5
8
7
6
9
CRITICAL
PI3USB10TDFN
U525012
10
11
9
157
6
13
28
34
402
0.1UF
CERM10V20%
C5250 1
210K5%1/16WMF-LF402
R52501
2
90-OHM-100MA1210-4SM1
CRITICALL5200
1
2 3
4
External USB ConnectorSYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
051-7164 03001
8747
USB_DEBUGPRT_EN_L
PP3V42_G3H
PP5V_S3_RTUSB_F
VOLTAGE=5VMIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=0.5 mm
MIN_LINE_WIDTH=0.5 mmGND_RTUSB
MIN_NECK_WIDTH=0.5 mmVOLTAGE=0V
PM_SLP_S4_L
PP5V_S5
GND_CHASSIS_USB
MIN_NECK_WIDTH=0.5 mmVOLTAGE=5V
PP5V_S3_RTUSB_ILIMMIN_LINE_WIDTH=0.5 mm
USB2_RT_P
SMC_RX_LSMC_TX_L
USB2_RT_N
RTUSB_OC_L
USB2_RT_F_NUSB2_RT_F_P
USB2_RT_MUXED_P
USB2_RT_MUXED_N
81D4 69C8
69B8 69A8 68B8 67D5 67D3
71D7
66D2
67C3
66C8
67C1
66A8
67B1
53C4
66D8
52D7
66B8
66B8
52B7
66A6
65D6
52B5
64C8
65B7
52B1
51C5
64C8
51D4
48C3
62C8
51D3
41B6
62B6
51C2
23C3
62B2
53B4
22D8
35B7
6A2
62A4
44A3
22C2
52B3
22C2
22C4
27C3
6A1
52B5
44A1
6D3
52B2
6D3
6D3
26D6
5C4
25C8
6A8
6D2
51C7
6D2
6D2
52B3
5D2
5C1
5D4
6A6
6D1
5C2
6D1
6D1
www.vinafix.vn
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
516S0361
Left I/O Board Connector
NCNC
NC
NC NC
NC
CRITICAL
F-ST-SMQT510806-L111-7F
J5500
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
3536
3738
39
4
40
4142
4344
4546
4748
49
5
50
5152
5354
5556
5758
59
6
60
6162
6364
6566
6768
69
7
70
7172
7374
7576
7778
79
8
80
81
8283
84
9
48 87
03001051-7164
Left I/O Board ConnectorSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
USB2_LT2_NUSB2_LT2_P
USB2_LT_NUSB2_LT_P
PCIE_MINI_D2R_NPCIE_MINI_D2R_P
SMBUS_SB_SDA
ACZ_SDATAOUT
ACZ_SDATAIN<0>
ACZ_SYNC
ACZ_RST_LSMBUS_SMC_A_S3_SDA
PCIE_EXCARD_D2R_P
PCIE_CLK100M_MINI_PPCIE_CLK100M_MINI_N
USB2_EXCARD_PUSB2_EXCARD_N
ACZ_BITCLK
SMBUS_SB_SCL
PCIE_WAKE_LPM_SLP_S4_LSMC_EXCARD_PWR_ENPM_SLP_S3_LS5VSMC_EXCARD_CPEXCARD_OC_LMINI_CLKREQ_LEXCARD_CLKREQ_L
LIO_PLT_RESET_LLTALS_OUT
ALS_GAINSYS_ONEWIRE
LTUSB_OC_LLT2USB_OC_LSMC_BC_ACOK
SMBUS_SMC_A_S3_SCL
PCIE_EXCARD_R2D_C_P
PCIE_CLK100M_EXCARD_P
PP1V5_S0
PCIE_EXCARD_R2D_C_N
PCIE_EXCARD_D2R_N
PCIE_MINI_R2D_C_P
PCIE_CLK100M_EXCARD_N
PCIE_MINI_R2D_C_N
67C8 67C6 66C5 62C1 62A8 25D6 25C8
81C3
81C3
25C6
46B6
46B6
66B8
25C2
33B6
33B6
66A6
25B6
29A6
29A6
64C8
25B2
28A6
28A6
51C5
25A8
27D8
81C3
27D8
47C7
24B5
27D7
51B5
27D7
41B6
66C7
52B3
81C3
24A5
22C2
22C2
22C2
22C2
50C6
50C6
27D6
27C6
50C6
22C2
22C2
27D6
23C3
66C6
22D8
22D8
22D8
69A6
51B5
24A3
50B6
6C3
6C3
6D3
6D3
50C5
50C5
27C6
27C5
50C5
34D5
34D5
6C3
6C3
27C6
6A2
62B3
22C4
34A4
34A4
22C4
22C4
68A6
27C6
34C5
9B7
50B5
34B5
6C2
6C2
6D2
6D2
50C3
50C3
27B6
87B4
87B4
87B4
87B4 27C3
50C3
34D4
34D4
6C2
6C2
87B4
27B6
39C6
6A1
6A2
52A2
6C3
34A3
34A3
51B5
52B2
6D3
6C3
52A2
27C5
50C6
34C3
8B7
50C6
50B3
50C6
34B3
50C6
6C1
6C1
6D1
6D1
22D4
22D4
23D5
21C7
21C7
21C7
21C7 27B3
22D4
33B4
33B4
6C1
6C1
21C7
23D5
23C8
5C4
51B7
6A1
51B7
6C1
33B4
33B4
26C1
57C7
6D5
51B7
6D1
6C1
51C5
27C3
50C5
33B4
5D4
50C5
22D4
50C5
33B4
50C5
5B1
5B1
5C1
5C1
5B1
5B1
5B1
5C1
5C1
5C1
5C1 5B1
5B1
5B1
5B1
5C1
5C1
5C1
5B1
5B1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5C1
5B1
5B1
5C1
5B1
5D1
5C1
5B1
5B1
5B1
5B1
www.vinafix.vn
GND
OUT
VIN+ VIN-
V+
ALERT
A0
SCL
SDA
GNDS
V+
GND
OUT
VIN+ VIN-
V+
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Placement Note:Place near R8307
near L8300 and
bottom side
Q8301 and Q8302
DCIn Current Sense
Place sensor on
TMP106 Thermal Sensor
Battery Current Sense
Place near R8308
Placement Note:
Temp Sensor has address x92,x93
1/16WMF-LF
05%
402
R56511
2
0
402MF-LF1/16W5%
NO STUFFR56501
2
INA193SOT23-5
CRITICAL
U5605
2
15
3 4
402
1uF
CERM6.3V10%
C56151
2
1uF
402CERM
10%6.3V
C56051
2
402
20%0.1uF
CERM10V
C56501
2
CRITICAL
TMP106WCSP-6
U5650
C2
B2
A2
B1
A1
C1
SOT23-5INA193
CRITICAL
U5615
2
15
3 4
03001
8749
051-7164
Current & Thermal SensorsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
CHGR_CSO_R_P
CHGR_CSO_R_N
LIO_BATT_ISENSE
TMPSNSR_A0
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDA
PP3V3_S0
LIO_DCIN_ISENSE
CHGR_CSI_P
PP3V3_S0PP3V3_S0
CHGR_CSI_R_N
82D5
82D5 82D5
82C6
82C6 82C6
82B3
82B3 82B3
82A4
82A4 82A4
79D3
79D3 79D3
79A8
79A8 79A8
71D2
71D2
71D2
67C5
67C5
67C5
67C3
67C3 67C3
67B3
67B3 67B3
67A3
67A3 67A3
66B6
66B6 66B6
66B5
66B5 66B5
66B1
66B1 66B1
65D6
65D6 65D6
65B3
65B3
65B3
62A6
62A6 62A6
61D8
61D8 61D8
61A5
61A5 61A5
60D4
60D4 60D4
60C7
60C7 60C7
58C7
58C7 58C7
58C4
58C4 58C4
57B6
57B6 57B6
54D4
54D4
54D4
54B5
54B5 54B5
52D3
52D3 52D3
49C7
49C7 49C4
49C4
49B5 49B5
40B6
40B6 40B6
36D6
36D6 36D6
34A8
34A8 34A8
33D8
33D8 33D8
33D3
33D3
33D3
33C7
33C7 33C7
29A6
29A6 29A6
29A3
29A3 29A3
28A6
28A6 28A6
27D8
27D8 27D8
27D5
27D5 27D5
27D3
27D3 27D3
27C3
27C3 27C3
26D1
26D1 26D1
26B8
26B8 26B8
26B6
26B6 26B6
26B4
26B4 26B4
25D8
25D8 25D8
25D3
25D3 25D3
25C6
25C6 25C6
25C4
25C4 25C4
25B8
25B8 25B8
25B4
25B4 25B4
25A4
25A4 25A4
24D3
24D3 24D3
24C3
24C3 24C3
24B5
24B5 24B5
24B3
24B3 24B3
23D5
23D5 23D5
23B3
23B3 23B3
22B5
22B5 22B5
21D3
21D3 21D3
21C3
21C3 21C3
20B4
20B4 20B4
20A4
20A4 20A4
19C7
19C7 19C7
19C6
19C6 19C6
17C6
17C6 17C6
51B5
51B5
14D6
14D6 14D6
27D3
27D3
14C7
14C7 14C7
27D2
27D2
10C5
10C5 10C5
69D6
27D1
27D1
5D4
5D4 5D4
69B2
69C2
55C3
10B3
10B3
5A4
55C5
69D4
5A4 5A4
69D3
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PCI-E x1 Port "F" = Unused
PCI-E x1 Port "E" = Unused
PCI-E x1 Port "D" = Unused
PCI-E x1 Port "C" = ExpressCard
PCI-E x1 Port "B" = PCI-E Mini Card
PCI-E x1 Port "A" = Ethernet (Yukon)
Place caps close to SB
Place caps close to SB
402X5R16V10%
0.1uFC5710
1 2
402X5R16V10%
0.1uFC5711
1 2
402X5R16V10%
0.1uFC5721
1 2402X5R16V10%
0.1uFC5720
1 2
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
PCI-E Connections
50 87
03001051-7164
TP_PCIE_F_R2DP
PCIE_B_R2D_C_P
PCIE_MINI_D2R_N
MAKE_BASE=TRUETP_PCIE_F_R2DN
PCIE_MINI_D2R_P
PCIE_MINI_D2R_N
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_C_P
PCIE_B_R2D_C_NPCIE_MINI_R2D_C_NMAKE_BASE=TRUE
MAKE_BASE=TRUEPCIE_MINI_D2R_N
PCIE_MINI_D2R_PMAKE_BASE=TRUEPCIE_MINI_D2R_P
MAKE_BASE=TRUEPCIE_MINI_R2D_C_P
PCIE_EXCARD_R2D_C_P
PCIE_EXCARD_R2D_C_N
PCIE_EXCARD_D2R_P
PCIE_EXCARD_D2R_N
MAKE_BASE=TRUEPCIE_EXCARD_R2D_C_P
MAKE_BASE=TRUEPCIE_EXCARD_R2D_C_N
MAKE_BASE=TRUEPCIE_EXCARD_D2R_P
MAKE_BASE=TRUEPCIE_EXCARD_D2R_N
PCIE_C_R2D_C_P
PCIE_C_R2D_C_N
PCIE_EXCARD_D2R_N
PCIE_EXCARD_D2R_P
TP_PCIE_D_D2RPMAKE_BASE=TRUE
TP_PCIE_D_D2RNMAKE_BASE=TRUE
MAKE_BASE=TRUETP_PCIE_D_R2DNMAKE_BASE=TRUE
TP_PCIE_D_R2DP
TP_PCIE_D_D2RP
TP_PCIE_D_D2RN
TP_PCIE_D_R2DN
TP_PCIE_D_R2DP
TP_PCIE_E_R2DP
TP_PCIE_E_R2DN
TP_PCIE_E_D2RN
TP_PCIE_E_D2RP
MAKE_BASE=TRUETP_PCIE_E_R2DP
MAKE_BASE=TRUETP_PCIE_E_R2DN
TP_PCIE_E_D2RNMAKE_BASE=TRUE
TP_PCIE_E_D2RPMAKE_BASE=TRUE
TP_PCIE_F_R2DN
TP_PCIE_F_D2RN
TP_PCIE_F_D2RP
MAKE_BASE=TRUETP_PCIE_F_R2DP
TP_PCIE_F_D2RNMAKE_BASE=TRUE
TP_PCIE_F_D2RPMAKE_BASE=TRUE
50C6
50C6
50C6
50B6
50C6
50C5
50C5 50C3
50C6 50C3
50C5
50B5
50C3
50B3 50B6
50C6
50C5
50C3
50C3 48C6
50C5 48C6
50C3
50B3
48B6
48B6 50B5
50C5
48C6
48C6
48C6
50C5
50C5
22D4
48C6 22D4
50C5
50C5
48B6
48B6
22D4
22D4 48B6
48B6
50B6
22D4
50B3
22D4
22D4
48C6
48C6
5B1
22D4 5B1
48B6
48B6
22D4
22D4
5B1
5B1 22D4
22D4
50B3
50B3
50B3
50B3
50B6
50B6
50B6
50B6
50B6
50B6
50B6
50B6
50B3
50B3
50B3
50B3
50B6
50A6
50B6
50B3
50A3
50B3
22C4
22D4
5B1
22C4
5B1
5B1
5B1
5B1
22D4
5B1
5C1
5C1
5B1
5B1
22D4
22D4
5B1
5B1
22D4
22D4
22D4
22D4
22D4
22D4
22D4
22D4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
22C4
www.vinafix.vn
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
OUT
OUT
OUT
P16
P51P50
P42/SDA1
P97/IRQ15*/SDA0
P95/IRQ14*
P94/IRQ13*
P93/IRQ12*P92/IRQ0*
P91/IRQ1*
P86/IRQ5*/SCK1/SCL1
P83/LPCPD*
P82/CLKRUN*
P80/PME*
P35/LRESET*
P34/LFRAME*
P10
P12
P13P14
P15
P17
P31/LAD1P30/LAD0
P32/LAD2
P33/LAD3
P36/LCLKP37/SERIRQ
P44/TMO1
P77/AN7
P76/AN6
P81/GA20
P96/EXCL
P11
P47/PWX1/PWM1
P45
P46/PWX0/PWM0
P40/TMIO
P43/TMI1/EXSCK1
P27
P26
P25P24
P23P22
P21
P20
P41/TMO0
P52/SCL0
P60/KIN0*
P61/KIN1*P62/KIN2*
P63/KIN3*P64/KIN4*
P65/KIN5*
P66/IRQ6*/KIN6*P67/IRQ7*/KIN7*
P70/AN0
P71/AN1
P72/AN2P73/AN3
P74/AN4P75/AN5
P84/IRQ3*/TXD1
P85/IRQ4*/RXD1
P90/IRQ2*
(1 OF 4)
PA2/KIN10*/PS2ACPA3/KIN11*/PS2AD
PA5/KIN13*/PS2BDPA4/KIN12*/PS2BC
PB2
PB3PB4
PE0
PG6/EXIRQ14*/EXSDAB
PG5/EXIRQ13*/EXSCLA
PH1/EXIRQ7*PH0/EXIRQ6*
PG7/EXIRQ15*/EXSCLB
PG4/EXIRQ12*/EXSDAA
PH3/EXEXCLPH2/FWE
PB5
PF4/PWM4
PF2/IRQ10*/TMOY
PG2/EXIRQ10*/SDA2
PG0/EXIRQ8*/TMIX
PF7/PWM7
PC3/TIOCD0/TCLKB/WUE11*
PH5
PB7
PB6
PH4
PF5/PWM5
PF6/PWM6
PG1/EXIRQ9*/TMIY
PA6/KIN14*/PS2CC
PA7/KIN15*/PS2CD
PD0/AN8
PD1/AN9
PD2/AN10PD3/AN11
PD4/AN12
PD5/AN13PD6/AN14
PD7/AN15
PF0/IRQ8*/PWM2PF1/IRQ9*/PWM3
PB0/LSMI*PB1/LSCI
PC0/TIOCA0/WUE8*
PC1/TIOCB0/WUE9*PC2/TIOCC0/TCLKA/WUE10*
PC4/TIOCA1/WUE12*PC5/TIOCB1/TCLKC/WUE13*
PC6/TIOCA2/WUE14*
PC7/TIOCB2/TCLKD/WUE15*
PG3/EXIRQ11*/SCL2
PF3/IRQ11*/TMOX
PA1/KIN9*/PA2DD
PA0/KIN8*/PA2DC
PE1*/ETCK
PE2*/ETDIPE3*/ETDO
PE4*/ETMS
(2 OF 4)
VCL
AVREF
VCC
VCC
VCC
AVCC
XTAL
EXTAL
AVCC
VCC
MD1
MD2
NMI
RES*
ETRST*
AVREF
AVSSVSS
(3 OF 4)
NC22NC21
NC20
NC19NC18
NC17NC16
NC15
NC14NC13
NC12
NC9
NC6
NC11
NC10
NC8
NC7
NC5NC4
NC3
NC2NC1
NC0
(4 OF 4)
OUT
OUT
IO
OUT
IN
IN
IN
OUT
IN
IO
IN
IO
OUT
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
IO
IO
IO
IO
IN
IN
IN
OUT
OUT
OUT
IO
IN
IN
IN
IN
IO
IO
IN
IN
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SMC_XXX WHERE XXX IS THE PORT NUMBER.
CAN BE LEFT NO-CONNECTED.
UNUSED PINS HAVE THE FORMAT
LAYOUT NOTE:
SMC
PLACE R5899 AND C5820 NEAR SMC PIN N14,N15VCL IS INTERNAL RAIL
PLACE C5807 NEAR PIN F1LAYOUT NOTE:
DRIVEN OUTPUTS ALWAYS SO THEYTHEY ARE SET BY SOFTWARE TO BE
805
20%6.3VCERM
22UFC58021
2
CERM-X5R6.3V
0.47UF
402
10%
C58071
2
10V
0.1UF20%
CERM402
C58031
2
0.1UF20%
CERM10V
402
C58201
2
5%1/16W
4.7
402MF-LF
R58991 2
0.1UF20%10VCERM402
C58041
2
SMXW58001 2
402
10V20%0.1UF
CERM
C58051
220%10VCERM402
0.1UFC58061
2SMC_H8S2116
OMIT
BGA
U5800B12
C13
A15B14
B15
C14D12
C15
D13
D14D15
E12E14
E15
E13F14
D9
C9
A9B9
D8C8
A8
D7
A5B5
D5
C3B1
C2
D3C1
G1
G4F2
L13
L14
L15K12
K13
K14J12
J13
N12
R13P13
R14P14
R15
N13P15
C7
A7
B7D6
C6A6
B6
K4
J2J1
J3
J4H2
H1
G2
OMIT
SMC_H8S2116BGA
U5800R3P3
R2
N3R1
N2
M4N1
B10
A10
D10A11
B11C11
A12
D11
G14G15
G13
G12H14
H15H13
H12
M11
P11R11
N11
P10R10
N10
M10
M3M2
M1
L4L2
M7
P6
R6N6
M6
R5P5
N5
P9R9
N9
P8R8
M8
P7R7
E1
F3K2
C4
D4B3
BGASMC_H8S2116
OMIT
U5800
N14
N15
M14
M15
P12R12
L1
B2
E2
K1
F4
E3
P2
P1
J15
A1
F1
D1
P4
R4
F12
F13
B13
A13
A4
B4
D2
A2
BGASMC_H8S2116
OMIT
U5800
G3H3
K15
J14
F15A14
C12C10
C5
A3B8
E4
K3
H4M9
N8
L3
N4
M5N7
M12
M13L12
MF-LF5%
4021/16W10KR58091
2MF-LF402
5%10K1/16W
R58011
2
1/16W5%10KMF-LF402
R58021
2
05%1/16WMF-LF402
NOSTUFFR58031
2
10KMF-LF5%1/16W402
R58981
2
051-7164 03001
51 87
SMC_XDP_TDO_3_3
PM_SYSRST_LSMC_USB_DEBUG_MUX
PM_THRM_LPM_EXTTS_L
SMC_ODD_DETECTISENSE_CAL_ENSMC_EXCARD_CP
SMC_CASE_OPEN
SMBUS_SMC_B_S0_SDASMBUS_SMC_A_S3_SCL
SMC_THRMTRIPSMC_PROCHOT
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_A_S3_SDA
ALS_GAINSMC_FWE
SMC_EXCARD_PWR_EN
SMC_BATT_ISET
SMC_LID
SMBUS_SMC_BSA_SDA
SPI_CE_L
TP_SMC_SYS_VSET
TP_SMC_FAN_3_CTL
SMS_ONOFF_L
SMC_EXCARD_OC_L
SMS_INT_L
TP_SMC_BATT_VSETSMC_SYS_ISET
SMC_XDP_TCK_3_3
SYS_ONEWIREPM_BATLOW_L
SMS_X_AXISSMS_Y_AXISSMS_Z_AXISTP_SMC_ANALOG_IDSMC_P1V05S0_ISENSESMC_MEM_ISENSEALS_LEFTALS_RIGHT
TP_SMC_PF0TP_SMC_PF1
SMC_EXTSMI_LSMC_RUNTIME_SCI_L
SMC_FAN_0_CTLSMC_FAN_1_CTLTP_SMC_FAN_2_CTL
SMC_FAN_0_TACHSMC_FAN_1_TACHTP_SMC_FAN_2_TACHTP_SMC_FAN_3_TACH
SMBUS_SMC_BSA_SCL
SMC_CPU_RESET_3_3_L
BOOT_LPC_SPI_LSMC_RCIN_L
SMC_TCKSMC_TDISMC_TDOSMC_TMS
SMC_RST_L
PP3V42_G3H
SMC_VCL
PP3V42_G3H
GND_SMC_AVSS
GND_SMC_AVSS
SMC_NMI
SMC_TRST_L
PP3V3_AVREF_SMC
SMC_MD1KBC_MDE
PP3V42_G3H
PP3V3_AVCC_SMCMIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.20 MM
SMC_EXTALSMC_XTAL
SMC_CPU_VSENSE
SMC_ONOFF_L
SC_RX_LSC_TX_L
SMC_PBUS_VSENSESMC_DCIN_ISENSESMC_GPU_VSENSESMC_GPU_ISENSE
SMC_CPU_ISENSE
FWH_INIT_LSMC_PROCHOT_3_3_LSPI_SOSPI_SISPI_SCLKSPI_ARBSMC_ADAPTER_ENSMC_PM_G2_EN
SMBUS_SMC_0_S0_SCL
SMC_SYS_LED_16B
TP_SMC_P20TP_SMC_P21TP_SMC_P22TP_SMC_P23
SMC_BATT_TRICKLE_EN_LSMC_BATT_CHG_ENTP_SMC_P26TP_SMC_P27
SMC_TPM_PP
TP_SMC_XDP_TMS
TP_SMC_SYS_LEDTP_SMC_XDP_TCK
SMC_SYS_KBDLED
SMC_RSTGATE_L
SMC_CLK32K_SUSCLK
SMC_TPM_GPIO
SMC_BATT_ISENSESMC_P1V5S0_NB_ISENSE
TP_SMC_XDP_TRST_L
INT_SERIRQPCI_CLK_SMC
LPC_AD<3>LPC_AD<2>
LPC_AD<0>LPC_AD<1>
PM_PWRBTN_L
PM_RSMRST_LSMC_SB_NMIRSMRST_PWRGDALL_SYS_PWRGD
PM_LAN_ENABLE
LPC_FRAME_LSMC_LRESET_L
SMC_WAKE_SCI_L
PM_CLKRUN_LPM_SUS_STAT_L
SMBUS_SMC_BSB_SCL
SMC_BC_ACOKSMC_BS_ALRT_LPM_SLP_S3_LPM_SLP_S4_LPM_SLP_S5_L
SMBUS_SMC_0_S0_SDA
SMBUS_SMC_BSB_SDA
SMC_TX_LSMC_RX_L
IMVP_VR_ON
81D4
81D4
81D4
69C8
69C8
69C8
69B8
69B8
69B8
69A8
69A8
69A8
68B8
68B8
68B8
67D5
67D5
67D5
67D3
67D3
67D3
66D2
66D2
66D2
66C8
66C8
66C8
66A8
66A8
66A8
53C4
53C4
53C4
52D7
52D7
57C6
57C6
52D7
52B7
52B7
57C2
57C2
52B7
52B5
52B5
55D6
55D6
52B5
52B1
52B1
55C6
55C6
52B1
51D3
51D4
55C1
55C1
51D4
51C2
51C2
55B7
55B7
51D3
52D5
68B2
68B2
47B5
47B5
55B5
55B5
47B5
53C5
54C2
60C6
69A6
54C2
53B4
53B5
52D3
27C3
27C3
35B7
35B7
55B3
55B3
35B7
81C4
52D5
54B3
60C6
60C6
60C6
60C6
60C6
60C6
60C6
53B5
68A6
54B3
52B3
52B3
26C5
29C3
52A2
48C4
27C2
52B2
55B2
27C2
53B4 53B5
53B5
53B4
53B4
53B5
27C3
27C3
55B1
55B1
27C3
52C6
52D3
68A6
27D6
37A8
55B4
53C5
53C5
53C5
53C4
53C4
65C7
53C4
53C4
52A2
52A2
68B2
52A2
27D6
52B2
52B2
23C5
28C3
55A8
48C3
6D5
48C3
81C4
27C1
56C7
52D5
52D5
52B2
52D5
48C3
52D5
52D5
52C5
52C5
52D5
52D5
52D5
27C1
22B3 52B2
52B2
52B2
52B2
52D6
26D6
26D6
52B6
52B6
53B5
53B4
53B4
26D6
52B2
21C4
56C1
56C1
56C7
52A2
27D5
52C5
52C5
52C5
52C5
69A3
69A6
52C5
52C5
52C5
52D5
52D5
6C5
35B3
52D5
52C5
23C8
21D4
21D4
21D4
21D4
23C1
52A5
66B1
23C3
21C5
26B1
23C8
23C5
27B3
48C3
52B2
23C3
27D5
27B3
47B5
47B5
61C7
52B2
5A2
52B5
23C8
14B7
36C4
5B2
5C1
52A2
52C2
52C2
5C1
52B2
5C1
69A8
52B2
5D1
22C6
52D3
52D3
59C6
52B5
23C3
52D3
69A8
52B2
5C1
23C1
59C3
59C3
59C3
52D3
52D3
52A2
57C7
57D2
52C3
52C3
23B8
23C8
58B7
58B4
52D3
58B7
58B4
52D3
52D3
5D1
52B2
5C2
21C3
5C2
5C2
5C2
5C2
5C2
5D2
5D2
51B2
51C4
5C2
5C2
52B6
5C2
5D2
52C8
52C8
55D6
5A2
52B5
52B5
55D2
55C4
55C6
55B6
55B7
5C2
52D1
22C6
22C6
22C6
22C6
43C8
66A8
27D3
52A8
52C3
52C3
52C3
52C3
52A2
52A2
52C3
52C3
52B5
52C3
52D3
52D3
57A6
6C3
35B2
52C5
55C2
52D3
52C3
5C2
34D6
5C2
5C2
5D2
5C2
23C3
5B4
23C3
52A4
26A5
5B4
5C2
5C4
23C1
5C2
5C2
27B2
5B1
5D1
5C4
27D3
27B2
5C2
5C2
5C4
www.vinafix.vn
G
D
S
G
D
S
IN OUT
GND
IN OUT
V-
V+
V-
V+OUT
NCCD
GND
OUT
VDD
OUT
OUT
G
D
SIN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SMC PWRGD Circuit
SMC 1.05V to 3.3V Level Shifting
1.05V Mid-Reference
Silk: "SMC RST"
SMC Reset Button / Brownout Detect
NC
System (Sleep) LED Circuit
NOTE: R5965 acts as 10K pull-up for PGOOD signal
1.71V Reference
Silk: "PWR BTN"
Debug Power ButtonSMC 3.3V to 1.05V Level Shifting
SMC AVREF Supply
ISL6269 undervoltage threshold 81-87% (2.67 - 2.87V)
5V Comp threshold set to 4.480V (89.6%)
SMC Crystal Circuit
Reports when 5V S5 and 3.3V S5 are in regulation
10V20%
402CERM
0.1uFC5900 1
2
402MF-LF
5%1/16W
0
SMC_TPM_GPIO1
R59901 2
402MF-LF1/16W5%
SMC_TPM_GPIO2
0R59911 2
SOT-3632N7002DW-X-FQ5995
6
2
1
SOT-3632N7002DW-X-FQ5995
3
5
4
402
5%
0
MF-LF1/16W
R59921 2
402
5%
0
MF-LF1/16W
R59931 2
10V20%
402CERM
0.1uFC5977 1
2
1/16W5%
402MF-LF
1KR59711
2
MF-LF1/16W
6.2K
402
5%
R59701
2
10%0.47UF6.3VCERM-X5R402
C59651
2
402CERM16V20%0.01uFC59671
2
603
10uF
X5R
20%6.3V
C5966 1
2
CRITICAL
REF3133SOT23-3
VR5965
3
1 2
CERM402
20%10V
0.1uFC5960 1
2
1/16W1%
402MF-LF
10KR59611
2
10K
1/16W1%
402MF-LF
R59621
2
1/16W
10K
MF-LF402
5%
R59651
2
SM-LF
LMC7211U5977
4
3
1
5
2
LMC7211SM-LF
U59604
3
1
5
2
0
1/16W5%
MF-LF402
R59941 2
0
402
5%
SMC_TPM_PP
MF-LF1/16W
R59951 2
10K1/16W5% MF-LF 402
R5931 1 2
MF-LF5% 1/16W10K
402R5932 1 2
1/16W5% MF-LF 402100KR5933 1 2
402MF-LF5% 1/16W10KR5934 1 2
10K1/16W5% MF-LF 402
R5935 1 2
1/16W 402MF-LF5%100KR5936 1 2
1/16W5% MF-LF 4022.0KR5937 1 2
100K1/16W5% MF-LF 402
R5938 1 2
10K1/16W5% MF-LF 402
R5939 1 2
MF-LF 4025% 1/16W10KR5940 1 2
MF-LF1/16W5% 40210KR5941 1 2
MF-LF 4025% 1/16W
10KR5942 1 2
402MF-LF5% 1/16W10KR5943 1 2
10K1/16W5% MF-LF 402
R5944 1 2
10K1/16W5% MF-LF 402
R5945 1 2
10K402MF-LF5% 1/16W
R5946 1 2
1/16W5% MF-LF 402470KR5947 1 2
402MF-LF5% 1/16W10KR5948 1 2
10K1/16W5% MF-LF 402
R5930 1 2
CRITICAL
5X3.2-SM20.00MHZY5920 1
2
CRITICAL
RN5VD30A-FSOT23-5
U5900
5
3
4
1
2
MF-LF402
1%1/16W
10KR59641
2
1/16W1%
402MF-LF
16.2KR59631
2
50V10%0.0022uF
402CERM
C59691
2
10K1/16W5% MF-LF 402
R5980 1 2
402MF-LF1/16W10K
5%R5981 1 2
402MF-LF5%10K
1/16WR5982 1 2
100K1/16W5% 402MF-LF
R5983 1 2
402MF-LF5% 1/16W100KR5984 1 2
402MF-LF5% 1/16W100KR5985 1 2
0
1/16W5%
MF-LF402
R59961 2
1K
MF-LF402
5%1/16W
R59001
2
1/10W5%
603MF-LF
0
OMIT
R59011
2
1/10W
0
OMIT
5%
603MF-LF
R59101
2
SOT23-LF2N7002Q5952
3
1
2
SOT23-LF2N3906Q59501
3
2
1/16W5%
402MF-LF
100R59501
2
1/16W5%
402MF-LF
2.2KR59511
2
1/16W5%
402MF-LF
4.7KR59521
2
50V5%
402CERM
15pFC5920
1 2
5%50VCERM402
15pFC5921
1 2
402
0.01UF16V10%
CERM
C5901 1
2
SMC Support
87
03001051-7164
52
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
USB_DEBUGPRT_EN_L
MAKE_BASE=TRUETP_SMC_FAN_3_TACH
TPM_GPIO2
SMS_INT_LSMC_TPM_RESET_L
SMC_LIDSMC_ONOFF_L
SMC_FWESMC_TX_LSMC_RX_L
PP3V3_S3PP3V3_S3
SYS_ONEWIRE
SMC_EXTAL
SMC_XTAL
SMC_TMSSMC_BS_ALRT_L
SMC_TDOSMC_TDI
SMC_XDP_TCK_3_3
SMC_TCKSMC_CPU_RESET_3_3_L
SMC_ADAPTER_ENSMC_CASE_OPENSMC_BC_ACOK
VOLTAGE=0V
MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm
GND_SMC_AVSS
PM_SUS_STAT_LSMC_EXCARD_CP
SMC_BATT_TRICKLE_EN_L
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.4 mmPP3V3_AVREF_SMC
MIN_NECK_WIDTH=0.2 mm
PP3V42_G3H
CPU_PROCHOT_L
PM_THRMTRIP_L
SMC_PROCHOT
SMC_THRMTRIP
SMC_ONOFF_L
PP5V_S5PP3V42_G3H
RSMRST_PWRGDMAKE_BASE=TRUE
P5VS5_PGOOD
P1V71_SMC_REF
P5VS5_COMP_POS
RSMRST_PWRGD
SYS_LED_ILIM
PP5V_S3
SYS_LED_L
SYS_LED_ANODE
SYS_LED_L_VDIV
SMC_SYS_LED_16B
PP3V42_G3H
SMC_MANUAL_RST_L SMC_RST_L
FWH_INIT_LMAKE_BASE=TRUE
FWH_INIT_L
MAKE_BASE=TRUESMC_P1V05S0_ISENSESMC_P1V05S0_ISENSE
PM_EXTTS_LPM_EXTTS_LMAKE_BASE=TRUE
SMC_P1V5S0_NB_ISENSEMAKE_BASE=TRUE
SMC_P1V5S0_NB_ISENSE
MAKE_BASE=TRUETP_SMC_ANALOG_IDTP_SMC_ANALOG_ID
TP_SMC_SYS_LEDMAKE_BASE=TRUE
TP_SMC_SYS_LED
TP_SMC_BATT_VSETMAKE_BASE=TRUE
TP_SMC_BATT_VSET
TP_SMC_SYS_VSETMAKE_BASE=TRUE
TP_SMC_SYS_VSET
MAKE_BASE=TRUETP_SMC_FAN_2_CTLTP_SMC_FAN_2_CTL
MAKE_BASE=TRUETP_SMC_FAN_2_TACHTP_SMC_FAN_2_TACH
TP_SMC_FAN_3_TACH
TP_SMC_FAN_3_CTLMAKE_BASE=TRUE
TP_SMC_FAN_3_CTL
MAKE_BASE=TRUETP_SMC_XDP_TCKTP_SMC_XDP_TCK
TP_SMC_XDP_TMSMAKE_BASE=TRUE
TP_SMC_XDP_TMS
TP_SMC_XDP_TRST_LMAKE_BASE=TRUE
TP_SMC_XDP_TRST_L
TP_SMC_P20MAKE_BASE=TRUE
TP_SMC_P20
TP_SMC_P21MAKE_BASE=TRUE
TP_SMC_P21
MAKE_BASE=TRUETP_SMC_P22TP_SMC_P22
MAKE_BASE=TRUETP_SMC_P23TP_SMC_P23
MAKE_BASE=TRUETP_SMC_P27TP_SMC_P27
MAKE_BASE=TRUETP_SMC_PF0TP_SMC_PF0
TP_SMC_PF1MAKE_BASE=TRUE
TP_SMC_PF1
P0V46_SMC_LSREFVOLTAGE=0.46V
PP3V3_S0
SMC_PROCHOT_3_3_L
SC_TX_L
SMC_TPM_PP
SC_RX_L
TPM_PP
SMC_RX_L
TPM_GPIO1
SMC_TX_L
SMC_BATT_CHG_EN
PM_SLP_S5_L
CPU_PROCHOT_L
SMC_EXCARD_OC_L EXCARD_OC_L
SMC_USB_DEBUG_MUX
SMC_XDP_TDO_3_3
PP3V42_G3H
TP_SMC_P26 TP_SMC_P26MAKE_BASE=TRUE
SMC_TPM_GPIO
SMC_MEM_ISENSE
82D5 82C6 82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6 66B5 66B1 65D6
65B3 62A6
61D8
61A5 60D4 60C7 58C7 58C4 57B6 54D4
54B5 49C7 49C4 49B5 40B6 36D6 34A8 33D8 33D3
33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3 26D1
26B8 26B6 26B4 25D8 25D3 25C6 25C4
81D4
81D4
81D4
81D4
81D4
25B8
81D4
81A5
81A5
69C8
69C8
69C8
25B4
69C8
67C5
67C5
69B8
69B8
69B8
25A4
69B8
67C3
67C3
69A8
69A8
69A8
24D3
69A8
66C6
66C6
68B8
68B8
68B8
24C3
68B8
65D1
65D1
67D5
67D5
67D5
24B5
67D5
63B7
63B7
67D3
71D7
67D3
67D3
24B3
67D3
60C2
60C2
66D2
67C3
66D2
66D2
23D5
66D2
59C6
59C6
66C8
67C1
66C8
66C8
23B3
66C8
57D4
57D4
66A8
67B1
66A8
66A8
22B5
66A8
52B1
52B1
53C4
66D8
53C4
53C4
21D3
53C4
46D6
46D6
57C6
52D7
66B8
52D7
52B7
21C3
52D7
46C3
46C3
57C2
52B5
65D6
52B7
52B5
20B4
52B7
46B3
46B3
55D6
52B1
65B7
52B1
52B1
20A4
52B5
41C5
41C5
55C6
51D4
64C8
51D4 81C6
51D4
19C7
51D4
37D7
37D7
55C1
51D3
62C8
51D3
81C4
51D3
19C6
51D3
37D5
37D5
55B7
51C2
62B6
51C2
67B3
51C2
17C6
48C3
51C2
53B4
53B5
37C3
37C3
69A6
55B5
60C6
47B5
62B2
47B5
67B1
47B5
53C5 53C5
52D5 52D3
14D6
53B5
53B4
22D8
47B5
81C4
52B3
52B3
37A7
37A7
68A6
55B3
53B5
35B7
81C4
62A4
35B7
65C7
62A2
35B7
52D5 52D3
51B7 51B7
14C7
52B2
52B2
22C4
35B7
52C6
51C7
51C7
32C5
32C5
51B7
53B4
68B2
53B4
53B5
53B5
68A6
51C5
55B1
51C5
51B7
27C3
21C2
52B2
47C7
27C3
65C7
66A8
52A4
45C3
27C3
53B5
51D5 51D5
55B2 55B2
29C3 29C3
55B4 55B4
10C5
51C7
51C7
51C5
6C3
27C3
52D5
51B5
81C4
51C5
47B5
47B5
27C5
27C5
48C3
51B5
51C5
51B5
51B5
51C5
51D5
48C3
51C4
23C5
48C3
69A3
26D6
52D3
14B6
51C5
25C8
26D6
52A5
66A6
51D7
5D4
26D6
51C3
21C4 21C4
52D5 52D3
28C3 28C3
52D5 52D3
52D5 52D3
52D5 52D3
52D5 52D3
52D5 52D3
52D5 52D3
52D5 52D3
52D3
52D5 52D3
52D5 52D3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
52C5 52C3
5D4
47B5
47B5
69A6
23C3
52C1
6C1
26D6
52C3 52C5
47B3
51B7
60C6
23C3
60B7
51B5
5A2
51B5
5C2
5C2
5D4
5D4
5C1
51C3
51C3
5C2
5D1
5C2
5C2
51B5
5C2
51B5
43C8
51C5
5B1
51B2
5C2
5C1
51D7
51D2 5D2
7C6
7C6
51B5
51B5
5A2
5D4
5D2
51D7
65D7
5B2
81C6
51C7
5D2
5C2
5C2 5C2
51A7 51A7
14B7 14B7
51D5 51D5
51A7 51A7
51C7 51C7
51B5 51B5
51B5 51B5
51B7 51B7
51B7 51B7
51B7
51B7 51B7
51C7 51C7
51C7 51C7
51C7 51C7
51D7 51D7
51D7 51D7
51D7 51D7
51D7 51D7
51D7 51D7
51B5 51B5
51B5 51B5
5A4
51D5
51C5
51C7
51C5
60C6
5C2
60C6
5C2
51D7
5C4
7C6
51B7 5C1
51B7
51B7
5D2
51D7 51D7
51D5
51A7
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(GPIO15)
NC
516S0384
NC
NCNC
CRITICALLPCPLUS
M-ST-SMQT500306-L021-9F
J6000
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
4
56
78
9
53 87
03001051-7164
LPC+ Debug ConnectorSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PP3V42_G3HPP5V_S0
FWH_INIT_LPCI_CLK_PORT80_LPC
LPC_AD<2>LPC_AD<3>
INT_SERIRQPM_SUS_STAT_LSMC_TDISMC_TCKSMC_RST_LSMC_NMISMC_RX_L
SV_SET_UP
LPC_AD<0>LPC_AD<1>
BOOT_LPC_SPI_L
LPC_FRAME_LPM_CLKRUN_L
SMC_TMSDEBUG_RST_LSMC_TRST_LSMC_TDOSMC_MD1SMC_TX_L
81D4
69C8 69B8
81B3
69A8
80B5
68B8
80A1
67D5
79B8
67D3
71A6
66D2
67B3
66C8
67B1
66A8
67A1
52D7
66B5
52B7
62B1
52B5
61D7
52B1
58C7
51D4
58C4
51D3
57B5
51C2
55A8
47B5
36D6
52D5
60C6
52B3
52B3
35B7
31C5
52D3
60C6
60C6
60C6
52A2
52B2
60C6
60C6
60C6
60C6
52B2
27C3
25D8
51D5
51C7
51C7
51C7
51C5
52B2
52B2
52D6
51C7
23C3
51D7
51D7
51C7
51C7
51C5
52B2
52B2
51C7
26D6
5D4
21C4
34D6
21D4
21D4
23C8
23C5
51B5
51C5
51C3
51C1
47B5
23B6
21D4
21D4
22B3
21C5
23C8
51B5
26B1
51C1
51B5
51C1
47B5
5D2
5D2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5D2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
5C2
www.vinafix.vn
SMBDATASMBCLK
ALERT*
OT2*
DXP2
OT1*
DXNDXP1
GND
VCC
IO
IO
GND
VDD
SDATASCLK
THM*
ALERT*/
D+D-
THM2*
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GPU Die Thermal Sensor
518S0452
(TG0T)
(TG0H)
Place U6150 near GPU
GPU/Heat Pipe & Bottom Case Skin Thermal Sensor
(Th1H) Placement note:Place on left side of fan cutout
518S0452NC
NC
NC
NC
Placement note:
Placement note:
NC
NCNC
Place in between VRAMPlacement note:
Keep all 4 XWs as closeto U6100 as possible
CRITICAL
MAX6695AUBUMAX
U6100
8
3
2
4
6
5
10
7
9
1
0.0022uF10%
402CERM50V
C6120 1
2
SMXW6120
1 2
SMXW6121
1 2
SMXW6111
1 2
SMXW6110
1 2
50VCERM402
10%0.001UFC61601
2
10V20%
402CERM
0.1uFC61001
2
M-RT-SM
CRITICAL
BM02B-ACHKS-A-GAN-TF-LFJ6120
3
4
1
2
10K5%
402MF-LF1/16W
R61521
2
402
1/16W5%
MF-LF
47R61001 2
16V10%
402X5R
0.1UFC6150 1
2MF-LF
402
5%10K
1/16W
R61511
2
TMP401MSOP
U61506
32
5
87
4
1499
1%1/16WMF-LF402
R61601 2
499
1%1/16WMF-LF402
R61611 2
BM02B-ACHKS-A-GAN-TF-LF
CRITICAL
M-RT-SM
J6160
3
4
1
2
50V
0.0022uF
CERM402
10%
C6110 1
2
Thermal Sensors
54 87
03001051-7164
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
PP3V3_S0_GPUTHMSNS_RMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3VMAKE_BASE=TRUE
SMBUS_SMC_0_S0_SDASMBUS_SMC_0_S0_SCL
REMTHMSNS_DXP2REMTHMSNS_DXNREMTHMSNS_DXP1
PP3V3_S0
RSTHMSNS_THM_L
RSTHMSNS_ALERT_L
GPUTHMSNS_DXP
GPUTHMSNS_DXN SMBUS_SMC_0_S0_SDA
HSTHMSNS_DX_P
HSTHMSNS_DX_N
ATI_TDIODE_P
ATI_TDIODE_N
RSFSTHMSNS_D_P
RSFSTHMSNS_D_N
SMBUS_SMC_0_S0_SCL
PP3V3_S0
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54B5
54D4
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
25D8
25D3
25D3
25C6
25C6
25C4
25C4
25B8
25B8
25B4
25B4
25A4
25A4
24D3
24D3
24C3
24C3
24B5
24B5
24B3
24B3
23D5
23D5
23B3
23B3
22B5
22B5
21D3
21D3
21C3
21C3
20B4
20B4
20A4
20A4
19C7
19C7
19C6
19C6
17C6
17C6
54B3
54B3
14D6
54C2
54C2
14D6
51C5
51C7
14C7
51C5
51C7
14C7
27D6
27D6
10C5
27D6
27D6
10C5
27D5
27D5
5D4
27D5
27D5
5D4
27D3
27D3
5A4
27D3
5A2
5A2
77A3
77A3
5A2
5A2
27D3
5A4
www.vinafix.vn
IN
OUT
N-CHN
S
D
G
P-CHN
G
DS
N-CHN
S
D
G
P-CHN
G
DS
D
S
G
D
S
G
D
S
G
OUT
OUTIN OUTIN
OUTIN IN OUT
OUTINOUTIN
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1.05A / 1.1W
PBUS Voltage Sense Enable & Filter
Enables PBUS VSense divider when high.
1.5V S0 (NB) Current Sense Filter
CPU Voltage Sense / Filter
Place short near U0700 center
GPU Voltage Sense / Filter
GPU Current Sense Filter
DCIN Current Sense Filter
Place short near U8400 center
Battery Current Sense Filter
Place RC close to SMC
1.2A / 1.44W
Place RC close to SMC
Place RC close to SMC
1.05V S0 (NB) Current Sense Filter
Place RC close to SMC
Place RC close to SMCPlace RC close to SMC
Place RC close to SMC
Rthevanin = 4573 ohms
Place RC close to SMC
CPU Current Sense Filter
Place RC close to SMC
Switches in fixed load on power supplies to calibrate current sense circuits
Current Sense Calibration Circuit
402MF-LF1/16W5%470KR62281
2
100K5%
1/16WMF-LF402
R62271
2
402MF-LF1/16W
1%27.4K
R62851
2
20%
X5R402
0.22UF6.3V
C62851
2
1%1/16WMF-LF402
5.49KR62861
2
SC70-6FDG6332C_NLQ6229
6
2
1
SC70-6FDG6332C_NLQ6229
3
5
4
FDG6332C_NLSC70-6
Q6215
6
2
1
SC70-6FDG6332C_NLQ6215
3
5
4
MICROFET3X3
CRITICAL
FDM6296Q6220
5
4
1 2 3
CRITICAL
FDM6296MICROFET3X3
Q6221
5
4
1 2 3
FDM6296
CRITICAL
MICROFET3X3
Q6223
5
4
1 2 3
402X5R6.3V20%0.22UFC62591
2
4.53K
402MF-LF1/16W1%
R62591 2
1%
MF-LF402
4.53K
1/16W
R62701 2
20%
X5R402
0.22UF6.3V
C62701
26.3V
0.22UF
402X5R
20%
C62751
2
4.53K
402MF-LF1/16W1%
R62751 2
20%
X5R402
0.22UF6.3V
C62801
2
1%1/16WMF-LF402
4.53KR62801 2
4.53K
402MF-LF1/16W1%
R62901 2
6.3V
0.22UF
402X5R
20%
C62901
2
6.3V
0.22UF
402X5R
20%
C62401
2
4.53K
402MF-LF1/16W1%
R62401 2
20%
X5R402
0.22UF6.3V
C62351
2
1/16W1%
MF-LF402
4.53KR62351 2
SMXW6259
1 2
1/16WMF-LF
4.53K
1%
402
R62091 2
0.22UF20%6.3VX5R402
C62091
2
SMXW6209
1 2
1.001%
1/4WMF-LF1206
R62201
2
402MF-LF1/16W
5%470K
R62291
2
1.001%
1/4WMF-LF1206
R62211
2
1.001%
1/4WMF-LF1206
R62231
2
051-7164 03001
8755
Current & Voltage SensingSYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
PBUSVSENS_EN_L
MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmGPUVCORE_ISENSE_CAL
MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmCPUVCORE_ISENSE_CAL
SMC_CPU_ISENSE
GND_SMC_AVSS
SMC_PBUS_VSENSE
PPBUS_G3H_VSENSEVOLTAGE=12.6V
ISENSE_CAL_EN
PP5V_S0
ISENSE_CAL_EN_L
GND_SMC_AVSS
LIO_DCIN_ISENSE
PPVCORE_S0_CPU
SMC_DCIN_ISENSE
GND_SMC_AVSS
LIO_BATT_ISENSE SMC_BATT_ISENSE
GND_SMC_AVSS
CPUVCORE_IOUT GPUVCORE_IOUT SMC_GPU_ISENSE P1V5S0_NB_IOUT SMC_P1V5S0_NB_ISENSE SMC_P1V05S0_ISENSE
GND_SMC_AVSS GND_SMC_AVSS GND_SMC_AVSS
GPUVSENSE_IN
CPUVSENSE_IN
SMC_GPU_VSENSE
SMC_CPU_VSENSE
GND_SMC_AVSS
PPVCORE_D3C_GPU
GND_SMC_AVSS
PPVCORE_S0_CPU PPVCORE_D3C_GPU
P1V05S0_IOUT
PPBUS_G3H
PM_SLP_S3_L
PP1V05_S0
P1V05S0_ISENSE_CALMIN_LINE_WIDTH=0.50 mmMIN_NECK_WIDTH=0.20 mm
ISENSE_CAL_EN_LS5V
67D8 67D6 65A2
34C8 34C6 34B8 25D3 25C4 24D3 24C3
21C1 19D7 19D6 19D5
81B3
19D2
80B5
19D1
80A1
79B7
19C8
79B8
71D7
17D6
71A6
69C1
17D3
67B3
68D5
16D3 67B1
67C3
16C8 67A1
67C1
13B5 66B5
57C6
57C6 57C6
57C6
65D6
12C2
57C6
62B1
57C2
57C2 57C2
57C6 57C6 57C2
57C6
57C6
65B7
66C8
12B7
57C2
61D7
55D6
55D6 55D6
57C2 57C2 55D6
57C2
57C2
64D7
66C6
12A7
55D6
58C7
55C6
55C6 55C6
55D6 55D6 55C6
55D6
55C6
64A6
66B6
11C5
55C6
58C4
55C1
67D3
55C1 55C1
55C6 55C6 55C1
55C1
77A7
55C1
67D3 77A7
62D7
65B8
11B3
55B7
57B5
55B7
67D1
55B7 55B7
55C1 55C1 55B7
55B7
72D8
55B7
67D1 72D8
61D7
51C5
9B7
55B5
53C4
55B5
61D1
55B5 55B5
55B5 55B7 55B5
55B5
71C1
55B5
61D1 71C1
61D4
43C8
8C7
55B3
36D6
55B3
55A6
55B3 55B3
55B3 55B3 55B3
55B3
71B7
55B3
55D7 71B7
43D8
42A8
7D5
55B1
31C5
55B1
9D7
55B1 55B1
55B1 55B1 55B1
55B1
67A8
55B1
9D7 67A8
42B8
39C8
7B6
52B6
25D8
52B6
8D7
52B6 52B6
52D5 52D5
52B6 52B6 52B6
52B6
67A6
52B6
8D7 67A6
41C6
32B3
7B5
51C4
51B7
5D4
51C4
8B5
51C4 51C4
52D3 52D3
51C4 51C4 51C4
51C4
55A5
51C4
8B5 55C7
5C4
23C3
5D4
51D5
51B2
51D5
5B2
5D2
51B2
49C2
5B2
51D5
51B2
49C6 51D5
51B2
61A5 71D1 51D5 62A6 51D5 51A7
51B2 51B2 51B2
51D5
51D5
51B2
5B2
51B2
5B2 5B2
65B1
5A1
5C4
5B2
www.vinafix.vn
SCK
SOWP*
SI
VDD
CE*
HOLD*VSS
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
R6309 IS NOT NEEDED WHEN SHARING SPI FLASH WITH ICH7M AND TEKOA(LAN CHIP)
R6303 SHOULD BE PLACED LESS THAN 100 MILS FORM FLASH ROM
R6307 AND R6306 SHOULD BE PLACED LESS THAN 100 MILS FORM ICH7M
402CERM10V20%0.1UFC63121
2
1/16W402
5%MF-LF
3.3KR63011
2402
3.3K5%
1/16WMF-LF
R63021
2
22pF
402CERM5%50V
C63011
2
MF-LF402
5%1/16W
47R63071 2
402
22pF50V5%CERM
C63081
2
5%CERM50V402
22pFC63091
2
402MF-LF
47
5%1/16W
R63031 2
47
1/16WMF-LF5%
402
R63061 2
22pF
402CERM5%50V
C63111
2
OMITCRITICAL
16MBIT
SST25VF016B
SOI
U6301
1
7
6 5
2
8
4
3
402
5%10K1/16WMF-LF
R6308
12
NOSTUFF
10K5%
1/16WMF-LF402
R6309
12
56
SPI BOOTROM
051-7164 03001
87
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
SPI_WP_LSPI_HOLD_L
SPI_CE_L SPI_SO
SPI_SISPI_SCLK_RSPI_SCLK SPI_SI_R
SPI_SO_R
PP3V3_S579D5 67D5 67D3 67C3 66C5 65D8
65D2 65D1 65C8 63D8 26C5 25D2 25C8 25B6 24C3 24B3 24A5 23D8 23D4 23D1 23B7 23A7 22D8 22C6
51B5 51D5
51D5 51D5
11B5
22C6 22C6
22C6 22C6
5D4
www.vinafix.vn
V+
V-
G
D
SIN
OUT
NC
CNTRL
THRML_PAD
VDD SW
AGNDPGND
FB
VOUT
ININ
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Left ALS circuit has 1K series-R
Left ALS Filter
Keyboard LED Driver
NC
NC
Right ALS Circuit
RTALS_OP_IN and RTALS_OP_COMP need to be matchedCRITICAL
SOT23-6-LFMAX4236EUTT
U6405
3
4
1
5
6
2
0.1UF10V20%
402CERM
C6405 1
2
1/16W5%
402MF-LF
120KR64061
2
6.3V20%
402X5R
0.22UFC6406 1
2
1/16W1%
402MF-LF
15.0KR64071
2
1/16W1%
402MF-LF
1KR64081
2
1K
1/16W1%
402MF-LF
R64011 2
CRITICAL
TH
BS520EOFPD6400
1
2
1/16W5%
402MF-LF
5.1MR64001
2 402
16V20%
CERM
0.01UFC64001
2
SOT23-LF2N7002Q6408
3
1
2
1/16W1%
402MF-LF
4.53KR64101 2
402
6.3V20%
X5R
0.22UFC64101
2
CRITICAL
LLPMM3120U6450
2
3
46
5
7
9
1
8
CRITICAL
3.8x3.8x1.5MM
22uHL6450
1 2
6.3V10%
402CERM
1uFC6450 1
21/16W5%
402MF-LF
10K
KBDLED_NOT
R64511
2
402
10K
KBDLED_HAS
1/16W5%
MF-LF
R64521
2603X5R25V20%0.22uFC64551
2 MF-LF1/8W1%
805
25.5R64551
2
0.22UF
X5R402
20%6.3V
C64301
2
3.48K
MF-LF402
1%1/16W
R64301 2
03001051-7164
8757
ALS SupportSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
RTALS_GAIN
RTALS_OP_COMP
PP3V3_S3
ALS_RT_OUT ALS_RIGHT
GND_SMC_AVSS
RTALS_OP_INRTALS_PHOTODIODE
RTALS_GAIN_L
SMC_SYS_KBDLED
PP3V3_S0
KBDLED_RETURN
KBDLED_ANODE
KBDLED_SWPP5V_S0
GND_SMC_AVSS
LTALS_OUT ALS_LEFT
82D5 82C6 82B3 82A4
79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6 66B5
66B1 65D6 65B3 62A6 61D8 61A5 60D4 60C7 58C7
58C4 54D4 54B5 52D3 49C7 49C4 49B5 40B6 36D6 34A8
33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3
26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8
81D4
25B4
81A5
25A4
81B3
67C5
24D3
80B5
67C3
24C3
80A1
66C6
24B5
79B8
65D1
24B3
71A6
63B7
23D5
67B3
60C2
23B3
67B1
59C6
22B5
67A1
52B1
21D3
66B5
46D6
57C6
21C3
62B1
57C2
46C3
55D6
20B4
61D7
55D6
46B3
55C6
20A4
58C7
55C6
41C5
55C1
19C7
58C4
55C1
37D7
55B7
19C6
55A8
55B7
37D5
55B5
17C6
53C4
55B5
37C3
55B3
14D6
36D6
55B3
37A7
55B1
14C7
31C5
55B1
32C5
52B6
10C5
25D8
52B6
27C5
51C4
5D4
5D4
51C4
48C3
6D4
5D4
51A7
51B2
51C7
5A4
81C3
81C3
5D2
51B2
5C1 51A7
www.vinafix.vn
G
S D
G
S D
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
NC
Right Fan
NC
NC
Left Fan
518S0369 518S0369
1/16W5%
MF-LF402
47KR65501
2
47K
402MF-LF1/16W5%
R65551 2
47K5%
1/16WMF-LF402
R65601
2
5%1/16WMF-LF402
47KR65651 2
100K
1/16W5%
MF-LF402
R65511
2
M-RT-SMSM04B-ACH
CRITICAL
J6550
5
6
1
2
3
4
SM04B-ACH
CRITICAL
M-RT-SM
J6560
5
6
1
2
3
4
SOT-3632N7002DW-X-FQ6560
3
5
4
402MF-LF
5%1/16W
100KR65611
22N7002DW-X-FSOT-363
Q6560
6
2
1
58 87
051-7164 03001
Fan ConnectorsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
FAN_LT_PWM
SMC_FAN_0_TACH FAN_RT_TACH
FAN_RT_PWM
PP5V_S0PP5V_S0
FAN_LT_TACH
PP3V3_S0 PP3V3_S0
SMC_FAN_0_CTL SMC_FAN_1_CTL
SMC_FAN_1_TACH
82D5 82D5 82C6 82C6 82B3 82B3 82A4 82A4 79D3 79D3 79A8 79A8 71D2 71D2 67C5 67C5 67C3 67C3 67B3 67B3 67A3 67A3 66B6 66B6 66B5 66B5 66B1 66B1 65D6 65D6 65B3 65B3 62A6 62A6 61D8 61D8 61A5 61A5 60D4 60D4 60C7 60C7 58C4 58C7 57B6 57B6 54D4 54D4 54B5 54B5 52D3 52D3 49C7 49C7 49C4 49C4 49B5 49B5 40B6 40B6 36D6 36D6 34A8 34A8 33D8 33D8 33D3 33D3 33C7 33C7 29A6 29A6 29A3 29A3 28A6 28A6 27D8 27D8 27D5 27D5 27D3 27D3 27C3 27C3
26D1 26D1 26B8 26B8 26B6 26B6 26B4 26B4 25D8 25D8 25D3 25D3 25C6 25C6 25C4 25C4 25B8 25B8 25B4 25B4
81B3 81B3
25A4 25A4
80B5 80B5
24D3 24D3
80A1 80A1
24C3 24C3
79B8 79B8
24B5 24B5
71A6 71A6
24B3 24B3
67B3 67B3
23D5 23D5
67B1 67B1
23B3 23B3
67A1 67A1
22B5 22B5
66B5 66B5
21D3 21D3
62B1 62B1
21C3 21C3
61D7 61D7
20B4 20B4
58C7 58C4
20A4 20A4
57B5 57B5
19C7 19C7
55A8 55A8
19C6 19C6
53C4 53C4
17C6 17C6
36D6 36D6
14D6 14D6
31C5 31C5
14C7 14C7
25D8 25D8
10C5 10C5
5D4 5D4
5D4 5D4
5D2
51B7 5D2
5D2
5D2 5D2
5D2
5A4 5A4
51B7 51B7
51B7
www.vinafix.vn
CS*
SCL/SCLKADDR/SDI
MOT_ENABLEENABLE
VDD
XYZ
FF/MOTSDA/SDO
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
APN:338S0354
placed on board bottom-side:placed on board top-side:
1
Desired orientation when Desired orientation when
+X
+Z (dn)
+Y
Top-through ViewPackage Top
1
+Z (up)
+X
+Y
M59 placement: Bottom-side
0.1uF
CERM402
20%10V
C66201
2
10V20%
402X7R
0.033UFC66051
210V20%
402X7R
0.033UFC66061
2
LGA
CRITICAL
KXPS5-2050U6620
32
6
11
10
12
54
1 13
14
789
10K
MF-LF402
5%1/16W
R66201
2
0.033UF
X7R402
20%10V
C66041
2
59 87
03001051-7164
Sudden Motion Sensor (SMS)SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
SMS_ONOFF_L
PP3V3_S3
SMS_X_AXISSMS_Y_AXISSMS_Z_AXIS
TP_SMS_FF
81D4
81A5 67C5 67C3 66C6 65D1 63B7 60C2 57D4 52B1 46D6 46C3 46B3 41C5 37D7 37D5 37C3 37A7 32C5 27C5
51A5
5D4
51B7
51B7
51A7
www.vinafix.vn
IN
IO
IO
IO LAD1
LAD2
LCLK
LFRAME*
LRESET*LPCPD*
SERRIRQ
LAD0
CLKRUN/GPIO*
PP/GPIO
GPIO_EXPRESS_00
GPIO/SM_DATGPIO/SM_CLK
XTALI/32K_IN
TESTBI/BADD/GPIO
TESTI
3V0
3V1
3V2
3VSB
VNC
VBAT
XTALO
GND2
GND3
GND0
GND1
LAD3
IO
IO
IN
IN
IO
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(INT PD)
GND
NC
NC
VDD
VDD
VDD
NC
PP
GPIO
CLKRUN*
NC
NC
NC
BASE ADDR = 0X2E/2F
LAYOUT NOTE:PLACE WHERE ACCESSIBLE
LAYOUT NOTE:PLACE R6702-03 WHERE ACCESSIBLE
NOTE: SINCE CURRENT OF VSB IS NOT YET ON SPEC,1/8W (R6704/R6705) IS USED FOR NOW
TESTBI/BADDGPIO2
BASE ADDR = 0X4E/4F
VSB
TPM
402X5R16V10%0.1UFC67001
2
TPM
0.1UF
402X5R16V10%
C67011
2
TPM
0.1UF10%16VX5R402
C67021
2
TPM
0.1UF10%16VX5R402
C67031
2
NOSTUFF
05%1/16WMF-LF402
R67001
2
TPMTSSOP
OMIT
U6700 10
1924
5
15
4
11
18
25
2
16
26
2320
17
21
22
28
16
7
27
98
12
3
13
14
TPM
MF-LF1/16W5%10K
402
R67021
2
NOSTUFF
5%1/16WMF-LF
10K
402
R67031
2
TPM
805MF-LF1/8W5%
0R67041 2
NOSTUFF
805MF-LF1/8W5%0R67051
2
TPM
0
5%
MF-LF1/16W
402
R67981 2
MF-LF
5%
0
NOSTUFF
1/16W
402
R67991 2
SYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
TPM
051-7164 03001
60 87
LPC_AD<1>LPC_AD<2>
PCI_CLK_TPMLPC_FRAME_L
TPM_RST_L
PM_SUS_STAT_LINT_SERIRQ
LPC_AD<0>
PM_CLKRUN_L
TPM_PPTPM_GPIO1
TPM_GPIO2
TPM_XTALI
TPM_BADD
PP3V3_S0
PP3V3_TPM_3VSBVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM
TPM_XTALO
LPC_AD<3>PP3V3_S3
PP3V3_S0
TPM_LRESET_L
SMC_TPM_RESET_L
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60C7
60D4
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
25D8
25D3
25D3
25C6
25C6
25C4
25C4
25B8
25B8
25B4
81D4
25B4
25A4
81A5
25A4
24D3
67C5
24D3
24C3
67C3
24C3
24B5
66C6
24B5
24B3
65D1
24B3
23D5
63B7
23D5
23B3
59C6
23B3
22B5
57D4
22B5
21D3
52B1
21D3
21C3
46D6
21C3
20B4
46C3
20B4
20A4
46B3
20A4
19C7
41C5
19C7
19C6
37D7
19C6
17C6
37D5
17C6
53B5
14D6
37C3
14D6
53C4
53C5
53C4
52A2
53C5
53C4
53C4
14C7
53C5
37A7
14C7
51D7
51C7
51C7
51C5
51C7
51D7
51C5
10C5
51C7
32C5
10C5
21D4
21D4
21C5
23C5
23C8
21D4
23C8
5D4
21D4
27C5
5D4
26B1
5C2
5C2
34D6
5C2
5C2
5C2
5D2
5C2
52B3
52C3
52C3
35C5
5A4
35D5
5C2
5D4
5A4
5C4
52B2
www.vinafix.vn
IN
IN
IN
IN
OUT
IN
OUT
OUT
V-
V++
-
NC
VW
COMP
FB
FB2
RBIAS
VR_TT*
NTC
VR_ON
PGOOD
CLK_EN*
PGD_IN
PSI*
RTN
VSEN
DFB
DROOP
VO
OCSET
VSUM
ISEN2
VID0
VID1
VID3
VID2
VID4
VID5
VID6
PGND2
VIN VDD PVCC
LGATE2
PHASE2
UGATE2
ISEN1
PGND1
LGATE1
UGATE1
PHASE1
BOOT1
BOOT2
3V3
DPRSTP*
VDIFF
SOFT
DPRSLPVR
TPADGND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
<Ra + Rb>
Vout = Gain * ((2.1 mV/A * Iload) + Voffset)
(IMVP6_VO)
(IMVP6_PHASE2)
(IMVP6_ISEN1)
These caps for Q7500 These caps for Q7550
0 1 0 1-Phase CCM
0 1 1 2-Phase CCM
(IMVP6_NTC)
CPU VCore Current Sense
<Rc>
Vout @ 36A = 2.44V-2.60V
Gain = Rc / (Ra + Rb)
Voffset worst-case ~2.3mV (+/- ~1A offset)
Voffset = (Vdrp_offset * Kdroop) + Vamp_offset <Rc>
(IMVP6_VO)
(IMVP6_VSUM)
<Ra>
(IMVP6_ISEN2)
<Rb>
(IMVP6_VW)
(GND)
(GND_IMVP6_SGND)
(IMVP6_COMP)
DPRSLPVR DPRSTP* PSI* Operation Mode
1 0 1 1-Phase DCM
36A max output
(Inductors limit)
Vout = Variable
(IMVP6_PHASE2)
1 1 0 1-Phase DCM
(GND)
(GND_IMVP6_SGND)
(IMVP6_FB)
402CERM
NO STUFF
10%0.0022UF50V
C75011
2
NO STUFF
CERM402
50V10%0.0022UFC75021
2
402
10K
MF-LF1/16W1%
R75051 2
0.22UF
20%
X5R6.3V
402
C7505
1 2
603
1/10W1%
MF-LF
3.65KR75061
2
147K1%1/16W
402MF-LF
R75321
2
10%
402
0.015uF16VX7R
C7532 1
2
0.1uF10%
402X5R16V
C7531 1
2
1.82K
402
1%1/16WMF-LF
R75351
2
4.42K
402
1%
MF-LF1/16W
R75371
2
5%
CERM50V
47pF
402
C7537 1
2
107K
1/16W
402MF-LF
1%
R75341
2
470pF
CERM402
10%50V
C7535 1
2
25VX5R603
0.22uF20%
C75001
2603X5R25V
0.22uF20%
C7550 1
2
402
1/16W1%
MF-LF
13.7KR75421
2
1/16W1%
402MF-LF
3.01KR75401 2
402MF-LF
1K1%1/16W
R75411
2
180pF5%
402CERM50V
C7540 1
2
499
1%1/16W
402MF-LF
R75451 2
5C4 7B3 21C4
5B4 14B7 23C3 87C6
7A3
5C4 65B8 66B2 66B3 66B5
26A7 26A8 33A4
5C4 51D7
5A4 14B6 26B5
10K
402
1%
MF-LF1/16W
R75551 2
20%6.3VX5R402
0.22UFC7555
1 2
1/10W
603
3.65K1%
MF-LF
R75561
20.0022UF
CERM
10%50V
402
NO STUFFC75521
2402CERM
0.0022UF10%50V
NO STUFFC75511
2
1uF10%
402
6.3VCERM
C7530 1
2
1/16W5%
10
402MF-LF
R75301 2
402
1%2.0K
NO STUFF
MF-LF1/16W
R75361
2
3011%1/16W
402MF-LF
R75331
2
820pF
CERM402
10%50V
C7533 1
2
6.3V
402
0.22uF
X5R
20%
C7544 1
2
402
11K
1/16W1%
MF-LF
R75431
2
MF-LF1/16W1%
30.1K
402
R75931 2
30.1K
1%
402
1/16WMF-LF
R75911 2
X5R
10%1uF16V
603
C7528 1
2
4.7uF
CERM6.3V20%
603
C75291
2
MF-LF402
1/16W
10
5%
R75311 2
1/16W5%
10
402MF-LF
R75281 2
CERM16V10%
0.01uF
402
C7546 1
2
402
1/16W1%
4.02K
MF-LF
R75471
2
402MF-LF1/16W1%499R75441
2
20%6.3VX5R402
0.22UFC7541 1
2
10%
CERM402
0.0068uF25V
C7580 1
2
NO STUFF
0.001uF50V10%
402CERM
C7542 1
2
402
1%1/16WMF-LF
5.23KR75481
2
0.01uF10%16VCERM402
C75431
2
402
5%1
1/16WMF-LF
R75071
2
402
1
MF-LF1/16W
5%
R75571
2
NO STUFF
CERM
10%16V
0.01uF
402
C75811
2
402CERM
0.01uF16V10%
C7582 1
2
1/16WMF-LF
5%
402
0R75811 2
5%1/16WMF-LF402
0R75821 2
MF-LF1/16W1%
1M
402
R75981 2
1/16W
402MF-LF
1M
1%
R75921 2
55B8
1uF
402
10%6.3VCERM
C7595 1
2
CRITICAL
10KOHM-5%0603-LF
R7549
1
2
10%
402CERM50V
470pFC7598
1 2
10%50VCERM
470pF
402
C7592
1 2
CERM50V10%
402
820pFC75341
2
CRITICAL
470K402
R7546
1
2
CRITICAL
0.36uH-30A-1.2M-OHM
SM-IHLP
L7505
1 2
CRITICAL
SM-IHLP
0.36UH-30A-1.2M-OHML7555
1 2
MF-LF402
0
5%1/16W
R75941 2
402CERM10V20%
NO STUFF
0.1uFC75941
2
SMXW7530
12
603
10%1uF16VX5R
C75111
2
CRITICAL
16V20%33uF
POLYCASED2E-SM
C75101
2
10%1uF16VX5R603
C75611
2
CRITICAL
CASED2E-SM
20%33uF
16VPOLY
C75601
2
RJK0305DPBLFPAK
CRITICALQ7500
5
4
1 2 3
LFPAKRJK0305DPB
CRITICALQ7550
5
4
1 2 3
RJK0301DPB
CRITICAL
LFPAK
Q7501
5
4
1 2 3
CRITICAL
RJK0301DPBLFPAK
Q7502
5
4
1 2 3
LFPAKRJK0301DPB
CRITICALQ7551
5
4
1 2 3 LFPAKRJK0301DPB
CRITICALQ7552
5
4
1 2 3
CRITICAL
16V20%33uF
POLYCASED2E-SM
C75151
2
CRITICAL
HPA00141AIDCKRSC70-5
U75951
3
4
2
5
OMIT
QFNISL9504CRZU7530
48
36
26
47
10
17
45
46
16
11
12
21
24
23
32
30
25
6
8
3
33
291
34
28
2
31
4
15
7
49
35
27
22
13
37
38
39
40
41
42
43
20
18
44
5
14
19
9
051-7164 03001
61 87
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
IMVP6 CPU VCore Regulator
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
VOLTAGE=12V
PPVIN_S0_IMVP6_R
MIN_NECK_WIDTH=0.25 mmVOLTAGE=5V
MIN_LINE_WIDTH=0.25 mmPP5V_S0_IMVP6_VDD
PP5V_S0
IMVP6_VID<4>
GND_IMVP6_SGND
IMVP6_VID<5>
MIN_LINE_WIDTH=0.25 mmPP3V3_S0_IMVP6_R
MIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V
IMVP6_VID<6>PM_DPRSLPVR
IMVP6_VWIMVP6_COMPIMVP6_FBIMVP6_FB2
IMVP6_RBIAS
IMVP6_VR_TTIMVP6_NTC
IMVP_VR_ONVR_PWRGOOD_DELAY
VR_PWRGD_CK410_L
P1V5P1V05S0_PGOODCPU_PSI_L
IMVP6_VSEN_NIMVP6_VSEN_P
IMVP6_DFB
IMVP6_DROOPIMVP6_VOIMVP6_OCSETIMVP6_VSUM
IMVP6_ISEN2
IMVP6_VID<0>IMVP6_VID<1>
IMVP6_VID<3>IMVP6_VID<2>
IMVP6_LGATE2 MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
IMVP6_PHASE2MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
IMVP6_UGATE2MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
IMVP6_ISEN1
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
IMVP6_LGATE1
MIN_NECK_WIDTH=0.25 mmIMVP6_UGATE1MIN_LINE_WIDTH=0.5 mm
IMVP6_PHASE1MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
IMVP6_BOOT1IMVP6_BOOT2
CPU_DPRSTP_L
IMVP6_VDIFF
IMVP6_SOFT
IMVP_DPRSLPVR
IMVP6_COMP_RC
PPBUS_G3H
PPVCORE_S0_CPU
IMVP6_NTC_R
PP3V3_S0
PPBUS_G3H
CPUISENS_NEG_RC
CPU_VCCSENSE_N
CPU_VCCSENSE_P
IMVP6_VO_R
IMVP6_VDIFF_RC
PP3V3_S0
CPUVCORE_IOUT
CPUISENS_POS IMVP6_DROOP
CPUISENS_NEG
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61A5
61D8
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
25D8
25D3
25D3
25C6
25C6
25C4
25C4
25B8
25B8
25B4
25B4
81B3
25A4
25A4
80B5
24D3
24D3
80A1
79B7
24C3
79B7
24C3
79B8
71D7
24B5
71D7
24B5
71A6
69C1
24B3
69C1
24B3
67B3
68D5
23D5
68D5
23D5
67B1
67C3
23B3
67C3
23B3
67A1
67C1
22B5
67C1
22B5
66B5
65D6
21D3
65D6
21D3
62B1
65B7
21C3
65B7
21C3
58C7
64D7
20B4
64D7
20B4
58C4
64A6
20A4
64A6
20A4
57B5
62D7
67D3
19C7
62D7
19C7
55A8
61D7
67D1
19C6
61D4
19C6
53C4
55D3
55D7
17C6
55D3
17C6
36D6
43D8
55A6
14D6
43D8
14D6
31C5
42B8
9D7
14C7
42B8
14C7
25D8
41C6
8D7
10C5
41C6
10C5
5D4
9C1
9C1
9C1
9C1
9C1
9C1
9C1
87C6
5C4
8B5
5D4
5C4
87B6
87B6
5D4
5D2
5C4
5C4
5C4
5D7
87B6
87B6
61A2
5C4
5C4
5C4
5C4
5C4
5A1
5B2
5A4
5A1
8B6
8B6
5A4
61C6
www.vinafix.vn
NC4NC3
NC2
NC1
EXTVCC
FCB
INTVCC
PGOOD
3_3VOUT
RUN_SS2
ITH2
RUN_SS1
ITH1
SW1
TG1
BOOST1
BG1
PLLIN
SENSE1+
SENSE1-
VOSENSE1
BOOST2
TG2
BG2
SW2
PLLFLTR
SENSE2+
VOSENSE2
SENSE2-
THRML_PAD
SGND
PGND
VIN
D
S
G
D
S
G
D
S
G
R1-
R1+ R2
V-V+
+
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(Q7621 limit)
11.5A max output
PLACE C7675 NEAR U7670 PIN 7
Placement Note:
5V S3 FET
5V S0 FET
Vout = 0.8V * (1 + Ra / Rb)
NC
NC
NC
NOTE: Be aware of pull-ups to VIN on these signals.
<Rb>
If unconnected, powers up with VIN.
(L7660 & Q7660 limit)
8A max output
Vout = 1.49V
<Rb>
<Ra>
NCNCNC
Vout = 4.98V
<Ra>
Connect to RUNSS pins to control outputs.
SOD-323
CMDSH-3
CRITICALD7624
1
2
6.3V10%
402CERM
1uFC7605 1
2
CERM
0.01uF
402
10%16V
C76071
2
1M
402
5%1/16WMF-LF
R76301
2
10V
402
0.1uF20%
CERM
C76301
2
CERM402
10%50V
470pFC7625 1
2CERM
47pF
402
5%50V
C76261
2
5%
MF-LF1/16W
402
10R76001
2
16V
1uF
603X5R
10%
C76001
2
CRITICAL
QFNLTC3728LXCU7600
7
18
17
21
4
20
5 8
10
16
29
32
19
27
2
28 13
30 12
11
6
15
26 14
33
1 9
SOD-323
CMDSH-3
CRITICALD7664
1
2
0.1uF
CERM402
20%10V
C7670 1
2
402
50VCERM
10%470pFC76651
250V5%
402CERM
100pFC7666 1
2
1/16W5%
402MF-LF
10KR76651
2
10%
402
0.001uF50VCERM
C76621
2
1%
MF-LF402
1/16W
52.3KR76271
2
NO STUFF
10%1000pF
X7R402
25V
C76281
2
1%
402MF-LF1/16W
10KR76281
2
CRITICAL
2.2uH-14A
IHLP2525CZ-SM
L7660
1 2
39.2K
MF-LF1/16W1%
402
R76681
2
1000pF
X7R402
10%25V
NO STUFFC7668 1
2
402MF-LF
1%1/16W
34.0KR76671
2
470pF
CERM402
10%50V
C7667 1
2
1M
402
5%1/16WMF-LF
R76701
2
CERM
1uF10%6.3V
402
C76021
2
CERM
4.7uF20%
6.3V
603
C7601 1
2 1/16W5%
402MF-LF
30KR76031
2
1/16W5%
402MF-LF
10KR76041
2
0.01uF16V10%
402CERM
C76041
2
603X5R16V
1uF10%
C76411
2
5%0
1/16W
402MF-LF
R76641
2
1/16W5%
402
0
MF-LF
R76241
2
25V
1000pF
402X7R
10%
NO STUFFC7661 1
2
0.1uF20%10VCERM402
C7664 1
2
22UF20%6.3VCERM805
C76901
2
22UF20%6.3VCERM805
C7691 1
2
402CERM10V20%0.1uFC76241
2
10%25VX7R402
1000pF
NO STUFFC76211
2
0.001uF
402
50VCERM
10%
C7622 1
2
CASE-C3
150UF20%
CRITICAL
POLY6.3V
C7652 1
2805CERM6.3V
22UF20%
C7650 1
2
6.3V20%22UF
805CERM
C76511
2
P5VP1V5_SKIP
0
MF-LF402
5%1/16W
R76061
2
1/16W5%
402MF-LF
0
P5VP1V5_CONT
R76071
2
SMXW7600
1 2
0.1uF10%
402X5R16V
C7620 1
2
402X5R16V10%0.1uFC76231
2
4.02K
1/16WMF-LF402
1%
R76231
2
0.1uF
402X5R16V10%
C76601
2
3.65K
MF-LF1/16W
402
1%
R76601
2
0.1uF10%16VX5R402
C7663 1
21/16WMF-LF402
9091%
R76631
2
2.5V
CASE-D2E-LF
330UF
CRITICAL
POLY
20%
C76921
2CRITICAL
SO-8
IRF7832ZQ7661
5 6 7 8
4
1 2 3
1.21K1%
402
1/16WMF-LF
R76691
2
23.7K
402
1/16WMF-LF
1%
R76291
2
22UF
805CERM6.3V20%
C76171
2
22UF
805CERM6.3V20%
C7616 1
2
10%50VCERM402
0.0022uFC76151
2
402MF-LF1/16W5%
100KR76151 2
CRITICAL
SM-LFFDC638PQ7610
1
2
5
6
3
4
50V10%
CERM402
0.0022uFC7610
1 2
100K
402
5%1/16WMF-LF
R76101 2
FDM6296MICROFET3X3
CRITICAL
Q7621
5
4
123
CRITICAL
FDM6296MICROFET3X3
Q7620
5
4
123
CRITICAL
FDM6296MICROFET3X3
Q7660
5
4
1 2 3
CRITICAL
33uF20%16VPOLYCASED2E-SM
C76401
2
603X5R16V10%1uF
C7681 1
2
CRITICAL
16V20%
33uF
POLYCASED2E-SM
C7680 1
2
CRITICAL
2.0UH
SM-IHLP
L7620
1 2
CRITICAL
TSSOPIRF7707PBFQ7615
1 5 8
4
2 3 6 7
101%1/16WMF-LF402
R7671
1 2
X5R402
0.1UF
16V10%
C7675 1
2
402CERM50V10%0.001UFC76741
2
CRITICAL
MSOPINA326EA-250U76703
2
6
1
8
5
4
7
MF-LF4021/16W1%100KR76741
2
6.3VCERM20%
805
22UFC76711
2CERM805
6.3V20%22UFC76721
21206MF-LF1/4W1%0.002R7675
1 2
2.0K1%1/16WMF-LF402
R76721
2
1/16WMF-LF402
1%4.53KR76201
2
402
1/16W5%
MF-LF
33KR76251
2
402
50VCERM
5%47PFC76271
2
5V / 1.5V Power Supply
62 87
03001051-7164
SYNC_DATE=08/08/2006SYNC_MASTER=M59_MLB
PP1V5_S0 NB1V5_ISENSE_VCC
NB1V5_ISENSE_R2
P1V5S0_NB_IOUT
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmP1V5S0_SW
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmP1V5S0_BG
P1V5S0_ITH_RC
PP5V_S5_P5VP1V5_INTVCC PP5V_S5_P5VP1V5_INTVCC
P5VP1V5_FSEL
PPBUS_G3H
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmP5VS5_BOOST_RC P1V5S0_BOOST_RC
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
PP1V5_S0
PP5V_S5
PM_SLP_S3_LS5V
PP5V_S5 PP5V_S3
P5VS3_EN_L_RCPM_SLP_S4_LS5V
PP3V3_S0
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
P1V5S0_SNS_R_N
P1V5S0_VOSNS
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P1V5S0_SNS_R_P
P5VP1V5_FSEL
P1V5S0_TG MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmP1V5S0_BOOST
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P5VS5_SNS_N
P5VS5_BGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm P5VS5_BOOSTMIN_LINE_WIDTH=0.6 mm
PPVIN_S5_P5VP1V5_R
MIN_NECK_WIDTH=0.25 mmVOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm P5VS5_TG
P5VS5_ITH
P5VS5_RUNSS
P1V5S0_ITH
P1V5S0_RUNSS
TP_P5V_P1V5_PGOOD
PP5V_S5_P5VP1V5_INTVCC
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmVOLTAGE=5V
P5VP1V5_FCB
PP5V_S5
PP1V5_S0_NB
PP5V_S0
NB1V5_ISENSE_R1_P
NB1V5_ISENSE_R1_N
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm P5VS5_SW
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
P5VS5_SNS_P
GND_P5VP1V5_SGND
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=0VMIN_LINE_WIDTH=0.6 mm
P5VS5_ITH_RC
P5VS5_VOSNS
PP5V_S5
P5VS0_EN_L_RC
82D5
82C6 82B3 82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3
66B6 66B5 66B1 65D6 65B3 61D8 61A5 60D4 60C7 58C7
58C4 57B6 54D4 54B5 52D3 49C7 49C4 49B5 40B6 36D6
34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3
27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8
25B4 25A4
67C8
81B3
67C8
67C8
24D3
67C6
80B5
67C6
79B7
67C6
24C3
67B6
80A1
66C5
71D7
66C5
24B5
19D7
79B8
62C1
69C1
62A8
71D7
71D7
24B3
71D7
19D6
71A6
71D7
48B6
68D5
48B6
67C3
67C3
23D5
67C3
19D5
67B3
67C3
25D6
67C3
25D6
67C1
67C1
23B3
67C1
19D2
67B1
67C1
25C8
67C1
25C8
67B1
67B1
22B5
67B1
19D1
67A1
67B1
25C6
65D6
25C6
66D8
66D8
21D3
66D8
19C5
66B5
66D8
25C2
65B7
25C2
66B8
66B8
21C3
66B8
19C4
61D7
66B8
25B6
64D7
25B6
65D6
65D6
20B4
65D6
19C1
58C7
65D6
25B2
64A6
25B2
65B7
65B7
20A4
65B7
19B8
58C4
65B7
25A8
61D7
25A8
64C8
64C8 81C6
19C7
64C8
19B5
57B5
64C8
24B5
61D4
24B5
62C8
62C8 81C4
19C6
62C8
19A5
55A8
62B6
24A5
55D3
24A5
62B6
66C7
62B6 67B3
17C6
62B2
17C6
53C4
62B2
24A3
43D8
24A3
62A4
66C6
62B2 67B1
14D6
62A4
17B6
36D6
62A4
9B7
42B8
9B7
52B5
48C3
52B5 52B8
14C7
52B5
16D1
31C5
52B5
8B7
41C6
8B7
47C7
6A2
47C7 45C3
66B7
10C5
47C7
13D2
25D8
47C7
5D4
62D3 62D6
5C4
5D4
25C8
6A1
25C8 5D4
66B6
5D4
66C2
62D6
25C8
13C5
5D4
25C8
5D1
55B5
62B3 62B3
62C4
5A1
5D1
5D4
5C1
5D4 5B2
65D3
5A4
62B3
66C1
62D3
5D4
5D4
5D2
5D4
www.vinafix.vn
SW
SGND PGND PADTHERM
SVIN PVIN
PGOOD
VFB
ITHSYNC/MODE
RUN/SSRT
THRM_PAD
PVINAVIN
PGMODE
OVT FB
AGND PGND
SWEN
D
S
G
D
S
G
D
S
G
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1.2V D3Cold FET
(U7700 limit)
1.5A max output
Vout = 2.50V 2.5V D3Cold FET
<Rb>
<Ra>
2.5V S3 Regulator
Continuous
Burst
NOTE: Be aware of pull-up on this signal.
Connect RUNSS off-page to controlIf unconnected, powers up with PVIN.
Vout = 0.8V * (1 + Ra / (Rb + Rc))
<Rc>
<Rb>
<Ra>
Vout = 0.6V * (1 + Ra / Rb)
2.5V S0 FET
Vout = 1.205V
(Switcher limit)
2.5A max output
1.2V S3 Regulator
CRITICAL
2.2uH-1.9A-23M-OHM
SM-MSS5131
L7700
1 2
10pF50V
402CERM
5%
C7706 1
2
1/16W1%634K
MF-LF402
R77071
2
MF-LF402
1%1/16W
200KR77081
2
6.3V20%22UF
CERM805
C77091
2
402
10%
X5R16V
0.1uFC77011
2
1/16W5%
402MF-LF
1R77001 2
CERM6.3V20%
805
22UFC77561
2
6.3V20%
805CERM
22UFC7755 1
2
6.3V20%
805CERM
22UFC77521
2
20%6.3VCERM
22UF
805
C7751 1
2
22pF
CERM402
5%50V
C77501
2
47.0K
MF-LF402
1%1/16W
R77501
2
61.9K
1/16W1%
402MF-LF
R77511
2
1.0UH-3.48A
CRITICAL
SM-LF
L7750
1 2
30.9K
1/16W1%
402MF-LF
R77521
2
LTC3412TSSOP-LF
CRITICAL
U7750
3
12
13
2
9 16
5
7
8
110
11
14
15
6
17
4
SMXW7750
1 2
1/16W1%
402MF-LF
309KR77541
2
10%
402CERM
470pF50V
C7757 1
2
NO STUFF
0
MF-LF402
5%1/16W
R77551
2MF-LF402
5%1/16W
1MR77571
2
1/16W5%
402MF-LF
0R77561
2
22pF50V5%
402CERM
C7754 1
2
8.25K
1/16W1%
402MF-LF
R77531
2
0.0022uF50V10%
402CERM
C77531
2
402CERM
10%0.0022uF
50V
C7720 1
2
100K
MF-LF1/16W5%
402
R77201 2
CERM402
50V10%
0.0022uFC7770 1
2
402MF-LF1/16W5%
100KR77701 2
22uF
CERM805
20%6.3V
C7700 1
2
CRITICAL
BQATPS62510U7700
39
6
4
7
5
8
210
1
11
SOT23FDC637ANQ7720
1
2
5
6 3
4
SOT23FDC637ANQ7721
1
2
5
6 3
4402CERM
10%0.0022uF
50V
C7721 1
2
100K
MF-LF1/16W5%
402
R77211 2
22UF
805
20%6.3VCERM
C77591
2
22UF
CERM805
20%6.3V
C7758 1
2
CRITICAL
FDC637ANSOT23
Q77701
2
5
6 3
4
8763
051-7164 03001
2.5V & 1.2V RegulatorsSYNC_MASTER=M59_MLB SYNC_DATE=08/08/2006
PPVIN_S3_P2V5S3_SVIN
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3V
PP3V3_S5
PP1V2_S3
P1V2R2V5D3C_EN_LS5V
PP2V5_S3
P2V5D3C_EN_RC
PP2V5_D3C
PP2V5_S0
P2V5S0_EN_RC
PP2V5_S3
PM_SLP_S3_LS5V_L
P2V5S3_P1V2S3_PGOOD
P1V2S3_VFB
P1V2S3_SWMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P2V5S3_P1V2S3_PGOOD
P1V2R2V5D3C_EN_LS5V
GND_P1V2S3_SGNDVOLTAGE=0VMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
P1V2S3_ITHP1V2S3_MODE
P1V2S3_RUNSS
P1V2S3_ITH_RC
P1V2S3_VFB_DIV
P1V2S3_RT
PP3V3_S3
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
P2V5S3_SW PP2V5_S3PM_SLP_S3BATT_L
PP1V2_S3PP1V2_D3C
P1V2D3C_EN_RC
P2V5S3_VFB
79D5 67D5 67D3 67C3 66C5 65D8
81D4
65D2
81A5
65D1
67C5
65C8
67C3
56D4
66C6
26C5
65D1
25D2
60C2
25C8
82D3
59C6
25B6
82C5
57D4
24C3
67B6
52B1
24B3
67A8
46D6
24A5
67A6
46C3
23D8
66B5
46B3
23D4
19D7
41C5
82D7
23D1
67D8
82D7
19C5
37D7
67D8 77B8
23B7
67D6
67B8 78C8
19A8 67B8
37D5
67B8
67D6 70C7
23A7
63B3
71C8
67B6 77C6
19A6 67B6
71C8
37C3
67B6
63B3 70A1
22D8
39D7
66D8
63D4 77A8
19A4 63D4
66D8
37A7
63D3
39D7 67D8
22C6
39A8
66D7
63D3 67A8
17D6 63C3
66D7
32C5
63C3
39A8 67D6
11B5
5D4
66D4
39D3 67A6
17C6 39D3
66D5
66B8
66B8
66D4
41C4
27C5
39D3 41C4
5D4 67C6
41C3
5D4
5A4
63B3
5A4 5D4
5D4 5A4
66D4
63B5
63C8
63C3
5D7
5D7
5D4
5A4 41C3
5A4 5D4
www.vinafix.vn
G
SD
V5DRV
LL
VOUT
PGOODVFB
TRIP
DRVLDRVH
TONEN_PSV
VBST
THRM_PAD GND PGND
V5FILT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
<Ra> Vout = 1.825V
1.8V D3Cold FET
(P1V8S3_FB)
<Rb>
18A max output
(L7820 limit)
Vout = 0.75V * (1 + Ra / Rb)
POLYCASE-D2E-LF
20%330UF
2.5V
C7842 1
2
21K
MF-LF
1%
402
1/16W
R78211
2
1/16W
402MF-LF
15K5%
R78221
2
X5R16V
603
10%1uF
C7802 1
2
805
6.3VCERM
22UF20%
C78411
2POLY
20%
CASE-D2E-LF
330UF
2.5V
C78431
2
20%
CERM805
6.3V
22UFC78471
2CERM
22UF
805
6.3V20%
C7846 1
2
402CERM50V10%0.0022uFC78451
2
5%1/16WMF-LF402
0R78451 2
5%47PF
402CERM50V
C7820 1
2
402MF-LF1/16W
5%470K
R78461
2
FDM6296MICROFET3X3
CRITICAL
Q7845
5
4
1
2
3
X5R16V
603
10%1uFC78311
2
CASED2E-SMPOLY16V20%33uFC78301
2
1uF10%
603
16VX5R
C78321
2
CRITICAL
LFPAKRJK0305DPBQ7820
5
4
1 2 3
CRITICAL
RJK0303DPBLFPAK
Q7822
5
4
1 2 3
CRITICAL
RJK0303DPBLFPAK
Q7821
5
4
1 2 3
1.2UH
FDA1055
CRITICALL7820
1 2
6.3V
603
4.7UF
CERM
20%
C7801 1
2
10
MF-LF402
1%1/16W
R78011 2
402
10%16V
0.1UF
X5R
C7803 1
2
MF-LF402
1/16W1%12.1KR78041
2
1%1/16W
402MF-LF
182KR78031
2
6.3V10%
CERM
1UF
402
C7800 1
2
CRITICAL
QFNTPS51117RGY_QFN14
U7800 139
1
7
12
8
6
15
211
104
145
3
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
1.8V Supply
051-7164
64 87
03001
TP_P1V8S3_PGOOD
P1V8S3_TRIP
P1V8S3_FB
PP5V_S5
MIN_LINE_WIDTH=0.25 mm
VOLTAGE=5VMIN_NECK_WIDTH=0.25 mm
P1V8S3_V5FILT
PM_SLP_S4_LP1V8S3_TON
P1V8S3_VBST
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P1V8S3_DRVL
MIN_NECK_WIDTH=0.25 mm
P1V8S3_DRVHMIN_LINE_WIDTH=0.6 mm
PPBUS_G3H
PPBUS_G3H
PP1V8_D3C
P1V8D3C_EN_RC
PP1V8_S3
P1V8D3C_EN
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.6 mmP1V8S3_LL
MIN_NECK_WIDTH=0.25 mm
PP1V8_S3
79B7
79B7
71D7
71D7
67B8
67B8
71D7
69C1
69C1
67B6
67B6
67C3
68D5
68D5
64C1
64A6
67C1
67C3
67C3
37B2
37B2
67B1
67C1
67C1
82D7
32C6
32C6
66D8
65D6
65D6
76D8
31C5
31C5
66B8
66B8
65B7
65B7
76D5
29D6
29D6
65D6
66A6
64A6
64D7
75D8
29D3
29D3
65B7
51C5
62D7
62D7
75D5
29B2
29B2
62C8
48C3
61D7
61D7
73B8
28D6
28D6
62B6
47C7
61D4
61D4
73B5
28D3
28D3
62B2
41B6
55D3
55D3
73A8
28B2
28B2
62A4
23C3
43D8
43D8
73A5
19D7
19D7
52B5
6A2
42B8
42B8
72B8
16B6
16B6
47C7
6A1
41C6
41C6
67B8
14C2
14C2
66C2
25C8
5C4
5C4
5C4
67B6
5D4
66D6
5D4
66C1
5D4
5C1
5A1
5A1
5D4
5B2
66D5
5B2
www.vinafix.vn
PGND
PHASE
UG
LG
PVCC
FCCM
EN
PGOODCOMP
FSET
ISEN
FB
VO
BOOT
VIN
THRMLPAD
VCC
OUT
D
S
G
D
S
G
D
S
G
V-
V++
-
PGND
PHASE
UG
LG
PVCC
FCCM
EN
PGOODCOMP
FSET
ISEN
FB
VO
BOOT
VIN
THRMLPAD
VCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
R7990, R7994 and R7997Keep C7990, C7991,Placement Note:
close to inductor
3.3V D3Cold FET
3.3V S0 FET
1.05V Current Sense
1.05V S0 Regulator
3.3V S5 Regulator
Vout = 0.6V * (1 + Ra / Rb)
Vout = 0.6V * (1 + Ra / Rb)
<Rb>
(P1V05S0_FB)
<Ra> Vout = 1.05V
10A max output
(L7920 limit)
<Ra>
<Rb>
Vout = 3.32V
3.3V S3 FET
4.5A max output
(L7970 limit)
603X5R
10%1uF16V
C7951 1
2
ISL6269BCRZ
CRITICAL
QFN
U7950
13
5
4
6
3
7
9
11
10
16
15
12
17
14
2
1
8
50V5%
402CERM
15PFC7957 1
2
CERM402
20%16V
0.01uFC7958 1
2
MF-LF402
1%1/16W
30.9KR79581
2
1/16W5%
MF-LF
0
NO STUFF
402
R79541
2
0
MF-LF402
5%1/16W
R79551
2
57.6K1%
402MF-LF1/16W
R79561
2
16V10%
402CERM
0.01UFC7956 1
2IRF7832Z
CRITICAL
SO-8
Q7971
5 6 7 8
4
1 2 3
CASE-D2E-LFPOLY
20%330UF
2.5V
C79891
2
470pF
402
50VCERM
10%
C7998
12
CERM
1uF
402
10%6.3V
C79951
2
402MF-LF1/16W
1M
1%
R79981 2
50V
470pF
402CERM
10%
C7992
12402MF-LF1/16W
1M
1%
R79921 2
CRITICAL
0603-LF
10KOHM-5%
R7997
1
2
402MF-LF1/16W
1K1%
R79961
2
1%
20.0K
402
1/16WMF-LF
R79931 2
10%
CERM-X5R
0.47UF
6.3V
402
C7990
12
MF-LF
1%1/16W
20.0K
402
R79911 2
1%
1K
MF-LF
NO STUFF
402
1/16W
R79941 2
1%1/16W
402MF-LF
649R79901
2
55B3
0
402
5%1/16WMF-LF
R79491 2
20%16V
0.01uF
402CERM
NO STUFFC79491
2
402
10%25VCERM
0.0047uFC79201
2
0
1/16WMF-LF402
5%
R792012
CERM25V
0.0047uF
10%
402
C7947
1 2
FDC638PSM-LF
Q7947
1
2
5
6
3
4
1/16W
100K
5%
MF-LF402
R79471 2
0.0022uF
402CERM50V10%
C7945
1 2
SM-LFFDC638P
Q7945
1
2
5
6
3
4
402MF-LF1/16W5%
100KR79451 2
MF-LF402
1/16W5%0
R79091
2
6.3V20%
X5R402
0.22uFC79091
2
0.22uF
402X5R6.3V20%
C79591
2
402CERM
10%0.0022uF
50V
NO STUFFC7970 1
2
402MF-LF1/16W
05%
NO STUFF
R79701
2
MICROFET3X3
CRITICAL
FDM6296Q7920
5
4
1 2 3
MICROFET3X3FDM6296
CRITICAL
Q7921
5
4
1 2 3
FDM6296MICROFET3X3
CRITICAL
Q7970
5
4
1 2 3
CRITICAL
33uF
CASED2E-SMPOLY16V20%
C7980 1
2
1/16W1%
402
5.62K
MF-LF
R79101 2
SM-LFFDC638PQ7948
1
2
5
6
3
4
402MF-LF1/16W5%
100KR79481 2
10%25VCERM
0.0047uF
402
C79481
2
1.8UH
SM-IHLP
CRITICALL7970
1 2
CRITICAL
33UF20%16VPOLYCASED2E-SM
C79301
2
402
6.3V
0.22UF
CERM-X5R
10%
C7991
12
CRITICAL
SC70-5HPA00141AIDCKRU7995
1
3
4
2
5
4.7
402MF-LF1/16W
5%
R79591
2
150UF
CASE-C3POLY
20%6.3V
C79421
2
603CERM1
20%6.3V
2.2UFC7902 1
2
1000pF
402X7R25V10%
NO STUFFC7921 1
2
SMXW7900
1 2
6.3V
2.2UF
CERM1603
20%
C7900 1
2
1uF16VX5R603
10%
C7901 1
2
QFN
CRITICAL
ISL6269BCRZU7900
13
5
4
6
3
7
9
11
10
16
15
12
17
14
2
1
810%
470pF
CERM402
50V
C7907 1
2
0.022uF
CERM-X5R
10%16V
402
C7908 1
2
MF-LF
5%0
402
1/16W
NO STUFF
R79041
2
51.1K
402MF-LF1/16W1%
R79081
2
5%
402MF-LF
0
1/16W
R79051
2
MF-LF
1%
402
57.6K
1/16W
R79061
2
0.01UF
CERM402
10%16V
C7906 1
2
22UF
805
6.3VCERM
20%
C7941 1
2
805
22UF20%6.3VCERM
C79401
2
1/16W
402MF-LF
3.32K0.1%
R79211
2
732
402
0.1%
MF-LF1/16W
R79221
2
IHLP
CRITICAL
4.7uHL7920
1 2
2.2UF
CERM1603
20%6.3V
C7952 1
2
20%22UF
CERM6.3V
805
C7986 1
2
805
22UF20%6.3VCERM
C79851
21/16W
1%
402MF-LF
3.32KR79711
2
1/16W1%
MF-LF
4.42K
402
R79721
2
402MF-LF
1%1/16W
2.8KR79601 2
NO STUFF
1000pF
402X7R25V10%
C7971 1
2
SMXW7950
1 2
2.2UF
CERM1603
20%6.3V
C7950 1
2
051-7164
65 87
03001
SYNC_DATE=08/08/2006
3.3V / 1.05V Power SuppliesSYNC_MASTER=M59_MLB
P3V3S0_EN_L_RC
PP3V3_S5
P3V3D3C_EN_L_RC
PPBUS_G3H
P3V3S5_UGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P3V3S5_LG
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
P3V3S5_PHASE
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.6 mm
P3V3S5_ISEN
P3V3S5_BOOT_RMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
P3V3S5_COMP_R
P3V3S5_FCCM
P3V3S5_BOOT
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
P1V05ISENS_NTC
PP3V3_S5
PP3V3_S3
P3V3S3_EN_L_RCPM_SLP_S4_LS5V
P5VS5_PGOOD
P3V3S5_FB_RC
P1V05S0_COMP_R
GND_P1V05S0_SGND
P1V05S0_FB_RC
P3V3S5_FSET
P3V3S5_COMP
GND_P3V3S5_SGND
P3V3S5_FB
RSMRST_PWRGD
PP5V_S5
P3V3S0_EN_L
PP3V3_S0
PP3V3_D3C
P3V3D3C_EN_L
PP3V3_S5
PP3V3_S5
P1V05ISENS_RC
PP3V3_S0
P1V05S0_IOUT
P1V05ISENS_POS
P1V05ISENS_NEG
P1V05S0_BOOT_R
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
P3V3S5_EN_RC
PPBUS_G3H
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmP1V05S0_BOOT
PP1V05_S0
P1V05S0_FB
P1V05S0_ISEN
P1V05S0_FSET
P1V05S0_COMPP1V5P1V05S0_PGOOD
PM_SLP_S3_LP1V05S0_FCCM
PP5V_S5
P1V05S0_LGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
P1V05S0_UGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm
SWITCH_NODE=TRUE
P1V05S0_PHASE
82D5 82C6 82B3
82A4 79D3 79A8 71D2 67C5 67C3 67B3 67A3 66B6
66B5 66B1 65D6 62A6 61D8 61A5 60D4 60C7
58C7 58C4 57B6 54D4 54B5 52D3 49C7 49C4 49B5
40B6 36D6 34A8 33D8 33D3 33C7 29A6 29A3
28A6 27D8
67D8
27D5
67D6
27D3
55A4
27C3
34C8
26D1
34C6
26B8
34B8
26B6
25D3
26B4
25C4
79D5
79D5
79D5
79D5
25D8
24D3
67D5
67D5
67D5
67D5
25D3
24C3
67D3
67D3
67D3
67D3
25C6
21C1
67C3
67C3
67C3
67C3
25C4
19D7
66C5
66C5
66C5
66C5
25B8
19D6
65D8
65D8
81D4
65D2
65D8
25B4
19D5
65D2
65D1 81A5
65D1
65D2
25A4
19D2
65C8
65C8 67C5
65C8
65D1
24D3
19D1
63D8
79B7
63D8
67C3
63D8
63D8
24C3
79B7
19C8
56D4
71D7
56D4
66C6
56D4
56D4
24B5
71D7
17D6
26C5
69C1
26C5 63B7
71D7
26C5
26C5
24B3
69C1
17D3
71D7
25D2
68D5
25D2 60C2
67C3
25D2
25D2
23D5
68D5
16D3
67C3
25C8
67C3
25C8
59C6
67C1
82D7
25C8
25C8
23B3
67C3
16C8
67C1
25B6
67C1
25B6
57D4
67B1
82A7
25B6
25B6
22B5
67C1
13B5
67B1
24C3
65B7
24C3
52B1
66D8
80D5
24C3
24C3
21D3
65D6
12C2
66D8
24B3
64D7
24B3
46D6
66B8
80B2
24B3
24B3
21C3
64D7
12B7
66C8
66B8
24A5
64A6
24A5
46C3
65B7
77D2
24A5
24A5
20B4
64A6
12A7
66C6
65D6
23D8
62D7
23D8
46B3
64C8
77C6
23D8
23D8
20A4
62D7
11C5
66B6
64C8
23D4
61D7
23D4
41C5
62C8
77B7
23D4
23D4
19C7
61D7
11B3
55C3
62C8
23D1
61D4
23D1
37D7
62B6
74D6
23D1
23D1
19C6
61D4
9B7
51C5
62B6
23B7
55D3
23B7
37D5
62B2
74B2
23B7
23B7
17C6
55D3
8C7
43C8
62B2
23A7
43D8
23A7
37C3
62A4
71C4
23A7
23A7
14D6
43D8
7D5
66B5
42A8
62A4
22D8
42B8
22D8
37A7
52B5
71B8
22D8
22D8
14C7
42B8
7B6
66B3
39C8
52B5
22C6
41C6
22C6
32C5
66B7
66A8
52A5
47C7
71A4
22C6
22C6
10C5
41C6
7B5
66B2
32B3
47C7
11B5
5C4
11B5
27C5
66B6
66A6
52A4
25C8
67A5
66D7
11B5
11B5
5D4
5C4
5D4
61C7
23C3
25C8
5D4
5A1
5D4
5D4
62A4
52A4 5D7
5D7
51D7
5D4
66D5
67A3
66D5
5D4
5D4
5A4
5A1
5B2
5D7
5D7
5C4
5C4
5D4
www.vinafix.vn
FB
BIAS
SWSHDN*
NC
VIN BOOST
GND
G
D
S
G
D
S
G
D
S
V3
V4 RST*
V2
V1
GND
V-
V+
OUT
IN
G
D
S
G
D
S
OUT
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LTC2903 guaranteed threshold is 93.5% (3.055V, 4.725V, 2.325V, 0.840V)
Power Control Signals
(PM_SLP_S3_L)
ISL6269 undervoltage threshold 81-87% (0.85 - 0.91V)
Other S0 Rails PWRGD Circuit
5V Enable has pull-up to PBUS
Reports when 1.5V S0 and 1.05V S0 are in regulation
0.89V Reference
1.5V Comp threshold set to 1.32V (88%)
NOTE: R8065 acts as 10K pull-up for PGOOD signal
LTC2903 guaranteed threshold is 93.5% (3.055V, 4.725V, 2.325V, 0.840V)
3.425V "G3Hot" Supply
<Ra>
Unused PGOOD Signals
GPU core voltage.PowerPlay is changing
(PM_SLP_S4_L)
(P5VS5_PGOOD)
by ethernet power control circuit.
Vout = 1.25V * (1 + Ra / Rb)
NC
<Rb>
Vout = 3.425
200mA max output
(Switcher limit)
PM_SLP_S3_L
1
0
0
0
PM_SLP_S4_L
1
1
0
0
SMC_PM_G2_ENABLE
1
1
1
0Battery Off (G3Hot)
Run (S0)
Sleep (S3)
Soft-Off (S5)
State
Supply needs to guarantee 3.31V delivered to SMC VRef generator
2.5V S3 and 1.2V S3 supplies are controlled
ISL6269 PGOOD does notNeed to ensure that
1.8V Enable has pull-up to PBUS
GPIO38 low.extension all D3Cold rails) by drivingThe SB can turn off the GPUVcore (and by
1.5V Enable has pull-up to PBUS
3.3V rise after VCore is up.GPU requires 1.2V, 1.8V, 2.5V and
removing ethernet power in battery sleep.before enabling GPU VCore to supportEnsure 1.2V and 2.5V S3 supplies are up
deassert while GPU
Does not include D3C rails for GPU!!
1.5V / 1.05V PWRGD Circuit
LT3470TSOT23-8
CRITICAL
U8000
7
6
8
4
2
1 5
3
5%1/16WMF-LF402
0
NO STUFFR80601 2
SOT-3632N7002DW-X-FQ8056
3
5
4
1206-1
10UF
X5R
10%25V
C8000 1
2
10K
MF-LF402
5%1/16W
R80691
2
10K
MF-LF402
5%1/16W
R80681
2
2N7002DW-X-FSOT-363
Q8058
3
5
4
SOT-3632N7002DW-X-FQ8058
6
2
1
LTC2903TSOT-23
CRITICAL
U8070
2
6
1
3
4
5
0.1uF20%10V
CERM402
C8070 1
2
6.3V20%
805CERM
22UFC80151
2
402
1/16W1%
MF-LF
200KR80111
2
402MF-LF1/16W5%10KR80651
2
10V20%
402CERM
0.1uFC80811
2
MC74VHC1G08SC70
U8081
3
2
1
4
5
1/16WMF-LF
5%10K
402
R80811
2
0.1uF
CERM402
20%10V
C8060 1
2
5%10K
MF-LF402
1/16W
R80761
2
845K
1/16W1%
402MF-LF
R80701
2
402
10V20%0.1UF
CERM
C80711
21/16W
1%
402MF-LF
100KR80711
2
365K
MF-LF402
1%1/16W
R80721
2
402
10V20%0.1UF
CERM
C80731
21/16W
1%
402MF-LF
100KR80731
2CERM
0.1UF20%10V
402
C80751
2
MF-LF402
1%1/16W
68.1KR80741
2
100K
MF-LF402
1%1/16W
R80751
2
LMC7211SM-LF
U80604
3
1
5
2
MC74VHC1G08SC70
U8080
3
2
1
4
5
0.1UF20%10V
CERM402
C8080 1
2
5C4 61C7 65B8 66B3 66B5
4.99K
MF-LF402
1%1/16W
R80631
2
27.4K
MF-LF402
1%1/16W
R80611
2
10K
MF-LF402
1%1/16W
R80641
2
1%10K
MF-LF402
1/16W
R80621
2
5C4 61C7 65B8 66B2 66B3
10K
1/16WMF-LF
402
5%
R80511
2
MF-LF402
5%1/16W
10KR80501
2
2N7002DW-X-FSOT-363
Q8057
6
2
1
SOT-3632N7002DW-X-FQ8050
6
2
1
26A5 51D7
100K
MF-LF402
5%1/16W
R80541
2
2N7002DW-X-FSOT-363
Q8057
3
5
4
1/16W1%
402MF-LF
348KR80101
2
1/16W
10K
MF-LF402
5%
R80551
2
SOT-3632N7002DW-X-FQ8055
6
2
1
SOT-3632N7002DW-X-FQ8055
3
5
4
CDPH4D19F-SM
33uH
CRITICALL8010
1 2
SOT-3632N7002DW-X-FQ8059
3
5
4
1/16W5%
402MF-LF
470KR80591
2
SOT-3632N7002DW-X-FQ8059
6
2
1
SOT-3632N7002DW-X-FQ8050
3
5
4
63B3 63C3 66D4 66D7
71C8
50V5%
402CERM
22pFC8010 1
2
100K5%
MF-LF1/16W
402
R80561
2
5C4 23C3 32B3
39C8
42A8
43C8
51C5
55C3
65B8
66B6
66C6
100K
1/16W
402
5%
MF-LF
R80571
2
5C1 5C4 6A1 6A2 23C3
41B6 47C7 48C3
51C5 64C8
66A6
100K
MF-LF402
5%1/16W
R80581
2
52A4 65D7 66A6
51D5
6.3V20%
402X5R
0.22uFC8005 1
2
63B5 63C8 66B8
63B5 63C8 66B8
MF-LF
5%10K
402
1/16W
R80531
2
5%1/16W
402MF-LF
10KR80521
2
SYNC_MASTER=M57_MLB_MG
03001051-7164
66 87
SYNC_DATE=08/08/2006
3.3V G3Hot Supply & Power Control
S0PGOOD_PWROK
PP3V3_S0
MAKE_BASE=TRUESB_GPUVCORE_DISABLE_L
MAKE_BASE=TRUE
PM_SLP_S3_L
PM_SLP_S3_L_GPUVCORE_EN
PP5V_S5
PM_SLP_S3_L
PM_SLP_S3_L
P5VS5_PGOODMAKE_BASE=TRUE
PM_SLP_S3_LS5V_L
P3V3S0_EN_LMAKE_BASE=TRUE
P3V3S0_EN_L
P1V8D3C_ENMAKE_BASE=TRUE
P1V8D3C_EN
P1V2R2V5D3C_EN_LS5V
P3V3D3C_EN_L
P1V2R2V5D3C_EN_LS5V
P1V5P1V05S0_PGOOD
PM_SLP_S3
PM_SLP_S4_LS5V
PPDCIN_G3H
P1V5S0_PGOOD
P3V42G3H5_BOOST
MIN_LINE_WIDTH=0.5 mmP3V42G3H_SW
SWITCH_NODE=TRUEMIN_NECK_WIDTH=0.25 mm
P3V42G3H_FB
PP3V42_G3H
MAKE_BASE=TRUEPM_SLP_S4_LS5V
PM_SLP_S3_L
PM_SLP_S3_L
PM_SLP_S4_LS5V
PM_SLP_S4_LPM_SLP_S4_LPM_SLP_S4_L
P5VS5_PGOOD
SMC_PM_G2_EN_L
SMC_PM_G2_EN
PP1V5_S0
P1V5P1V05S0_PGOODMAKE_BASE=TRUE
ALL_SYS_PWRGD
P1V5P1V05S0_PGOOD
P1V0_P1V5PG_REF
P1V5S0_COMP_POS
MAKE_BASE=TRUETP_P5V_P1V5_PGOOD
MAKE_BASE=TRUETP_P1V8S3_PGOODTP_P1V8S3_PGOOD
P2V5S3_P1V2S3_PGOOD
PP5V_S5
P2V5S3_P1V2S3_PGOODMAKE_BASE=TRUE
MAKE_BASE=TRUE
PM_SLP_S4_L
P2V5S3_P1V2S3_PGOOD
PP3V3_S0
TP_P5V_P1V5_PGOOD
PGOOD_MUXED_S0_OR_S0D3C
PP3V3_S5
PP3V42_G3H
P1V2R2V5D3C_EN_LS5V
PM_SLP_S3_LS5VP1V5S0_RUNSS
PM_SLP_S3_LS5V
P5VS5_RUNSS
SB_GPUVCORE_DISABLE_L MAKE_BASE=TRUEGPUVCORE_EN GPUVCORE_EN
MAKE_BASE=TRUEPM_SLP_S3_LS5V_L
PP3V3_S3
PM_SLP_S3_LS5VMAKE_BASE=TRUE
MAKE_BASE=TRUEP3V3D3C_EN_L
MAKE_BASE=TRUEP1V2R2V5D3C_EN_LS5V
PP3V42_G3H
PP5V_S0
S0PGOOD_5V_DIV
PP3V3_S0
PP2V5_S0
S0PGOOD_2V5_DIV
S0PGOOD_0V9_DIV
PP0V9_S0
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79D3
79D3
79A8
79A8
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
25D8
79D5
25D8
25D3
67D5
25D3
25C6
67D3
25C6
25C4
67C3
25C4
81D4
25B8
65D8
81D4
81D4
25B8
69C8
25B4
65D2
69C8
81D4
69C8
25B4
69B8
25A4
65D1
69B8
81A5
69B8
81B3
25A4
69A8
67C8
24D3
65C8
69A8
67C5
69A8
80B5
24D3
68B8
67C6
24C3
63D8
68B8
67C3
68B8
80A1
24C3
67D5
62C1
24B5
56D4
67D5
65D1
67D5
79B8
24B5
71D7
67D3
62A8
71D7
24B3
26C5
67D3
63B7
67D3
71A6
24B3
67C3
66D2
48B6
67C3
23D5
25D2
66D2
60C2
66C8
67B3
23D5
67C1
66C8
25D6
67C1
23B3
25C8
66A8
59C6
66A8
67B1
23B3
82D3
67B1
53C4
25C8
67B1
22B5
25B6
53C4
57D4
53C4
67A1
22B5
82C5
66B8
66C8
52D7
66C8
66C8
66B8
66B8
66B8
25C6
66D8
21D3
24C3
52D7
52B1
52D7
62B1
21D3
67B6
65D6
66C6
66C8
52B7
66C6
66C6
66A6
66A6
66A6
25C2
65D6
21C3
24B3
52B7
46D6
52B7
61D7
21C3
67A8
65B7
66B6
66C6
52B5
66B6
66B6
64C8
64C8
64C8
25B6
65B7
20B4
24A5
52B5
46C3
52B5
58C7
20B4
67A6
64C8
65B8
65B8
52B1
65B8
65B8
51C5
51C5
51C5
25B2
64C8
20A4
23D8
52B1
46B3
52B1
58C4
20A4
63D1
62C8
55C3
55C3
51D4
55C3
55C3
48C3
48C3
48C3
25A8
62C8
19C7
23D4
51D4
41C5
51D4
57B5
19C7
19D7
62B6
51C5
51C5
51D3
51C5
51C5
47C7
47C7
47C7
24B5
62B6
19C6
23D1
51D3
66C7
66C7
37D7
51D3
55A8
19C6
19C5
62B2
43C8
43C8
71C8
71C8
51C2
43C8
43C8
41B6
41B6
41B6
24A5
62B2
17C6
23B7
51C2
66C6
66C6
37D5
66C6
51C2
53C4
17C6
19A8
62A4
42A8
42A8
66D8
66D8
47B5
42A8
42A8
23C3
23C3
23C3
24A3
66B5
62A4
14D6
23A7
47B5
62B3
62B3
37C3
62B3
71C8
47B5
36D6
14D6
19A6
67D8
52B5
39C8
39C8
66D7
66D7
66B7
69B2
35B7
39C8
39C8
66B7
6A2
6A2
6A2
9B7
66B2
52B5
14C7
22D8
35B7
48C3
48C3
37A7
48C3
66D8
35B7
31C5
14C7
19A4
67D6
47C7
32B3
32B3
66D4
66D4
66B6
68C4
27C3
66B6
32B3
32B3
66B6
6A1
6A1
6A1
66A8
8B7
65B8
47C7
66B8
10C5
22C6
27C3
6A2
6A2
32C5
6A2
66D4
27C3
25D8
10C5
17D6
31C2
82D5
25C8
23C3
23C3
66D5
66D5 66D5
66D5 66D6
63C3
66D7
63C3
65D3
67A8
26D6
65D3
23C3
23C3
65D3
5C4
5C4
5C4
65D7
5D4
61C7
66C2
66C2 66C1
25C8
63C8
5D4
66C1 11B5
26D6
6A1
62C4
6A1
62C5
66B6
71C8 71C8
66D4
27C5
6A1
66D5
63C3
26D6
5D4
5D4
17C6
30D5
82A4
5D4
5C4
5C4
63D3
65D8 65D8
64A6 64A6
63B3
65C8
63B3
62A4
67A6
5D7
5D2
62A4
5C4
5C4
62A4
5C1
5C1
5C1
52A4
5D1
5C4
62B3
64B4 64B4
5D4
63B5
5A4
62B3
82A2
5D4
5D2
5C1
5D7
5C1
5D7
23C3
66B5 66B5
63D3
5D4
5C1
65C8
63B3
5D2
5D2
5A4
5D4
5D4
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
"S3AC" rail is ON in S3 on AC, OFF in S3 on battery
SYNC_MASTER=(MASTER)
Power Aliases
87
03001
67
051-7164
SYNC_DATE=(MASTER)
PP5V_S0
PP5V_S0
VOLTAGE=5VMAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmPP5V_S0
PP5V_S0PP5V_S0
PP5V_S0PP5V_S0
PP5V_S0
PP5V_S0PP5V_S0PP5V_S0PP5V_S0
PP5V_S3
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=5VMAKE_BASE=TRUE
PP5V_S5
PP5V_S5PP5V_S5
PP5V_S5PP5V_S5
PP5V_S5PP5V_S5
PP5V_S5
PP5V_S3
PP5V_S3
PP5V_S5
PPBUS_S5_FW_FETPPBUS_S5_FW_FETPPBUS_S5_FW_FET
MIN_NECK_WIDTH=0.3 mmMIN_LINE_WIDTH=0.5 mm
VOLTAGE=33VMAKE_BASE=TRUE
PPBUS_S5_FW_FETPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3HPPBUS_G3H
MAKE_BASE=TRUE
PPBUS_G3H
VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
MIN_LINE_WIDTH=0.5 mmPPVCORE_S0_CPU
MIN_NECK_WIDTH=0.2 mmVOLTAGE=1.1VMAKE_BASE=TRUE
PPBB_S0_GPU
PP3V42_G3H
PP5V_S3
PP5V_S0
PP3V42_G3H
PP3V42_G3H
PP3V3_S5
PP3V3_S5PP3V3_S5PP3V3_S5
PP3V3_S5
PP3V3_S3
PP3V3_S3
MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MM
MAKE_BASE=TRUEVOLTAGE=1.8V
PP1V8_S3
PP0V9_S0
PP1V2_S3
MIN_LINE_WIDTH=0.25 mm
MAKE_BASE=TRUE
PPBB_S0_GPU
VOLTAGE=1.9VMIN_NECK_WIDTH=0.25 mm
PP1V2_S3
PPBUS_S5_FW_FET
PP5V_S5
MAKE_BASE=TRUEVOLTAGE=1.2VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmPPVCORE_D3C_GPU
PP1V5_S0_NB
PP1V8_S3
PP1V8_D3CPP1V8_D3C
PP1V8_S3PP1V8_S3PP1V8_S3
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6 mmPP1V2_D3C
MIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUE
PP1V5_S0PP1V5_S0
PP1V5_S0
PP1V2_D3C
PP1V2_S3
PP1V5_S0_NB
PP5V_S0
PP3V3_D3C
PP3V3_D3C
PP3V3_D3C
PP3V3_D3CPP3V3_D3C
PP2V5_D3C
PP2V5_D3C
PP2V5_S0
PP1V05_S0
PP2V5_D3C
PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0
PP5V_S0
PP5V_S0
PNBB_S0_GPUMAKE_BASE=TRUEVOLTAGE=-0.7VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPNBB_S0_GPU
PP3V3_S3ACPP3V3_S3AC
PPVCORE_S0_CPU
PPBB_S0_GPU
PNBB_S0_GPU
PP3V3_S3ACMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.22 mmVOLTAGE=3.3VMAKE_BASE=TRUE
PP5V_S3
PPBUS_G3H
PP1V05_S0PP1V05_S0
PP1V2_D3C
PP1V5_S0PP1V5_S0
PPVCORE_D3C_GPU
PPDCIN_G3H
PP2V5_S0
PP1V5_S0
PP2V5_D3C
PPDCIN_G3H
PP2V5_S3PP2V5_S3
PP2V5_S0PP2V5_S0
PP1V8_D3C
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6 mmPP2V5_S0
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mm
PP1V2_D3C
MIN_NECK_WIDTH=0.22 mmMIN_LINE_WIDTH=0.6 mm
VOLTAGE=1.2V
PP1V2_S3
MAKE_BASE=TRUE
PPVCORE_D3C_GPU
PP3V3_D3C
PP5V_S5
PP1V2_D3C
PP2V5_S0
MAKE_BASE=TRUEVOLTAGE=2.5V
PP2V5_D3CMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
PP2V5_D3C
PPVCORE_D3C_GPU
PPDCIN_G3H
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.4 mm
VOLTAGE=18.5V
PPDCIN_G3H
PP3V3_D3CPP3V3_D3CPP3V3_D3C
MIN_NECK_WIDTH=0.2 mmVOLTAGE=3.425V
MIN_LINE_WIDTH=0.25 mmPP3V42_G3H
MAKE_BASE=TRUE
PP3V42_G3HPP3V42_G3H
PP3V42_G3HPP3V42_G3H
PP3V42_G3H
PP3V42_G3H
PP3V3_S5
PP3V3_S5PP3V3_S5PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5PP3V3_S5
PP3V3_S3
PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0
PP3V3_S0
PP3V3_S0
PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S3
PP3V3_S0
PP3V3_S0
PP3V3_D3CPP3V3_D3CPP3V3_D3C
PP0V9_S0
PP3V42_G3H
PP3V3_S5
PP3V42_G3HMAKE_BASE=TRUEVOLTAGE=0.9VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP0V9_S0
VOLTAGE=5V
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
PP5V_S3
MAKE_BASE=TRUE
PP5V_S5
PPVCORE_S0_CPU
PP1V05_S0
PP1V8_S3PP1V8_S3
PP1V5_S0_NB
PP1V5_S0_NB
PP1V5_S0_NBPP1V5_S0_NBPP1V5_S0_NBPP1V5_S0_NBMAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=1.5VMIN_NECK_WIDTH=0.25 mm
PP1V5_S0_NB
PP3V3_S3
PP3V3_S3
PP3V3_S3PP3V3_S3
PP3V3_S5
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUE
PP3V3_S0PP3V3_S0
PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0
PP1V5_S0
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUE
PP1V5_S0
VOLTAGE=1.5V
PP1V05_S0
MIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUEVOLTAGE=1.05V
MIN_LINE_WIDTH=0.5 mm
PP3V3_D3C
VOLTAGE=3.3VMAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0
PP3V3_S3PP3V3_S3
PP3V3_S3
PP3V3_S3PP3V3_S3PP3V3_S3
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 MM
VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MM
PP3V3_S3
PP3V3_S0
PP3V3_S0PP3V3_S0
PP3V3_S0MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
MAKE_BASE=TRUEVOLTAGE=3.3V
PP1V5_S0
PP1V5_S0PP1V5_S0
PP1V2_D3C
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmPP1V8_D3C
VOLTAGE=1.8V
PP2V5_S0
PP2V5_S3
PP1V8_D3C
MAKE_BASE=TRUE
PP2V5_S3MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=2.5V
PP1V8_S3
VOLTAGE=0V
GNDMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.25mm
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82D5
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82C6
82B3
82B3
82B3
82B3
82B3
82B3
82B3
82B3
82B3
82B3
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5D4
5D4
5D4
5D4
5D4
5D4
67A3
5D4
5D4
27C5
27C5
27C5
27C5
5D4
5D4
5D4
63B1
64A4
17C6
39D3
64A4
39D3
5D4
5D2
5D2
5D2
5D2
5D2
5B2
5D4
5D4
5D4
5B2
5D4
38B7
38B7
38B7
5A1
5A1
5A1
5A1
5B2
67D1
5D2
5D2
5D2
5D4
5D4
5D4
5D4
5D4
5D4
5B2
5D4
5A4
67D1
5A4
38B7
5D4
5B2
5D4
5B2
5D4
5D4
5B2
5B2
5B2
5D4
5D4
5D1
5D4
5D1
5D1
5D1
5D4
5A4
5D4
65C7
65C7
65C7
65C7
65C7
5D4
5D4
5D4
5B2
5D4
5B2
5B2
5B2
67D1
67D1
5A4 5A4
5B2
67D1
67D1
5A1
5B2
5D4
5D1 5D1
5B2
66D5
5D4
5D1
5D4
66D5
5A4
5A4
5D4
5D4
5D4
5D4
5D4
5A4
5B2
65C7
5D4
5D4
5D4
5D4
5B2
66D5
66D5
65C7
65C7
65C7
5D2
5D2
5D2
5D2
5D4
5D4
5D4
5D4
5D4
5D4
5A4
5A4
5A4
5A4
5A4
5A4
65C7
65C7
65C7
5D4 5D2
5D4
5B2
5B2
5B2
5B2
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5D4
5A4
5A4
5A4
5A4
5A4
5A4
5D1
5B2
65C7
5A4
5A4
5D4
5D4
5D4
5D4
5D1
5D1
5D1
5D4
5D4
5D4
5A4
5D4
5A4
5B2
www.vinafix.vn
IO
OUT
V-
V+
S1
GATE
S2S3 D4
D3D2D1
G
D
S
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ACIN Detection
Battery Connector
(HOST_DETECT_L)
<R1b>
<R2a>
<R1a>
Vth = 13.4V
Vref = 1.20V
Vth = (Vref / (R2b / (R1b + R2b))
Vref = 3.42V * (R2a / (R1a + R2a))
Inrush Limiter
518S0457
518S0456
DC-In Connector
<R2b>
CRITICAL
M-RT-SM87438-0832-BLK
J8290
1
2
3
4
5
6
7
8
1SS355
SOD-323
D8201
1 2
5%
47
1/8WMF-LF805
R82071 2
CRITICAL
LMC7211SM-LF
U82004
3
1
5
2
CRITICAL
SO-8SI4405DY-E3Q8250
5
6
7
8
4
1
2
3
0.22uF25V20%
603X5R
C82501
2
1/16W5%
402
1M
MF-LF
R821612
1/16W1%
402MF-LF
102KR82141
2
1/16W1%
402MF-LF
57.6KR82151
2
1/16W1%
402MF-LF
102KR82121
2
1/16W1%
402MF-LF
10.7KR82131
2
10V20%0.1uF
402CERM
C82101
2
1%
402MF-LF1/16W
470KR82211
2
402
1/16W5%
MF-LF
330KR82501
2
2N7002SOT23-LF
Q8210
3
1
2
SC70MC74VHC1G08
U8250
3
2
1
4
5
CRITICAL
M-RT-SM87438-1043-BLK
J8250
1
10
2
3
4
5
6
7
8
9
SYNC_MASTER=(MASTER)
051-7164
68
DC-In & Battery Connectors
87
03001
SYNC_DATE=(MASTER)
PP18V5_DCIN
PPBUS_G3H
VOLTAGE=18.5VMIN_LINE_WIDTH=0.60mmMIN_NECK_WIDTH=0.20mm
PP18V5_DCIN
MIN_LINE_WIDTH=0.50mm
PPDCIN_G3H_RVOLTAGE=18.5V
MIN_NECK_WIDTH=0.20mm
PP3V42_G3H
SMC_BC_ACOK
MIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.2mm
MAKE_BASE=TRUE
VOLTAGE=18.5V
PP18V5_G3H_CHGR
PP18V5_G3H_CHGR
ACOK_AND_PS_ONACIN_1V20_REF
ACIN_ENABLE_DIV2_L
MIN_LINE_WIDTH=0.2mmMIN_NECK_WIDTH=0.2mm
ACIN_ENABLE_DIV_L
ACIN_DIV
SMBUS_SMC_BSA_SDA
BATT_POS
BATT_NEG
BATT_POS
PP18V5_G3H_CHGR
BATT_POS
MIN_LINE_WIDTH=0.6mmMAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25mm
SMC_BS_ALRT_L
SMBUS_SMC_BSA_SCL
PPDCIN_G3H
SMC_ADAPTER_EN
PP3V42_G3H MIN_NECK_WIDTH=0.25mmMIN_LINE_WIDTH=0.6mm
BATT_NEGMAKE_BASE=TRUE
GND
81D4 69C8 69B8 69A8 68B8
79B7
67D5
71D7
67D3
69C1
66D2
67C3
66C8
67C1
66A8
65D6
53C4
65B7
52D7
64D7
52B7
64A6
52B5
62D7
52B1
61D7
51D4
61D4
51D3
55D3
51C2
43D8
69A6
47B5
42B8
52A2
69B1
69B1
69B2
35B7
41C6
51C5
69B1
68A2
68A2
67A8
52A2
27C3
68C5
5C4
68B8
48C3
69D8
69D8
68A1
68A1
69D8
68A1
67A6
51D5
26D6
68B2
5B1
5A1
5B1
5B1
68B3
68B3
5D1
5D1
68B3
5D1
66D5
43C8
5D2
5D1
www.vinafix.vn
G
D
S
G
D
S
G
D
S
G
D
S
S1
GATE
S2S3 D4
D3D2D1
G
D
S G
D
S
G
D
SG
D
S
V-
V++
-
VDDPVDD
ACLIM
ICM
ICOMP
VCOMPVADJ
CELLS
CSOP
CHLIMCSON
ACPRN
VREF
SGATE
CSIN
DCINBGATE
BOOT
UGATE
LGATE
PHASE
DCSET
PGND
THRML_PAD DCPRN
CSIP
EN
ACSET
GND
G
D
S
S3S2
D1D2D3D4
GATE
S1
S1
GATE
S2S3 D4
D3D2D1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
353S1244
Adapter Input Current Limit
SINKING CURRENT FROM VREF.VOLTAGE FOLLOWER GUARANTEES CURRENT LIMIT CIRCUITS
As shown, Isys =~4.6A max
ARE PROVIDED WITH SUFFICIENT CURRENT WITHOUT
Battery Charge Current LimitAs shown, Ichg = 3.9A max
Battery Charge FET
10A MAX, LIMITED BY L8300, Q8301
PBus Supply & Battery Charger
SMXW8300
1 2
MF-LF402
1%1/16W
100R83021 2
CERM
10%1uF6.3V
402
C8312 1
2
CERM6.3V
1uF
10%
402
C8311
1 2
SMIRLML5203-2.6AG
S
D
Q8340
3
1
2
2N7002DW-X-FSOT-363
Q8322
3
5
4
2N7002DW-X-FSOT-363
Q8322
6
2
1
20%0.1UF25VCERM603
C83401
2
2N7002DW-X-FSOT-363
Q8324
3
5
4 SOT-3632N7002DW-X-F
Q8324
6
2
1
1%1/16W
402
3.01K
MF-LF
R83601 2
10%
CERM402
0.047UF16V
C83611
2
402MF-LF
24.3K
1%1/16W
R83621 2
CERM402
0.01UF10%16V
C83621
2
1%1/16W
402MF-LF
20.0KR83631
2
1/16WMF-LF
1%
402
59.0KR83661
2
2525MF
5%3W
27R83201 2
CERM
10%0.001UF
402
50V
C83301
2
1%
MF-LF402
1/16W
11.3KR83411
2
1%1/16WMF-LF
118K
402
R83401
2
CRITICAL
SI4405DY-E3SO-8
Q8321
5
6
7
8
4
1
2
3 CRITICAL
8AMP-24V
1206
F8302
1 2
402
1/16W1%
MF-LF
88.7KR83671
2
680pF
50V10%
402
NO STUFF
CERM
C8315
1 2 MF-LF1/16W
402
5%
2.2R83031 2
5%
402MF-LF1/16W
270
ISL6255AR83041 2
0.1UF20%
CERM603
25V
NO STUFFC83071
2
10V
0.22uF
402
10%
CERM
C83251
2402
470K1%
1/16WMF-LF
R83301
2
49.9
0.5%1/16WMF-LF603
R83701 2
10%50VCERM
0.0022uF
603
C83701
2
402MF-LF
100K
1/16W1%
R83441
2
805
1/8WMF-LF
47
5%
R83211 2
MF-LF
1%100K
1/16W
402
R83241
2
0612MF
0.5%
0.02
1W
R83071 2
SMXW8301
1
2
SMXW8302
1
2
SOD-323
1SS355D8321
1 2
MMBD914XXGSOT23
D83401
3
CRITICAL
33UF
POLYCASED2E-SM
20%16V
C83081
2 16V
603
1UF10%
X5R
C83101
2
CRITICALLFPAKRJK0305DPBQ8301
5
4
1 2 3
RJK0305DPBCRITICAL
LFPAK
Q8302
5
4
1 2 3
1%1/16WMF-LF402
3.48KR83681
2
2N7002DW-X-FSOT-363
Q8360
6
2
1
SOT-3632N7002DW-X-FQ8360
3
5
4
10K
1/16WMF-LF402
5%
R83691
2
0.1uF
X5R
10%16V
402
C83411
2
SOT-3632N7002DW-X-FQ8361
3
5
4
2N7002DW-X-FSOT-363
Q8361
6
2
1
1/16WMF-LF402
10K5%
R83791
2
SMXW8304
1
2
SMXW8303
1
2
34.8K
402
1%1/16WMF-LF
ISL6257HR83921
2
ISL6255A
402
1%1/16W
34.8K
MF-LF
R83931
2
CRITICAL
HPA00141AIDCKRSC70-5
U83011
3
4
2
5
20%0.1UF
10VCERM402
C8380 1
2
CASE-D2-LF
25V
22UF
POLY
20%
CRITICAL
C83061
2
2.2UF
805
25V10%
CRITICAL
X5R-CERM
C83161
2
CRITICAL
2.2UF10%25V
805X5R-CERM
C83171
2
CRITICAL
CASE-D2-LF
25V
22UF20%
POLY
C83051
2
6.3X5.5SM1
CRITICAL
100UF20%16V
ELEC
C8309 1
2
4.7UH
CRITICAL
SM
L8300
1
2
3
50V
ISL6257H
CERM
10%0.0033uF
402
C83901
2 CERM50V
0.0033uF
402
10%
ISL6255AC83911
2
QFN
ISL6255AHRZ
BOMOPTION=ISL6255A
CRITICAL
U83008
23
27
17
142
7
20
19
22
21
25
2428
1
10
5
3
12
11
16
18
29
15
94
26 13
6
1%100K
402MF-LF1/16W
R83501
2
SOT23-LF2N7002Q8350
3
1
2
0.033uF
16V
X5R
10%
402
C8300
12
10%16V
0.022uF
402CERM-X5R
C8301
12
SO-8
CRITICAL
SI4413ADY-E3Q8300
NO STUFF
1/16WMF-LF402
1%100KR83101
2
402
10V20%
CERM
0.1UFC83041
2
B0530WXF
SOD-123D8300
12
5%
MF-LF1/16W
4.7
402
R83001 2
603CERM25V20%
0.1UFC8303
1 2
402
10%
X7R
0.0082uF25V
C8302 1
2
MF-LF402
18
5%1/16W
R83051 2
0.01
0.5%
0612MF1W
R83081 2
2.2
MF-LF
5%1/16W
402
R83061 2
CRITICAL
SI4405DY-E3SO-8
Q8320
5
6
7
8
4
1
2
3
402
330K
MF-LF
5%1/16W
R83311
2
1/16W
39.2K
MF-LF402
1%
R83221
2
35.7K
402
1%1/16WMF-LF
R83231
2
402
10%0.01uF
CERM16V
C8320 1
216V10%
0.1uF
X5R402
C8321 1
2
NO STUFF
16V20%
0.01UF
CERM402
C8324 1
2
10%
NO STUFF
0.01UF
402
16VCERM
C8322 1
2
10K
1/16WMF-LF
1%
402
R83251 2
0.1UF10V
CERM402
20%
C8323 1
2
50V10%
402CERM
0.001UFC83271
2
1116S0004 ISL6257H0 OHM,5%,1/16W,0402,SMD,LF R8304
CRITICAL1 U8300 ISL6257H353S1510 ISL6257H,BATT CHGR,28P,QFN,LF
PBus Supply & Batt. Charger
SYNC_DATE=08/08/2006
69 87
03001
SYNC_MASTER=M59_LIO
051-7164
MIN_NECK_WIDTH=0.25mmMIN_LINE_WIDTH=0.6mmPPVDCIN_G3H_PRE
CHGR_VDDPCHGR_BOOT_R
CHGR_PHASE_R
CHGR_ACSET
CHGR_ACSET_D
CHGR_ACPRN
PP3V42_G3HCHGR_VDD
CHGR_DCIN
CHGR_VDD
PP3V42_G3H
CHGR_SGND
CHGR_EN
CHGR_ACLIM_R
SMC_SYS_ISET_L
PP3V42_G3H
CHGR_SGND
SMC_BC_ACOK_R
CHGR_VREF_VF
CHGR_CSO_P
CHGR_CSO_N
CHGR_SGND
SMC_BATT_CHG_EN
CHGR_ACPRN
CHGR_ACLIM
SMC_BATT_ISET_L
CHGR_SGND
CHGR_CHLIM_R CHGR_CHLIM SMC_BC_ACOK
SMC_SYS_ISET
SMC_BATT_ISET
CHG_EN_DIV2_L
TCHG_EN_DIV2_L
MIN_LINE_WIDTH=0.5mmVOLTAGE=12.6V
MIN_NECK_WIDTH=0.25mm
PPVBATT_G3H_DIO
SMC_BATT_TRICKLE_EN_L
GND
BATT_POSMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.25mmCHGR_VREF_VF
MIN_LINE_WIDTH=0.2mmCHG_EN_DIV_L
MIN_NECK_WIDTH=0.2mm
PPVBAT_G3H_CHGR_OUT
CHGR_VREF
CHGR_VREF_VF
CHGR_SGND
GND_CHASSIS_BATTCONN_HOLE
PP3V42_G3H
CHGR_CSI_R_NNO_TEST=TRUE
PPVDCIN_G3H_RMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.25mm
MIN_LINE_WIDTH=0.6mmPPVBAT_G3H_CHGR_OUT
MIN_NECK_WIDTH=0.25mm
CHGR_CSO_R_P
PPDCIN_G3H
MIN_NECK_WIDTH=0.2mm
TCHG_EN_DIV_LMIN_LINE_WIDTH=0.2mm
PPVBATT_G3H_PREMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.25mm
MIN_NECK_WIDTH=0.25mmMIN_LINE_WIDTH=0.6mmPPVBATT_G3H_FET
CHGR_VCOMP_C
PP18V5_G3H_CHGR
CHGR_CSO_R_N
PPBUS_G3H
CHGR_CSO_R_NNO_TEST=TRUE
CHGR_EN
NO_TEST=TRUE
CHGR_CSI_P
TP_CHGR_DCPRN
CHGR_SGND
TP_CHGR_DCSET
CHGR_PHASEMIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.2mmSWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.6mmMIN_NECK_WIDTH=0.2mm
CHGR_LGATE
MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.6mm
CHGR_UGATECHGR_BOOT MIN_LINE_WIDTH=0.6mm
MIN_NECK_WIDTH=0.2mm
NC_CHGR_BGATE NO_TEST=TRUE
CHGR_DCIN
CHGR_CSI_N
MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.2mm
CHGR_SGATE
CHGR_VREF
CHGR_ACPRN
CHGR_CSO_NCHGR_CHLIM
CHGR_CSO_P
CHGR_SGND
TP_CHGR_VADJCHGR_VCOMPCHGR_ICOMP
CHGR_ICM
CHGR_ACLIM
CHGR_VDD
CHGR_VDDP
CHGR_ACSET
CHGR_ICM_R
81D4
81D4
81D4
81D4
69C8
69C8
69B8
69C8
69B8
69B8
69A8
69B8
69A8
69A8
68B8
68B8
68B8
68B8
67D5
67D5
67D5
67D5
79B7
67D3
67D3
67D3
67D3
71D7
66D2
66D2
66D2
66D2
68D5
66C8
66C8
66C8
66C8
67C3
66A8
66A8
66A8
66A8
67C1
53C4
53C4
53C4
53C4
65D6
52D7
52D7
52D7
52D7
65B7
52B7
52B7
52B7
52B7
64D7
52B5
52B5
52B5
52B5
64A6
52B1
52B1
52B1
52B1
62D7
51D4
51D4
51D4
51D4
61D7
51D3
51D3
51D3
51D3
61D4
51C2
51C2
51C2
51C2
55D3
47B5
47B5
47B5
69D5
69D5
69D5
68A6
69D5
47B5
43D8
35B7
35B7
69C7
35B7
69C7
69C7
69C7
52A2
69C7
35B7
68C4
42B8
69D5
69D5
27C3
27C3
69C6
27C3
69C6
69C6
69C6
51C5
68A2
69C6
27C3
67A8
41C6
69C7
69C6
69C6
26D6
69D7
69D5
26D6
69B7
26D6
69B7
69B7
52A2
69C8
69B7
48C3
52A2
68A1
69B7
69B7
69B7
6A6
26D6
67A6
69C2
5C4
69D6
69B7
69C8 69B7
69D7
69D5
69C6
69A6
5D2
69D5
69D4
69C8
5D2
69A7
69C4
5D2
69A7
69B7
69C6
69C6
69A7
51D7
69C6
69D6
69A7
69C6 5B1
51B5
51B5
51D7
5D1
69A7
69C1
69C6
69A7
69A7
6A4
5D2
49D4
69B7
49D7
66D5
68B3
49D7
5A1
49D7
69C7
49D4
69A7
69D7
69B8
69A6
69C1
69A6
69B1
69A7
69A6
69C8
69C2
69D7
www.vinafix.vn
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PCIE_PVSS
PCIE_VDDR_12
PCIE_PVDD_12
PCIE_VSS
(1.2V)
(1.2V)
PCIE_VSS
(2 OF 7)
PCI EXPRESS POWER & GROUND
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
PCIE_REFCLKPPCIE_REFCLKN
PERST*PERST*_MASK
PCIE_TEST
PCIE_RX15N
PCIE_RX14P
PCIE_RX13N
PCIE_RX12NPCIE_RX12P
PCIE_RX1P
PCIE_TX0PPCIE_TX0N
PCIE_TX1P
PCIE_TX2N
PCIE_TX1N
PCIE_TX2P
PCIE_TX3PPCIE_TX3N
PCIE_TX4PPCIE_TX4N
PCIE_TX5PPCIE_TX5N
PCIE_TX6PPCIE_TX6N
PCIE_TX7PPCIE_TX7N
PCIE_TX8NPCIE_TX8P
PCIE_TX9P
PCIE_TX10P
PCIE_TX9N
PCIE_TX10N
PCIE_TX11PPCIE_TX11N
PCIE_TX12PPCIE_TX12N
PCIE_TX13NPCIE_TX13P
PCIE_TX14NPCIE_TX14P
PCIE_TX15NPCIE_TX15P
PCIE_CALRPPCIE_CALRN
PCIE_CALI
PCIE_RX1N
PCIE_RX2NPCIE_RX2P
PCIE_RX3PPCIE_RX3N
PCIE_RX4PPCIE_RX4N
PCIE_RX5PPCIE_RX5N
PCIE_RX6NPCIE_RX6P
PCIE_RX7NPCIE_RX7P
PCIE_RX8PPCIE_RX8N
PCIE_RX9PPCIE_RX9N
PCIE_RX10PPCIE_RX10N
PCIE_RX11PPCIE_RX11N
PCIE_RX13P
PCIE_RX14N
PCIE_RX0NPCIE_RX0P
PCIE_RX15P
PCI-EXPRESS BUS INTERFACE
(1 OF 7)
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
100mA
NC
2000mA
10% 16V
0.1uF
402X5R
C8481 1 2
10% 16V X5R
0.1uF
402
C8482 1 2
X5R10% 16V 402
0.1uFC8479 1 2
10% 16V X5R
0.1uF
402
C8480 1 2
10% 16V X5R
0.1uF
402
C8477 1 2
0.1uF
10% 16V X5R 402
C8478 1 2
10% 16V X5R
0.1uF
402
C8475 1 2
10% 16V X5R
0.1uF
402
C8476 1 2
10% 16V X5R
0.1uF
402
C8473 1 2
10% 16V X5R
0.1uF
402
C8474 1 2
0.1uF
X5R16V10% 402
C8420 1 2
10% 16V X5R
0.1uF
402
C8471 1 2
10% 16V X5R
0.1uF
402
C8472 1 2
10% 16V X5R
0.1uF
402
C8469 1 2
10% 16V X5R
0.1uF
402
C8470 1 2
10% 16V X5R
0.1uF
402
C8467 1 2
402X5R16V
0.1uF
10%
C8421 1 2
10% 16V X5R
0.1uF
402
C8468 1 2
10% 16V X5R
0.1uF
402
C8465 1 2
10% 16V X5R
0.1uF
402
C8466 1 2
10% 16V X5R
0.1uF
402
C8463 1 2
10% 16V X5R
0.1uF
402
C8464 1 2
402
0.1uF
X5R16V10%
C8450 1 2
10% 16V X5R
0.1uF
402
C8461 1 2
10% 16V X5R 402
0.1uFC8462 1 2
10% 16V X5R
0.1uF
402
C8459 1 2
10% 16V X5R
0.1uF
402
C8460 1 2
10% 16V X5R
0.1uF
402
C8457 1 2
0.1uF
402X5R16V10%
C8451 1 2
10% 16V X5R 402
0.1uFC8458 1 2
5621%
402
1/16WMF-LF
R84961
2
1/16W
402MF-LF
2.0K1%
R84951
2
1/16WMF-LF402
1%1.47K
R84971
2
OMIT
M56PBGA
U8400
N23
P23
U23
V23
W23
N25
N26
AM28
AM29
AM30
AM31
N27
N28
N29
AL29
AL30
AL31
AL32
AM27
N24
N30
R25
R26
R29
R31
T24
T26
T27
T29
U24
U26
P24
U28
U29
U30
V24
V25
V26
V29
V31
W24
W26
P25
W27
W29
Y24
Y26
Y28
Y29
Y30
AA23
AA25
AA26
P26
AA29
AA31
AB23
AB26
AB27
AB29
AC23
AC24
AC26
AC28
P28
AC29
AC30
AD25
AD26
AD29
AD31
AE26
AE27
AE29
AF26
P29
AF28
AF29
AF30
AG25
AG26
AG29
AG31
AH24
AH26
AH27
P30
AH29
AJ26
AJ28
AJ29
AJ30
AJ32
AK26
AK29
AK30
AK31
R23
AK32
AL27
R24
10%
402
6.3V
1uF
CERM
C8402 1
2
402
0.1uF
X5R16V10%
C8448 1 2
1uF6.3V10%
CERM402
C8401 1
2
402CERM6.3V10%1uF
C8407 1
2
402
0.1uF
X5R16V10%
C8449 1 2
1uF
402CERM6.3V10%
C8413 1
2
10%6.3VCERM402
1uFC8406 1
2
6.3VCERM402
10%1uF
C8411 1
2
1uF
402CERM6.3V10%
C8412 1
2
22UF6.3V
805CERM
20%
C84001
2
22UF6.3V
805CERM
20%
C84101
2
402
0.1uF
X5R16V10%
C8446 1 2
20%
CERM805
6.3V
22UFC84051
2
0402200-OHM-EMI
L8400
1
2
22UF6.3V
805CERM
20%
C8414 1
2
402
0.1uF
X5R16V10%
C8447 1 2
402
0.1uF
X5R16V10%
C8444 1 2
402
0.1uF
X5R16V10%
C8445 1 2
402
0.1uF
X5R16V10%
C8442 1 2
402
0.1uF
X5R16V10%
C8443 1 2
402
0.1uF
X5R16V10%
C8440 1 2
402
0.1uF
X5R16V10%
C8441 1 2
402
0.1uF
X5R16V10%
C8438 1 2
0.1uF
402X5R16V10%
C8439 1 2
402
0.1uF
X5R16V10%
C8436 1 2
402
0.1uF
X5R16V10%
C8437 1 2
402
0.1uF
X5R16V10%
C8434 1 2
402
0.1uF
X5R16V10%
C8435 1 2
402
0.1uF
X5R16V10%
C8432 1 2
402
0.1uF
X5R16V10%
C8433 1 2
402
0.1uF
X5R16V10%
C8430 1 2
0.1uF
402X5R16V10%
C8431 1 2
402
0.1uF
X5R16V10%
C8428 1 2
402
0.1uF
X5R16V10%
C8429 1 2
402
0.1uF
X5R16V10%
C8426 1 2
402
0.1uF
X5R16V10%
C8427 1 2
10% 402
0.1uF
X5R16V
C8424 1 2
402
0.1uF
X5R16V10%
C8425 1 2
16V 402X5R10%
0.1uFC8422 1 2
402
0.1uF
X5R16V10%
C8423 1 2
402
0.1uF
X5R16V10%
C8455 1 2
402
0.1uF
X5R16V10%
C8456 1 2
OMIT
BGA
M56PU8400
AB24
AE24
AD24
AK28
AL28
AH31
AJ31
V30
W30
U32
V32
T31
U31
R30
T30
P32
R32
N31
P31
AG30
AH30
AF32
AG32
AE31
AF31
AD30
AE30
AC32
AD32
AB31
AC31
AA30
AB30
Y32
AA32
W31
Y31
AA24
AJ27
AK27
W25
Y25
V28
W28
U27
V27
T25
U25
R28
T28
P27
R27
AH25
AJ25
AG28
AH28
AF27
AG27
AE25
AF25
AD28
AE28
AC27
AD27
AB25
AC25
AA28
AB28
Y27
AA27
AG24
AF24
10% 16V X5R
0.1uF
402
C8485 1 2
10% 16V X5R
0.1uF
402
C8486 1 2
10% 16V X5R
0.1uF
402
C8483 1 2
10% 16V X5R
0.1uF
402
C8484 1 2
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
ATI M56 PCI-E
70 87
03001051-7164
PP1V2_D3C
PEG_D2R_C_P<15>
PEG_D2R_C_P<14>
PEG_D2R_C_P<13>
PEG_D2R_C_P<12>
PEG_D2R_C_P<11>
PEG_D2R_C_P<10>
PEG_D2R_C_P<9>
PEG_D2R_C_P<8>
PEG_D2R_C_P<7>
PEG_D2R_C_P<6>
PEG_D2R_C_P<5>
PEG_D2R_C_P<4>
PEG_D2R_C_P<3>
PEG_D2R_C_P<2>
PEG_D2R_C_P<1>
PEG_D2R_C_P<0>
PEG_D2R_N<15>
PEG_D2R_N<14>
PEG_D2R_P<15>
PEG_D2R_N<13>
PEG_D2R_P<14>
PEG_D2R_P<13>
PEG_D2R_P<12>
PEG_D2R_P<11>
PEG_D2R_N<11>
PEG_D2R_P<10>
PEG_D2R_N<10>
PEG_D2R_P<9>
PEG_D2R_N<9>
PEG_D2R_N<8>
PEG_D2R_P<8>
PEG_D2R_N<7>
PEG_D2R_P<7>
PEG_D2R_N<6>
PEG_D2R_N<5>
PEG_D2R_P<6>
PEG_D2R_P<5>
PEG_D2R_P<4>
PEG_D2R_N<4>
PEG_D2R_P<3>
PEG_D2R_N<3>
PEG_D2R_P<2>
PEG_D2R_N<2>
PEG_D2R_P<1>
PEG_D2R_N<0>
PEG_D2R_P<0>
PEG_D2R_C_N<15>
PEG_D2R_C_N<14>
PEG_D2R_C_N<13>
PEG_D2R_C_N<12>
PEG_D2R_C_N<11>
PEG_D2R_C_N<10>
PEG_D2R_C_N<9>
PEG_D2R_C_N<8>
PEG_D2R_C_N<7>
PEG_D2R_C_N<6>
PEG_D2R_C_N<5>
PEG_D2R_C_N<4>
PEG_D2R_C_N<3>
PEG_D2R_C_N<1>
PEG_D2R_C_N<0>
GPU_PCIE_CALRN
PEG_R2D_C_N<15>
PEG_CLK100M_GPU_N
PEG_RESET_L
PEG_CLK100M_GPU_P
PEG_R2D_C_P<15>
PEG_R2D_C_N<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<12>
PEG_R2D_C_N<11>
PEG_R2D_C_P<11>
PEG_R2D_C_N<10>
PEG_R2D_C_P<10>
PEG_R2D_C_N<9>
PEG_R2D_C_P<8>
PEG_R2D_C_N<8>
PEG_R2D_C_N<7>
PEG_R2D_C_P<7>
PEG_R2D_C_N<6>
PEG_R2D_C_N<5>
PEG_R2D_C_P<6>
PEG_R2D_C_N<4>
PEG_R2D_C_P<4>
PEG_R2D_C_N<3>
PEG_R2D_C_P<3>
PEG_R2D_C_N<2>
PEG_R2D_C_P<2>
PEG_R2D_C_P<1>
PEG_R2D_C_N<1>
PEG_R2D_C_P<0>
PEG_R2D_C_N<0>
PEG_R2D_P<15>
PEG_R2D_P<14>
PEG_R2D_P<13>
PEG_R2D_P<12>
PEG_R2D_P<11>
PEG_R2D_P<10>
PEG_R2D_P<9>
PEG_R2D_P<8>
PEG_R2D_P<7>
PEG_R2D_P<6>
PEG_R2D_P<4>
PEG_R2D_P<3>
PEG_R2D_P<2>
PEG_R2D_P<1>
PEG_R2D_P<0>
PEG_R2D_N<15>
PEG_R2D_N<14>
PEG_R2D_N<13>
PEG_R2D_N<12>
PEG_R2D_N<10>
PEG_R2D_N<11>
PEG_R2D_N<7>
PEG_R2D_N<8>
PEG_R2D_N<9>
PEG_R2D_N<5>
PEG_R2D_N<6>
PEG_R2D_N<3>
PEG_R2D_N<2>
PEG_R2D_N<1>
PEG_R2D_N<0>
GPU_PCIE_CALI
GPU_PCIE_CALRP
PEG_R2D_C_N<14>
PEG_R2D_C_P<14>
PEG_R2D_C_N<13>
PEG_R2D_C_P<5>
PEG_R2D_N<4>
PEG_D2R_C_N<2>
PEG_R2D_C_P<9>
PEG_R2D_P<5>
PEG_D2R_N<12>
PEG_D2R_N<1>
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
VOLTAGE=1.2V
PP1V2_S0_PCIE_GPU_PVDD_F
PP1V2_D3CPP1V2_D3C
82D7
82D7
82D7
77B8
77B8
77B8
70C7
70C7
70C7
70A1
70A1
67D8
67D8
67D8
67D6
67D6
67D6
67C6
34B5
34B5
67C6
67C6
63B1
34B4
26B1
34B4
63B1
63B1
5D4
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13C3
13D3
13D3
13C3
13D3
13C3
13D3
13D3
13C3
13C3
13C3
13D3
13C3
13D3
13C3
13D3
13C3
13D3
13C3
13B3
33B4
5C4
33B4
13A3
13B3
13A3
13A3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13B3
13C3
13B3
13B3
13C3
13B3
13C3
13B3
13A3
13B3
13B3
13B3
13C3
13D3
5D4
5D4
www.vinafix.vn
PGND
PHASE
UG
LG
PVCC
FCCM
EN
PGOODCOMP
FSET
ISEN
FB
VO
BOOT
VIN
THRMLPAD
VCC
PGEN
VIN
ADJ
VOUT
GND
G
D
S
OUT
G
D
S
G
D
S
G
D
S
CAP-
FB
OUT
SHDN_L
CAP+
LIN/SKIP_L
IN
GND
V-
V++
-
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
<Rb>
<Rc>
GPU VCore Supply
close to inductor
Placement Note:
R8590, R8594 and R8597Keep C8590, C8591
Req = Rb || Rc
Back-Bias Negative Supply
GPU VCore Current Sense
Back-bias negative supply provides VSS - 0.55V when active.
Vout = -0.55V
Vout = 1.10V / 0.95V
<Rb> Recommended values:
Ra = Vin / 50 uA
Rb = -Vout / 50 uA
When inactive, provides VSS to BBN pins.
(LDO limit)
180mA max output
Vout = (1.58V /) 1.50V
Req = Rb || Rc
Vout(low) = 0.59V * (1 + Ra/Rb)
<Rc>
<Ra>
125mA max output
(Regulator limit)
Vout = -Vin * Rb / Ra
<Ra>
satisfy BBP FET Vgs (where Vs = 1.2V)
<Ra>
<Rb>
When inactive, provides VDDC to BBP pins.
For proper M56 power sequence, thisVin must be > 2.8VSI3446DV max Vgs is 1.6V
Pull-up voltage must be high enough to
NOTE: BBP tracks VDDC based on GPU voltage GPIO.
pull-up must be powered before VCore
Vout(high) = 0.59V * (1 + Ra/Req)
Back-bias positive supply provides VDDC + 0.5V when active.
Back-Bias Positive SupplyVout(low) = 0.6V * (1 + Ra / Rb)
Vout(high) = 0.6V * (1 + Ra / Req)
(L8520 limit)
18A max output
(GPUVCORE_FB)
Stuff 4.7ohm fordecreased slew rate
2.5V
330UF
POLYCASE-D2E-LF
20%
C8542 1
2
402
1%
MF-LF1/16W
3.01KR85211
2
402
1%5.11K
MF-LF1/16W
R85221
2
1/16W1%
402MF-LF
5.11KR85101 2
20%2.2UF
603CERM16.3V
C8502 1
2
2.2UF
603
20%
CERM16.3V
C8500 1
2603X5R16V10%1uF
C8501 1
2
QFNISL6269BCRZ
CRITICAL
U8500
13
5
4
6
3
7
9
11
10
16
15
12
17
14
2
1
85%
15pF50V
402CERM
C8507 1
2
150K
1/16W1%
402MF-LF
R85081
2
470pF
CERM50V
402
10%
C8508 1
2
402
5%
MF-LF1/16W
0R85041
2
0
1/16W5%
402MF-LF
NO STUFF
R85051
2
57.6K
MF-LF402
1%1/16W
R85061
2
0.01UF
CERM402
10%16V
C8506 1
2
22UF
805CERM
20%6.3V
C8540 1
2
6.3V
22UF20%
805CERM
C85411
2SM
XW8500
1 2
NO STUFF
25V
1000pF
X7R402
10%
C8522 1
2
NO STUFF
402
25VX7R
1000pF10%
C85211
2
6.3V20%
805CERM
22UFC8556 1
2
805
6.3VCERM
20%22UFC85571
2
24.9K1%
402MF-LF1/16W
R85551
2
MF-LF402
1%1/16W
16.2KR85561
2
0.01UF
CERM402
10%16V
C8555 1
2
CRITICAL
SOT23-6-LFFAN2558U8550
53
2
4
1 6
20%6.3V
2.2uF
603CERM1
C8551 1
2
2.5V
330UF20%
CASE-D2E-LFPOLY
C85431
2
7.32K
402
1%
MF-LF1/16W
R85231 2
10K
MF-LF402
5%1/16W
R85601
2
SOT23-LF2N7002Q8570
3
1
2
MF-LF1/16W
402
4.7K1%
R85701
2
CERM402
10%0.0022uF50V
NO STUFFC85701
2
1/16W5%
402MF-LF
0
GPU_BB_CTL
R85611 2
10%
CERM402
470pF
50V
C8598
12
55B6
10%
CERM
470pF
50V
402
C8592
12
1/16W1%
1M
MF-LF402
R85981 2
1/16WMF-LF
1%
1M
402
R85921 2
6.3V10%
402CERM
1uFC85951
2
1%1/16W
402MF-LF
20.0KR85931 2
1/16W
402MF-LF
1%
20.0KR85911 2
402MF-LF1/16W
1%649
R85901
2
1/16WMF-LF402
1K
1%
NO STUFFR85941 2
10%
CERM-X5R
0.47UF
6.3V
402
C8590
12
0603-LF
10KOHM-5%
CRITICAL
R8597
1
2
402
1%1K
1/16WMF-LF
R85961
2
MF-LF402
174K
1/16W1%
NO STUFF
R85541
2
402
10%16V
0.022uF
CERM-X5R
C8523 1
2
10K
402MF-LF1/16W
5%
R85241
2
1/16W5%
MF-LF402
10KR85251 2
CERM50V10%
0.0022uF
NO STUFF
402
C8520 1
2
5%1/16WMF-LF
10K
402
R85261
2
2N7002DW-X-FSOT-363
Q8523
3
5
4
SOT-3632N7002DW-X-FQ8523
6
2
1
SOT23-LF2N7002
NO STUFF
Q8554
3
1
2
1%
MF-LF1/16W
402
68.1KR85871
2
MF-LF1/16W
402
1%11.3K
R85881
2
20%6.3VCERM1603
2.2uFC85811
2
603
20%10uF
X5R6.3V
C8580 1
2
6.3V20%
CERM
22UF
805
C85891
2
MAX1673SOI
CRITICAL
U8580
3
2
6
7
8
1
5
4
TSOP-LFSI3446DVQ8575
1
2
5
63
4
NO STUFF
0
MF-LF402
5%1/16W
R85201
2
20%6.3VX5R402
0.22UFC85091
2
20%33uF
16VPOLYCASED2E-SM
CRITICALC85301
2
RJK0305DPB
CRITICAL
LFPAK
Q8520
5
4
1 2 3
RJK0301DPB
CRITICAL
LFPAK
Q8522
5
4
1 2 3
RJK0301DPB
CRITICAL
LFPAK
Q8521
5
4
1 2 3
CRITICAL
1.2UH
FDA1055
L8520
1 2
10%
402
6.3V
0.22UF
CERM-X5R
C8591
12
HPA00141AIDCKR
CRITICAL
SC70-5
U85951
3
4
2
5
4.7
402MF-LF1/16W
5%
R85091
2
SMXW8502
1 2
SMXW8501
1 2
SYNC_DATE=(MASTER)
GPU (M56) Core SuppliesSYNC_MASTER=(MASTER)
03001
71 87
051-7164
MIN_NECK_WIDTH=0.25 mm
GPUVCORE_BOOT_RMIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmGPUVCORE_BOOT
GND_GPUVCORE_SGND
P1V2R2V5D3C_EN_LS5V
GPUISENS_POS
GPUVCORE_IOUT
PP3V3_S0
GPUBBP_ADJ
GPUBB_EN_L
PPVCORE_D3C_GPU
GPUBB_EN_L
PPBB_S0_GPU
GPUBB_ENGPU_GENERICD
PP5V_S0
GPU_VCORE_HIGH
GPUBB_EN
PP3V3_D3C
GPUBBP_ADJ_LOW
GPUVCORE_COMP_R
GPUVCORE_FSET
GPUVCORE_COMP
GPUVCORE_FCCMGPUVCORE_EN
GPU_VCORE_LOW
PP3V3_D3C
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmGPUBBN_CAPN
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmGPUBBN_CAPP
GPUBB_EN
GPUVCORE_FB_RC
GPUISENS_NTC
PNBB_S0_GPU
PP3V3_D3C
GPUBBN_FB
PP5V_S5
GPU_VCORE_HIGH
MIN_LINE_WIDTH=0.6 mmGPUVCORE_UG
MIN_NECK_WIDTH=0.25 mm
GPUVCORE_ISEN
GPUISENS_RC
GPUISENS_NEG
PPBUS_G3H
MIN_NECK_WIDTH=0.25 mmSWITCH_NODE=TRUE
GPUVCORE_PHASEMIN_LINE_WIDTH=0.6 mm
GPUVCORE_FB_LOW
GPU_VCORE_HIGH_RC
GPUVCORE_FB
PPVCORE_D3C_GPU
GND_GPUVCORE_PGND
MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
GPUVCORE_LG
82D5 82C6 82B3 82A4 79D3 79A8
67C5 67C3 67B3 67A3 66B6 66B5 66B1 65D6 65B3
62A6 61D8 61A5 60D4 60C7 58C7 58C4 57B6 54D4
54B5 52D3 49C7 49C4 49B5 40B6 36D6 34A8 33D8
33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3 26D1
26B8 26B6 26B4 25D8 25D3 25C6 25C4 25B8 25B4
25A4
81B3
24D3
80B5
24C3
80A1
79B7
24B5
79B8
69C1
24B3
67B3
67C3
68D5
23D5
67B1
67C1
67C3
23B3
67A1
82D7
82D7
82D7
67B1
67C1
22B5
66B5
82A7
82A7
82A7
66D8
65D6
21D3
62B1
80D5
80D5
80D5
66B8
65B7
21C3
61D7
80B2
80B2
80B2
65D6
64D7
20B4
58C7
77D2
77D2
77D2
65B7
64A6
20A4
58C4
77C6
77C6
77C6
64C8
62D7
19C7
77A7
57B5
77B7
77B7
77B7
62C8
61D7
77A7
19C6
72D8
55A8
74D6
74D6
74D6
62B6
61D4
72D8
17C6
71C1
53C4
74B2
74B2
74B2
62B2
55D3
71B7
66D8
14D6
67A8
36D6
71C4
71C4
71B8
62A4
43D8
67A8
66D7
14C7
67A6
31C5
71A4
71B8
71A4
52B5
42B8
67A6
66D4
10C5
55C7
72D6
25D8
67A5 77C3
67A5
72D2
67A5
47C7
41C6
55C7
63C3
5D4
55A5
67D3
71B8
5D4
71A6
67A3 74C8
67A3
71B8
67D3
67A3
25C8
5C4
55A5
63B3
5A4
5C7
71B7
5B2
71A5
67D1
71A4
77C3
5D2
71B4
71A4
65C7
5C7
5D7
66B5
74C5
65C7
71A6
67D1
65C7
5D4
71A8
5A1
5B2
www.vinafix.vn
MEMORY & CORE POWER / GROUND
(1.0V/1.2V)
(1.0V/1.2V)
(7 OF 7)
VDDR1VSS
VSS
(1.8V/2.0V) VSS
VDDC
BBP BBN
VDDCI
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
100mA (Preliminary)
100mA (Preliminary)
2.0A @ 500MHz 1.8V GDDR3
14.2A @ 445/452MHz Core/Mem Clk for VDDC+VDDCI
- =PP1V5_GPU_VDD15Power aliases required by this page:
Page Notes
Signal aliases required by this page:
BOM options provided by this page:
- =PP1VR1V3_GPU_VCORE
(NONE)
(NONE)
OMIT
BGA
M56PU8400
K15
R10
Y23
AC17
K18
M23
V10
AC14
P14
P18
U15
U16
U17
V14
V15
V16
V18
W14
W15
W19
P19
AC11
AC12
AD11
R15
R17
R18
R19
T16
T17
T18
K14
P16
T14
T23
U19
W10
W17
A3
A9
F32
H13
H19
J1
J10
J11
J13
J18
J19
J20
A12
J32
K11
K13
K19
K20
K21
K24
L23
L24
L32
A15
M1
M10
N9
N10
P8
P9
P10
R1
R9
V1
A18
Y8
Y9
Y10
AA1
A21
A24
A30
C1
C32
K23
A2
B1
R3
R6
R14
R16
T10
T15
T19
U1
U5
U6
B32
U7
U8
U9
U10
U14
U18
V3
V6
V17
V19
C4
W16
W18
Y1
Y5
Y6
Y7
AA4
AA6
AC9
AC10
C5 AD6
AD7
AD8
AD9
AD10
AD13
AD14
AD15
AD16
AD17
C6
AE8
AE14
AE15
AE16
AE17
AF14
AF16
AG11
AG16
AG23
C9
AH10
AH11
AH16
AJ10
AK16
AL1
AL13
AM2
AM13
C10
C15
C18
C20
A8
C21
C24
C27
D11
D30
E5
E8
E9
E12
E13
A11
E16
E19
E25
E28
E30
E32
F3
F6
F10
F13
A13
F15
F16
F18
F19
F21
F22
F24
F27
F30
G13
A16
G16
G19
G20
G21
G22
G25
H1
H5
H7
H16
A19
H20
H21
H28
H32
J3
J6
J9
J12
J16
J21
A22
J24
J28
J30
K10
K12
K16
K17
K27
K30
L1
A25
L6
L7
L29
M3
M6
M7
M8
M9
M24
M28
A31
M32
N3
N7
N8
P1
P5
P6
P7
P15
P17
0.1uF
402X5R16V10%
C8697 1
2
10%
402
1uF
CERM6.3V
C8696 1
2
10%
402
1uF
CERM6.3V
C86911
2
0.1uF
402X5R16V10%
C86921
2
CERM6.3V
1uF
402
10%
C86101
26.3VCERM
1uF
402
10%
C86091
26.3VCERM
1uF
402
10%
C86081
26.3VCERM
1uF
402
10%
C86071
26.3VCERM
1uF
402
10%
C86061
26.3VCERM
1uF
402
10%
C86051
2
402
6.3VCERM
1uF10%
C86041
2
10%
402
1uF
CERM6.3V
C86161
2
10%
402
1uF
CERM6.3V
C86151
2
10%
402
1uF
CERM6.3V
C86141
2
10%
402
1uF
CERM6.3V
C86131
2
10%
402
1uF
CERM6.3V
C86121
2
1/10W
603
05%
MF-LF
R86301
2
6.3VCERM
1uF
402
10%
C86341
26.3VCERM
1uF
402
10%
C86331
26.3VCERM
1uF
402
10%
C86321
26.3VCERM
1uF
402
10%
C86311
2
6.3VCERM
1uF
402
10%
C86601
2
10%
402
1uF
CERM6.3V
C86661
2
6.3VCERM
1uF
402
10%
C86591
26.3VCERM
1uF
402
10%
C86581
26.3VCERM
1uF
402
10%
C86571
2
10%
402
1uF
CERM6.3V
C86651
2
10%
402
1uF
CERM6.3V
C86641
2
10%
402
1uF
CERM6.3V
C86631
2
6.3VCERM
1uF
402
10%
C86561
2
10%
402
1uF
CERM6.3V
C86621
2
6.3VCERM
1uF
402
10%
C86551
2
10%
402
1uF
CERM6.3V
C86611
2
6.3VCERM
1uF
402
10%
C86721
2
10%
402
1uF
CERM6.3V
C86781
2
6.3VCERM
1uF
402
10%
C86711
26.3VCERM
1uF
402
10%
C86701
26.3VCERM
1uF
402
10%
C86691
2
10%
402
1uF
CERM6.3V
C86771
2
10%
402
1uF
CERM6.3V
C86761
2
10%
402
1uF
CERM6.3V
C86751
2
6.3VCERM
1uF
402
10%
C86681
2
10%
402
1uF
CERM6.3V
C86741
2
CERM6.3V
1uF
402
10%
C86671
2
10%
402
1uF
CERM6.3V
C86731
2
6.3VCERM
22UF
805
20%
C8653 1
2
20%6.3VCERM805
22UFC8652 1
2CERM6.3V
22UF
805
20%
C8651 1
2
22UF
805CERM6.3V20%
C8650 1
2
10%
402
1uF
CERM6.3V
C86831
2
10%
402
1uF
CERM6.3V
C86821
2
10%
402
1uF
CERM6.3V
C86811
2
10%
402
1uF
CERM6.3V
C86801
26.3VCERM
1uF
402
10%
C86791
2
22UF
805CERM6.3V20%
C8601 1
2
6.3VCERM
1uF
402
10%
C86111
2
20%6.3VCERM805
22UFC8690 1
2
20%6.3VCERM805
22UFC86951
2
20%6.3VCERM805
22UFC8630 1
2
20%6.3VCERM805
22UFC8600 1
2
ATI M56 Core Power
03001051-7164
8772
SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PNBB_S0_GPU
PP1V8_D3C
PPBB_S0_GPU
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.5 mm
PPVCORE_S0_GPU_VDDCIVOLTAGE=1.2V
PPVCORE_D3C_GPU
82D7
76D8 76D5 75D8 75D5 73B8
77A7
73B5
71C1
73A8
71B7
73A5
67A8
67B8
67A6
71A2
67B6
71B5
55C7
67D3
64A4
67D3
55A5
67D1
5D4
67D1
5B2
www.vinafix.vn
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DQA_58DQA_59
WEA1*
DQA_61DQA_62
MVREFD_0MVREFS_0
VDDRH0
MAA_0MAA_1MAA_2MAA_3MAA_4MAA_5MAA_6MAA_7MAA_8MAA_9MAA_10MAA_11MAA_12MAA_13MAA_14MAA_15
DQMA_0*DQMA_1*DQMA_2*DQMA_3*DQMA_4*DQMA_5*DQMA_6*DQMA_7*
QSA_1QSA_2
QSA_0
QSA_3QSA_4QSA_5QSA_6QSA_7
QSA_0*QSA_1*QSA_2*QSA_3*QSA_4*QSA_5*QSA_6*QSA_7*
CLKA0CLKA0*
CSA0_0*
CKEA0
RASA0*
CASA0*
WEA0*
ODTA0
CLKA1*
CSA1_0*
CKEA1
RASA1*
CASA1*
ODTA1
DQA_0DQA_1DQA_2DQA_3DQA_4DQA_5DQA_6DQA_7DQA_8DQA_9DQA_10DQA_11DQA_12DQA_13DQA_14DQA_15DQA_16DQA_17DQA_18DQA_19DQA_20DQA_21DQA_22DQA_23DQA_24DQA_25DQA_26DQA_27DQA_28DQA_29DQA_30DQA_31DQA_32DQA_33DQA_34DQA_35DQA_36DQA_37DQA_38DQA_39DQA_40DQA_41DQA_42DQA_43
DQA_45DQA_44
DQA_46DQA_47DQA_48
DQA_50DQA_51
DQA_49
DQA_52DQA_53DQA_54DQA_55DQA_56DQA_57
DQA_60
DQA_63
VSSRH0
CLKA1
CSA0_1*
CSA1_1*
WRITE STROBE
READ STROBE
MEMORY INTERFACE A
(3 OF 7)
2.0V)(1.8V/
DQB_62
VDDRH1
MVREFS_1
MAB_0MAB_1MAB_2MAB_3MAB_4MAB_5MAB_6MAB_7MAB_8MAB_9MAB_10MAB_11MAB_12
MAB_15MAB_14MAB_13
DQMB_0*DQMB_1*DQMB_2*DQMB_3*DQMB_4*DQMB_5*DQMB_6*DQMB_7*
QSB_0QSB_1QSB_2
QSB_4QSB_3
QSB_5QSB_6QSB_7
QSB_0*QSB_1*QSB_2*QSB_3*QSB_4*QSB_5*QSB_6*QSB_7*
CLKB0*CLKB0
CSB0_0*
CKEB0
RASB0*
WEB0*
CASB0*
ODTB0
CLKB1CLKB1*
CKEB1
RASB1*
WEB1*
CASB1*
ODTB1
DRAM_RST
DQB_0DQB_1DQB_2DQB_3DQB_4DQB_5DQB_6DQB_7DQB_8DQB_9DQB_10DQB_11DQB_12
DQB_15DQB_14DQB_13
DQB_16DQB_17DQB_18
DQB_20DQB_19
DQB_22DQB_21
DQB_23
DQB_25DQB_24
DQB_27DQB_26
DQB_28
DQB_30DQB_29
DQB_33
DQB_31DQB_32
DQB_35DQB_34
DQB_37DQB_36
DQB_38
DQB_40DQB_41DQB_42DQB_43DQB_44DQB_45DQB_46
DQB_48DQB_47
DQB_52DQB_53
DQB_56DQB_55DQB_54
DQB_58DQB_57
DQB_60DQB_59
DQB_61
DQB_63
MVREFD_1
VSSRH1
TEST_MCLKTEST_YCLKMEMTEST
DQB_39
CSB1_0*
DQB_51DQB_50DQB_49
CSB0_1*
CSB1_1*
WRITE STROBE
READ STROBE
MEMORY INTERFACE B
(4 OF 7)
(1.8V/ 2.0V)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
- =PP1V8R2V0_S0_FB_GPU
BOM options provided by this page:
Signal aliases required by this page:
Power aliases required by this page:
(NONE)
(NONE)
NC
NC NC
NC
Page Notes
40.2
402MF-LF1/16W1%
R87221
2
40.2
402MF-LF1/16W
1%
R87201
2
10%16VX5R402
0.1uFC87231
2
1%1/16WMF-LF402
100R87231
2
1%
MF-LF402
100
1/16W
R87211
2
10%
X5R402
0.1uF16V
C8721 1
2
0.1uF
402X5R16V10%
C87131
2
40.2
402MF-LF1/16W1%
R87121
2
1/16W1%
MF-LF402
100R87131
2
0.1uF10%16VX5R402
C8711 1
2
40.2
402MF-LF1/16W
1%
R87101
2
1%1/16WMF-LF402
100R87111
2
MF-LF1/16W1%243
402
R87321
2
402
4.7K5%
1/16WMF-LF
R87311
2
MF-LF1/16W5%
402
4.7KR87301
2
4.7K
402MF-LF1/16W5%
R87331
2
OMIT
BGA
M56PU8400
C29
B22
B30
C22
D31
E31
B20
C19
B29
C28
B23
C23
M31
M30
L28
L27
J27
H29
G29
G27
M26
L26
M25
L25
L31
J25
G28
H27
H26
F26
G26
H25
H24
H23
H22
L30
J23
J22
E23
D22
D23
E22
E20
F20
D19
D18
H30
B19
B18
C17
B17
C14
B14
C13
B13
D17
E18
G31
E17
F17
E15
E14
F14
D13
H18
H17
G18
G17
G30
G15
G14
H14
J14
F31
M27
M29
H31
J29
J26
G23
E21
B15
D14
J17
D26
F28
D29
B27
E27
E29
B25
C25
D28
D25
E24
E26
D27
F25
C26
B26
C31
C30
F29
D24
J31
K31
K29
K28
K25
K26
F23
G24
D20
D21
B16
C16
D16
D15
H15
J15
B28
B24
A27
A28
B31
B21
OMIT
BGA
M56PU8400
D3
L2
C2
L3
B4
B5
N2
P3
D2
E3
K2
K3
B12
C12
E11
F11
F9
D8
D7
F7
G12
G11
H12
H11
B11
H9
E7
F8
G8
G6
G7
H8
J8
K8
L8
C11
K9
L9
K5
L4
K4
L5
N5
N6
P4
R4
C8
P2
R2
T3
T2
W3
W2
Y3
Y2
T4
R5
B7
T5
T6
V5
W5
W6
Y4
R8
T8
R7
T7
C7
V7
W7
W8
W9
B6
F12
D12
B8
D9
G9
K7
M5
V2
W4
T9
AA3
G4
E6
D4
F2
F5
D5
H2
H3
E4
H4
J5
G5
F4
H6
G3
G2
AA7
B3
C3
D6
J4
B9
B10
D10
E10
H10
G10
K6
J7
N4
M4
U2
U3
U4
V4
V8
V9
E2
J2
AA5
AA2
F1
E1
B2
M2
1uF
CERM
10%
402
6.3V
C8716 1
2
1uF6.3VCERM402
10%
C8715 1
26.3VCERM
1uF
402
10%
C8726 1
2
10%
402
1uF
CERM6.3V
C8725 1
2
0402
FERR-220-OHML8725
1 2
0402
FERR-220-OHML8715
1 2
73 87
051-7164 03001
ATI M56 Frame Buffer I/FSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PP1V8_D3C MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
PP1V8R2V0_S0_GPU_VDDRH0VOLTAGE=1.8V PP1V8_D3C
PP1V8R2V0_S0_GPU_VDDRH1
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
FB_B_DQ<17>FB_B_DQ<18>
FB_A_CLK_P<0>
FB_A_CS_L<0>
FB_A_BA<2>
PP1V8_D3CPP1V8_D3C
FB_A_CLK_N<0>
FB_A_BA<0>
FB_B_MA<11>FB_B_MA<10>
FB_A_MA<4>FB_A_MA<3>
FB_A_DQ<0>
FB_B_DQ<62>
GPU_MVREFS1
FB_B_MA<0>FB_B_MA<1>FB_B_MA<2>FB_B_MA<3>FB_B_MA<4>FB_B_MA<5>FB_B_MA<6>FB_B_MA<7>FB_B_MA<8>FB_B_MA<9>
NC_FB_B_MA12
FB_B_BA<1>FB_B_BA<0>FB_B_BA<2>
FB_B_DQM_L<0>FB_B_DQM_L<1>FB_B_DQM_L<2>FB_B_DQM_L<3>FB_B_DQM_L<4>FB_B_DQM_L<5>FB_B_DQM_L<6>FB_B_DQM_L<7>
FB_B_RDQS<0>FB_B_RDQS<1>FB_B_RDQS<2>
FB_B_RDQS<4>FB_B_RDQS<3>
FB_B_RDQS<5>FB_B_RDQS<6>FB_B_RDQS<7>
FB_B_WDQS<0>FB_B_WDQS<1>FB_B_WDQS<2>FB_B_WDQS<3>FB_B_WDQS<4>FB_B_WDQS<5>FB_B_WDQS<6>FB_B_WDQS<7>
FB_B_CLK_N<0>FB_B_CLK_P<0>
FB_B_CS_L<0>
FB_B_CKE<0>
FB_B_RAS_L<0>
FB_B_WE_L<0>
FB_B_CAS_L<0>
TP_FB_B_ODT<0>
FB_B_CLK_P<1>FB_B_CLK_N<1>
FB_B_CKE<1>
FB_B_RAS_L<1>
FB_B_WE_L<1>
FB_B_CAS_L<1>
TP_FB_B_ODT<1>
FB_DRAM_RST
FB_B_DQ<0>FB_B_DQ<1>FB_B_DQ<2>FB_B_DQ<3>FB_B_DQ<4>FB_B_DQ<5>FB_B_DQ<6>FB_B_DQ<7>FB_B_DQ<8>FB_B_DQ<9>FB_B_DQ<10>FB_B_DQ<11>FB_B_DQ<12>
FB_B_DQ<15>FB_B_DQ<14>FB_B_DQ<13>
FB_B_DQ<16>
FB_B_DQ<20>FB_B_DQ<19>
FB_B_DQ<22>FB_B_DQ<21>
FB_B_DQ<23>
FB_B_DQ<25>FB_B_DQ<24>
FB_B_DQ<27>FB_B_DQ<26>
FB_B_DQ<28>
FB_B_DQ<30>FB_B_DQ<29>
FB_B_DQ<33>
FB_B_DQ<31>FB_B_DQ<32>
FB_B_DQ<35>FB_B_DQ<34>
FB_B_DQ<37>FB_B_DQ<36>
FB_B_DQ<38>
FB_B_DQ<40>FB_B_DQ<41>FB_B_DQ<42>FB_B_DQ<43>FB_B_DQ<44>FB_B_DQ<45>FB_B_DQ<46>
FB_B_DQ<48>FB_B_DQ<47>
FB_B_DQ<52>FB_B_DQ<53>
FB_B_DQ<56>FB_B_DQ<55>FB_B_DQ<54>
FB_B_DQ<58>FB_B_DQ<57>
FB_B_DQ<60>FB_B_DQ<59>
FB_B_DQ<61>
FB_B_DQ<63>
GPU_MVREFD1
GPU_TEST_MCLKGPU_TEST_YCLKGPU_MEMTEST
FB_B_DQ<39>
FB_B_CS_L<1>
FB_B_DQ<51>FB_B_DQ<50>FB_B_DQ<49>
FB_A_DQ<58>FB_A_DQ<59>
FB_A_WE_L<1>
FB_A_DQ<61>FB_A_DQ<62>
GPU_MVREFD0
FB_A_MA<0>FB_A_MA<1>FB_A_MA<2>
FB_A_MA<5>FB_A_MA<6>FB_A_MA<7>
FB_A_MA<11>NC_FB_A_MA12
FB_A_DQM_L<0>FB_A_DQM_L<1>FB_A_DQM_L<2>FB_A_DQM_L<3>FB_A_DQM_L<4>
FB_A_CKE<0>
FB_A_RAS_L<0>
FB_A_CAS_L<0>
FB_A_WE_L<0>
TP_FB_A_ODT<0>
FB_A_CLK_N<1>
FB_A_CS_L<1>
FB_A_CKE<1>
FB_A_RAS_L<1>
FB_A_CAS_L<1>
TP_FB_A_ODT<1>
FB_A_DQ<1>FB_A_DQ<2>FB_A_DQ<3>FB_A_DQ<4>FB_A_DQ<5>FB_A_DQ<6>FB_A_DQ<7>FB_A_DQ<8>FB_A_DQ<9>FB_A_DQ<10>FB_A_DQ<11>FB_A_DQ<12>FB_A_DQ<13>FB_A_DQ<14>FB_A_DQ<15>FB_A_DQ<16>FB_A_DQ<17>FB_A_DQ<18>FB_A_DQ<19>FB_A_DQ<20>FB_A_DQ<21>FB_A_DQ<22>FB_A_DQ<23>FB_A_DQ<24>FB_A_DQ<25>FB_A_DQ<26>FB_A_DQ<27>FB_A_DQ<28>FB_A_DQ<29>FB_A_DQ<30>FB_A_DQ<31>FB_A_DQ<32>FB_A_DQ<33>FB_A_DQ<34>FB_A_DQ<35>FB_A_DQ<36>FB_A_DQ<37>FB_A_DQ<38>FB_A_DQ<39>FB_A_DQ<40>FB_A_DQ<41>FB_A_DQ<42>FB_A_DQ<43>
FB_A_DQ<45>FB_A_DQ<44>
FB_A_DQ<46>FB_A_DQ<47>FB_A_DQ<48>
FB_A_DQ<50>FB_A_DQ<51>
FB_A_DQ<49>
FB_A_DQ<52>FB_A_DQ<53>FB_A_DQ<54>FB_A_DQ<55>FB_A_DQ<56>
FB_A_DQ<63>
FB_A_CLK_P<1>
FB_A_MA<9>FB_A_MA<8>
FB_A_MA<10>
FB_A_BA<1>
FB_A_DQM_L<7>FB_A_DQM_L<6>
FB_A_RDQS<0>FB_A_RDQS<1>FB_A_RDQS<2>FB_A_RDQS<3>FB_A_RDQS<4>FB_A_RDQS<5>
FB_A_RDQS<7>FB_A_RDQS<6>
FB_A_WDQS<0>FB_A_WDQS<1>
FB_A_WDQS<3>FB_A_WDQS<2>
FB_A_WDQS<4>FB_A_WDQS<5>FB_A_WDQS<6>FB_A_WDQS<7>
FB_A_DQ<60>
FB_A_DQM_L<5>
FB_A_DQ<57>
GPU_MVREFS0
82D7
82D7
82D7
82D7
76D8 76D8
76D8 76D8
76D5 76D5
76D5 76D5
75D8
75D8
75D8
75D8
75D5 75D5
75D5
75D5
73B8 73B8
73B8 73B5
73B5 73B5
73A8 73A8
73A5 73A8
73A5 73A5
72B8 72B8
72B8 72B8
67B8 67B8
67B8 67B8
76A8
67B6 67B6
67B6 67B6
76A5
64A4 64A4
75A8
64A4 64A4
75A8
76B8
76B8
75B8
75B8
76B8
76B8
76B8
76B8
76B8
76B8
76B8
76B8
76B8
76B8
74C2
76A8
76A8
76A8
75A8
75B8
75B8
75B8
75B8
75B8
75B8
75B8
74C2
75B8
75B8
75B8
75A8
5D4 5D4
76B6
76B6
75B8
75B8
75A5
5D4 5D4
75B8
75A5
76B5
76B5
75B5
75B5
75B6
76A3
76B5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
74C1
76A5
76A5
76A5
76B6
76B6
76B6
76B6
76B3
76B3
76B3
76B3
76A8
76A8
76A8
76A5
76A8
76A5
76A5
76A5
76A8
76A8
76A8
76A8
76A5
76A5
76A5
76A5
76B8
76B8
76B8
76B8
76A8
76A8
76A8
76B5
76B5
76B5
76A5
76A5
76A5
75A5
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76B6
76B6
76B6
76B6
76B6
76B6
76B6
76B6
76B6
76A6
76B6
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76A6
76A3
76A6
76A3
76A3
76A3
76A3
76A3
76A3
76A3
76A3
76A3
76A3
76B3
76B3
76B3
76B3
76B3
76B3
76B3
76A3
76B3
76B3
76A3
76A3
76A3
76A3
76A3
76A3
76A3
76B5
76B3
76B3
76B3
75A3
75A3
75A5
75A3
75A3
75B5
75B5
75B5
75B5
75B5
75B5
75B5
74C1
75B6
75B6
75B6
75B6
75B3
75B8
75A8
75A8
75A8
75B5
75B5
75B5
75A5
75A5
75B6
75B6
75B6
75B6
75B6
75B6
75B6
75B6
75B6
75B6
75B6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75A6
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75B3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75A3
75B5
75B5
75B5
75B5
75A5
75B3
75B3
75A8
75A8
75A8
75A8
75A5
75A5
75A5
75A5
75A8
75A8
75A8
75A8
75A5
75A5
75A5
75A5
75A3
75B3
75A3
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TESTIN[9] PWRCNTL
SS_IN
Thm Mon Int
Required for debug access
Also required: GPIO10 - GPIO13
TESTOUT[9] ROMIDCFG[0]
IPD
ENA_BL TESTIN[7]
ROMSO TESTWR Reserved
ROMSI ROMIDCFG[3]
ROMSCK TESTOUT[8]
TESTOUT[10] ROMIDCFG[1]
IPD
IPD
IPD
IPD
TESTIN[8]
IPD
TESTIN[1] TX_DEEMPH_EN
Serial ROM TestBus Misc Straps
IPD
TESTIN[4] DEBUG_ACCESS
TESTOUT[11] ROMIDCFG[2]
VDD_VCL TESTIN[2] Reserved
TESTIN[3] Reserved
TESTIN[5] Reserved
TESTIN[6] Reserved
TESTIN[0] TX_PWRS_ENb
Unused signals
Renamed signals
ROMCFGID[3..0]
0100 = 64MB0110 = Reserved
0010 = 256MB0000 = 128MB
Required for debug access
Required for debug access
Required for debug access
Required for debug access
402MF-LF
10K5%
1/16W
R88001
2
GPU_DEEPMH_EN
10K5%1/16WMF-LF402
R88011
2
MF-LF
5%1/16W
10K
402
NO STUFF
R88021
2
5%1/16WMF-LF402
10K
NO STUFF
R88031
2
5%10K
1/16W
402MF-LF
NO STUFF
R88061
2402
1/16W5%
10K
MF-LF
NO STUFF
R88041
2
1/16WMF-LF
10K
402
5%
NO STUFF
R88081
2
10K
402MF-LF1/16W5%
R88051
2
5%
GPU_MEM_256M
1/16WMF-LF402
10KR88121
2
1/16WMF-LF402
10K
NO STUFF
5%
R88091
2
NO STUFF
5%1/16W
10K
402MF-LF
R88111
2402MF-LF
10K
1/16W5%
GPU_MEM_64M
R88131
2
402
4.7K
MF-LF1/16W
5%
R88911
2
MF-LF1/16W
4.7K5%
402
R88901
2
MF-LF402
10K5%
GPU_MEM_256M
1/16W
R88241
2
1/16WMF-LF
10K
402
5%
GPU_MEM_NOT_SAM
R88271
2
SYNC_DATE=08/08/2006
051-7164 03001
8774
GPU StrapsSYNC_MASTER=M57_MLB_MG
GPU_DDC_B_CLK
MAKE_BASE=TRUEGPU_MEMID
MAKE_BASE=TRUEGPU_MEM_256M
GPU_GPIO_2
GPU_GPIO_9
GPU_GPIO_3
GPU_GPIO_11
GPU_GPIO_6
GPU_GPIO_8
GPU_GPIO_12
GPU_GPIO_4
GPU_GPIO_5
MAKE_BASE=TRUETP_ATI_DVPDATA<23..16> ATI_DVPDATA<23..16>
MAKE_BASE=TRUEGPU_CLK27M GPU_CLK27M
MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_XTALOUT NC_GPU_XTALOUT
MAKE_BASE=TRUE NO_TEST=TRUENC_ATI_ROMCS_L NC_ATI_ROMCS_L
MAKE_BASE=TRUE NO_TEST=TRUENC_FB_A_MA12 NC_FB_A_MA12
MAKE_BASE=TRUE NO_TEST=TRUENC_FB_B_MA12 NC_FB_B_MA12
NO_TEST=TRUEMAKE_BASE=TRUENC_GPU_GENERICA NC_GPU_GENERICA
MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_GENERICB NC_GPU_GENERICB
NO_TEST=TRUEMAKE_BASE=TRUENC_GPU_GENERICC NC_GPU_GENERICC
NO_TEST=TRUEMAKE_BASE=TRUENC_GPU_VGA_G NC_GPU_VGA_GMAKE_BASE=TRUE NO_TEST=TRUE
NC_GPU_VGA_R NC_GPU_VGA_R
NO_TEST=TRUEMAKE_BASE=TRUENC_GPU_VGA_B NC_GPU_VGA_B
MAKE_BASE=TRUETP_GPU_VGA_HSYNC TP_GPU_VGA_HSYNC
MAKE_BASE=TRUETP_GPU_VGA_VSYNC TP_GPU_VGA_VSYNC
MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_TV_C NC_GPU_TV_C
NO_TEST=TRUEMAKE_BASE=TRUENC_GPU_TV_Y NC_GPU_TV_Y
MAKE_BASE=TRUE NO_TEST=TRUENC_GPU_TV_COMP NC_GPU_TV_COMP
NO_TEST=TRUEMAKE_BASE=TRUENC_LVDS_U_DATAP<3> NC_LVDS_U_DATAP<3>
NO_TEST=TRUEMAKE_BASE=TRUENC_LVDS_U_DATAN<3> NC_LVDS_U_DATAN<3>
NO_TEST=TRUEMAKE_BASE=TRUENC_LVDS_L_DATAP<3> NC_LVDS_L_DATAP<3>
NO_TEST=TRUEMAKE_BASE=TRUENC_ATI_DVPCLK NC_ATI_DVPCLK
NO_TEST=TRUEMAKE_BASE=TRUENC_LVDS_L_DATAN<3> NC_LVDS_L_DATAN<3>
MAKE_BASE=TRUE NO_TEST=TRUENC_ATI_DVPCNTL<2..0> ATI_DVPCNTL<2..0>
MAKE_BASE=TRUE NO_TEST=TRUENC_ATI_DVPDATA<15..0> ATI_DVPDATA<15..0>
MAKE_BASE=TRUEGPU_VCORE_LOW
GPU_MEMID
GPU_MEM_256M
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_25
NC_GPU_GPIO_21MAKE_BASE=TRUENO_TEST=TRUE
GPU_GPIO_1
GPU_GPIO_0
MAKE_BASE=TRUEGPU_BLON
TP_GPU_GPIO_10MAKE_BASE=TRUE
MAKE_BASE=TRUEGPU_CLK27MSS_IN
NC_GPU_GPIO_32
NC_GPU_GPIO_33
NC_GPU_GPIO_34
NC_GPU_GPIO_29
NC_GPU_GPIO_30
NC_GPU_GPIO_31
NC_GPU_GPIO_28
NC_GPU_GPIO_25
NC_GPU_GPIO_26
NC_GPU_GPIO_22
NC_GPU_GPIO_23
NC_GPU_GPIO_21
MAKE_BASE=TRUENC_GPU_GPIO_14 NO_TEST=TRUE
MAKE_BASE=TRUENC_GPU_GPIO_17 NO_TEST=TRUE
MAKE_BASE=TRUENC_GPU_GPIO_18
NO_TEST=TRUE
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_20NO_TEST=TRUEMAKE_BASE=TRUE
NC_GPU_GPIO_19
NO_TEST=TRUEMAKE_BASE=TRUE
NC_GPU_GPIO_23
NO_TEST=TRUEMAKE_BASE=TRUE
NC_GPU_GPIO_26
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_28
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_31NO_TEST=TRUE
NC_GPU_GPIO_30MAKE_BASE=TRUE
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_29
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_34MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_33MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_32
MAKE_BASE=TRUENO_TEST=TRUE
NC_GPU_GPIO_22
TP_GPU_GPIO_10
GPU_BLON
NC_GPU_GPIO_20
NC_GPU_GPIO_19
NC_GPU_GPIO_18
NC_GPU_GPIO_17
PP3V3_D3C
GPU_DDC_B_DATA
GPU_CLK27MSS_IN
GPU_VCORE_LOW
NC_GPU_GPIO_14
GPU_GPIO_13
PP3V3_D3C
82D7
82D7
82A7
82A7
80D5
80D5
80B2
80B2
77D2
77D2
77C6
77C6
77B7
77B7
74D6
74B2
71C4
71C4
71B8
71B8
77A5 77A5
77C3
71A4
77C3
71A4
74C1 74C2
77C3
82A4
74C8
82A4
67A5
74C5
77C3
67A5
77D5
77D5
77B3
34B4 34B4
77A5 77A5
77A3 77A3
74C1 74C2
74C1 74C2
77C3 77C3
77C3 77C3
77C3 77C3
78C3 78C3
78C3 78C3
78C3 78C3
78B3 78B3
78B3 78B3
78B3 78B3
78B3 78B3
78B3 78B3
78B3 78B3
78B3 78B3
78A3 78A3
77C3 77C3
78A3 78A3
77C3
74C8
77D5
77D5
77D5
77D5
77D3
77C3
34B4
77C5
77C5
77C5
77C5
77C5
77C5
77D5
77D5
77D5
77D5
77D5
77D5
77C3
77C3
77D5
77D5
77D5
77D5
77D5
77D5
77C5
77C5
77C5
77C5
77C5
77C5
77D5
77C3
77D3
77D5
77D5
77D5
77C3
67A3
34B4
74C5
77C3
67A3
78A3
74B8
74B8
77D3
77C3
77D3
77C3
77D3
77D3
77C3
77D3
77D3
77A3
34B2 34B2
74C1 74C2
74C1 74C2
73D5 73D5
73D1 73D1
74C1 74C2
74C1 74C2
74C1 74C2
74C1 74C2
74C1 74C2
74C1 74C2
74C1 74C2
74C1 74C2
74B1 74B2
74C1 74C2
74B1 74B2
74B1 74B2
74B1 74B2
74B1 74B2
74B1 74B2
74B1 74B2
77B3
77B3
71B4
74B6
74B6
74B8
74B8
77D3
77D3
74C8
74C8
34B2
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74B7
74C8
74C8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74C5
74C5
74B7
74B7
74B7
74C5
65C7
78A3
34B2
71B4
74C5
77C3
65C7
www.vinafix.vn
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IO
IO
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Connect to designated pin, then GND
DQA0-7 or DQA8-15. Bits can be swapped
how these bits are mapped for GPU to support
GDDR3 vendor/device identification scheme.
(NONE)
(NONE)
- =PP1V8_S0_FB_VDD- =PP1V8_S0_FB_VDDQ
U8900.J12U8900.J1
NCNC NC
NC
Connect to designated pin, then GNDU8900.J1 U8900.J12
within byte-lane, but software must know
NOTE: U8900 DQ0-7 MUST connect to GPU
Page NotesPower aliases required by this page:
Signal aliases required by this page:
BOM options provided by this page:
1/16W1%
402MF-LF
2.37KR89301
2
402
1/16W1%
MF-LF
5.49KR89311
2
16V10%
402X5R
0.1uFC89031
2
0.1uF16V10%
402X5R
C89021
2 16V10%
402X5R
0.1uFC89041
216V10%
402X5R
0.1uFC89011
2
16V10%
402X5R
0.1uFC89221
2 X5R16V10%
402
0.1uFC89231
2 16V10%
402X5R
0.1uFC89241
2 16V10%
402X5R
0.1uFC89251
2
0.1uF16V10%
402X5R
C89261
2
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
OMITCRITICAL
FBGA
U8900K9
H11
K11
L9
K10
M9
K4
H2
K3
L4
K2
M4
G9
G4
H3
F9
J11
J10
H9
F4
E3
E10
N10
N3
B2
B3
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
C2
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
C3
T2
T3
E2
F3
F2
G3
B11
B10
A9
H10
D3
D10
P10
P3
V9
J2
J3
V4
D2
D11
P11
P2
H4
A4
OMITCRITICAL
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
FBGA
U8900A2
A11
F1
F12
M1
M12
V2
V11
K1
K12
A1
A12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
C1
V1
V12
C4
C9
C12
E1
E4
E9
E12
H1
H12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
B1
B4
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
B9
B12
D1
D4
D9
D12
G2
G11
100
1/16W5%
402MF-LF
R89491
2
1K
1/16WMF-LF402
5%
R89411
2
1/16W1%
402MF-LF
243R89481
2
1/16W1%
402MF-LF
60.4R89451
2
60.4
MF-LF402
1%1/16W
R89461
2
0.1uF
X5R402
10%16V
C89331
2
2.37K
MF-LF402
1%1/16W
R89321
2
1/16W1%
402MF-LF
5.49KR89331
2
10%0.1uF
X5R402
16V
C89211
2
FERR-220-OHM
0402
L8910
1 2
FERR-220-OHM
0402
L8915
1 216V10%
402X5R
0.1uFC89151
2
10%16V
402X5R
0.1uFC89101
2
1%121
MF-LF402
1/16W
R89401
2
1%121
MF-LF402
1/16W
R89471
2
1/16W
402MF-LF
1211%
R89441
2
MF-LF
1%121
402
1/16W
R89431
2
1/16W
402MF-LF
1211%
R89421
2
1K
1/16W5%
402MF-LF
R89911
2
1/16W
402MF-LF
1211%
R89901
2
1%121
MF-LF402
1/16W
R89921
2
10%0.1uF
X5R402
16V
C89711
2
0.1uF
X5R402
10%16V
C89721
2
243
MF-LF402
1%1/16W
R89981
2
100
MF-LF402
5%1/16W
R89991
2
CRITICALOMIT
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
FBGA
U8950K9
H11
K11
L9
K10
M9
K4
H2
K3
L4
K2
M4
G9
G4
H3
F9
J11
J10
H9
F4
E3
E10
N10
N3
B2
B3
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
C2
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
C3
T2
T3
E2
F3
F2
G3
B11
B10
A9
H10
D3
D10
P10
P3
V9
J2
J3
V4
D2
D11
P11
P2
H4
A4
1/16W
402MF-LF
1211%
R89931
2
60.4
MF-LF402
1%1/16W
R89951
2
1%121
MF-LF402
1/16W
R89941
2
1/16W
402MF-LF
1211%
R89971
2
1/16W1%
402MF-LF
60.4R89961
2
5.49K
MF-LF402
1%1/16W
R89811
2
2.37K
MF-LF402
1%1/16W
R89801
2
5.49K
MF-LF402
1%1/16W
R89831
2
1/16W1%
402MF-LF
2.37KR89821
2
0.1uF
X5R402
10%16V
C89731
2
0.1uF
X5R402
10%16V
C89811
2
0.1uF
X5R402
10%16V
C89741
2
0.1uF
X5R402
10%16V
C89751
2
16V10%
402X5R
0.1uFC89831
2
CRITICALOMIT
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
FBGA
U8950A2
A11
F1
F12
M1
M12
V2
V11
K1
K12
A1
A12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
C1
V1
V12
C4
C9
C12
E1
E4
E9
E12
H1
H12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
B1
B4
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
B9
B12
D1
D4
D9
D12
G2
G11
0.1uF
X5R402
10%16V
C89761
2
0402
FERR-220-OHML8965
1 2
0402
FERR-220-OHML8960
1 2
X5R
0.1uF
402
10%16V
C89511
2
402
0.1uF
X5R
10%16V
C89521
2
0.1uF
X5R402
10%16V
C89601
2
0.1uF
X5R402
10%16V
C89531
2
0.1uF
X5R402
10%16V
C89651
2
0.1uF
X5R402
10%16V
C89541
2
22UF20%
805CERM6.3V
C8900 1
2
CERM
22UF
805
6.3V20%
C8920 1
2
20%6.3VCERM805
22UFC8950 1
2
805
20%6.3VCERM
22UFC8970 1
2
16V10%
402X5R
0.1uFC89311
2
75 87
03001051-7164
GDDR3 Frame Buffer ASYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
FB_A_RDQS<7>FB_A_RDQS<6>
FB_A_RAS_L<0>
FB_A_MA<0>
FB_A_MA<2>FB_A_MA<3>
PP1V8_D3C
PP1V8_S0_FB_A0_VDDA0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V
PP1V8_S0_FB_A0_VDDA1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V
PP1V8_D3C
PP1V8_S0_FB_A1_VDDA1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V
PP1V8_S0_FB_A1_VDDA0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_A1_VREF1
FB_A_DQ<46>FB_A_DQ<43>FB_A_DQ<42>FB_A_DQ<41>FB_A_DQ<40>
FB_A_DQ<38>FB_A_DQ<37>FB_A_DQ<36>
FB_A_DQ<33>FB_A_DQ<34>
FB_A_MA<5>FB_A_MA<4>
FB_A_CKE<0>
FB_A_CAS_L<0>
FB_DRAM_RST
FB_A_RDQS<0>
FB_A0_SEN
FB_A_RDQS<1>FB_A_RDQS<2>FB_A_RDQS<3>
FB_A_CLK_P<0>
FB_A_DQM_L<1>
FB_A_BA<2> FB_A_BA<2>
FB_A_RAS_L<1>
PP1V8_D3C
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_A0_VREF1
FB_A_WDQS<1>FB_A_WDQS<2>
FB_A_MA<11>
FB_A_MA<6>FB_A_MA<7>
FB_A_DQ<1>FB_A_DQ<0>
FB_A_DQ<2>FB_A_DQ<3>
FB_A_DQ<5>FB_A_DQ<6>
FB_A_DQ<4>
FB_A_DQ<8>FB_A_DQ<7>
FB_A_DQ<9>FB_A_DQ<10>FB_A_DQ<11>FB_A_DQ<15>FB_A_DQ<14>FB_A_DQ<12>FB_A_DQ<13>FB_A_DQ<19>FB_A_DQ<16>FB_A_DQ<18>FB_A_DQ<17>FB_A_DQ<23>FB_A_DQ<21>
FB_A_DQ<24>FB_A_DQ<22>FB_A_DQ<20>
FB_A_DQ<25>FB_A_DQ<26>FB_A_DQ<27>
FB_A_DQ<30>FB_A_DQ<29>
FB_A_DQ<28>FB_A_DQ<31>
FB_A0_MFFB_A0_ZQ
FB_A_WE_L<0>FB_A_CS_L<0>FB_A_CLK_N<0>
FB_A_MA<9>
FB_A_MA<1>
FB_A_WDQS<0>
FB_A_WDQS<3>
FB_A_BA<0>FB_A_BA<1>
FB_A_DQM_L<3>FB_A_DQM_L<2>
FB_A_DQM_L<0>
FB_A_MA<8>
FB_A_MA<10>
FB_A_DQ<32>
FB_A_DQ<35>
FB_A_DQ<39>
FB_A_DQ<44>FB_A_DQ<47>FB_A_DQ<45>FB_A_DQ<48>FB_A_DQ<49>FB_A_DQ<50>FB_A_DQ<51>FB_A_DQ<52>FB_A_DQ<55>
FB_A_DQ<60>FB_A_DQ<53>FB_A_DQ<54>
FB_A_DQ<59>FB_A_DQ<61>FB_A_DQ<57>
FB_A_DQ<56>FB_A_DQ<62>
FB_A_DQ<63>FB_A_DQ<58>
FB_A_RDQS<5>FB_A_RDQS<4>
FB_A1_SENFB_DRAM_RST
FB_A1_MFFB_A1_ZQ
FB_A_CAS_L<1>FB_A_WE_L<1>FB_A_CS_L<1>FB_A_CLK_N<1>
FB_A_MA<9>
FB_A_MA<6>FB_A_MA<7>
FB_A_MA<3>FB_A_MA<4>
FB_A_MA<2>
FB_A_MA<0>FB_A_MA<1>
FB_A_CLK_P<1>
FB_A_WDQS<6>FB_A_WDQS<5>FB_A_WDQS<4>
FB_A_WDQS<7>
FB_A_BA<0>FB_A_BA<1>
FB_A_DQM_L<7>FB_A_DQM_L<6>FB_A_DQM_L<5>FB_A_DQM_L<4>
FB_A_MA<5>
FB_A_MA<11>
FB_A_MA<8>
FB_A_MA<10>
FB_A_CKE<1>
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_A1_VREF0
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_A0_VREF0
PP1V8_D3C
82D7 82D7
82D7 82D7
76D8 76D8
76D8 76D8
76D5 76D5
76D5 76D5
75D8
75D8
75D8 75D8
75D5
75D5
75D5 75D5
73B8 73B8
73B8 73B8
73B5 73B5
73B5 73B5
73A8 73A8
73A8 73A8
73A5 73A5
73A5 73A5
72B8 72B8
72B8 72B8
67B8 67B8
76A8
67B8
76A8
67B8
67B6 67B6
76A5
67B6
76A5
67B6
75B5
75B5
75B5
64A4 64A4
75B5
75B5
75A5
75A5 75A8
64A4
75B5
75B5
75B5
75B5
75B5
75A5
75A5
75B5
75B5
75A8
75B8
75B8
75B8
75B8
75B8
75B8
75B8
75B8
75A8
75A8
75B8
75B8
75B8
75B8
64A4
73C5
73C5
73B5
73D5
73D5
73D5
5D4 5D4
73B7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7 73D5
73D5
73B5
73B5
73A1
73C5
73C5
73C5
73C5
73B5
73C5
73D5 73D5
73B5
5D4
73C5
73C5
73D5
73D5
73D5
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73D7
73C7
73D7
73C7
73D7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73C7
73B5
73B5
73B5
73D5
73D5
73C5
73C5
73D5
73D5
73C5
73C5
73D5
73D5
73D5
73C7
73C7
73C7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73B7
73C5
73C5
73A1
73B5
73B5
73B5
73B5
73D5
73D5
73D5
73D5
73D5
73D5
73D5
73D5
73B5
73C5
73C5
73C5
73C5
73D5
73D5
73C5
73C5
73C5
73C5
73D5
73D5
73D5
73D5
73B5
5D4
www.vinafix.vn
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DQ1
DQ0
DQ2
DQ3
DQ5
DQ6
DQ4
DQ8DQ7
DQ9DQ10
DQ11
DQ12DQ13
DQ14
DQ15DQ16
DQ17
DQ18DQ19
DQ20DQ21
DQ24DQ23
DQ22
DQ25
DQ26DQ27
DQ29
DQ28
DQ30
DQ31
RDQS3RDQS2
RDQS1RDQS0
SEN
RESET
MFZQ
RAS*
CAS*WE*
CS*
CK*
A9
A6
A7
A3
A4
A2
A0
A1
CK
WDQS2
WDQS1
WDQS0
WDQS3
BA0
BA2
BA1
RFU1
RFU2
DM3DM2
DM1
DM0
A5
A11
A8/AP
A10
CKE
MFHIGH
MFHIGH
MFHIGH
(1 OF 2)
VSS0
VSS1VSS2
VSS5
VSS3VSS4
VSS7VSS6
VSSA0
VSSA1
VSSQ0
VSSQ1VSSQ2
VSSQ3
VSSQ5
VSSQ6
VSSQ4
VSSQ7
VSSQ8
VSSQ9VSSQ10
VSSQ11
VSSQ12VSSQ13
VSSQ14
VSSQ16
VSSQ15
VSSQ17VSSQ18
VSSQ19VDDQ19
VDDQ20VDDQ21
VREF1
VREF0
VDDQ10
VDDQ11
VDDQ12VDDQ13
VDDQ14VDDQ15
VDDQ18
VDDQ16
VDDQ17
VDDQ9
VDDA1
VDDQ0
VDDQ1VDDQ2
VDDQ5
VDDQ3VDDQ4
VDDQ6VDDQ7
VDDQ8
VDD0
VDD1VDD2
VDD5
VDD3VDD4
VDD6VDD7
VDDA0
(2 OF 2)
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IN
IO
IO
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Page NotesPower aliases required by this page:
BOM options provided by this page:
Signal aliases required by this page:(NONE)
(NONE)
- =PP1V8_S0_FB_VDD- =PP1V8_S0_FB_VDDQ
U9000.J12U9000.J1
NCNC NC
NC
U9000.J1 U9000.J12Connect to designated pin, then GNDConnect to designated pin, then GND
1/16W1%
402MF-LF
2.37KR90301
2
1/16W1%
402MF-LF
5.49KR90311
2
16V10%
X5R
0.1uF
402
C90031
216V10%
402X5R
0.1uFC90021
2 16V10%
402X5R
0.1uFC90041
2
402
16V10%
X5R
0.1uFC90011
2
16V10%
402X5R
0.1uFC90221
2 16V10%
402X5R
0.1uFC90231
2 16V10%
402X5R
0.1uFC90241
2 16V10%
402X5R
0.1uFC90251
2
10%
X5R
0.1uF
402
16V
C90261
2
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
FBGA
CRITICALOMIT
U9000K9
H11
K11
L9
K10
M9
K4
H2
K3
L4
K2
M4
G9
G4
H3
F9
J11
J10
H9
F4
E3
E10
N10
N3
B2
B3
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
C2
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
C3
T2
T3
E2
F3
F2
G3
B11
B10
A9
H10
D3
D10
P10
P3
V9
J2
J3
V4
D2
D11
P11
P2
H4
A4
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
CRITICALOMIT
FBGA
U9000A2
A11
F1
F12
M1
M12
V2
V11
K1
K12
A1
A12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
C1
V1
V12
C4
C9
C12
E1
E4
E9
E12
H1
H12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
B1
B4
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
B9
B12
D1
D4
D9
D12
G2
G11
1/16W5%
402MF-LF
100R90491
2
MF-LF402
5%1/16W
1KR90411
2
1/16W1%
402MF-LF
243R90481
2
1/16W1%
402MF-LF
60.4R90451
2
60.4
MF-LF402
1%1/16W
R90461
2
0.1uF
X5R402
10%16V
C90331
2
MF-LF402
1%1/16W
2.37KR90321
2
1/16W1%
402MF-LF
5.49KR90331
2
16V10%
X5R
0.1uF
402
C90211
2
FERR-220-OHM
0402
L9010
1 2
FERR-220-OHM
0402
L9015
1 216V10%
402X5R
0.1uFC90151
216V10%
402X5R
0.1uFC90101
2
1%121
MF-LF402
1/16W
R90401
2
1%121
MF-LF402
1/16W
R90471
2
1/16W
402MF-LF
1211%
R90441
2
1%121
MF-LF402
1/16W
R90431
2
1/16W
402MF-LF
1211%
R90421
2
1/16W5%
402MF-LF
1KR90911
2
1/16W
402MF-LF
1211%
R90901
2
MF-LF
1211%
402
1/16W
R90921
2
X5R402
10%16V
0.1uFC90711
2 X5R402
10%16V
0.1uFC90721
2
1/16W
402MF-LF
2431%
R90981
2
1/16W
402MF-LF
5%100R90991
2
16MX32-GDDR3-500MHZ
K4J52324QC-BC20
OMITCRITICAL
FBGA
U9050K9
H11
K11
L9
K10
M9
K4
H2
K3
L4
K2
M4
G9
G4
H3
F9
J11
J10
H9
F4
E3
E10
N10
N3
B2
B3
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
C2
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
C3
T2
T3
E2
F3
F2
G3
B11
B10
A9
H10
D3
D10
P10
P3
V9
J2
J3
V4
D2
D11
P11
P2
H4
A4
1%
MF-LF402
1/16W
121R90931
2
MF-LF402
1%1/16W
60.4R90951
2
121
MF-LF1/16W
1%
402
R90941
2
402
1%1/16WMF-LF
121R90971
2
1/16W1%
402MF-LF
60.4R90961
2
402MF-LF
5.49K1%
1/16W
R90811
2
402MF-LF
2.37K1%
1/16W
R90801
2
MF-LF
5.49K
402
1/16W1%
R90831
2
MF-LF402
1/16W1%
2.37KR90821
2
10%
402X5R16V
0.1uFC90731
2
0.1uF
X5R402
10%16V
C90811
2
16V10%
402X5R
0.1uFC90741
2 X5R402
10%16V
0.1uFC90751
2
402
10%16VX5R
0.1uFC90831
2
K4J52324QC-BC20
OMITCRITICAL
FBGA
16MX32-GDDR3-500MHZ
U9050A2
A11
F1
F12
M1
M12
V2
V11
K1
K12
A1
A12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
C1
V1
V12
C4
C9
C12
E1
E4
E9
E12
H1
H12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
B1
B4
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
B9
B12
D1
D4
D9
D12
G2
G11
X5R402
10%16V
0.1uFC90761
2
0402
FERR-220-OHML9065
1 2
0402
FERR-220-OHML9060
1 2
0.1uF
X5R402
10%16V
C90511
2
0.1uF
X5R402
10%16V
C90521
2
16V10%
402X5R
0.1uFC90601
2
16V10%
402X5R
0.1uFC90531
2
16V10%
402X5R
0.1uFC90651
2
0.1uF
X5R402
10%16V
C90541
2
22UF
805CERM6.3V20%
C9000 1
2
22UF
805CERM6.3V20%
C9020 1
2
22UF
805CERM6.3V20%
C9050 1
2
805CERM6.3V20%
22UFC9070 1
2
16V10%
402
0.1uF
X5R
C90311
2
76 87
03001051-7164
GDDR3 Frame Buffer BSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
FB_B_MA<4>
FB_B_CS_L<1>
FB_B_MA<9>
FB_B_DQ<2>FB_B_DQ<7>
FB_B_DQ<24>
FB_B_DQ<13>FB_B_DQ<14>FB_B_DQ<12>FB_B_DQ<15>
FB_B_DQM_L<3>
FB_B_WDQS<1>
FB_B_RDQS<0>FB_B_RDQS<3>FB_B_RDQS<2>
FB_DRAM_RST
FB_B0_ZQ
FB_B0_SEN
FB_B_DQ<23>
FB_B_CLK_N<1>
FB_B_CAS_L<1>FB_B_WE_L<1>
FB_B_RAS_L<1>FB_B1_ZQ
FB_B_DQ<61>
FB_B_DQ<46>
FB_B_CLK_P<1>
FB_B_MA<1>FB_B_MA<2>FB_B_MA<3>
FB_B_CKE<1>
FB_B_DQ<58>FB_B_DQ<59>
PP1V8_D3C
FB_B_MA<5>
FB_B_MA<7>
FB_B_BA<0>FB_B_BA<1>
FB_B_CKE<0>
FB_B_DQ<9>FB_B_DQ<11>
FB_B_DQ<8>
FB_B_DQ<18>FB_B_DQ<10>
FB_B_DQ<17>FB_B_DQ<19>FB_B_DQ<16>FB_B_DQ<20>FB_B_DQ<22>
FB_B_DQ<21>FB_B_DQ<29>FB_B_DQ<30>FB_B_DQ<28>FB_B_DQ<31>FB_B_DQ<27>
FB_B_DQ<1>FB_B_DQ<25>FB_B_DQ<26>
FB_B_DQ<6>FB_B_DQ<0>FB_B_DQ<5>FB_B_DQ<3>
FB_B_DQ<4>
FB_B_RDQS<1>
FB_B0_MF
FB_B_CAS_L<0>FB_B_WE_L<0>FB_B_CS_L<0>FB_B_CLK_N<0>
FB_B_MA<9>
FB_B_MA<6>FB_B_MA<7>
FB_B_MA<0>FB_B_MA<1>
FB_B_WDQS<3>FB_B_WDQS<2>
FB_B_WDQS<0>
FB_B_DQM_L<0>
FB_B_DQM_L<2>FB_B_DQM_L<1>
FB_B_MA<5>
FB_B_MA<11>
FB_B_MA<8>
FB_B_MA<10>
FB_B_DQ<53>FB_B_DQ<54>
FB_B_DQ<52>FB_B_DQ<55>
FB_B_DQ<48>FB_B_DQ<49>
FB_B_DQ<50>
FB_B_DQ<44>FB_B_DQ<51>
FB_B_DQ<47>FB_B_DQ<45>
FB_B_DQ<43>FB_B_DQ<41>FB_B_DQ<42>FB_B_DQ<40>FB_B_DQ<37>FB_B_DQ<32>FB_B_DQ<39>FB_B_DQ<34>FB_B_DQ<36>FB_B_DQ<35>
FB_B_DQ<63>FB_B_DQ<33>
FB_B_DQ<62>FB_B_DQ<60>FB_B_DQ<56>
FB_B_DQ<57>
FB_B_RDQS<7>FB_B_RDQS<4>
FB_B_RDQS<6>
FB_B1_SENFB_DRAM_RST
FB_B1_MF
FB_B_MA<6>
FB_B_WDQS<4>FB_B_WDQS<5>FB_B_WDQS<6>
FB_B_WDQS<7>
FB_B_BA<0>FB_B_BA<1>
FB_B_DQM_L<7>FB_B_DQM_L<4>FB_B_DQM_L<5>FB_B_DQM_L<6>
FB_B_MA<11>
FB_B_MA<8>
FB_B1_VREF1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FB_B1_VREF0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FB_B0_VREF1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FB_B0_VREF0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FB_B_RAS_L<0>
FB_B_BA<2> FB_B_BA<2>
FB_B_RDQS<5>
FB_B_MA<10>
FB_B_DQ<38>
PP1V8_D3C
FB_B_MA<4>FB_B_MA<3>FB_B_MA<2>
FB_B_CLK_P<0>
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_B1_VDDA1
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_B1_VDDA0
PP1V8_D3C
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_B0_VDDA0
VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_B0_VDDA1
PP1V8_D3C
FB_B_MA<0>
82D7 82D7
82D7 82D7
76D8 76D8
76D8 76D8
76D5 76D5
76D5 76D5
75D8 75D8
75D8
75D8
75D5 75D5
75D5
75D5
73B8 73B8
73B8 73B8
73B5 73B5
73B5 73B5
73A8 73A8
73A8 73A8
73A5 73A5
73A5 73A5
72B8 72B8
72B8 72B8
76A5
67B8
76A8
67B8
67B8 67B8
75A8
67B6
75A8
67B6
67B6 67B6
76B8
76B8
75A5
76B8
76B8
76B8
64A4
76B8
76B8
76A5
76A5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
76B5
75A5
76B8
76A8
76A8
76B8
76B8
76A5 76A8
76B8
64A4
76B5
76B5
76B5
64A4 64A4
76B8
73D1
73B1
73D1
73D3
73D3
73C3
73D3
73D3
73D3
73D3
73C1
73C1
73C1
73C1
73C1
73A1
73C3
73B1
73B1
73B1
73B1
73B3
73B3
73B1
73D1
73D1
73D1
73B1
73B3
73B3
5D4
73D1
73D1
73D1
73D1
73B1
73D3
73D3
73D3
73C3
73D3
73D3
73C3
73D3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73D3
73C3
73C3
73D3
73D3
73D3
73D3
73D3
73C1
73B1
73B1
73B1
73B1
73D1
73D1
73D1
73D1
73D1
73C1
73C1
73C1
73D1
73C1
73C1
73D1
73D1
73D1
73D1
73B3
73B3
73B3
73B3
73B3
73B3
73B3
73B3
73B3
73B3
73B3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73C3
73B3
73C3
73B3
73B3
73B3
73B3
73C1
73C1
73C1
73A1
73D1
73C1
73C1
73C1
73C1
73D1
73D1
73C1
73C1
73C1
73C1
73D1
73D1
73B1
73D1 73D1
73C1
73D1
73C3
5D4
73D1
73D1
73D1
73B1
5D4 5D4
73D1
www.vinafix.vn
GPIO_0GPIO_1
TESTEN
GPIO_2
GPIO_27
PLLTEST
XTALOUTXTALIN
MPVSSMPVDD
PVSSPVDD
GPIO_16GPIO_17
GPIO_15GPIO_14GPIO_13GPIO_12GPIO_11GPIO_10GPIO_9GPIO_8
GPIO_7_BLONGPIO_6GPIO_5GPIO_4GPIO_3
VREFG
GPIO_33
GPIO_31GPIO_32
GPIO_25GPIO_26
GPIO_24
GPIO_21GPIO_20GPIO_19
DMINUSDPLUS
ROMCS*
GPIO_34
GPIO_29GPIO_30
NC_DVOVMODE_0NC_DVOVMODE_1
DVPCLK
DVPCNTL_0DVPCNTL_1DVPCNTL_2
DVPDATA_2DVPDATA_1DVPDATA_0
DVPDATA_4DVPDATA_3
DVPDATA_5
DVPDATA_7DVPDATA_6
DVPDATA_9DVPDATA_8
DVPDATA_10DVPDATA_11
DVPDATA_13DVPDATA_12
DVPDATA_15DVPDATA_14
DVPDATA_16
DVPDATA_18DVPDATA_17
DVPDATA_19
DVPDATA_21DVPDATA_20
DVPDATA_23DVPDATA_22
GENERICAGENERICBGENERICCGENERICD
DIGONVARY_BL
NC0
GPIO_18
VDDPLL
GPIO_28
GPIO_22GPIO_23
GENERAL PURPOSE I/O
(1.2V)
(2.5V)
ROM
TEST
PLL & XTAL
VIP HOST / EXTERNAL TMDS
PANELCONTROL
VDDR3(3.3V)
(2.5V)VDD25
VDDR5
(1.8V/3.3V)
(1.8V/3.3V)
VDDR4
DIODETHERMAL
(2.5V)
(6 OF 7)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
20mA
70mA total for VDD25
Power aliases required by this page:
- =I2C_GPU_TMDS_SCL - I2C clock line for
Page Notes
(PP1V0R1V2_S0_GPU_MPVDD)
NCNC
NC
NC
Signal aliases required by this page:
(PP2V5_S0_GPU_PVDD_F)
- =I2C_GPU_TMDS_SDA - I2C data line for
- =PP3V3_GPU_GPIOS
- =PP1V8_GPU_LVDS_PLL
external TMDS transmitters
(NONE)
- =PP2V5_PVDD
external TMDS transmitters
20mA
Typically <50mA
Typically <50mA
Typically <50mA
BOM options provided by this page:
100mA
10%16VX5R
0.1uF
402
C91121
26.3VCERM
1uF
402
10%
C91111
2
402
1uF6.3VCERM
10%
C91161
26.3VCERM
1uF10%
402
C91171
2
10%
X5R402
0.1uF16V
C91371
26.3VCERM402
10%1uFC91361
2
FERR-220-OHM
0402
L9135
1 2
6.3VCERM
1uF
402
10%
C91411
2
FERR-220-OHM
0402
L9140
1 2
X5R16V
0.1uF10%
402
C91421
2
5%1/16WMF-LF402
1KR91951
2
1%499
1/16WMF-LF402
R91911
2
1%499
402MF-LF1/16W
R91901
2
22UF
805CERM6.3V20%
C9100 1
2
20%6.3VCERM805
22UFC9110 1
2
22UF
805CERM6.3V20%
C9115 1
2
20%6.3VCERM805
22UFC9120 1
2
22UF
805CERM6.3V20%
C9125 1
2
10%
402
1uF6.3VCERM
C91321
2
22UF
805CERM6.3V20%
C9130 1
2
805CERM6.3V20%
22UFC9135 1
2
22UF
805CERM6.3V20%
C9140 1
2
10%16VX5R402
0.1uFC9191 1
2
OMIT
BGA
M56PU8400
AE11
AH12
AG12
AG1
AF2
AF1
AF3
AG2
AG3
AL3
AM3
AE6
AF4
AF5
AG4
AJ3
AH4
AJ4
AG5
AH2
AH5
AF6
AE7
AG6
AH3
AJ2
AJ1
AK2
AK1
AK3
AL2
AK22
AF23
AE23
AD23
AD4
AD2
AC4
AB3
AB4
AB5
AD5
AB8
AA8
AB7
AE13
AF13
AD1
AF9
AG7
AE10
AE9
AF7
AF8
AH6
AF10
AG10
AH9
AD3
AJ8
AH8
AG9
AH7
AG8
AC1
AC2
AC3
AB2
AC6
AC5
A6
A5
AB6
AK4
AL4
AG14
AJ14
AH14
AC7
AG22
AD12K22
L10
AA10
AC13
AC16
AC18
AC15
AA9
AB9
AB10
AC19
AC20
AD18
AD19
AD20
AJ5
AK5
AL5
AM5
AE2
AE3
AE4
AE5
AC8
AL26
AM26
0.1uF
402X5R16V10%
C91271
2
10%
402
1uF
CERM6.3V
C91261
2
10%16VX5R
0.1uF
402
C91221
26.3VCERM
1uF10%
402
C91211
2
FERR-220-OHM
0402
L9120
1 2
FERR-220-OHM
0402
L9125
1 2
200-OHM-EMI
0402
L9130
1 2
10%
402CERM6.3V
1uFC91311
2
10%
402
1uF
CERM6.3V
C91011
26.3V
1uF10%
402CERM
C91021
26.3VCERM
1uF
402
10%
C91031
2
77 87
03001051-7164
ATI M56 GPIO/DVO/MiscSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
PP3V3_D3C
PP2V5_D3C
PP2V5_D3C
NC_GPU_GPIO_30NC_GPU_GPIO_31
GPU_GPIO_8
NC_ATI_DVPDATA<0>
TP_ATI_DVPDATA<19>
NC_ATI_DVPDATA<2>
ATI_TDIODE_P
GPU_GPIO_0GPU_GPIO_1GPU_GPIO_2
GPU_MEMID
NC_GPU_XTALOUTGPU_CLK27M
GPU_CLK27MSS_INNC_GPU_GPIO_17
GPU_VCORE_LOWNC_GPU_GPIO_14GPU_GPIO_13GPU_GPIO_12GPU_GPIO_11TP_GPU_GPIO_10GPU_GPIO_9
GPU_BLONGPU_GPIO_6GPU_GPIO_5
GPU_GPIO_3
NC_GPU_GPIO_33NC_GPU_GPIO_32
NC_GPU_GPIO_25NC_GPU_GPIO_26
NC_GPU_GPIO_21NC_GPU_GPIO_20NC_GPU_GPIO_19
ATI_TDIODE_N
NC_ATI_ROMCS_L
NC_GPU_GPIO_34
NC_GPU_GPIO_29
NC_ATI_DVPCLK
NC_ATI_DVPCNTL<0>NC_ATI_DVPCNTL<1>NC_ATI_DVPCNTL<2>
NC_ATI_DVPDATA<1>
NC_ATI_DVPDATA<4>NC_ATI_DVPDATA<3>
NC_ATI_DVPDATA<5>
NC_ATI_DVPDATA<7>NC_ATI_DVPDATA<6>
NC_ATI_DVPDATA<9>NC_ATI_DVPDATA<8>
NC_ATI_DVPDATA<10>NC_ATI_DVPDATA<11>
NC_ATI_DVPDATA<13>NC_ATI_DVPDATA<12>
NC_ATI_DVPDATA<15>NC_ATI_DVPDATA<14>
TP_ATI_DVPDATA<16>
TP_ATI_DVPDATA<18>TP_ATI_DVPDATA<17>
TP_ATI_DVPDATA<21>TP_ATI_DVPDATA<20>
TP_ATI_DVPDATA<23>TP_ATI_DVPDATA<22>
NC_GPU_GENERICANC_GPU_GENERICBNC_GPU_GENERICCGPU_GENERICD
GPU_DIGONGPU_VARY_BL
NC_GPU_GPIO_18
NC_GPU_GPIO_28
NC_GPU_GPIO_22NC_GPU_GPIO_23
ATI_TESTEN
PP3V3_D3C
ATI_VREFG
GPU_MEM_256M GPU_GPIO_4
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
VOLTAGE=3.3V
PP1V8R3V3_S0_GPU_VDDR4_FPP3V3_D3C
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
VOLTAGE=3.3V
PP1V8R3V3_S0_GPU_VDDR5_FPP3V3_D3C
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm
VOLTAGE=1.2V
PP1V2_S0_GPU_VDDPLLPP1V2_D3C
PP2V5_D3C
PPVCORE_D3C_GPU
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm
VOLTAGE=1.2V
PPVCORE_S0_GPU_MPVDD
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
VOLTAGE=2.5V
PP2V5_S0_GPU_PVDD_F
82D7
82D7
82D7
82D7
82A7
82A7
82A7
82A7
80D5
80D5
80D5
80D5
80B2
80B2
80B2
80B2
77D2
77D2
77D2
77C6
77C6
77C6
77B7
77B7
77B7
77B7
74D6
82D7
82D7
74D6
74D6
74D6
82D7
72D8
74B2
78C8
78C8
74B2
74B2
74B2
70C7
82D7
71C1
71C4
77C6
77C6
71C4
71C4
71C4
70A1
78C8
71B7
71B8
77A8
77A8
71B8
71B8
71B8
67D8
77C6
67A8
71A4
67A8
67A8
74C2
74C8
71A4
71A4
71A4
67D6
67A8
67A6
67A5
67A6
67A6
74C1
74C5
74C8
82A4
67A5
67A5
67A5
67C6
67A6
55C7
67A3
63C1
63C1
74B8
74B8
74B8
74C2
34B4
34B4
74C8
74C5
74C8
74C8
74C8
74B8
74B8
74B8
74B8
74B8
74B8
74B8
74C2
74B8
74B8
74B2
74C2
74C2
74C2
82B6
74B8
74B8
74B8
74B8
67A3
74B8
67A3
67A3
63B1
63C1
55A5
65C7
5D4
5D4
74B7
74B7
74C8
74B2
74B2
74B2
54B6
74D8
74C8
74C8
74B6
74C1
34B2
34B2
74C5
71B4
74C5
74C8
74C8
74C8
74C5
74C8
74C5
74C8
74C8
74C8
74B7
74B7
74B7
74B7
74B7
74B7
74B7
54B6
74C1
74B7
74B7
74B1
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74B2
74C1
74C1
74C1
71A7
82A4
82A4
74B7
74B7
74B7
74B7
65C7
74B6 74C8
65C7
65C7
5D4
5D4
5B2
www.vinafix.vn
DDC3DATADDC3CLK
DDC2DATADDC2CLK
DDC1DATADDC1CLK
TXOUT_L3NTXOUT_L3PTXOUT_L2NTXOUT_L2PTXOUT_L1NTXOUT_L1PTXOUT_L0NTXOUT_L0P
TXCLK_LPTXCLK_LN
TXOUT_U3N
TXOUT_U2NTXOUT_U3P
TXOUT_U2PTXOUT_U1NTXOUT_U1PTXOUT_U0NTXOUT_U0P
TXCLK_UNTXCLK_UP
COMP
CY
V2SYNCH2SYNC
B2G2R2
VSYNCHSYNC
BGR
TX2MTX2PTX1M
TX0MTX1P
TX0P
TXCM
HPD1
LPVSSLPVDD
R2SET
VDD2DIVSS2DI
A2VSSQNC_A2VDDQ
VSS1DI
RSET
AVSSQ
VDD1DI
TXCPTPVSSTPVDD
TX3PTX3MTX4PTX4MTX5PTX5M
A2VSS
A2VDD(2.5V)
AVSS
(2.5V)AVDD
TXVSSR
IDENTIFICATION
(5 OF 7)
LVDDR
LVSSR
DAC (CRT)
DAC2 (TV/CRT2)
LVDS
MONITOR
TXVDDR
(2.5V)
(2.5V)
(2.5V)
(2.5V)
(2.5V)
(2.5V)
INTEGRATED TMDS
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Sum of peak currents on this page: 605mA
20mA peak
20mA peak
20mA peak
130mA peak
- =PP1V8R2V5_S0_GPU_LVDDR- =PP2V5_S0_GPU
(NONE)
(NONE)
BOM options provided by this page:
NC
150mA peak
65mA peak
200mA peak
Comp B Pb
C R PrY G Y
Composite/S-Video VGA Component
20mA peak
Signal aliases required by this page:
Power aliases required by this page:
Page Notes
BGA
M56P
OMIT
U8400
AL16
AM16
AL17
AM17
AK13
AL25
AM25
AJ24
AK25
AK23AL24
AL15
AJ13
AH15
AH23
AH22
AG13
AH13
AF12
AE12
AM24
AM15
AF15
AF11
AJ23
AE19
AE18
AC21
AC22
AD21
AD22
AE20
AE21
AE22
AF19
AF20
AF17
AF18
AF21
AF22
AG17
AG19
AH17
AH19
AJ19
AK17
AL14
AK24
AK15
AK14
AL22
AM8
AL8
AK10
AL10
AL11
AM11
AL12
AM12
AK9
AJ9
AK11
AJ11
AK12
AJ12
AL18
AM18
AK21
AJ21
AL9
AM9
AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AH18
AG18
AJ20
AK20
AH20
AG20
AG21
AH21
AJ6
AK6
AL6
AM6
AJ7
AK7
AK8
AL7
AM7
AG15
AM23
AJ16
AL23
AJ17
AJ22
AJ15
1/16W1%
402MF-LF
499R93501
2
0.1uF
X5R402
10%16V
C93461
2
0.1uF
X5R402
10%16V
C93421
26.3V
402CERM
1uF10%
C93411
2
0402
FERR-220-OHML9300
1 2
1uF
CERM
10%6.3V
402
C93011
2
1uF
CERM402
10%6.3V
C93061
2
0402
FERR-220-OHML9305
1 2
10%
402X5R
0.1uF16V
C93071
2
0402
FERR-220-OHML9330
1 2
6.3V10%
402CERM
1uFC93311
2
X5R402
10%0.1uF16V
C93221
2
1uF
402
10%
CERM6.3V
C93211
2
0402
FERR-220-OHML9320
1 2
10%
402X5R
0.1uF16V
C93121
26.3V10%
CERM
1uF
402
C93111
2
0402
FERR-220-OHML9310
1 2
16V10%
X5R
0.1uF
402
C93171
2
402CERM6.3V10%1uFC93161
2
16V10%
402X5R
0.1uFC93271
26.3V
402CERM
10%1uFC93261
2
0402
FERR-220-OHML9325
1 2
0402
FERR-220-OHML9315
1 2
0402
FERR-220-OHML9345
1 2
0.1uF
X5R402
10%16V
C93471
2
20%6.3VCERM805
22UFC9340 1
2
20%6.3VCERM805
22UFC9345 1
2
6.3V10%
402CERM
1uFC93321
2
1uF
CERM
10%
402
6.3V
C93021
26.3VCERM805
22UF20%
C9300 1
2
22UF
805CERM6.3V20%
C9305 1
2
20%6.3VCERM805
22UFC9310 1
2
22UF
805CERM6.3V20%
C9315 1
2
20%
CERM
22UF
805
6.3V
C9320 1
2
CERM6.3V20%
22UF
805
C9325 1
2
20%6.3V
805
22UF
CERM
C9330 1
2
715
MF-LF402
1%1/16W
R93511
2
03001
78 87
051-7164
ATI M56 Video InterfacesSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
NC_GPU_TV_C
NC_GPU_TV_COMP
NC_GPU_TV_Y
NC_GPU_VGA_RNC_GPU_VGA_GNC_GPU_VGA_B
GPU_R2GPU_G2GPU_B2
GPU_V2SYNC
ATI_R2SET
ATI_RSET
GPU_HPD
NC_LVDS_U_DATAN<3>NC_LVDS_U_DATAP<3>
LVDS_U_DATA_N<1>LVDS_U_DATA_P<1>
LVDS_L_CLK_P
LVDS_L_DATA_P<0>
LVDS_L_DATA_P<1>LVDS_L_DATA_N<0>
TP_GPU_VGA_VSYNCTP_GPU_VGA_HSYNC
LVDS_U_CLK_PLVDS_U_CLK_N
LVDS_U_DATA_P<0>LVDS_U_DATA_N<0>
TMDS_CLK_N
TMDS_DATA_N<0>
TMDS_DATA_N<1>
TMDS_DATA_N<2>
TMDS_DATA_N<5>
TMDS_DATA_N<4>
TMDS_DATA_N<3>
LVDS_L_DATA_N<1>
LVDS_L_DATA_N<2>LVDS_L_DATA_P<2>
NC_LVDS_L_DATAP<3>NC_LVDS_L_DATAN<3>
GPU_DDC_A_CLK
GPU_DDC_B_DATAGPU_DDC_B_CLK
GPU_DDC_A_DATA
ATI_RSETATI_R2SET
LVDS_U_DATA_N<2>LVDS_U_DATA_P<2>
LVDS_L_CLK_N
GPU_DDC_C_CLKGPU_DDC_C_DATA
GPU_H2SYNC
TMDS_CLK_P
TMDS_DATA_P<5>
TMDS_DATA_P<4>
TMDS_DATA_P<3>
TMDS_DATA_P<2>
TMDS_DATA_P<1>
TMDS_DATA_P<0>
PP2V5_S0_GPU_TPVDD
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.3 mmPP2V5_S0_GPU_TXVDDR
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP2V5_S0_GPU_AVDD
VOLTAGE=2.5V
PP2V5_S0_GPU_VDD1DI
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.3 mm
VOLTAGE=2.5V
PP2V5_S0_GPU_A2VDD
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmPP2V5_S0_GPU_LPVDD
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.35 mm
VOLTAGE=2.5V
PP2V5_S0_GPU_LVDDR
PP2V5_D3C
PP2V5_S0_GPU_VDD2DI
MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm
VOLTAGE=2.5V
82D7 77C6
82C8
82D8
82C3
82C8
77A8
82C3
82C3
82B8
82C3
67A8
79D7
79D7
79D7
79D7
87B4
87A4
87A4
67A6
74B2
74B2
74C2
74C2
74C2
74C2
80C3
80C3
80C3
74B2
74B2
6B2
6B2
74C2
74C2
6A2
6B2
74B2
74B2
80B8
80B8
80D8
63C1
74B1
74B1
74C1
74C1
74C1
74C1
79D7
79D7
79D7
80D5
78A8
78A8
80A2
74B1
74B1
6B1
6B1
74C1
74C1
6A1
6B1
74B1
74B1
80B1
74A2
74A2
80B1
78B5
78B5
82A7
82A7
80C5
79C7
79C7
79C7
5A4
5A4
5A4
5A4
5A4
5A4
5D4
www.vinafix.vn
G
D
S
N-CHN
S
D
G
P-CHN
G
DS
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
NC
518S0369
ELECTRICAL_CONSTRAINT_SET
Panel has 2K pull-ups
100K pull-ups are for no-panel case (development).
SPACING PHYSICAL
INVERTER INTERFACE
NET_TYPE
NC
518S0289
INVERTER EXPECTS ACTIVE HIGH PWM SIGNAL
LCD (LVDS) INTERFACE
100K
MF-LF402
5%1/16W
R94501
2
0.001uF
CERM402
20%50V
C9454 1
2
50V20%
402CERM
0.001uFC94521
2
CERM50V20%
402
0.001uFC94501
2
10UF
X5R603
20%6.3V
C9451 1
2
SM-1
400-OHM-EMIL9454
1 2
10V20%
402CERM
0.1uFC9453 1
2
SM-1
400-OHM-EMIL9452
1 2
0.001uF
CERM
20%50V
402
C9420 1
2
402
0.001uF
CERM
20%50V
C9410 1
2
0.001uF
20%
CERM402
50V
C9421
12
MSC-RB30-5-FAF-RT-SM
CRITICALJ9400
33
34
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
4
5
6
7
8
9
0.001uF
CERM
20%50V
402
C9401 1
2
SM
FERR-250-OHML940050V
CERM
0.0022uF
10%
402
C9400
1 2
100K
MF-LF402
1/16W5%
R9401MF-LF
402
5%1/16W
100KR94001
2
TSOP-LFSI3443DV
Q9400
1
2
5
63
4
2N7002SOT23-LF
Q9401
3
1
2
100K5%
1/16WMF-LF402
R94891
2
100K5%
402MF-LF1/16W
R94941
2
MC74VHC1G08SC70
U9453
3
2
1
4
5
SC70-6FDG6332C_NLQ9450
6
2
1
SC70-6FDG6332C_NLQ9450
3
5
4
MF-LF1/16W5%100K
402
R94111
2
100K5%
1/16WMF-LF
402
R94101
2
CRITICAL
FERR-220-OHM-2A0603
L9455
1
2
0603
FERR-220-OHM-2A
CRITICALL9450
1 2
CRITICAL
SM04B-ACHM-RT-SM
J9450
5
6
1
2
3
4
SYNC_DATE=08/08/2006SYNC_MASTER=M57_MLB_MG
79 87
03001051-7164
Internal Display Connectors
GND_CHASSIS_LVDS
PP5V_S0
PP5V_INVERTER_SW_FMIN_LINE_WIDTH=0.5 mm
VOLTAGE=5VMIN_NECK_WIDTH=0.25 mm
INVERTER_BKLTON
FP_PWR_EN_L
GND_CHASSIS_LVDS
GND_CHASSIS_LVDS
PP3V3_LCD_CONNMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V
GND_CHASSIS_LVDS
VOLTAGE=3.3VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPP3V3_LCD_SWLCD_PWREN_L_RC
LVDS_PANEL_EN
LCD_PWREN_L
PP3V3_S5
LVDS_L_DATA_CONN_P<0>LVDS_L_DATA_CONN_N<0>
LVDS_U_DATA_CONN_N<0>
LVDS_L_CLK_CONN_NLVDS_L_CLK_CONN_P
LVDS_L_DATA_CONN_P<2>LVDS_L_DATA_CONN_N<2>
LVDS_L_DATA_CONN_P<1>LVDS_L_DATA_CONN_N<1>
LVDS_U_DATA_CONN_P<0>
LVDS_U_DATA_CONN_N<1>LVDS_U_DATA_CONN_P<1>
LVDS_U_DATA_CONN_N<2>LVDS_U_DATA_CONN_P<2>
LVDS_U_CLK_CONN_NLVDS_U_CLK_CONN_P
LVDSLVDS LVDS_U_CLK_CONN_PLVDS_U_CLK_CONN_NLVDS LVDS
LVDS_U_DATA_CONN_P<2..0>LVDSLVDS
LVDS_U_DATA_CONN_N<2..0>LVDSLVDS
LVDS_L_CLK_CONN_PLVDS LVDS
LVDS_L_CLK_CONN_NLVDSLVDS
LVDS_L_DATA_CONN_P<2..0>LVDSLVDS
TMDS_CLK_NTMDS TMDS
TMDS_DATA_P<2..0>TMDS TMDS
TMDS_DATA_P<5..3>TMDS TMDS
LVDS_L_CLK_PLVDSLVDS
LVDS_L_CLK_NLVDS LVDS
LVDS_L_DATA_P<2..0>LVDS LVDS
LVDS_L_DATA_N<2..0>LVDSLVDS
GPU_G2VGA VGA
LVDS_CONN_DDC_DATALVDS_CONN_DDC_CLK
PP3V3_S0
LVDS_U_CLK_NLVDSLVDS
LVDS_U_DATA_P<2..0>LVDS LVDS
LVDS_U_DATA_N<2..0>LVDS LVDS
TMDS_DATA_N<2..0>TMDS TMDS
TMDS_DATA_N<5..3>TMDS TMDS
LVDS_L_DATA_CONN_N<2..0>LVDS LVDS
TMDS_CLK_PTMDS TMDS
LVDS_U_CLK_PLVDSLVDS
GPU_B2VGA VGA
GPU_R2VGA VGA
GND_CHASSIS_INVERTER
PPBUS_G3H
VOLTAGE=12.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPBUS_S0_INVERTER
PP5V_INVERTER_SWMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=5V
INVERTER_PWMGND_CHASSIS_INVERTER
INVERTER_PWM_FINVERTER_PWM_UNBUF
PP3V3_S0
PLT_RST_L
82D5
82D5
82C6
82C6
82B3
82B3
82A4
82A4
79A8
79D3
71D2
71D2
67C5
67C5
67C3
67C3
67B3
67B3
67A3
67A3
66B6
66B6
66B5
66B5
66B1
66B1
65D6
65D6
65B3
65B3
62A6
62A6
61D8
61D8
61A5
61A5
60D4
60D4
60C7
60C7
58C7
58C7
58C4
58C4
57B6
57B6
54D4
54D4
54B5
54B5
52D3
52D3
49C7
49C7
49C4
49C4
49B5
49B5
40B6
40B6
36D6
36D6
34A8
34A8
33D8
33D8
33D3
33D3
33C7
33C7
29A6
29A6
29A3
29A3
28A6
28A6
27D8
27D8
27D5
27D5
27D3
27D3
27C3
27C3
26D1
26D1
26B8
26B8
26B6
26B6
26B4
26B4
67D5
25D8
25D8
67D3
25D3
25D3
67C3
25C6
25C6
66C5
25C4
25C4
65D8
25B8
25B8
65D2
25B4
25B4
81B3
65D1
25A4
25A4
80B5
65C8
24D3
24D3
80A1
63D8
24C3
71D7
24C3
71A6
56D4
24B5
69C1
24B5
67B3
26C5
24B3
68D5
24B3
67B1
25D2
23D5
67C3
23D5
67A1
25C8
23B3
67C1
23B3
66B5
25B6
22B5
65D6
22B5
62B1
24C3
21D3
65B7
21D3
61D7
24B3
21C3
64D7
21C3
58C7
24A5
20B4
64A6
20B4
82A4
58C4
23D8
20A4
62D7
20A4
26C3
57B5
23D4
19C7
61D7
19C7
26C1
55A8
23D1
19C6
82C8
61D4
19C6
26B1
53C4
23B7
17C6
82C3
82C8
79A5
55D3
17C6
26A4
79D2
36D6
79D3
79D3
79D3
23A7
82C8
82D8
82D8
82D8
14D6
82C3
82B3
82C3
82C3
45C5
43D8
14D6
22A6
79C3
31C5
79D2
79D2
79C3
22D8
82D1
87A4
87A4
82C3
82C3
82C3
82C3
14C7
82B8
78B3
78B3
87A4
87A4
82B8
45B5
42B8
14C7
14B7
79B2
25D8
79B2
79C3
79B2
22C6
82C1
82D1
87B4
80D8
80B8
78A3
78A3
78A3
78A3
82A7
82A7
10C5
78B3
6B2
6B2
80D8
80B8
87B4
78B3
6A8
41C6
10C5
6C7
6A8
5D4
6A8
6A8
6A8
11B5
82C1
82C1
82D1
82C1
82C1
82C1
82C1
82C1
82C1
82D1
82C1
82C1
82D1
82C1
82C1
82C1
82C1
82C1
79C2
82C1
82C1
82C1
82C1
80C8
80C8
80A8
6B2
6B2
6B2
6B2
80C3
82A5
82A5
5D4
6A2
6B1
6B1
80C8
80A8
82C1
80B8
6A2
80C3
80C3
6A6
5C4
5D4
6C6
6A6
5D2
82A2
6A6
6A6
6A6
82B6
82A2
5D4
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79B2
79B2
79B2
79C2
79C2
79C2
79C2
78C3
78C3
78C3
6B1
6B1
6B1
6B1
78B3
13D5
13D5
5A4
6A1
6A1
6A1
78C3
78C3
79C2
78C3
6A1
78B3
78B3
5B2
5A1
5B2
5B2
5B2
82A2
5A4
5C4
www.vinafix.vn
G
SD
G
SD
G
SD
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
G
SD
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
G
S D
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Place termination components close to GPU, common mode chokes near connector.
(55mA requirement per DVI spec)
PLACE NEAR C5A & C5B
(PP5V_S0_DDC)
(DAC2 C)
Isolation required for DVI power switch
514-0278
PLACE NEAR 3, 11 & 19
3V LEVEL SHIFTERS
DVI DDC CURRENT LIMIT
VGA SYNC BUFFERS
ANALOG FILTERING
PLACE CLOSE TO CONNECTOR
(DAC2 Y)
(DAC2 Comp)
PLACE U9750 & U9751 CLOSE TO DVI CONNECTOR
ELECTRICAL_CONSTRAINT_SET PHYSICAL
NET_TYPE
SPACING
TMDS Filtering
DVI INTERFACE
5%
MF-LF402
10K
1/16W
R97211
2
1/16W5%
402MF-LF
10KR97201
2
SOT-3632N7002DW-X-F
Q9711
6
2
1
SOT-3632N7002DW-X-F
Q9711
3
5
4
5%
402
270K
MF-LF1/16W
R97221
2402CERM50V
100pF5%
C97131
2
402
5%1/16W
4.7K
MF-LF
R97121
2
1/16W
402MF-LF
4.7K5%
R97101
2
CERM402
5%50V
100pFC97111
2
0.01uF
CERM603
50V20%
C9710 1
2
400-OHM-EMI
SM-1
L9710
1 2
SOT-3632N7002DW-X-F
Q9714
3
5
4
CRITICAL
0.5AMP-13.2V
SM-LF
F9710
1 2
B0530WXF
SOD-123D97101 2
100pF
CERM
5%50V
402
C97141
2
MF-LF402
5%1/16W
100R97111 2
MF-LF
5%1/16W
100
402
R97131 2
100
1/16W5%
402MF-LF
R97141 2
402
5%
MF-LF1/16W
0R9730
12
0
MF-LF
5%1/16W
402
R973112
3.3pF
CERM402
0.25%50V
C97411
2
1/16W1%
402MF-LF
75R97421
2
1/16W1%
402MF-LF
75R97401
2
1/16W1%
402MF-LF
75R97411
2
3.3pF
CERM402
0.25%50V
C97421
2
3.3pF
CERM402
0.25%50V
C97401
2
CRITICAL
SM-220MHZ-LF
FL9740
1 2
3 4
SM-220MHZ-LF
CRITICAL FL9741
1 2
3 4
CRITICAL
SM-220MHZ-LF
FL9742
1 2
3 4
33
5%1/16WMF-LF402
R97501 2
1/16W5%
402MF-LF
33R97511 2
QH11121-RIG02-4FF-RT-TH-DVI
CRITICAL
J9700
C1
C2
C3
C4
C5AC5B
31
32
33
34
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
3
4
5
6
7
8
9
20K
1/16W5%
402MF-LF
R97151
2
1%
402MF-LF
182
1/16W
R97861
2
402MF-LF1/16W
1%182
R97821
2
MF-LF
1%1/16W
402
182R97781
2
402
0
MF-LF1/16W5%
R97731 2
5%
402MF-LF1/16W
0R97721 2
402
182
MF-LF1/16W
1%
R97701
2
MF-LF
182
402
1%1/16W
R97661
2
CRITICAL
SM370-OHML9706
1
2 3
4
402
0.1uF10V20%
CERM
C9751 1
2
0.1uF
402CERM10V20%
C9750 1
2
SC70MC74VHC1G08
U9750
3
2
1
4
5
SC70MC74VHC1G08
U9751
3
2
1
4
5
1/16W
402MF-LF
1821%
R97621
2
47nH0402
L9743
1
2
040247nHL9748
1
2
040247nHL9747
1
2
47nH0402
L9746
1
2
040247nHL9745
1
2
47nH0402
L9744
1
2
2N7002DW-X-FSOT-363
Q9715
6
2
1
270K5%1/16WMF-LF402
R97231
2
182
1/16WMF-LF
1%
402
R97741
2
CRITICAL
90-OHM-100MA1210-4SM1
L9700
1
2 3
4
1210-4SM190-OHM-100MA
CRITICAL
L9701
1
2 3
4
CRITICAL
90-OHM-100MA1210-4SM1
L9702
1
2 3
4
1210-4SM190-OHM-100MA
CRITICAL
L9704
1
2 3
4
1210-4SM190-OHM-100MA
CRITICAL
L9703
1
2 3
4
1210-4SM190-OHM-100MA
CRITICAL
L9705
1
2 3
4
1/16W5%
402MF-LF
0R97241 2
SOT-3632N7002DW-X-FQ9714
6
2
1
051-7164
SYNC_DATE=08/08/2006
03001
8780
External Display ConnectorSYNC_MASTER=M57_MLB_MG
PP5V_S0
SB_DVI_HPDMAKE_BASE=TRUE
DVI_HPD
SB_DVI_HPD
GPU_HPD_BILAT
GPU_HPD_R
PP3V3_D3C
GPU_SIGNAL_ENABLE
TMDS_DATA_F_P<4>
TMDS_DATA_F_N<4>TMDS_DATA_F_N<3>
GND_CHASSIS_DVI_BOT
TMDSCONN TMDSCONN TMDS_DATA_F_N<5..0>TMDSCONNTMDSCONN TMDS_DATA_F_P<5..0>
TMDSCONN TMDSCONN TMDS_CLK_F_P
TMDSCONN TMDSCONN TMDS_CLK_F_N
TMDS TMDS TMDS_CLK_R_P
TMDS TMDS TMDS_CLK_R_N
TMDS_CLK_R_N
TMDS_CLK_R_PTMDS_CLK_P
TMDS_CLK_N
TMDS_DATA_RL<2>
NO_TEST=TRUEVOLTAGE=0V
NO_TEST=TRUEVOLTAGE=0V
TMDS_DATA_RL<4>
TMDS_DATA_RL<1>
NO_TEST=TRUEVOLTAGE=0V
TMDS_DATA_F_N<0>
VOLTAGE=0VNO_TEST=TRUE
TMDS_DATA_RL<3>
GND_CHASSIS_DVI_BOT
VGA_G
GPU_R2
GPU_G2
VGA_R
VGA_G
VGA_B
VGA_VSYNCVGA_VSYNC_R
VGA_HSYNCVGA_HSYNC_RGPU_H2SYNC
PP3V3_D3C
TMDS_CLK_F_N
TMDS_CLK_F_P
TMDS_DATA_F_P<5>
TMDS_DATA_F_N<5>
VGA_HSYNC
VGA_B
TMDS_CLK_F_N
TMDS_CLK_F_P
DVI_DDC_CLK
GND_CHASSIS_DVI_TOP
PP5V_S0
GND_CHASSIS_DVI_TOP
VGA_R
VGA_VSYNC
NO_TEST=TRUEVOLTAGE=0V
TMDS_DATA_RL<5>
GPU_B2
VOLTAGE=5V
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm
PP5V_S0_DDC_PULLUPS
PP5V_S0_DDC_F
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
VOLTAGE=5V
GPU_DDC_A_CLK
GPU_DDC_A_DATA
GND
DVI_DDC_DATA
PP3V3_D3C
GPU_V2SYNCTMDS_DATA_F_N<0>
TMDS_DATA_F_P<0>
TMDS_DATA_P<0>
TMDS_DATA_F_N<1>
TMDS_DATA_F_P<1>
TMDS_DATA_N<1>
TMDS_DATA_F_N<2>
TMDS_DATA_F_P<2>
TMDS_DATA_P<2>
TMDS_DATA_N<2>
TMDS_DATA_F_N<3>
TMDS_DATA_F_P<3>
TMDS_DATA_P<3>
TMDS_DATA_N<3>
TMDS_DATA_F_N<4>
TMDS_DATA_F_P<4>TMDS_DATA_P<4>
TMDS_DATA_N<4>
TMDS_DATA_F_N<5>
TMDS_DATA_F_P<5>TMDS_DATA_P<5>
TMDS_DATA_N<5>
TMDS_DATA_P<1>
TMDS_DATA_RL<0>VOLTAGE=0VNO_TEST=TRUE
TMDS_DATA_F_P<2>TMDS_DATA_F_N<1>TMDS_DATA_F_N<2>
DVI_HPD_R
TMDS_DATA_F_P<3>
TMDS_DATA_F_P<1>
DVI_DDC_CLK_R
DVI_DDC_DATA_R
PP5V_S0_DDCVOLTAGE=5VMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
TMDS_DATA_F_P<0>
TMDS_DATA_N<0>
GPU_HPD_R GPU_HPD
81B3
81B3
80B5
80A1
79B8
79B8
71A6
71A6
67B3
67B3
67B1
82D7
67B1
82D7
67A1
82D7
82A7
67A1
82A7
66B5
82A7
80D5
66B5
80D5
62B1
80D5
80B2
62B1
80B2
61D7
77D2
77D2
61D7
77D2
58C7
77C6
77C6
58C7
77C6
58C4
77B7
77B7
58C4
77B7
57B5
74D6
74D6
57B5
74D6
55A8
74B2
87A4
87A4
74B2
55A8
74B2
53C4
71C4
80D6
80D6
71C4
53C4
71C4
36D6
71B8
80C6
80C6
71B8
36D6
71B8
31C5
71A4
80B5
80B6
80B6
80A2
71A4
31C5
71A4
25D8
67A5
82A7
87A4
87A4
87A4
6B8
80B5
80B5
87A4
87A4
87B4
87B4
87A4
6B8
67A5
87A4
87A4
87A4
87A4
87A4
87A4
80A3
25D8
80A5
67A5
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4 87A4
87A4
87A4
87A4 87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
87A4
5D4
80A1 80A1
67A3
26A2
80D1
80D1
80D1
6B6
80B3
80B3
80B6
80C6
79C7
79C7
80D6
6B6
79D7
79D7
67A3
80D1
80D1
80D1
80D1
80D1
80D1
6B8
5D4
6B8
79D7
67A3
80D1
80D1
79C7
80D1
80D1
79C7
80D1
80D1
79C7
79C7
80D1
80D1
79C7
79C7
80D1
80D1 79C7
79C7
80D1
80D1 79C7
79C7
79C7
80D1
80D1
80D1
80D1
80D1
80D6
79C7
5D2
22A6 22A6
80A3
65C7
26A1
80A6
80A6
80B6
6A6
80A6
80A6
80B5
80A5
80B7
80C7
80D1
80D1 78C3
78C3
80D1
6A6
80C1
78B3
78B3
80A3
80A3
80A5
80A3
80A5
78B3
65C7
80A5
80B5
80A6
80A6
80C3
80C1
80C6
80B6
6B6
5D2
6B6
80C1
80D3
78B3
78A3
78A3
65C7
78B3 80B5
80B5
78C3
80B3
80B3
78C3
80B3
80B3
78C3
78C3
80B3
80B3
78C3
78C3
80B3
80B3 78C3
78C3
80B5
80B5 78C3
78C3
78C3
80C6
80C6
80C6
80B6
80C6
80D1
78C3
80A1 78A5
www.vinafix.vn
IO
IO
IN
IN
IN
OUT
OUT
IO
IO
SYM_VER-1
SYM_VER-1
OUT
IN
IO
IO
IO
IO
OUT
OUT
IO
IO
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Bluetooth (M13P) & SATA HDD Flex Connector
Top-Case Connector
516S0350
NC
NC
NC
516S0350
IR & Sleep LED Connector
518S0474
QT500166-L020M-ST-SM
CRITICALJ4960
1
10
1112
1314
1516
2
34
56
78
9
0.0047uF
CERM25V
402
10%
PLACEMENT_NOTE=Place C4961 next to C4960
C4961
2 1402CERM
0.0047uF
25V10%
PLACEMENT_NOTE=Place C4960 close to southbridge
C4960
2 1
PLACEMENT_NOTE=Place FL4960 close to southbridge
90-OHM-100MA1210-4SM1
FL4960
PLACEMENT_NOTE=Place FL4965 close to J4960
90-OHM-100MA1210-4SM1
FL4965
10%
CERM402
0.0047uF
25V
PLACEMENT_NOTE=Place C4965 close to J4960
C4966
2 1
402
25VCERM
10%
0.0047uF
PLACEMENT_NOTE=Place C4966 next to C4965
C4965
2 1
CRITICAL
M-RT-SM88231-06001-01
J9800
7
8
1
2
3
4
5
6
M-ST-SM
CRITICAL
QT500166-L020J4900
1
10
11 12
13 14
15 16
2
3 4
5 6
7 8
9
RCLAMP0502B
SC-75
CRITICALD4900
3
1
2
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
051-7164 03001
8781
M57 SPECIFIC CONNECTORS
SATA_C_D2R_UF_N
SATA_C_D2R_UF_P
SATA_C_R2D_UF_P
SATA_C_R2D_UF_NSATA_C_R2D_NSATA_C_R2D_P
SATA_C_D2R_C_PSATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_P
SATA_C_R2D_C_N
PP3V3_S3
SATA_C_D2R_C_N
PP5V_S0
USB_BT_PUSB_BT_N
PP5V_S3
USB_IR_NUSB_IR_P
SYS_LED_ANODE
PP3V42_G3HPP5V_S3
USB_TRACKPAD_PUSB_TRACKPAD_N
KBDLED_ANODEKBDLED_RETURN
SMBUS_SB_SCLSMBUS_SMC_A_S3_SCLSMBUS_SMC_A_S3_SDA
SMBUS_SB_SDA
SMC_LID
SMC_ONOFF_L
PP3V3_S369C8
81D4
69B8
81A5
67C5
80B5
69A8
67C5
67C3
80A1
68B8
67C3
66C6
79B8
67D5
66C6
65D1
71A6
67D3
65D1
63B7
67B3
66D2
63B7
60C2
67B1
66C8
60C2
59C6
67A1
66A8
59C6
57D4
66B5
53C4
57D4
52B1
62B1
52D7
52B1
46D6
61D7
52B7
46D6
46C3
58C7
52B5
46C3
46B3
58C4
52B1
46B3
41C5
57B5
81C4
51D4
81C6
41C5
37D7
55A8
67B3
51D3
67B3
37D7
37D5
53C4
67B1
51C2
67B1
37D5
37C3
36D6
22C2
62A2
47B5
62A2
37C3
37A7
31C5
6C3
52B8
35B7
52B8
22C2
22C2
52C6
37A7
32C5
25D8
6C2
45C3
27C3
45C3
6D3
6D3
52B2
32C5
27C5
5D4
6C1
5D4
46C3
46C3
26D6
5D4
6D2
6D2
52B2
51C5
27C5
21B6
21B6
21B6
21B6
5D4
5D2
5A7
5B2
46A5
46B5
52A7
5D2
5B2
6D1
6D1
57A4
57A4
51B5
5A2
5D4
www.vinafix.vn
SYM_VER-3
GND
SEL
DB19*
DB18*DB17*
DB16*DB15*
DB14*
DB13*DB12*
DB11*
DB10*DB9* DH19
DH14
DH13
DH12DH11
DH10
DH9
DH15
DH16DH17
DH18
DB4*DB5*
DB6*DB7*
DB8*
DB0*
DB1*DB2*
DB3*
DH4DH3
DH2
DH1DH0
DH8
DH7
DH6DH5
DA15
DA16DA17
DA18
DA19
DA13
DA14
DA12DA11
DA10
DA5DA6
DA7
DA8DA9
DA0DA1
DA2
DA3DA4
VDD
G
S D
G
S D
1B1
4B2
2B12B23B13B24B1
1B21A
2A
3A
4A
OE*S
THRMLPADGND
VCC
SYM_VER-2
V3
V4 RST*
V2
V1
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GPU DDC Pass FETs
LVDS Interface Pull-downs
LTC2903 guaranteed threshold is 93.5% (3.055V, 2.325V, 1.685V, 1.120V)
requirements. Resulting pump-up in LCD panel can cause startup
PGOOD Monitor for GPU Rails
LVDS Mux Selection Qualificationthat the GPU has turned on panel power and that the
Divider set to rise to 1.88V nom/1.74V min when panel power is
eliminate need for LVDS pulldownspanel power has risen to (near) 3.3V. This should
Enables the GPU LVDS path in the mux with the qualification
at 3.3V/3.315V. Schmitt trigger voltage max is 1.70V (@2.625V Vcc).R9981 can also be used as pad for cap, creating an RC filter.
LVDS I/F Mux
NOTE: S = HIGH selects xB2
NOTE: SB_GPIO23 has internal 20K PU to default selection to GPU
Panel/Backlight Control Mux
NC
NOTE: SEL = LOW selects port B
NC
NC
NC
NB LVDS I/F
GPU LVDS I/F
on LVDS signals when they should be 0V.the pump-up in the panel, though some voltage will still be seenand long-term reliability issues. Pull-down resistors reduce
when they should be tri-stated to meet panel power sequenceM56 part. Bias voltage is present on LVDS interface pins evenNOTE: These parts are to counter an invalid state caused by the
LVDS_PD
1/16WSM-LF
8.2K
5%
RP99001 8
1/16W
8.2K
5%
LVDS_PD
SM-LF
RP99021 8
5%
MF-LF402
1/16W
470KR99961
2
CBTV4020
CRITICAL
BGA-LF
U9950
F1
H1K1
K3K4
K6
J7K9
J10
G10E10
C10
A10A8
A7A5
B4
A2B1
D1
G1
J1
K2J4
K5K7
K8
K10H10
F10
D10B10
A9
B7A6
A4A3
A1
C1E1
F2
H2
J2J3
J5
J6J8
J9H9
F9
E9C9
B9
B8B6
B5
B3B2
C2E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8
MC74VHC1G08SC70
U9985
3
2
1
4
5
402
0.1UF
CERM10V20%
C9985 1
2
SOT-3632N7002DW-X-FQ9970
6
2
1
SOT-3632N7002DW-X-FQ9970
3
5
4
402
0.1UF20%10VCERM
C99931
2
LVDS_PD
8.2K
5%1/16WSM-LF
RP99023 6
402
10V20%0.1UF
CERM
C99951
2402
0.1UF20%10VCERM
C99921
2
5%10K
1/16W
402MF-LF
R99971
2
MC74VHC1G08SC70
U9961
3
2
1
4
5
NO STUFF
402MF-LF1/16W5%0R99621
2
0.1UF
402CERM
20%10V
C9961 1
2
LVDS_PD
5%
SM-LF
8.2K
1/16W
RP99024 5
LVDS_PD
8.2K
5%1/16WSM-LF
RP99032 7
8.2K
1/16W5%
LVDS_PD
SM-LF
RP99031 8
5%
LVDS_PD
8.2K
SM-LF1/16W
RP99033 6
8.2K
1/16W5%
LVDS_PD
SM-LF
RP99034 5
LVDS_PD
8.2K
5%
SM-LF1/16W
RP99002 7
LVDS_PD
SM-LF
8.2K
5%1/16W
RP99004 5
402
0.1UF
CERM10V20%
C9950 1
2
8.2K
1/16WSM-LF
5%
LVDS_PD
RP99003 6
10V20%
CERM402
0.1UFC9960 1
2
LVDS_PD
8.2K
SM-LF
5%1/16W
RP99012 7
15.8K1%
402
1/16WMF-LF
R99701
2
15.8K1%
402
1/16WMF-LF
R99711
2
CRITICAL
74CBTLV3257QFN
U996042
3
75
6
911
10
1214
13
15
8
1
17
16
1/16W5%
SM-LF
LVDS_PD
8.2KRP99011 8
402CERM10V20%
0.1UFC9980 1
2
402
10K
MF-LF1/16W5%
R99601
2
100K
MF-LF1/16W
5%
402
R99611
2
1/16W
LVDS_PD
8.2K
5%
SM-LF
RP99013 6
SN74LVC1G132SC70-5
CRITICAL
U9980
3
1
2
4
5
8.2K
1/16W5%
LVDS_PD
SM-LF
RP99014 5
1/16W
402
5%
MF-LF
10KR9980
12
1/16WMF-LF402
13.3K1%
R99811
2
0.1uF
CERM402
20%10V
C9991 1
2
MC74VHC1G08SC70
U9991
3
2
1
4
5
402
0.1uF
CERM
20%10V
C9990 1
2
LVDS_PD
8.2K
1/16W5%
SM-LF
RP99022 7
CRITICAL
LTC2903TSOT-23
U9990
2
6
1
3
4
5
365K
1/16W1%
402MF-LF
R99901
2
MF-LF1/16W1%237K
402
R99921
2
1/16WMF-LF
1%
402
124KR99941
2
100K
402
1%1/16WMF-LF
R99911
2
100K
MF-LF402
1%1/16W
R99931
2
100K
1/16W1%
402MF-LF
R99951
2
SYNC_MASTER=M57_MLB_MG
051-7164
82
03001
87
SYNC_DATE=08/08/2006
LVDS Interface Pull-downs
D3CPGOOD_2V5_DIV
D3CPGOOD_1V8_DIV
PP2V5_D3C
LVDS_L_CLK_P
LVDS_L_CLK_N
LVDS_U_CLK_P
INVERTER_BKLTON
GPU_VARY_BLLVDS_BKLTCTL
LVDS_BKLTEN
LVDS_VDDEN LVDS_PANEL_ENGPU_DIGON
=LVDS_PD_U_CLK_P
=LVDS_PD_U_DATA_P<1>
=LVDS_PD_L_CLK_P
LVDS_U_DATA_N<0>
=LVDS_PD_U_DATA_N<1>
=LVDS_PD_L_CLK_N
LVDS_L_DATA_N<0>
LVDS_MUX_SEL_GPULVDS_MUX_SEL_GPUMAKE_BASE=TRUE
LVDS_MUX_SEL_GPU
S0PGOOD_PWROKS0D3CPGOOD_PWROK
INVERTER_PWM_UNBUF
PGOOD_MUXED_S0_OR_S0D3C
=LVDS_PD_L_DATA_P<2>
GPU_BLON
LVDS_L_DATA_P<0> PP3V3_S0
S0D3CPGOOD_PWROK
=LVDS_PD_L_DATA_N<2>
LVDS_A_CLK_P
LVDS_B_DATA_P<0>
LVDS_B_DATA_N<2>LVDS_B_DATA_N<0>
LVDS_A_DATA_P<2>LVDS_A_DATA_P<0>LVDS_A_DATA_N<0>
LVDS_A_CLK_N
LVDS_A_DATA_P<1>LVDS_A_DATA_N<1>LVDS_A_DATA_N<2>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>LVDS_B_CLK_PLVDS_B_CLK_N
LVDS_B_DATA_N<1>
LVDS_U_DATA_P<0>LVDS_U_DATA_N<0>LVDS_U_DATA_N<2>
LVDS_L_CLK_PLVDS_L_CLK_N
LVDS_L_DATA_N<0>LVDS_L_DATA_P<0>LVDS_L_DATA_P<2>
LVDS_L_DATA_P<1>LVDS_L_DATA_N<1>LVDS_L_DATA_N<2>
LVDS_U_DATA_P<1>
LVDS_U_CLK_PLVDS_U_CLK_N
LVDS_U_DATA_N<1>
LVDS_U_DATA_P<2>
LVDS_U_DATA_CONN_P<0>
LVDS_U_DATA_CONN_N<2>LVDS_U_DATA_CONN_N<0>
LVDS_L_DATA_CONN_P<0>LVDS_L_DATA_CONN_N<0>
LVDS_L_CLK_CONN_NLVDS_L_CLK_CONN_P
LVDS_L_DATA_CONN_P<1>LVDS_L_DATA_CONN_N<1>LVDS_L_DATA_CONN_N<2>LVDS_L_DATA_CONN_P<2>
LVDS_U_DATA_CONN_P<1>LVDS_U_DATA_CONN_N<1>
LVDS_U_CLK_CONN_NLVDS_U_CLK_CONN_PLVDS_U_DATA_CONN_P<2>
PP2V5_S0
LVDS_MUX_SEL_GPU_L
PP3V3_LCD_SW
PP2V5_S0
LVDS_MUX_SEL_GPU
PANEL_PWR_ON
PP3V3_S0
=LVDS_PD_U_CLK_N
LVDS_U_CLK_N
LVDS_U_DATA_P<0>
PP3V3_S0
GPU_DIGON_AND_SELECTEDGPU_DIGON
D3CPGOOD_1V2_DIV
PP1V2_D3CPP1V8_D3C
S0PGOOD_PWROK
PP3V3_D3C
D3CPGOOD_PWROK
GPU_SIGNAL_ENABLE
PP3V3_D3C
LVDS_CONN_DDC_CLKMAKE_BASE=TRUE
MAKE_BASE=TRUELVDS_CONN_DDC_DATA
GPU_DDC_C_CLK
GPU_DDC_C_DATA
LVDS_CONN_DDC_CLK
LVDS_CONN_DDC_DATA
PLT_RST_L
LVDS_MUX_SEL_GPU_MUXED
PP3V3_S0
LVDS_MUX_SEL_GPU
82C6
82D5
82D5
82D5
82B3
82B3
82C6
82C6
82A4
82A4
82A4
82B3
79D3
79D3
79D3
79D3
79A8
79A8
79A8
79A8
71D2
71D2
71D2
71D2
67C5
67C5
67C5
67C5
67C3
67C3
67C3
67C3
67B3
67B3
67B3
67B3
67A3
67A3
67A3
67A3
66B6
66B6
66B6
66B6
66B5
66B5
66B5
66B5
66B1
66B1
66B1
66B1
65D6
65D6
65D6
65D6
65B3
65B3
65B3
65B3
62A6
62A6
62A6
62A6
61D8
61D8
61D8
61D8
61A5
61A5
61A5
61A5
60D4
60D4
60D4
60D4
60C7
60C7
60C7
60C7
58C7
58C7
58C7
58C7
58C4
58C4
58C4
58C4
57B6
57B6
57B6
57B6
54D4
54D4
54D4
54D4
54B5
54B5
54B5
54B5
52D3
52D3
52D3
52D3
49C7
49C7
49C7
49C7
49C4
49C4
49C4
49C4
49B5
49B5
49B5
49B5
40B6
40B6
40B6
40B6
36D6
36D6
36D6
36D6
34A8
34A8
34A8
34A8
33D8
33D8
33D8
33D8
33D3
33D3
33D3
33D3
33C7
33C7
33C7
33C7
29A6
29A6
29A6
29A6
29A3
29A3
29A3
29A3
28A6
28A6
28A6
28A6
27D8
27D8
27D8
27D8
27D5
27D5
27D5
27D5
27D3
27D3
27D3
27D3
27C3
27C3
27C3
27C3
26D1
26D1
26D1
26D1
26B8
26B8
26B8
26B8
26B6
26B6
26B6
26B6
26B4
26B4
26B4
26B4
25D8
25D8
25D8
25D8
25D3
25D3
25D3
25D3
25C6
25C6
25C6
25C6
25C4
25C4
25C4
25C4
25B8
25B8
25B8
25B8
25B4
25B4
25B4
25B4
25A4
25A4
25A4
25A4
24D3
24D3
24D3
24D3
24C3
24C3
24C3
24C3
24B5
24B5
24B5
24B5
24B3
24B3
24B3
24B3
23D5
23D5
23D5
23D5
23B3
82C5
82D3
23B3
23B3
82A7
82D7
23B3
22B5
67B6
67B6
22B5
22B5
80D5
80D5
22B5
21D3
67A8
67A8 21D3
21D3
80B2
80B2
21D3
21C3
67A6
67A6 21C3
21C3
77D2
77D2
21C3
20B4
66B5
66B5 20B4
20B4
77C6
77C6
79A8
20B4
20A4
63D1
63D1 20A4
20A4
77B7
77B7
26C3
20A4
19C7
19D7
19D7 19C7
19C7
77B8
74D6
74D6
26C1
19C7
78C8
19C6
19C5
19C5 19C6
19C6
70C7
74B2
74B2
26B1
19C6
77C6
17C6
19A8
19A8 17C6
17C6
70A1
71C4
71C4
26A4
17C6
77A8
82C3
82C3
82C3
82C3
82C3
82C3 14D6
82C8
82C8
82C8
82D8
82B8
82B8
19A6
19A6 14D6
82C3
82C3
14D6
67D8
71B8
71B8
22A6
14D6
67A8
79D7
79D7
79D7
79D7
79D7
82B6
79D7 14C7
79D7
79D7
79D7
79D7
79D7
79D7
19A4
19A4 14C7
79D7
79D7
14C7
67D6
71A4
71A4
14B7
14C7
82B6
67A6
78A3
78A3
78B3
78B3
78A3
82B6 82A4
77D3
78A3 10C5
78B3
78B3
79D7
78A3
78A3
79D7
79D7
79D7
79D7
78B3
78B3
79D7
79D7
17D6
17D6
82A4
10C5
78B3
78B3
10C5
67C6
67A5
80B2
67A5
82A7
82A7
82A5
82A5
6C7
10C5
82A4
63C1
6B2
6B2
6A2
82B6
6B2
6B2
82A4 82A3
82D5
74C8
6B2 5D4
6B2
6B2
78B3
6B2
6B2
78A3
78A3
78A3
78B3
6A2
6A2
78B3
78B3
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
79D7
17C6
17C6
82A3
5D4
6A2
6B2
5D4
82A4
63B1
82A4
67A3
26A2
67A3
79C3
79C3
79C3
79C3
6C6
5D4
82A3
5D4
6B1
6B1
6A1
79B8
77C3
13D5
13D5
13D5 79D4
77C3
6B2
6A2
6B2
6B1
6A2
6B2
6B1
21D5 21D5
66A2
82C4
79A8
66B2
6B2
74C5
6B1 5A4
82A4
6B2
13C5
13C5
13C5
13C5
13C5
13C5
13C5
13D5
13C5
13C5
13C5
13C5
13C5
13C5
13C5
13C5
6B1
6B1
6A1
6B1
6B1
6B1
6B1
6B1
6B1
6A1
6A1
6B1
6A1
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79C2
79B2
79B2
79B2
5D4
79D3
5D4
21D5
5A4
6B2
6A1
6B1
5A4
77C3
5D4
66A2
65C7
26A1
65C7
13D5
13D5
78A3
78A3
13D5
13D5
5C4
5A4
21D5
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Revision History
83 87
03001051-7164
SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
Revision History
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
Worst-case spacing is 2:1 within Data bus, with 3:1 spacing to the DSTBs.DSTB complementary pairs are spaced 3:1, even in constraint areas.
Worst-case spacing is 2:1 within Addr bus, with 3:1 spacing to the ADSTBs.
Disk Interface Constraints
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 10.6 & 10.7.2
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 7.2, 9.2 & 10.5.2
PCI-Express / DMI Bus Constraints
Design Guide recommends FSB signals be routed only on internal layers.
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.10.1.2
Internal Interface Constraints
DG says minimum spacing 50 mils to clocks
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.9.1
Audio Interface Constraints
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 6.2
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 4.4, 4.6.2, & 5.8.2.4
Need to support MEM_*-style wildcards!
Some signals require 27.4-ohm single-ended impedance.
NOTE: Design Guide allows closer spacing if signal lengths can be shortened.
Design Guide recommends each strobe/signal group is routed on the same layer.
NOTE: Design Guide does not indicate FSB spacing to other signals, assumed 3:1.
All FSB signals with impedance requirements are 55-ohm single-ended.
CPU Signal Constraints
DDR2 Memory Bus Constraints
Most CPU signals with impedance requirements are 55-ohm single-ended.
USB 2.0 Interface Constraints
Clock Signal Constraints
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.17.1.1
FSB (Front-Side Bus) Constraints
SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 4.2 & 4.3
DG recommends at least 25 mils, >50 mils preferred
?FSB_DSTB * =3:1_SPACING
?FSB_DATA2DSTB * =3:1_SPACING
?FSB_DATA2DATA * =2:1_SPACING
?*FSB_DATA =3:1_SPACING
MEM_2OTHERMEM_DATA * *
MEM_2OTHERMEM_CMD **
20 MIL*PCIE ?
20 MIL*DMI ?
=STANDARD=STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SEY*AUDIO_55S
=1.8:1_SPACING*AUDIO ?
SPI_55S * Y =55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD
* =4:1_SPACINGUSB2 ?
SMB_55S * Y =55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD
25 MIL*USB2_2CLK ?
=55_OHM_SECLK_SLOW_55S * Y =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD
MEM_CTRL2CTRL =2:1_SPACING* ?
MEM_2OTHERMEM_DQS **
25 MILMEM_2OTHER * ?
* =4:1_SPACINGMEM_CLK2MEM ?
=85_OHM_DIFFYMEM_85D =85_OHM_DIFF =85_OHM_DIFF* =85_OHM_DIFF=85_OHM_DIFF
=55_OHM_SE* YMEM_55S =STANDARD =STANDARD=55_OHM_SE=55_OHM_SE
25 MILCPU_GTLREF * ?
25 MIL*CPU_COMP ?
*FSB_ADSTB =3:1_SPACING ?
CPU_27P4S =STANDARD=STANDARD=27P4_OHM_SE=27P4_OHM_SE=27P4_OHM_SEY*
=45_OHM_SE=45_OHM_SEYMEM_45S =STANDARD=45_OHM_SE =STANDARD*
MEM_CTRL MEM_CTRL2MEMMEM_CLK *
MEM_CTRL * MEM_CTRL2CTRLMEM_CTRL
MEM_CTRL2MEM * =3:1_SPACING ?
* =1.8:1_SPACINGIDE ?
=2:1_SPACING*CPU_2TO1 ?
FSB_DATA2DSTB*FSB_DATA FSB_DSTB
FSB_ADDR2ADDRFSB_ADDRFSB_ADDR * =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* YSATA_100D
=STANDARD=STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SEY*IDE_55S
MEM_CMD2MEMMEM_CMD *MEM_DQS
FSB_COMMON * =2:1_SPACING ?
=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFFDMI_100D Y*
=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFFPCIE_100D * Y
10 MIL*CLK_SLOW ?
20 MIL*CLK_MED ?
SMB * =3:1_SPACING ?
MEM_CMD * MEM_CTRL2MEMMEM_CTRL
=1.5:1_SPACINGMEM_DATA2DATA * ?
MEM_DATA2MEM =3:1_SPACING* ?
MEM_DQS2MEM * =3:1_SPACING ?
MEM_2OTHERMEM_CLK **
MEM_2OTHERMEM_CTRL * *
MEM_DQS MEM_DQS2MEM*MEM_DATA
*FSB_ADSTBFSB_ADDR FSB_ADDR2ADSTB
20 MIL*SATA ?
=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFF=90_OHM_DIFFUSB2_90D * Y
=STANDARD=STANDARD=55_OHM_SEY =55_OHM_SE* =55_OHM_SEFSB_55S
20 MIL*CLK_PCIE ?
MEM_CMD2MEM * =3:1_SPACING ?
25 MIL*CLK_FSB ?
=70_OHM_DIFFY* =70_OHM_DIFF =70_OHM_DIFF=70_OHM_DIFFMEM_70D =70_OHM_DIFF
=STANDARD=STANDARDY =55_OHM_SE* =55_OHM_SE =55_OHM_SECPU_55S
=55_OHM_SE =55_OHM_SECLK_MED_55S * Y =55_OHM_SE =STANDARD =STANDARD
=100_OHM_DIFFCLK_PCIE_100D =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* Y
=100_OHM_DIFFCLK_FSB_100D =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* Y
*SPI =1.8:1_SPACING ?
MEM_CMD2CMD * =1.5:1_SPACING ?
* MEM_DQS2MEMMEM_DQS MEM_DQS
MEM_CMD * MEM_CMD2MEMMEM_CLK
MEM_DATA2DATAMEM_DATAMEM_DATA **MEM_CMD MEM_CMD2MEMMEM_DATA
*MEM_CLK MEM_CLK2MEMMEM_CMD
* MEM_CLK2MEMMEM_CTRLMEM_CLK
* MEM_CLK2MEMMEM_CLKMEM_CLK
MEM_DQS MEM_DQS2MEM*MEM_CLK
MEM_DQS MEM_DQS2MEM*MEM_CTRL
* MEM_DQS2MEMMEM_DQS MEM_CMD
*MEM_CLK MEM_CLK2MEMMEM_DQS
*MEM_DATA MEM_DATA2MEMMEM_CTRL
* MEM_DATA2MEMMEM_DATA MEM_CLK
MEM_DATA2MEMMEM_DATA *MEM_CMD
MEM_DATA2MEMMEM_DATA *MEM_DQS
*MEM_CMD MEM_CMD2MEMMEM_CTRL
*MEM_CMD MEM_CMD MEM_CMD2CMD
MEM_DQSMEM_CTRL * MEM_CTRL2MEM
MEM_DATA MEM_CTRL2MEM*MEM_CTRLMEM_CLK2MEMMEM_CLK *MEM_DATA
25 MIL*CPU_VCCSENSE ?
CPU_ITP * =2:1_SPACING ?
FSB_DATA *FSB_DATA FSB_DATA2DATA
FSB_ADDR2ADSTB * =3:1_SPACING ?
*FSB_ADDR2ADDR =2:1_SPACING ?
* =3:1_SPACINGFSB_ADDR ?
84 87
03001051-7164
Napa Platform ConstraintsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
Video Signal Constraints
SOURCE: ATI Layout Guide, Rev 0.5 (DSG-216MOBRADEON-05), Sections 7 & 8.1.2.
note
DQ/DQM/DQS lines are 40-ohm single-ended impedence.CTRL lines are 55-ohm single-ended impedence.
LVDS and TMDS signals are 100-ohm +/- 10% differential impedence.LVDS and TMDS pairs should be kept at least 25 mils apart.Ground shields can be used around each pair if spacing cannot be met.
Ground shields recommended around VGA signals.
VGA should be routed as close to 75-ohms single-ended impedence as possible.
SOURCE: ATI Layout Guide, Rev 0.5 (DSG-216MOBRADEON-05), Sections 7 & 8.1.2.
NOTE: Layout Guide does not specify LVDS/TMDS spacing to other traces other than "do not run close"
High-Speed I/O Interface Constraints
PCI Bus Constraints
NOTE: CLK lines are specified in Layout Guide as 40-ohm single-ended. We treat as 75-ohm differential.
GDDR3 (Frame Buffer) Memory Bus Constraints
ADDR/CTRL lines should route 35-ohms to T, then 55-ohms to each VRAM device.
NOTE: Layout Guide does not specify LVDS/TMDS spacing to other traces other than "do not run close"
VGA signals should be kept at least 15 mils from other traces.
?25 MILTMDS_PAIR2PAIR *
?25 MILLVDS_PAIR2PAIR *
FB_55S =55_OHM_SE* =55_OHM_SE =STANDARD =STANDARD=55_OHM_SEY
=55_OHM_SE=35_OHM_SEY* =STANDARD =STANDARD=35_55_OHM_SEFB_35S_TO_55S
=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFFY*TMDS_100D =100_OHM_DIFF
*ENET =3:1_SPACING ?
*FW =3:1_SPACING ?
VGA * 15 MIL ?
TMDS * =3:1_SPACING ?
LVDS =3:1_SPACING* ?
VGA_75S =75_OHM_SE=75_OHM_SE=75_OHM_SE =STANDARDY* =STANDARD
Y =40_OHM_SE =40_OHM_SE =STANDARD=STANDARD* =40_OHM_SEFB_40S
* =2.5:1_SPACINGFB_CLK ?
TMDS * TMDS_PAIR2PAIRTMDS
=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* YLVDS_100D =100_OHM_DIFF
* Y =75_OHM_DIFF =75_OHM_DIFF =75_OHM_DIFF =75_OHM_DIFF =75_OHM_DIFFFB_75D
LVDS LVDS_PAIR2PAIR*LVDS
=2:1_SPACINGPCI * ?
Y =55_OHM_SE =STANDARD=STANDARD=55_OHM_SE* =55_OHM_SEPCI_55S
=2.5:1_SPACINGFB_ADCTRL * ?
FB_DATA * =2.5:1_SPACING ?
FW_110D =110_OHM_DIFF=110_OHM_DIFF=110_OHM_DIFF=110_OHM_DIFF=110_OHM_DIFFY*
Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFENET_100D
85 87
03001051-7164
More System ConstraintsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
TABLE_SPACING_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_ITEM
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_BOARD_INFO
VERSIONALLEGRO
(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS
LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE
TABLE_PHYSICAL_RULE_ITEM
OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE
TABLE_PHYSICAL_RULE_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
PHYSICAL_RULE_SETAREA_TYPENET_PHYSICAL_TYPETABLE_PHYSICAL_ASSIGNMENT_HEAD
OVERRIDEOVERRIDE OVERRIDE OVERRIDE
TABLE_SPACING_RULE_OVERRIDE
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET
TABLE_PHYSICAL_RULE_HEAD
M9 Board-Specific Spacing & Physical Constraints
Rules for "Topology #3" for FSB signals, Napa DG tables 4-7 & 4-12.
Allow 0.1 MM on blind-to-buried via dogbones (layers 2 & 11)
Unsupported rule
"Stale" physical / spacing types
YTOP,BOTTOM45_OHM_SE 0.150 MM 0.150 MM
FSB_ADSTB * =2:1_SPACING ?
* FSB_COMMON*FSB_ANALOG
ENET**ENETCONN
* 0.100 MMMEM_70D
*MEM_85D 0.100 MM
TOP,BOTTOM Y50_OHM_SE 0.124 MM 0.124 MM
NO_TYPE,BGA 15.2MMTOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM
TOP,BOTTOM Y35_OHM_SE 0.230 MM 0.230 MM
* * STANDARDFB_PP1V8
30 MM* Y 0 MM 0 MM=55_OHM_SE =55_OHM_SEDEFAULT
12.7 MMY =DEFAULT*STANDARD =DEFAULT =DEFAULT=DEFAULT
=STANDARDY*110_OHM_DIFF 0.330 MM 0.330 MM0.077 MM 0.077 MM
0.125 MM85_OHM_DIFF =STANDARDY* 0.101 MM 0.125 MM0.101 MM
TOP,BOTTOM85_OHM_DIFF Y 0.125 MM 0.125 MM 0.125 MM 0.125 MM
100_OHM_DIFF =STANDARDY* 0.080 MM 0.200 MM 0.200 MM0.080 MM
YTOP,BOTTOM100_OHM_DIFF 0.099 MM 0.099 MM 0.200 MM 0.200 MM
Y =STANDARD* 0.149 MM 0.149 MM 0.125 MM 0.125 MM70_OHM_DIFF
TOP,BOTTOM Y 0.185 MM 0.185 MM 0.125 MM 0.125 MM70_OHM_DIFF
Y 0.115 MM 0.111 MM 0.125 MM 0.125 MM=STANDARD*80_OHM_DIFF
TOP,BOTTOM Y80_OHM_DIFF 0.140 MM 0.140 MM 0.125 MM 0.125 MM
TOP,BOTTOM110_OHM_DIFF Y 0.089 MM 0.089 MM 0.330 MM 0.330 MM
0.100 MM40_OHM_SE * Y =STANDARD =STANDARD =STANDARD0.131 MM
TOP,BOTTOM Y 0.185 MM40_OHM_SE 0.185 MM
* TMDS_100DTMDS
* TMDS_100DTMDSCONN
TOP,BOTTOM 0.100 MMY55_OHM_SE 0.100 MM
* BGACLK_MED BGA_P2MM
CLK_SLOW * BGA BGA_P2MM
ISL2,ISL11 0.1 MM1.8:1_SPACING ?
FSB_DSTB BGA_P3MMFSB_DSTB BGA
FB_CLK BGA_P2MMBGA*
ISL2,ISL11 0.1 MM2:1_SPACING ?
0.1 MMISL2,ISL111.5:1_SPACING ?
ISL2,ISL11 0.1 MM3:1_SPACING ?
* 0.076 MM0.076 MM =STANDARD=STANDARD=STANDARD55_OHM_SE Y
** BGA BGA_P1MM
ISL2,ISL11 0.1 MM2.5:1_SPACING ?
0.100 MMMEM_45S *
* Y =STANDARD =STANDARD0.165 MM 0.165 MM35_OHM_SE =STANDARD
TMDS**TMDSCONN
VGA * VGA_75S
BGACLK_FSB * BGA_P2MM
BGA_P2MMCLK_PCIE BGA*
MEM_CLK BGA_P2MMBGA*
TOP,BOTTOM Y27P4_OHM_SE 0.335 MM0.335 MM
Y75_OHM_DIFF 0.161 MM 0.161 MMTOP,BOTTOM 0.125 MM 0.125 MM
=STANDARD*90_OHM_DIFF 0.102 MM 0.102 MM 0.220 MM 0.220 MMY
TOP,BOTTOM Y90_OHM_DIFF 0.130 MM 0.220 MM 0.220 MM0.130 MM
=STANDARD* Y =STANDARD =STANDARD0.076 MM0.076 MM75_OHM_SE
* Y =STANDARD =STANDARD50_OHM_SE 0.090 MM =STANDARD0.090 MM
FSB_ADDR2ADSTB * =2:1_SPACING ?
LVDS * LVDS_100D
0.105 MM 0.105 MM45_OHM_SE * Y =STANDARD =STANDARD=STANDARD
0.1 MMISL2,ISL114:1_SPACING ?
FSB_ADDR * =2:1_SPACING ?
=STANDARD*FSB_ADDR2ADDR ?
?ISL2,ISL11 0.1 MMCLK_SLOW
?LVDS_PAIR2PAIR ISL2,ISL11 0.1 MM
?0.1 MMISL2,ISL11CPU_VCCSENSE
?DMI 0.1 MMISL2,ISL11
?0.1 MMISL2,ISL11CPU_COMP
?ISL2,ISL11 0.1 MMCPU_GTLREF
?TMDS_PAIR2PAIR 0.1 MMISL2,ISL11
?VGA ISL2,ISL11 0.1 MM
?0.1 MMISL2,ISL11CLK_FSB
?ISL2,ISL11 0.1 MMCLK_PCIE
?ISL2,ISL11 0.1 MMPCIE
?MEM_2OTHER 0.1 MMISL2,ISL11
?0.1 MMISL2,ISL11CLK_MED
?SATA 0.1 MMISL2,ISL11
?2:1_SPACING 0.2 MM*
?*1.5:1_SPACING 0.15 MM
?0.18 MM*1.8:1_SPACING
?* 0.25 MM2.5:1_SPACING
?*4:1_SPACING 0.4 MM
?*3:1_SPACING 0.3 MM
?DEFAULT * 0.1 MM
?=DEFAULTSTANDARD *
?BGA_P1MM * =DEFAULT
?=DEFAULT*BGA_P3MM
?*BGA_P2MM =DEFAULT
?=2:1_SPACINGFSB_DATA *
?=2:1_SPACING*FSB_DSTB
?* =2:1_SPACINGFSB_DATA2DSTB
?=STANDARDFSB_DATA2DATA *
?*MEM_2OTHER 0.5 MM ?*PCI_2PCI 0.1 MM
*PCI PCI PCI_2PCI
MEM_PP1V8_S3 ** STANDARD
* *GND STANDARD
**I2C SMB
* * FSB_COMMONFSB_P2MM
=STANDARDY75_OHM_DIFF 0.131 MM 0.131 MM 0.125 MM 0.125 MM*
=STANDARD0.165 MM =STANDARD=STANDARDY*35_55_OHM_SE 0.076 MM
0.100 MM35_55_OHM_SE TOP,BOTTOM 0.230 MMY
* Y =STANDARD27P4_OHM_SE 0.240 MM =STANDARD =STANDARD0.240 MM
86 87
03001051-7164
M9 Spacing & Physical ConstraintsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)
I2C
FSB_P2MM
MEM_PP1V8_S3
FB_PP1V8
PCI_55SPCI
FSB_ANALOG
GND
www.vinafix.vn
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ELECTRICAL_CONSTRAINT_SET PHYSICAL
NET_TYPE
SPACING
I70
I71
I72
I73
051-7164 03001
8787
M57 NET PROPERTIESSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)
ITPRESET_LCPU_ITPCPU_55S
CPU_VID<6..0>CPU_2TO1CPU_55S
CPU_VID<6..0>CPU_2TO1CPU_55S
CPU_VCCSENSE_PTHERM CPU_VCCSENSECPU_27P4S
SB_ACZ_BITCLKAUDIOAUDIO_55S
ACZ_BITCLKAUDIOAUDIO_55S
CLK_SLOW CLK_SLOW_55S
SPI SPI_55S
FSB_DPWR_LFSB_COMMONFSB_55S
FSB_REQ_L<4..0>FSB_ADDRFSB_55S
CPU_STPCLK_LCPU_55S
VGA VGA_75S
LVDS LVDS_100D
TMDS TMDS_100D
PCIE PCIE_100D
TMDS_CLK_PTMDSTMDS
FSB_BNR_LFSB_COMMONFSB_55S
FSB_HITM_LFSB_COMMONFSB_55S
SB_ACZ_SYNCAUDIOAUDIO_55S
TMDS_CLK_NTMDSTMDS
ACZ_SYNCAUDIOAUDIO_55S
ACZ_SDATAIN<0>AUDIOAUDIO_55S
SB_ACZ_SDATAOUTAUDIOAUDIO_55S
ACZ_SDATAOUTAUDIOAUDIO_55S
ACZ_RST_LAUDIOAUDIO_55S
SB_ACZ_RST_LAUDIOAUDIO_55S
CLK_MED CLK_MED_55S
CLK_PCIE CLK_PCIE_100D
IDE IDE_55S
FSB_HIT_LFSB_COMMONFSB_55S
CPU_THERMTRIP_LCPU_2TO1CPU_55S
FSB_IERR_LCPU_55S
DMI DMI_100D
FB_DATA FB_40S
FB_ADCTRL FB_35S_TO_55S
FB_ADCTRL FB_55S
CPU_INIT_LCPU_55S
CPU_SMI_LCPU_55S
MEM_DATA MEM_55S
MEM_CTRL MEM_45S
MEM_CLK MEM_70D
MEM_CMD MEM_55S
FSB_ADS_LFSB_COMMONFSB_55S
FSB_BREQ0_LFSB_COMMONFSB_55S
XDP_BPM_L<5..0>CPU_ITPCPU_55S
CPU_XDP_CLK_PCPU_ITPCLK_FSB_100D
CPU_COMP<0>CPU_COMPCPU_27P4S
IMVP6_VSEN_NCPU_VCCSENSECPU_27P4S
CPU_VCCSENSE_NTHERM CPU_VCCSENSECPU_27P4S
FSB_A_L<31..3>FSB_ADDRFSB_55S
FSB_FERR_LCPU_55S
IMVP_DPRSLPVRCPU_2TO1CPU_55S
CPU_PWRGDCPU_55S
CPU_NMICPU_55S
CPU_A20M_LCPU_55S
CPU_DPSLP_LCPU_55S
CPU_IGNNE_LCPU_55S
PM_DPRSLPVRCPU_2TO1CPU_55S
CPU_GTLREFCPU_GTLREFCPU_55S
CPU_COMP<3>CPU_COMPCPU_55S
CPU_COMP<2>CPU_COMPCPU_27P4S
FSB_DSTBN_L<3..0>FSB_DSTBFSB_55S
FSB_DINV_L<3..0>FSB_DATAFSB_55S
FSB_DSTBP_L<3..0>FSB_DSTBFSB_55S
FSB_DBSY_LFSB_COMMONFSB_55S
FSB_CPURST_LFSB_COMMONFSB_55S
FSB_TRDY_LFSB_COMMONFSB_55S
CLK_FSB CLK_FSB_100D
FW FW_110D
USB2 USB2_90D
FSB_RS_L<2..0>FSB_COMMONFSB_55S
FSB_DRDY_LFSB_COMMONFSB_55S
FSB_D_L<63..0>FSB_DATAFSB_55S
FSB_ADSTB_L<3..0>FSB_ADSTBFSB_55S
CPU_INTRCPU_55S
IMVP6_VSEN_PCPU_VCCSENSECPU_27P4S
CPU_XDP_CLK_NCPU_ITPCLK_FSB_100D
SMB SMB_55S
CPU_COMP<1>CPU_COMPCPU_55S
ENET ENET_100D
SATA SATA_100D
FB_CLK FB_75D
MEM_DQS MEM_85D
FSB_LOCK_LFSB_COMMONFSB_55S
TMDS_CLK_F_NTMDSCONNTMDSCONN
TMDS_CLK_F_PTMDSCONNTMDSCONN
TMDS_DATA_P<5..3>TMDSTMDS
TMDS_DATA_P<2..0>TMDSTMDS
TMDS_DATA_N<5..3>TMDSTMDS
TMDS_DATA_N<2..0>TMDSTMDS
TMDS_DATA_F_P<5..3>TMDSCONNTMDSCONN
TMDS_DATA_F_P<2..0>TMDSCONNTMDSCONN
TMDS_DATA_F_N<5..3>TMDSCONNTMDSCONN
TMDS_DATA_F_N<2..0>TMDSCONNTMDSCONN
FSB_BPRI_LFSB_COMMONFSB_55S
FSB_DEFER_LFSB_COMMONFSB_55S
12D6 12C6
12B4
12B4
12B4
12B6
12D4
7C4
7C4
7C4
7C4
80D1
80D6
80D1
80D6
12B4
34D5
12C4
61C8
7C3
7C3
7C3
12C4
7C3
12C4
34D5
80B8
80D8
80B8
80D8
80B6
80D1
80B6
80D1
87B6
87B6
48B3
12B4
12A4
21C4
80B8
12C4
12B4
80C8
48B3
48B3
48B3
48B3
12B4
12C4
12C4
34D3
7D8
21C4
21C4
23C3
7B4
7B4
7B4
12B4
11B5
12B4
7B4
7D8
34D3
12B4
80D1
80D1
80A8
80C8
80A8
80C8
80B5
80C6
80B5
80C6
9C2
9C2
61B1
21C7
7B3
7D8
7C8
79C7
7D6
7D6
79C7
21C7
21C7
21C7
21C7
7D6
21C4
21C4
7D6
7D6
11B3
33C4
61A1
7C8
61C7
7B3
21C4
21C4
7B3
21C4
14B7
7B3
7B3
7B3
7D6
7D6
12A4
12A4
7D6
7B3
7C8
21C4
33C4
7D6
80C6
80B6
79C7
79C7
79C7
79C7
80B3
80B5
80B3
80B5
12C4
12B4
11B3
8B7
8B7
8B6
21C6
5C1
5A4
5A7
5C4
78C3
5B7
5B7
21C6
78C3
5C1
5C1
21C6
5C1
5C1
21C6
5B7
7D6
7D6
7C8
5B7
5B7
7C6
11B3
7B3
61A3
8B6
5B7
5C4
5B4
7C8
7C8
5B4
7C8
5B4
7B4
7B3
7B3
5B7
5B7
5B7
5B7
5A4
7D6
7D6
5B7
5B7
5B7
7C8
61A3
11B3
7B3
5A7
80A5
80B5
78C3
78C3
78C3
78C3
80A6
80B3
80A6
80B3
7D6
7D6
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