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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONSInt. J. Circ. Theor. Appl. 2011; 39:1105–1144Published online 28 August 2010 in Wiley Online Library (wileyonlinelibrary.com). DOI: 10.1002/cta.689

Universal basis for ranking small-signal aspects ofcompensation techniques for operational amplifiers

Edward M. Cherry∗,†,‡

Electrical and Computer Systems Engineering, Monash University, VIC 3800, Australia

SUMMARY

A multi-pole gain-bandwidth theorem sets an upper bound to the bandwidth that can be achieved withspecified DC gain and external load capacitance, for a given selection of transistors and operating points.A product of the poles and zeros is constrained by

∏(gm/C) evaluated over the forward-path active

devices. Most practical compensation techniques degrade the actual bandwidth, by factors which the paperexplores in detail; depending on the circuit topology, some compensating capacitors can add to the intrinsicdevice capacitances. A few techniques achieve the ideal. Copyright � 2010 John Wiley & Sons, Ltd.

Received 31 October 2009; Revised 22 February 2010; Accepted 1 March 2010

KEY WORDS: feedback amplifiers; operational amplifiers; compensation; gain-bandwidth product

1. INTRODUCTION

Many techniques for compensating operational amplifiers have been proposed [1–25]. This paperis an attempt to provide a basis on which the small-signal aspects of all such techniques can beranked, by comparing them to an absolute standard. It also suggests practical circuit arrangementswhich might enhance performance. Its basis is a multi-pole gain-bandwidth theorem.

It will be shown that the bandwidth of any operational amplifier in a closed-loop low-passvoltage-gain configuration is given by an expression of the form

�3dB =�

[1

A(0)�

forward-path stages

(gm

cG +CZ

)]1/neff

. (1)

Here

• A(0) is the DC gain.• neff is the number of effective poles (defined in Section 2 below, but broadly equal to the

number of forward-path stages).• gm /cG , the quotient of mutual conductance and gate-source capacitance, is a process-dependent

parameter designated by

�T ≡2� fT = gm

cG. (2)

• CZ for at least one stage includes the external load capacitance Cext. In general and dependingon circuit topology, CZ can include none, some, or all of the compensating capacitors.

∗Correspondence to: Edward M. Cherry, 1 Hill Avenue, Marysville, VIC 3779, Australia.†E-mail: [email protected]‡Adjunct Research Associate.

Copyright � 2010 John Wiley & Sons, Ltd.

1106 E. M. CHERRY

• � is the bandwidth multiplication factor defined in Section 2. As an example, �=1 for all-polemaximally-flat functions.

The bandwidth in Equation (1) determines the ranking of compensation techniques, subject toconstraints on total gm imposed by power consumption.

In an impossibly-ideal situation, all CZ would be zero and Equation (1) simplifies to

�3dB =�

[1

A(0)�

forward-path stages

(gm

cG

)]1/neff

=��T

[1

A(0)

]1/neff

. (3)

All (brackets) in the product take their maximum possible value, namely, the process parameter�T . Of course this cannot be achieved because Cext must appear at least once, but Equation (3) setsa standard to which practical compensation techniques can aspire. In the best practical scenario,Cext occurs in one (bracket) only, with all other CZ =0. A two-stage amplifier compensated via avoltage buffer (Section 3.1) is an instance.

For a multi-stage amplifier, the penalty in actual �3dB relative to Equation (3) is determined bythe (brackets) which do not simplify to �T . In the four-stage compensation technique of Section 7,for example, CZ in one (bracket) is equal to Cext plus a normally-insignificant contribution from acompensating capacitor, another compensating capacitor appears as the whole of CZ in a second(bracket), but CZ =0 in the two remaining (brackets). The ranking of other compensation techniquescould be established by considerations such as this.

The outline of the paper is as follows. Section 2 presents the theorem in a non-specific context.Then Section 3 compares predictions from the theorem with precise analyses of five well-knowntwo-stage operational-amplifier circuits. With this background, Section 4 considers the factors thatmight be involved in a figure of merit. Section 5 extends the work to multi-stage amplifiers, andSections 6 and 7 present a novel four-stage example.

There are three Appendices: a fresh look at Miller compensation, an extension to the theory ofpole-zero doublets, and amplifiers which include parallel-path additive-gain stages (in contrast tocascade multiplicative-gain stages).

2. GAIN-BANDWIDTH PRODUCT

The voltage gain of Figure 1 is

A(s)= vo

vi= (−)

gm R

1+s RC.

The DC gain and 3-dB bandwidth are

A(0) = gm R,

�3dB = 1

RC,

and the gain-bandwidth product follows as

A(0)×�3dB = gm

C.

Evidently, gain can be exchanged for bandwidth by varying R, but their product remains constant.Similarly, the DC gain and bandwidth of Figure 2 are

A(0) = 1

h,

�3dB = gmh

C.

Copyright � 2010 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. 2011; 39:1105–1144DOI: 10.1002/cta

SMALL-SIGNAL ASPECTS OF COMPENSATION TECHNIQUES 1107

C

R

gm

vi

vo

Figure 1. Common-source amplifier stage.

vo

–+

–gm

C

h

feedbacknetwork

vi

Figure 2. Outline of many operational amplifiers.

Gain can be exchanged for bandwidth by varying the feedback factor h, but the gain-bandwidthproduct remains constant:

A(0)×�3dB = gm

C.

Instances such as these appear to have engendered a belief that the product of gain and bandwidthis a constant for any amplifier. It is not—except in the case of some single-pole systems. Considertwo identical stages of the type in Figure 1, connected in cascade:

A(s)=(

gm R

1+s RC

)2

,

from which

A(0) = g2m R2,

�3dB =√√

2−1

RC,

A(0)×�3dB = g2m R√√

2−1

C.

The product of gain and bandwidth can be varied (and in fact made arbitrarily large) simply byvarying R. Anticipating the theorem, a meaningful result is

√A(0)×�3dB =

√√2−1

(gm

C

)=constant,

and√√

2−1 is the bandwidth multiplication factor �.


1108 E. M. CHERRY

C

R

gm

vi

L

vo

Figure 3. Wide-band common-source amplifier stage with shunt peaking.

2.1. The gain-bandwidth theorem

The Author’s preferred statement of the gain-bandwidth theorem [26] for a multi-pole low-passamplifier is

A(0)× � [poles of A(s)]

� [zeros of A(s)]=�

(gm

C

). (4)

In a cascade of common-source stages,∏

(gm) has the obvious interpretation and∏

(C) is theproduct of the capacitances that connect each signal node directly to ground. The RHS ofEquation (4) is a positive real number. On the LHS the DC gain is a positive real number fora non-inverting amplifier, negative for inverting. Real-axis poles and zeros also appear as realnumbers, negative or positive for the left-half-plane or right-half-plane, respectively. The productof any pair of complex-conjugate singularities is a real number too, negative or positive dependingagain on the half plane in which the singularities lie. Thus the total LHS of Equation (4) is a realnumber, but it can be positive or negative; its modulus is relevant. In the case of a single-polesystem, Equation (4) reduces to the familiar gain × bandwidth=constant.

In a cascade of N stages, there are N terms in∏

(gm) but N +1 terms in∏

(C)—includingthe input and output circuits. If A(s) is interpreted as the voltage gain vo/vS , from the Thevenin-equivalent generator inside the source to amplifier output, the additional gm term required fordimensional consistency in Equation (4) becomes the reciprocal of the Thevenin-equivalent sourceresistance. Other transfer functions (current gain, transfer admittance, and transfer impedance) canbe treated similarly [27, 28].

The gain-bandwidth theorem applies to wide-band amplifiers which include two-terminalinductance-peaking networks in their interstages. As an elementary example, voltage gain for theshunt-peaked stage in Figure 3 is

A(s)= (−)gm(R+sL)

1+s RC +s2LC,

from which

A(0) = gm R,

zero: z1 = − R

L,

poles: p1, p2 = − RC ±√

(RC)2 −4LC

2LC,

and, consistent with the theorem,

A(0)× p1 × p2

z1= gm

C.



+–

INPUT ERROR

FEEDBACK

OUTPUTforward pathG(s)

feedbacknetwork

H(s)

Σ

Figure 4. Block diagram feedback system.

For the block-diagram feedback system in Figure 4, the forward-path gain G(s) and overall gainA(s) are related by

A(0)× �[poles of A(s)]

�[zeros of A(s)]=G(0)×

[�[poles of G(s)]

�[zeros of G(s)]

][1

1+G H (∞)

]. (5)

Given that the gain-bandwidth theorem applies to the amplifier without feedback [that is to G(s)]then, except in the special case of a system for which loop gain has equal numbers of polesand zeros so that G H (∞) �=0, the theorem applies also to the amplifier with feedback. Note that∏

(gm/C) in Equation (4) is evaluated over G(s) alone; the feedback factor H (s) does not enterinto consideration.

Practical feedback networks can be split into four components: an ideal feedback factor plus, inthe Author’s preferred terminology [29], input and output loading terms, and forward leakage. Thegain-bandwidth theorem applies if the latter three are included in G(s). Specifically, if the feedbacknetwork is represented by its y parameters, so that the input-loading and output-loading terms arey11 and y22, respectively, and the forward-leakage term is y21, then y11 and y22 contribute in theobvious way to

∏(C) in Equation (4), and gm is replaced by

gm(eff) ⇒including

forward leakage

Limits⇒∞ (gm − y21). (6)

Drain–gate capacitance provides a kind of local feedback around an amplifying stage. Thesituation is equivalent to Section 3.2.3 below. The gain-bandwidth theorem applies provided loadingand forward-leakage effects are included, but note that the relevant capacitance has its originalvalue—not the Miller-multiplied value as intuition might suggest.

The gain-bandwidth theorem extends to source-follower and common-gate amplifiers, byregarding these as a common-source stage with ideal unity-voltage-gain or unity-current-gainfeedback networks, respectively. Drain–gate capacitance and drain–source (as distinct fromdrain–ground) capacitance require due consideration.

Related versions of the gain-bandwidth theorem apply to low-pass amplifiers which incorporatefour-terminal interstage networks, and to band-pass amplifiers. These are beyond the scope of thepresent paper.

Some special-purpose transfer functions have desirable features in the time domain but are notquotients of finite polynomials in complex frequency s [30–32]. The theorem is not applicable.However, the theorem does apply to practical but approximate realizations of these functions fromlumped circuit elements.

The Author and his colleagues were aware of this theorem circa 1960; a special case of it wasused at Equation 58 of [33] in 1963. At that time we thought the theorem was a known result.Certainly, it is consistent with all Bode’s work [34] on limits to the relation between integrals ofgain magnitude and phase. The theorem was therefore stated without proof in our book of 1968.

The proof of (4) is trivial (which is why the Author long believed it was a known result). Dividethroughout by sneff , where

neff =n p −nz (7)


1110 E. M. CHERRY

is the number of effective poles, and n p and nz respectively are the actual numbers of poles andzeros. Then each side is an expression for gain as |s|⇒∞; the LHS is the final asymptote in aBode plot and the RHS follows by inspection of the small-signal equivalent circuit.

2.2. Consequences of the theorem

Reference [26] has been out-of-print for many years. It is therefore worth paraphrasing from it:

(a) For an amplifier using given amplifying devices [i.e. known∏

(gm/C)] and having a specifieddynamic response [i.e. a specified singularity pattern and hence

∏(poles)/

∏(zeros)], the

maximum attainable DC gain is constant also. Poles and zeros can be introduced or moved bymodifying individual stages (for example by adding inductance peaking or local feedback)but, provided pole-zero cancellation occurs between stages in such a way that the totalsingularity pattern remains unchanged after all the modifications are made, the maximumattainable gain is also constant.

(b) The 3-dB bandwidth of a transfer function which has n p poles and nz zeros can be written as

�3dB =�

[�(poles)

�(zeros)

]1/neff

, (8)

where [∏

(poles)/∏

(zeros)]1/neff is the geometric mean distance of the effective poles fromthe origin, and � is a constant of the singularity pattern type known as its bandwidthmultiplication factor. For example, �=1 for all-pole maximally flat patterns, and

√21/n p −1

for coincident-pole patterns.(c) The bandwidth of an amplifier with two-terminal interstage networks follows as

�3dB =�

[�(gm/C)

A(0)

]1/neff

. (9)

Thus the bandwidth of an amplifier that uses given amplifying devices and has a specifiedDC gain is determined entirely by the bandwidth multiplication factor of its singularitypattern type.

(d) � for a given number of effective poles falls as the overshoot in the step response is reduced.Thus, for four-pole maximally-flat, linear-phase and coincident-pole patterns, respectively,�=1 ·00, 0 ·66, and 0 ·44. Maximally-flat patterns have overshoots which increase mono-tonically with increasing order, linear-phase patterns have less than 1% overshoot, andcoincident-pole patterns have zero overshoot.

(e) � for a given singularity pattern type falls as the number of effective poles is increased.Thus, for two-, three-, four-, and five-pole linear-phase patterns, respectively, �=0 ·79, 0 ·71,0 ·66, and 0 ·62. The rate of fall is most rapid for coincident-pole patterns, and zero formaximally-flat patterns.

(f) � is greater for one large group of poles than for a number of smaller groups in cascade(with the same total number of poles and similar response). For example, �=0 ·66 for afour-pole linear-phase pattern, compared with 0 ·55 for two 2-pole linear-phase patterns incascade.

(g) � for neff poles tends to be larger when the actual number n p of poles is greater than neff, andthere are (n p −neff) zeros in the singularity pattern. For example, �=1 ·11 for a four-poletwo-zero linear-phase pattern, compared with 0 ·79 for a two-pole linear-phase pattern.

(h) � tends to be small for a singularity pattern in which some poles lie relatively close to theorigin and dominate the response, whereas other poles are relatively far from the origin.For example, if a two-pole function has its damping ratio ��1, its poles form a complex-conjugate pair and are equidistant from the origin, and ��0 ·64. However, if �>1 there isone dominant pole plus one far out, and �<0 ·64.

(a)–(c) and (h) are particularly relevant to the compensation of operational amplifiers, (d)–(g) moreso to very wide-band amplifiers.



Equation (1) ranks competing amplifiers on the basis of 3-dB bandwidth in the sinusoidal j�domain. However, it is well known that bandwidth is highly correlated with 10–90% rise time—thebasic measure of ‘speed’ in the time domain [35, 36]:

�3dB ×T10−90% ≈2 ·2. (10)

Details such as overshoot or settling time depend on the singularity pattern type, and hence on �.The considerations above are relevant but, for specified ‘shape’ of the step response, Equation (1)correctly ranks amplifiers for speed as well as bandwidth.

3. THE TWO-STAGE OPERATIONAL AMPLIFIER

As an illustration of how the gain-bandwidth theorem plays out in practice, consider the two-stageoperational amplifier. This circuit has the advantage that complete algebraic solution is possiblewithout too much effort, and therefore precise comparisons can be made with the theorem. Manyobvious details are omitted from Figure 5(a): for example, the second stage usually operatespush-pull class-AB, and resistances are realized as 1/gm of a FET.

The solutions are given in terms of the DC gain plus the undamped natural time constant �0and damping ratio � of the poles (or of the dominant pair when there are more than two poles):

A(s)= A(0)

[1

1+2�(s�0)+(s�0)2

]. (11)

v

overallfeedback

compensation

v

v

feedback

i

h

load

v

external

ii

y v

y y y vg v

vv

Y Y

2nd stage1st stage inputloading

output loading& forward leakage

feedbackideal

forward path of compensating loop

including external load

g (v–hv )

(b)

(a)

Figure 5. Outline circuit of a two-stage operational amplifier, and its equivalent circuit in which thecompensating feedback network is represented by a y-parameter model.


1112 E. M. CHERRY

RF CF

v1 v2

YF

voltage bufferideal

v1 v2

CFRF

YFAV = 1

idealcurrent amplifier

v1 v2

AI = –b

bRF

YF /b

CF /b

Figure 6. Some examples of compensating networks for Figure 5.

With this notation

�[poles of A(s)]= 1

�20

. (12)

In Figure 5(b), Y1 and Y2 represent the total admittances to ground at the input and output ofthe second stage (including the external load). At the higher frequencies which are the principalconcern of this paper, the former is likely to be dominated by gate–source capacitance of thesecond-stage FET, and the latter by the external load capacitance. Shunt resistances are likely tobe dominated by the drain resistances of the FETs and are likely to be very large.

The compensating feedback network is represented by its y-parameter model. The ideal feedbackfactor is

Hinner(s)≡ i f

v2=−y12 (13)

and, for emphasis, this is drawn displaced. y11 and y22 are the input and output loading admittances,and y21v1 is the forward leakage. By inspection the forward-path gain of the inner loop is

G inner(s)≡ v2

i1

∣∣∣∣ feedback removedloading retained

= (−)gm2 − y21

(Y1 + y11)(Y2 + y22), (14)

and the overall gain of the inner loop becomes

Ainner(s)≡ v2

i1= G(s)

1+G(s)H (s)= (−)

gm2 − y21

(Y1 + y11)(Y2 + y22)+(gm2 − y21)y12. (15)

Figure 6 shows three likely forms of compensating network.The outer feedback factor is

Houter(s)= v f

v2=h. (16)

Hence, using Equation (15), the overall gain (including both the outer and compensating feed-back) is

Aouter(s)= v2

vS= gm1(gm2 − y21)

(Y1 + y11)(Y2 + y22)+(gm2 − y21)y12 +gm1(gm2 − y21)h. (17)

In Section 3.1 following, Y1 and Y2 are represented as parallel combinations R1C1 and R2C2,and pole-zero cancellations are explored in detail. For brevity, R1 and R2 are ignored in latersections, and many other details are omitted.



if

i1

gm 2v1

v2v1

CF

C2

C1

R1 R2

sCF

1+sRFCF

v2

RF

gm 1(vS–hv2)

Figure 7. Equivalent circuit of a two-stage operational amplifier witha voltage buffer in its compensating network.

3.1. Voltage buffer

In the case [5, 6] of an ideal voltage buffer (Figure 6(b)),

y21 = y22 =0,

y11 = y12 =YF = sCF

1+s RF CF.

Figure 5(b) simplifies to Figure 7, and Equation (17) becomes

A(s) = v2

vS= gm1gm2

Y1Y2 +(gm2 +Y2)YF +gm1gm2h,

= gm1gm2(hgm1gm2 + 1

R1 R2

)+s

(C1

R2+ C2

R1

)+s2C1C2 +

(gm2 + 1

R2+sC2

)(sCF

1+s RF CF

) .

(18)

If RF is chosen such that

RF CF = C2

gm2 +1/R2≈ C2

gm2, (19)

pole-zero cancellation occurs near s =−gm2/C2 and Equation (18) simplifies to

A(s)= gm1gm2(hgm1gm2 + 1

R1 R2

)+s

[C1

R2+ C2

R1+CF

(gm2 + 1

R2

)]+s2C1C2

. (20)

The system becomes two pole. Its DC gain is

A(0)= gm1gm2

hgm1gm2 +1/R1 R2≈ 1

h, (21)

and the undamped natural time constant and damping ratio of its poles are

�0 =√

C1C2

hgm1gm2 +1/R1 R2≈√

C1C2

hgm1gm2, (22)

� = C1/R2 +C2/R1 +CF (gm2 +1/R2)

2√

hgm1gm2 +1/R1 R2)C1C2≈ CF

2√

C1C2

√gm2

hgm1. (23)


1114 E. M. CHERRY

Hence the feedback capacitor required to achieve specified damping is

CF = 2�√

(hgm1gm2 +1/R1 R2)C1C2 −(C1/R2 +C2/R1)

gm2 +1/R2

≈ 2�√

C1C2

√hgm1

gm2. (24)

The approximate forms of Equations (21)–(24) apply if R1 and R2 are large enough to be neglected.In practice the voltage buffer is likely to consist of a source follower, for which the output

resistance is 1/gm . This resistance can be absorbed into RF provided buffer gm is at least as large as

gm(buffer)�1

RF= 2�

√(hgm1gm2 +1/R1 R2)C1C2 −(C1/R2 +C2/R1)

C2

≈ 2�√

hgm1gm2

√C1

C2. (25)

3.1.1. Root-locus considerations. The inner forward path of Figure 7 includes three capacitorswhich do not form a loop; it therefore has three poles. The inner feedback factor has one pole.There are therefore four branches in a root-locus diagram and four overall poles. However Equation(20) has only two poles. One pole-zero cancellation is known at Equation (19) but there must beanother. The precise detail is significant in relation to the pole-zero doublet(s) which result withreal components and imperfect cancellations.

Figure 8(a) shows the singularity pattern for G inner(s):

• There is a pole close to the origin at s =−1/R2C2, where the impedance of C2 becomesequal and opposite to R2 and the total output-circuit impedance becomes infinite.

• There are two poles associated with the interstage circuit, where the total impedance becomesinfinite: one close to the origin and near s =−1/[R1(C1 +CF )], the other far out and nears =−1/[RF (C1 seriesCF )].

• There is a zero at s =−1/RF CF , where the impedance of CF becomes equal and oppositeto RF and the series branch short circuits the interstage node to ground.

Recall that a feedback system has zeros at the zeros of the forward-path gain and at the polesof the feedback factor. Figure 8(b) shows the singularities of Hinner(s), and Figure 8(c) shows theconsequent zeros of Ainner(s).

In a root-locus diagram, degenerate or point branches exist where pole-zero cancellations occur.Figure 8(d) shows the resulting pole of Ainner(s); this cancels identically with one of the zerosfrom Figure 8(c). Figure 8(e) shows the loci of the other poles as gm2 is increased from zero (thereis no singularity at s =−1/RF CF : the pole and zero in Figures 8(a) and 8(b) cancel identically),and Figure 8(f) is the complete singularity pattern for Ainner(s); one zero from Figure 8(c) remainswith three poles from the root loci.

The condition on RF in Equation (19) sets the middle pole to cancel the zero, and Figure 8(g)is the resulting pattern for Ainner(s) [which is also Gouter(s)]; just two poles remain. However thecancellation is not identical, so there is the potential for one pole-zero doublet (not two) nears =−1/RF CF . Finally, Figure 8(h) is the root-locus diagram for Aouter(s); typically there is acomplex-conjugate pair of poles, but the potential for a pole-zero doublet [narrower than that inAinner(s)] remains.

3.1.2. Phase margin of the inner loop. Some extant analyses of two-stage operational amplifiers[37, 38] start from an assumed phase margin for the inner feedback loop—typically around 70◦. TheAuthor believes that this is unnecessary and potentially misleading. The overall transfer functionof any linear system contains complete information about its stability. Poles are a property of awhole system, not its component parts in isolation.



special case R FCF ≈ C2 /gm2

double zero

point branch of root locus

no zero(identical cancellation)

j axis

axis

one zeroremains

cancellation

root loci for outer

root loci for inner

zeros of A inner

singularities of inner


–1

R 1(C1+CF )

potential

–1

R F

C1 + CF

C1 CF

–1

R F CF

–1

R 2 C2

–gm2

C2

CF

2C1

–gm2

C2

–gm2

C2

CF

C1

–gm2

C2

1 +CF

C1

–1

gm2R 1R 2CF

doublet


Figure 8. Root locus diagrams for Figure 7. The frequency scale is approximate, but note that manyfrequencies can be expressed as multiples of gm2/C2.

The gain around the inner loop of Figure 7 is

G Hinner = gm2YF

Y2[Y1 +YF ],

and, if R1 and R2 are neglected for algebraic simplicity,

G Hinner = gm2(CF/C2)

s(C1 +CF )

[1+s

(RF C1CF

C1 +CF

)] . (26)

The asymptote passes through unity at

�= gm2(CF/C2)

C1 +CF,


1116 E. M. CHERRY

the phase shift at this frequency is

�=−�

2−arctan

[gm2(CF/C2)

C1 +CF× RF C1CF

C1 +CF

],

and the phase margin of the inner loop against oscillation is

�=�−�=arctan

[1

gm2 RF

(C2

C1

)(1+ C1

CF

)2]

. (27)

Now invoke (19) for pole-zero cancellation, and

�=arctan

[(C1 +CF )2

C1CF

]. (28)

Phase margin of the inner loop cannot be less than arctan(4) ≈76◦, and is independent of C2.However, damping ratio � in (23) can be made arbitrarily small (by making CF small) and thesystem as a whole can be brought to the brink of instability.

At the other extreme are systems in which an inner feedback loop has a negative phase marginand is actually unstable in the absence of the outer loop, but the overall response is well behaved[34 (p. 158), 39]. Thus, a substantial phase margin for the inner loop is in no way predictive ofsystem dynamics, nor is it a requirement for system stability.

More generally, Bode [34 (Equation 4-2)] has shown that the loop gain for any reference variablein any linear system is

Aloop = �

�0−1. (29)

Here � is the system determinant and �0 is the determinant with the reference variable set to zero.From Equation (18) the determinant for Figure 7 (neglecting R1 and R2) is

�= (hgm1gm2 +s2C1C2)(1+s RF CF )+(gm2 +sC2)sCF , (30)

and the gain around the inner loop follows as

Aloop(gm2)= hgm1gm2 +sgm2CF (hgm1 RF +1)

s2(C1 +CF )C2 +s3 RF C1C2CF. (31)

This is different from Equation (26). The Nyquist diagram is a different shape, the phase marginis less (because of the double pole at the origin), and the system is on the bound of conditionalstability. Equation (31) does reduce to Equation (26) if gm1 is set to zero (i.e. if the outer feedbackloop is removed), but there is no valid reason for preferring Equation (26) as an indicator of systemdynamics when it does not apply under actual operating conditions.

It could be argued that Equation (31) is not really the gain around the inner loop (because gm2belongs to both loops), but it is harder to sustain such an argument for CF :

Aloop(CF )= sgm2CF (hgm1 RF +1)+s2C2CF +s3 RF C1C2CF

hgm1gm2 +s2C1C2. (32)

The Nyquist diagram is of yet another shape, and Equation (32) does not reduce to Equation (26)if gm1 is set to zero.

Thus a plurality of Nyquist diagrams exist for a multi-loop structure, each with a differentphase margin, and there is no valid reason for associating any particular phase margin with systemdynamics (the overall loop is included in this statement). Nyquist’s criterion [40] merely predictsthe bound of stability: all phase margins in all Nyquist diagrams simultaneously become zero atthe point of instability.



i

i

g v

vv

CC

C

sC

1+sR Cv

C

sC

1+ sR Cv

R RR Rg (v

–hv )

Figure 9. Equivalent circuit of a two-stage operational amplifier with a series RC compensating network.

3.2. Passive RC networks

For any two-terminal compensating network (such as Figure 6(a)),

y11 = y22 = y12 = y21 =YF ,

and (17) becomes

A(s)= v2

vS= gm1(gm2 −YF )

Y1Y2 +(gm2 −hgm1 +Y1 +Y2)YF +gm1gm2h. (33)

Figure 9 shows the equivalent circuit for the case in which YF is a series RC combination [41]. IfR1 and R2 are neglected, Equation (33) becomes

A(s)= gm1gm2[1+s(RF −1/gm2)CF ]

[hgm1gm2]+s[hgm1gm2 RF −hgm1 +gm2]CF +s2[C1C2 +CF (C1 +C2)]+s3[C1C2 RF CF ], (34)

from which

A(0)= 1

h. (35)

3.2.1. LHP pole-zero cancellation. If RF is chosen [26 (p.766), 4] such that

RF CF = C2 +CF

gm2≈ C2

gm2, (36)

the zero cancels one of the poles at s =−gm2/C2 and Equation (34) becomes

A(s)= gm1gm2

[hgm1gm2]+s[gm2CF ]+s2[C1(C2 +CF )]. (37)

Hence

�0 =√

C1(C2 +CF )

hgm1gm2, (38)

� = CF

2√

C1(C2 +CF )

√gm2

hgm1, (39)

CF = 2C2W

(1+

√1+ 1

W

), (40)

where

W =�2(

hgm1

gm2

)(C1

C2

). (41)


1118 E. M. CHERRY

There is a second alternative: choose

RF CF = C1 +CF

gm2, (42)

when

A(s) = gm1gm2

[hgm1gm2]+s[gm2CF ]+s2[(C1 +CF )C2], (43)

�0 =√

(C1 +CF )C2

hgm1gm2, (44)

� = CF

2√

(C1 +CF )C2

√gm2

hgm1. (45)

In practice it is nearly always true that C2C1, so the alternative �0 is greater than the originaland the overall bandwidth is inferior.

3.2.2. RHP zero elimination. If RF is chosen [3] such that

gm2 RF =1, (46)

the zero moves out to infinity and Equation (34) becomes

A(s)= gm1gm2

[hgm1gm2]+s[gm2CF ]+s2[C1C2 +CF (C1 +C2)]+s3[C1C2CF/gm2]. (47)

The system has three poles. Temporarily neglect the s3 term. This is more-or-less equivalent toneglecting the non-dominant pole (but see Section 3.4 below); its time constant is of the order of

1

�3∼gm2

(1

C1+ 1

C2+ 1

CF

). (48)

For the remaining dominant pole pair:

�0 =√

C1C2 +CF (C1 +C2)

hgm1gm2, (49)

� = CF

2√

C1C2 +CF (C1 +C2)

√gm2

hgm1, (50)

CF = 2

(C1C2

C1 +C2

)W

(1+

√1+ 1

W

), (51)

where

W =�2(

hgm1

gm2

)(C1 +C2)2

C1C2⇒

C2C1�2(

hgm1

gm2

)(C2

C1

). (52)

3.2.3. Capacitor compensation alone. If RF is chosen [42]

RF =0, (53)

Figure 5(b) simplifies to Figure 10 and Equation (34) becomes

A(s)= gm1gm2(1−sCF/gm2)

[hgm1gm2]+s[(gm2 −hgm1)CF ]+s2[C1C2 +CF (C1 +C2)]. (54)



C C

sC vsC v

i

i

g v

vv

C

C

R Rg (v–hv )

Figure 10. Equivalent circuit of a two-stage operational amplifier with capacitor compensation alone.

The system has two poles for any combination of component values, despite the presence of threecapacitors (these form a loop). A zero lies in the RHP. It follows that

�0 =√

C1C2 +CF (C1 +C2)

hgm1gm2, (55)

� = (gm2 −hgm1)CF

2√

hgm1gm2[C1C2 +CF (C1 +C2)], (56)

CF = 2

(C1C2

C1 +C2

)W

(1+

√1+ 1

W

), (57)

where

W = �2(

hgm1gm2

C1C2

)(C1 +C2

gm2 −hgm1

)2

⇒gm2hgm1

C2C1

�2(

hgm1

gm2

)(C2

C1

). (58)

� becomes negative and the system becomes unstable in the unlikely practical situation hgm1>gm2.

3.3. Current amplifier

In the case [7–10] of an ideal current amplifier (Figure 6(c)),

y11 = y21 =0,

y12 = YF = sCF

1+s RF CF,

y22 = YF

b= sCF/b

1+s RF CF.

Figure 5(b) simplifies to Figure 11, and Equation (17) becomes

A(s) = v2

v2= gm1gm2

Y1Y2 +(gm2 +Y1/b)YF +gm1gm2h

= gm1gm2

hgm1gm2 +s2C1C2 +(

gm2 + sC1

b

)(sCF

1+s RF CF

) . (59)

If RF is chosen [11] such that

RF CF = C1

bgm2, (60)


1120 E. M. CHERRY

if

i1

gm 2v1

v2v1

C2

C1

R1 R2

sCF

1+sRFCF

v2

CF /b

bRF

gm 1(vS–hv2)

Figure 11. Equivalent circuit for a two-stage operational amplifier with acurrent amplifier in its compensating network.

pole-zero cancellation occurs at s =−bgm2/C1 and Equation (59) simplifies to

A(s)= gm1gm2

[hgm1gm2]+s[gm2CF ]+s2[C1C2]. (61)

Hence

A(0) = 1

h, (62)

�0 =√

C1C2

hgm1gm2, (63)

� = CF

2√

C1C2

√gm2

hgm1, (64)

CF = 2�√

C1C2

√hgm1

gm2. (65)

In practice the current amplifier is likely to have a common-gate input stage, in which case itsinput resistance is 1/gm . This resistance can be absorbed into bRF provided buffer gm is at leastas large as

gm(buffer)�1

bRF=2�

√hgm1gm2

√C2

C1. (66)

3.4. Comparisons with the theorem

In Figures 7, 9, and 11, CF appears in shunt with either or both of C1 and C2, but not directlyso because RF is in series; CF therefore does not add to C1 and/or C2 in the gain-bandwidththeorem, and Equation (4) becomes


�[zeros of A(s)]= gm1 ×gm2

C1 ×C2. (67)

Thus∏

(gm/C) is the same for all three circuits, and a first expectation is that all should be capableof adjustment to give identical overall gain A(s). This is indeed the case for the voltage-bufferand current-amplifier circuits. The DC gains are given by Equations (21) and (62), the product ofpoles is (1/�0)2 given by Equations (22) and (63), and there are no zeros. Substitution into theLHS of Equation (67) confirms the theorem.

For Figures 7 and 11 the forward leakage y21 associated with the compensating feedback iszero, but this is not the case for Figure 9. Therefore Equation (6) must be invoked in relation togm2 and the gain-bandwidth theorem:

gm2(eff) ⇒Limits⇒∞ (gm2 − y21)=gm2 − 1

RF. (68)



For the case of LHP pole-zero cancellation, Equation (36) applies and it follows that

gm2(eff) ⇒gm2

(C2

C2 +CF

).

Hence Equation (4) becomes


�[zeros of A(s)]= gm1 ×gm2(eff)

C1 ×C2= gm1 ×gm2

C1 ×(C2 +CF ), (69)

which is consistent with Equation (37).For the case of RHP-zero elimination, the zero moves out to infinity as RF approaches 1/gm2,

and gm2(eff) in Equation (68) approaches zero. Equation (4) reduces to the unhelpful result 0=0.Insight can be had by considering the approach to this limit:

gm2 − y21 = gm2 − sCF

1+s RF CF= gm2 +s(gm2 RF −1)CF

1+s RF CF

⇒RF ⇒1/gm2

gm2

1+sCF/gm2

⇒|s|⇒∞

gm2 ×(

gm2

sCF

).

Evidently the situation is akin to adding an extra stage to the forward path: the original gm2 seesC2 as its shunt load capacitance, the added stage (which also has gm2 =1/RF ) sees CF . Thegain-bandwidth theorem becomes


�[zeros of A(s)]= gm1 ×gm2 ×1/RF

C1 ×C2 ×CF= gm1 ×g2

m2

C1 ×C2 ×CF, (70)

which is consistent with the three-pole transfer function in Equation (47).The situation in Figure 10 is different, because CF appears directly in shunt with both C1 and

C2 and must be included twice in∏

(C). A first expectation is



(C1 +CF )×(C2 +CF ).

However, GH for the compensating loop is

G Hinner = gm2 −sCF

s2(C1 +CF )(C2 +CF )×sCF ,

which has equal numbers of poles and zeros, so Equation (5) applies:

1

1+G H (∞)= (C1 +CF )(C2 +CF )

C1C2 +CF (C1 +C2),

and finally



C1C2 +CF (C1 +C2), (71)

which is consistent with Equation (54).

4. FIGURES OF MERIT

Different figures of merit may be appropriate for different circumstances [43–45]. Factors thatmight be relevant include the bandwidth, non-dominant singularities, pole-zero doublets, powerconsumption, and the manufacturing process.


1122 E. M. CHERRY

Table I. Normalized response of a two-pole function with �0 =1.

Damping Bandwidth 10–90% Overshoot Settlingratio � �3dB (=�) rise time (%) time (1%) 1

2� Comment

3.0 0.171 12.81 0.0 27.02 0.167 Dominant pole1.0 0.644 3.37 0.0 6.64 0.5 Critical damping0.866 0.786 2.73 0.4 4.66 0.577 Linear phase0.827 0.835 2.57 0.99 4.20 0.605 Fastest settling (1%)0.707 1.000 2.15 4.3 6.59 0.707 Maximally flat0.5 1.272 1.62 16.4 8.78 1.0 Half-critical

This section is restricted to linear aspects of performance, and principally to the two-polecompensation techniques in Section 3. We note, however, that a source-follower voltage buffermay restrict the usable voltage swing at the system output, and that any current amplifier runsopen-loop at DC (its input is isolated via CF ) and therefore contributes substantially to offsetreferred to the system input. We note too that root-locus considerations demand the response of anyreasonable feedback amplifier be dominated either by a single pole or a complex-conjugate polepair. In a root-locus diagram the inner two forward-path poles move together along the negative realaxis and then split to form the dominant overall pair. The next forward-path pole moves outwardand becomes increasingly non-dominant. Much of this section, therefore, extends to multi-polesystems.

4.1. Small-signal response

The small-signal 3-dB bandwidth, the rise time and overshoot, and the settling time of a two-polesystem are uniquely determined by �0 and �. Table I lists some relevant cases. The bandwidthmultiplication factor is

�=�3dB ×�0 =√√

(2�2 −1)2 +1−(2�2 −1). (72)

Because �0 in Table I is normalized to unity, � is numerically equal to �3dB (column 2).When comparisons are made between compensation techniques, characteristics like the overshoot

in the step response should be held constant. Therefore � should be held constant when comparingtwo-pole systems, and therefore � is the same for each. Thus �0 alone is relevant when comparingtwo-pole systems.

Of the compensating techniques in Section 3, the voltage buffer and current amplifier are identicalin their small-signal performance; �0 is the same. Notice that the same value of CF is requiredto achieve the same damping ratio [Equations (24) and (65)], and that the gain b of the currentamplifier drops out of consideration (as expected from the gain-bandwidth theorem: b appears ina feedback factor but not in the forward path). The 3-dB bandwidth follows from Equations (67)and (9) as

�3dB =buffer/amplifier

�

√1

A(0)

(gm1

C1

)(gm2

C2

). (73)

Both arrangements achieve the ideal maximum bandwidth predicted by Equation (1); the compen-sating capacitor does not add to either C1 or C2.

In comparison, �0 and hence �3dB for the LHP pole-zero-cancellation technique are inferior,but only slightly so because it is often true in practice that C2CF . From Equations (69) and (9)

�3dB =LHP PZC

�

√1

A(0)

(gm1

C1

)(gm2

C2 +CF

). (74)

CF adds to C2 but not to C1.



The dominant pole pairs for RHP zero-elimination and capacitor compensation alone are almostidentical to each other (there is a tiny difference between the values of CF required to achievespecified �), but �0 and hence �3dB are notably inferior to the other three techniques:

�3dB =other

�

√1

A(0)

[gm1gm2

C1C2 +CF (C1 +C2)

]. (75)

CF adds to both C1 and C2. In addition, it is possible (but unlikely) that the third pole or RHPzero could be significant.

4.1.1. Dominant-pole case. If �1 (i.e. if it is assumed that the system has one dominant poleplus a far-out pole), Equation (72) reduces to

�=�3dB ×�0 ⇒�1

1

2�. (76)

Inspection shows that in all cases of Section 3 this assumption leads to

�3dB ≈ gm1

A(0)CF. (77)

It is this situation to which Figure 2 alludes.When comparisons are made between compensation techniques, these should based on the

maximum achievable bandwidth, and not some sub-optimal arrangement. If a two-pole systemis adjusted for optimum performance, � typically lies in the range 0.5–1.0, depending on systemrequirements. An optimum system does not have a dominant pole. Table I (column 6) thenshows that the bandwidth predicted by Equation (77) is in error by as much as 41% and notless than 29%. Equation (77) also implies that this bandwidth varies inversely as the DC gain,whereas the precise Equations (73)–(75) show that �3dB ∝√

1/A(0) (which, incidentally, accordswith the gain-bandwidth theorem). For these reasons the Author deplores the widespread useof gm1/CF as the bandwidth-related parameter in comparisons of compensation techniques. Incontrast, the combination of �0 and � predicts the bandwidth correctly and, as illustrated in Section3, they are easy to calculate without approximation or assumption about phase margin. Althoughunconventional, an approach based on �0 and � has much to recommend it.

4.2. Power consumption

Transistor mutual conductance correlates with power consumption. Consider a figure of merit forwhich the denominator includes total gm of the transistors.

If only gm1 and gm2 are considered in the total, and if we assume C1 and C2 are constants(which may not be realistic—see Section 4.3 below), then �0 for the voltage-buffer and current-amplifier compensation techniques is minimized by choosing gm1 =gm2. This applies irrespectiveof the values of C1 and C2, R1 and R2, h and �. The same is very nearly true for the LHPpole-zero-cancellation technique, provided C2 CF . The ranking of the compensating techniquesremains as above: the voltage buffer and current amplifier are equal best, closely followed byLHP pole-zero cancellation, and then the others. In practice there may well be good reasons fordesigning a circuit with gm2>gm1, but there is an inevitable penalty in small-signal bandwidth.

However, when buffer gm is included in the figure of merit, LHP pole-zero cancellation almostcertainly becomes the clear winner. It also has the added practical advantage of simplicity ascompared with either buffer/amplifier technique. The current amplifier is likely to be worst becausethe (presumed) large external load capacitance C2 appears in the numerator of the required gm(buffer)at Equation (66), but see Section 4.4 below. And, because current gain b drops out of consideration,using anything more complicated than a simple unity-gain common-gate amplifier invites penaltyin total circuit gm .


1124 E. M. CHERRY

4.3. Correlation between gm and C: the manufacturing process

The quotient of mutual conductance and input capacitance for any type of transistor is a process-dependent parameter which depends also on operating current density. It is related to the meantransit time of carriers through the device [46].

To the extent that the interstage capacitance C1 in Figures 7–11 is dominated by the gate–sourcecapacitance c2 of the second stage, and that the output-circuit capacitance C2 is dominated by theexternal load capacitance Cext, Equations (73) and (74) can be re-arranged as

�3dB =buffer/amplifier

�

√1

A(0)

(gm1

c2

)(gm2

Cext

)= �

√1

A(0)

(gm1

Cext

)�T 2 , (78)

�3dB =LHP PZC

�

√1

A(0)

(gm1

c2

)(gm2

Cext +CF

)= �

√1

A(0)

(gm1

Cext +CF

)�T 2 . (79)

Counter-intuitively, Cext in the gain-bandwidth theorem is associated with gm1 (not gm2), andbandwidth is maximized by choosing gm1 as large as possible. This contrasts with the (unrealistic)conclusions of Section 4.2. Again there may be good reasons for restricting gm1 and increasinggm2, but there is a penalty in bandwidth.

In addition, Equations (78) and (79) show that bandwidth is inversely proportional (or more-or-less so) to

√Cext. Therefore a figure of merit expressed in MHz·pF/mW is misleading as a basis

for comparisons, because it can be artificially inflated to any desired extent by increasing the loadcapacitance. A better figure of merit for two-stage amplifiers would be in MHz·√pF/mW.

4.4. Pole-zero doublets

The compensation techniques in Section 3 assume some well-chosen value for RF in order toachieve pole-zero cancellation. In practice this cancellation is never perfect, and a pole-zero doublet[47–49] remains in A(s). The system step response picks up a decaying exponential at the timeconstant of the doublet pole. Its amplitude depends on the ratio of this time constant to the doubletzero (i.e. on the doublet width), and on its ratio to system �0. Settling time can be adverselyaffected if the doublet time constant is long, even if the doublet width is quite small.

For both the voltage-buffer and LHP pole-zero-cancellation techniques, the required conditionis something like

RF CF ∼ C2

gm2⇒ Cext

gm2.

Thus the same parameters are involved and system �0 is similar, so the statistical spread of doubletwidths associated with manufacturing tolerances should be similar. In practice RF is likely to berealized as 1/gm of a FET and will track with gm2 over production-process variations, but C2 islikely to be dominated by the external load capacitance which may not track with CF .

For the current-amplifier technique the condition is

RF CF = C1

b gm2⇒ c2

b gm2= 1

b�T 2.

In contrast to C2, C1 is internal to the amplifier; it is likely to track with CF , and thereforethe doublet for the current-amplifier technique is likely to be narrower. Also, C1 C2 is almostuniversal. Hence the current-amplifier doublet has the shorter time constant and the associatedexponential decays more quickly. Indeed, if C1 C2 it may be permissible to choose RF muchlarger than satisfies Equation (60) [hence gm(buffer) much smaller than suggested by Equation (66)]



and simply ignore the resulting doublet even though it is wide. To an approximation

A(s) ≈ gm1gm2

[hgm1gm2]+s[gm2CF ]+s2[C1(C2 +CF/b)], (80)

�0 ≈√

C1(C2 +CF/b)

hgm1gm2, (81)

� ≈ CF

2√

C1(C2 +CF/b)

√gm2

hgm1. (82)

A reasonable bound (which places the doublet outside the system pass-band and still gives gooddamping) is RF CF��0/2. Equation (60) is a ‘soft’ condition.

4.5. RHP zeros and other non-dominant singularities

The RHP zero of Figure 11 is widely perceived as something to be avoided [5, 7–9, 12, 50]. Thismatter appears to have been over-stated.

The principal effect of adding a non-dominant singularity to any transfer function is to delayor advance its response in the time domain. A non-dominant pole delays the step response by atime equal to its own time constant, a LHP zero advances the response, and a RHP zero delaysthe response. Certainly, a non-dominant singularity causes notable changes to the initial part ofthe response (to the initial gradient, in particular), but these decay quickly.

Figure 12 shows the effect of adding a non-dominant singularity to a two-pole linear-phasefunction. For emphasis, the time constant of the added singularity is chosen so long that manywould not even regard it as non-dominant: one-third the natural time constant of the two-polefunction. Table II lists the normalized bandwidth, rise time, and settling time for each case; observethat bandwidth and rise time are changed by a mere ±5% (as expected from the familiar square-root-of-sum-of-squares rule for addition of rise times). In Figure 12(b) the response curves aretime-shifted by ±�0/3 for easier comparison of their shapes.

In the case of capacitor compensation alone, the ratio of the RHP zero to �0 follows fromEquation (54) as

(−)�z

�0=√

hgm1

gm2

√CF

C1 +C2(1+C1/CF ), (83)

and in practice it is hard to see this being other than fairly small compared with unity. Thereforethe effect of the RHP zero on system response is minimal.

Similarly, in the case of RHP zero-elimination Equation (48) shows that the time constant ofthe third pole is not greater than C1/gm2 (subject to C1<C2 and C1<CF ). Hence

�3

�0<

√hgm1

gm2

√C1

CF +C2(1+CF/C1), (84)

and again it is hard to see the effect of the third pole as being other than minimal.

5. MULTI-STAGE AMPLIFIERS

When more than two stages are included in an operational amplifier, in order to increase the DCgain, some form of multi-loop compensation becomes almost mandatory [13–24]. Application ofthe gain-bandwidth theorem to such circuits is in principle straight-forward:

(a) Replace each feedback compensating network by an appropriate two-port equivalent(y-parameters are assumed here, for definiteness).


1126 E. M. CHERRY

1·0

0·8

0·6

0·4

0·2

0·0

1·2

unit-

step

res

pons

e (t

)(i)(iii)

(iv)

1·0

0·8

0·6

0·4

0·2

0·0

0

1·2

unit-

step

res

pons

e (t

)

normalized time t / 0

(i)(ii)

(iii)

(iv)

(ii)

2 4 6 8

Figure 12. Step response of a two-pole linear-phase function with an added singularity oftime constant �0/3. In (b), curves (ii) and (iv) are advanced by �0/3, and (iii) is similarlydelayed. (i) A(s) = 1/ [1 + s�0

√3 + (s�0)2]; (ii) A(s) = 1/ [1 + s�0

√3 + (s�0)2](1 + s�0/3);

(iii) A(s)= (1+s�0/3)/[1+s�0√

3+(s�0)2]; and (iv) A(s)= (1−s�0/3)/[1+s�0√

3+(s�0)2].

Table II. Normalized response of a two-pole linear-phase functionwith an added singularity of time constant �0/3.

Added Bandwidth 10–90% Settlingsingularity �3dB rise time time (1%)

None 0.786 2.73 4.66LHP pole 0.751 2.86 5.09LHP zero 0.827 2.60 4.23RHP zero 0.827 2.67 4.93

(b) From Equation (5) the ideal feedback factor y12 does not enter into consideration unless thegain around a loop remains finite as |s|⇒∞.

(c) The loading terms y11 and y22 contribute in the obvious way to∏

(C) in the theorem (recallthat C is the capacitance directly to ground from a node).

(d) The forward-leakage term y21 contributes to the forward-path gain.

The special case in (b) can only occur when a compensating capacitor (with no series resistor) isconnected around a single amplifying stage, as in Secttion 3.2.3; any y12 can at most have one



more zero than pole, and anything other than a single amplifying stage must have at least twopoles. Intuitively, (d) is likely to be small; initially ignore it.

The ranking of various compensation techniques depends then on the detail of the contributionsof the compensating capacitors to

∏(C): draw the equivalent circuit, strip out the ideal feedback

factors (and forward leakage subject to the assumption) associated with the compensating networks,and apply the theorem.

The ranking depends also on � in Equation (9). Here it is harder to be specific, because differentfeedback circuit topologies generate different singularity pattern types. For a two-pole system, � isuniquely determined by � which in turn is determined by (for example) the overshoot acceptablein the step response. In contrast, many multi-pole patterns exist for which the step response couldbe deemed acceptable, and each has its own value for �. What can be said is that � for a givennumber of poles tends to be largest when all poles are approximately equidistant from the origin[(h) of Section 2.2]. Therefore, any compensation technique which relies on moving some polesto non-dominant positions is likely to rank poorly.

5.1. Far-out singularities: forward leakage

It is both a strength and a weakness of the gain-bandwidth theorem that it involves all singularities:not only those which, in a practical sense, determine the system response, but also the far-out onesthat are totally inconsequential. The latter can obfuscate interpretation of the theorem and hencethe ranking of compensation techniques.

However, the theorem applies to all circuits, irrespective of whether they are real or artifi-cial. If, for example, some elements are removed from a physically-based equivalent circuit, thetheorem still applies to what remains. Therefore, simply removing elements that are known to beinconsequential can lead to a clearer result.

Forward leakage via a feedback network produces zeros at the complex frequencies where thegain of the amplifier proper has fallen until it is equal and opposite to the leakage. An obviousinstance is Figure 10 (although here the gain of the amplifier proper remains constant and theleakage increases); the zero occurs where the generators gm1v1 and sCFv1 are equal, that is ats =+gm1/CF .

Intuitively, if the amplifier gain in the pass-band is relatively small, the zeros will lie close inbecause the gain needs to fall by a relatively small amount; for larger gains, however, the zerosmove out. Therefore, forward leakage around a single-stage amplifier tends to be significant as inSection 3.2.3; it should be less significant for a two-stage amplifier, and still less for three stages.In general,

∏(gm) and

∏(C) are almost trivial to evaluate if forward leakage can be ignored.

As an example, Figure 13(a) shows an incomplete circuit for an operational amplifier in whicha compensating capacitor CF is connected around three stages (additional compensation is almostcertainly required). Figure 13(b) is an equivalent circuit in which this capacitor is replaced by itsy-parameter equivalent; CF adds directly to c2 and Cext, and the ideal feedback sCFv5 does notenter into gain-bandwidth considerations. It is assumed that gate-source capacitances dominate theinterstages.

By inspection a transmission null occurs when the forward-leakage generator satisfies

sCFv2 =gm2v2

(gm3

sc3

)(gm4

sc4

),

that is where

s3 =(

gm2

CF

)(gm3

c3

)(gm4

c4

).

Thus the system has three zeros, each of magnitude

|z|= 3

√(gm2

CF

)(gm3

c3

)(gm4

c4

); (85)


1128 E. M. CHERRY

h

Cext

v2

v5v4v3vS

CF

v2

c2

gm 2v2

v5

Cext

v4

gm 4v4

c4

gm 3v3

v3

c3

CFsCFv5 sCFv2CF–hv5)

gm 1(vS

forwardleakage

idealfeedback

Figure 13. Operational amplifier with a compensating capacitor connected around three stages: (a) partialcircuit and (b) equivalent circuit with the compensating capacitor replaced by its y-parameter model.

one lies on the real axis in the RHP, and a complex-conjugate pair lie at ±120◦ in the LHP. Becausethese zeros are in the forward path of the complete system, they appear also in the overall gainv5/vS .

If forward leakage and the resulting zeros are ignored, the gain-bandwidth theorem as appliedto the overall gain of Figure 13(b) predicts that

A(0)×�[poles of A(s)]= gm1 ×gm2 ×gm3 ×gm4

(CF +c2)×c3 ×c4 ×(CF +Cext).

Inclusion of other compensating networks can at best leave the RHS unchanged, but is more likelyto reduce it. Hence, using (9),

�3dB � � 4

√h

(gm1

CF +Cext

)(gm2

CF +c2

)(gm3

c3

)(gm4

c4

). (86)

Evidently the zeros in Equation (85) must lie far outside the passband unless gm1/Cext is comparablewith the process parameter �T =gm/cG ; this seems implausible, because Cext is normally by farthe largest capacitance in a system. Therefore, the zeros have little effect on system dynamics, andit is in fact a valid approximation to ignore forward leakage.

6. NESTED DIFFERENTIATING FEEDBACK LOOPS

Any explicit attempt to rank extant compensation techniques would invite controversy and acri-mony. Therefore, in this paper we consider only the Author’s own technique [51–53] of nesteddifferentiating feedback loops (NDFLs), pointing out both its desirable features and its limitations,and the circuit arrangements responsible for these. Comparisons and ranking are left to others.

Figure 14(a) shows a simplified and normalized NDFL block diagram in which all forward-path poles are at the origin and the DC gain per stage is infinite. Note the s multipliers inthe feedback factors: these imply differentiation in the time domain. In naming the structure it



1

sτ

2

k1+ sτ

sτ

sτ

h

1+ sτsτ

sτ

sτ

+–

+–

+–

+–

1

sτk

1+ sτsτ

sτ

h

sτ

1+ sτsτ

sτ

+–

+–

+–

+–

Σ Σ Σ Σ

ΣΣΣΣ

Figure 14. Normalized versions of some 3-NDFL structures: (a) nest centred on the fourthstage and (b) nest centred on the third stage.

seemed appropriate to draw on the long-established terminology of control engineering where PID(proportional-integral-differential) controllers are commonplace. See also Appendix A below.

The forward-path gain, feedback factor and overall gain of the inner loop are

G inner =(

1

s�X

)2

,

Hinner = s�X ,

Ainner = 1

s�X (1+s�X ).

Hence the forward-path gain of the second loop is

G2nd =(

1+s�X

s�X

)× Ainner =

(1

s�X

)2

,

which is the same as G inner. Therefore the process of adding more differentiating feedback factorss�X and forward-path stages (1+s�X )/s�X can be continued indefinitely. For the outer loop

Gouter = k

s�X (1+s�X ),

Aouter = k

kh+s�X +(s�X )2,

(87)

from which

A(0) = 1

h, (88)

�0 = �X√kh

, (89)

� = 1

2√

kh. (90)


1130 E. M. CHERRY

F

F

F

m

transferconductance

currentgain

transferimpedance

currentgain

F X

– X

X

– X

XΣ

Figure 15. 3-NDFL structure with capacitors as the feedback elements.

The nest of feedback loops does not need to be centred on the last stage, and the stage kwithout dynamics does not need to be the first. Figure 14(b) shows another of the many possible3-NDFL structures. Equally, the normalization in Figure 14 can be removed; multiply the gain ofany forward-path stage by an arbitrary factor �, and divide the transfer functions of all feedbacknetworks which enclose that stage by �. � need not be a scalar multiplier, but can for examplebe a dimensioned quantity. This is of particular relevance to the differentiating feedback factors;practical capacitors obey i =Cdv/dt very closely, and make almost-ideal elements as in Figure15. The last stage becomes transfer impedance, the intermediate stages become current amplifiers,and the first becomes transfer conductance. The equations are:

G inner =( −1

sCF

)(1

s�X

),

Hinner = −sCF ,

Ainner = −1

sCF (1+s�X ),

Gouter = gm

sCF (1+s�X ),

Aouter = gm

gmh+sCF +s2CF�X.

In Equation (87) the overall dynamics of Figure 14 are as if the intermediate stages did notexist. However, when DC gain per stage is finite, overall DC loop gain increases with each addedstage. High-frequency loop gain also increases. To the extent that overall gain can be approximatedas 1/h, total return difference (that is, unity-plus-loop-gain [34 (Chapter 4)]) for the stage at thecentre of the nest can be found by removing all but the outer feedback network. Removal of theinner feedback network from Figure 14(a), for example, removes the local feedback from the laststage but thereby increases the gain around the next loop, and these effects very nearly compensate.Thus

G Hnest centre +1≈kh

(1+s�X

s�X

)N−1( 1

s�X

)2

, (91)

where N is the number of differentiating feedback loops. Evidently, loop-gain magnitude increasesinversely with frequency at an (N +1)-pole rate below the system cut-off, and far greater values canbe achieved at frequencies inside the pass-band than are possible when Bode’s 30-odd dB/decadelimit for loop-gain attenuation is observed. NDFLs were originally proposed for reducing thein-band distortion associated with output-stage nonlinearity in audio amplifiers, without the needfor extending the overall bandwidth. However their application to operational amplifiers wasanticipated, and is particularly relevant to modern low-voltage FET circuits in which the gain perstage can be small; a DC gain of 10 per stage was nominated in the original publications.



7. EXAMPLE: A 2-NDFL AMPLIFIER

Figure 16(a) shows an outline circuit for a 2-NDFL amplifier, and Figure 16(b) is its small-signalequivalent circuit with the feedback capacitors replaced by their two-port equivalents. c2 −c4 arethe gate–source capacitances of the FETs, and CP represents the interstage capacitance directly toground. Note that the outer feedback capacitor is designated CC , to distinguish it from the innerCF , even though they are nominally equal.

7.1. The output stage

The output stage M4 in Figure 16 differs somewhat from Figure 15, and is in fact borrowed from theLHP PZC technique of Section 3.2.1. Its forward-path gain, feedback factor, and overall gain are

G inner(s) ≡ −v5

i3


= −gm4 − sCF

1+s RF CF[sCF

1+s RF CF+sc4

][sCF

1+s RF CF+s(CC +Cext)

] , (92)

RX

CX

h

RF CF

Cext

M 2

M 3

M 4

CC = CF

transfer conductance current gain transfer impedance

sCF

1+ sRFCF

v4

sCF

1+ sRFCF

v5

sRXCX

1+ sRXCX

v2

sRXCX

1+ sRXCX

gm 3 + sc3

gm 3

i3

v2

i2

CP

c2

RX

CX

RXCX

i1 CF CF

RF RF–hv5 )gm 1(vS

v5v4v3

i3

gm 2v2

v6

–v6 )gm 3(v3 Cextgm 4v4

c4c3

i f 2

i f 4

sCC v5 sCC v2

CCCC

Figure 16. Practical 2-NDFL amplifier: (a) outline circuit and (b) small-signal equivalent circuit.


1132 E. M. CHERRY

Hinner(s) ≡ i f 4

v5=− sCF

1+s RF CF, (93)

Ainner(s) ≡ −v5

i3= G inner(s)

1+G inner(s)Hinner(s)

= − gm4[1+s(RF −1/gm4)CF ]

s[gm4CF ]+s2[c4(CC +Cext)+CF (c4 +Cc +Cext)]+s3[c4(CC +Cext)RF CF ].

(94)

If R f is chosen such that

RF CF = CF +CC +Cext

gm4, (95)

pole-zero cancellation occurs at s =−gm4/(CC +Cext) and Equation (94) becomes

−v5

i3=− gm4

s[gm4CF ]+s2[c4(CF +CC +Cext)]. (96)

This is of the form required in Figure 15, with

�X =(

c4

gm4

)(CF +CC +Cext

CF

). (97)

7.2. The current amplifier

The current amplifier M2 and M3 in Figure 16 is based on a current-feedback pair and, byinspection, its forward-path gain and feedback factor are

GI-amp(s) ≡ i3

i1


= v2

i1× i2

v2× i3

i2

= −

[gm2

sCP+ s RX CX

1+s RX CX

][gm3

sc3

][

s(CC +c2)+ sCX

1+s RX CX

][1

sCP+ 1

sc3+(

RX

1+s RX CX

)(gm3 +sc3

sc3

)] , (98)

HI−amp(s) ≡ i f 2

i3=−

(s RX CX

1+s RX CX

)(gm3 +sc3

gm3

). (99)

In Equation (98) the first numerator [bracket] is the total Thevenin-equivalent voltage acting aroundthe interstage loop, including the forward leakage, and the second denominator [bracket] is theimpedance of this loop. Overall current gain follows as

AI-amp(s)≡ i3

i1=− 1

s RX CX

×1+s RX CX +s2

(CP RX CX

gm2

)

1+s

[c3

gm3+(

CC+CX +c2

gm2CX

)(CP + CP+c3

gm3 RX

)]+s2

[(CC +c2

gm2

)(C p +c3

gm3

)+(

CC +CX +c2

gm2CX

)(CP c3

gm3

)] .

(100)



The forward-leakage path via CX acts like a capacitance current divider at the highest frequencies,and completely bypasses M2:

i3

i1=

|s|⇒∞−[

1/(CC +c2)

1/(CC +c2)+1/CX +1/c3 +1/CP

](gm3

sc3

). (101)

Consequently an awkward gain-bandwidth equation applies, after the style of Equation (6).However, subject to the reasonable assumption that gate–ground capacitance is small comparedwith gate–source capacitance, Equation (100) reduces to

i3

i1≈

CP c2CP c3

−1+s RX CX

s RX CX× 1

1+s

[c3

gm3

(1+ CC +CX +c2

gm2 RX CX

)]+s2

[(CC +c2)c3

gm2gm3

] . (102)

This exemplifies the current-gain form of Equation (4), in which each gm is associated with thecapacitance to ground at its input (rather than its output as in the voltage-gain form):


�[zeros of A(s)]≈(

gm2

CC +c2

)(gm3

c3

). (103)

Significantly, CX does not enter into gain-bandwidth considerations (because RX is in series), butCC adds directly to c2. As we shall see in Section 7.4, this latter is perhaps the greatest penaltyof the NDFL technique.

Overall current gain in both Equations (100) and (102) has the required form of a pole at theorigin, plus a zero such that the high-frequency gain asymptote is unity. Beyond this zero lies atwo-pole cut-off for which the natural time constant and damping ratio are

�0 ≈√(

CC +c2

gm2

)(c3

gm3

), (104)

� ≈ 1

2

(1+ CC +CX +c2

gm2 RX CX

)√(gm2

CC +c2

)(c3

gm3

). (105)

Given that CP is small, the second zero in Equation (100) lies still farther out and is entirelynegligible.

7.3. Overall design

To complete the overall design, the current amplifier is designed with RX CX =�X as given byEquation (97). Compared with any of the two-stage arrangements in Section 3, Figure 16 hasmuch larger DC gain (4 common-source stages as against 2), there are no restrictions on output-voltage swing (as with the voltage-buffer technique), and DC offset is not degraded (as with thecurrent-amplifier technique).

A feature of the NDFL technique is that, in ideal circumstances, the overall gain is the sameas it would have been if the intermediate stages and associated differentiating feedback factorshad been omitted. Thus, if the far-out singularities of the current amplifier can be neglected, theoverall gain of Figure 16 would be the same as for the two-stage LHP PZC technique:

A(s) =LHP PZC

gm1gm4

[h gm1gm4]+s[gm4CF ]+s2[C4(CF +CC +Cext)], (106)

�0 =√

c4(CF +CC +Cext)

h gm1gm4, (107)

� = CF

2√

c4(CF +CC +Cext)

√gm4

h gm1. (108)


1134 E. M. CHERRY

In the gain-bandwidth theorem, Equation (9) becomes

�3dB =LHPPZC

� 2

√h

(gm1

CF +CC +Cext

)(gm4

c4

). (109)

Being a two-pole system, � is determined by � which in turn is determined by the step-responserequirements, and from Table I a value in the range 0.6–1.2 is appropriate.

Figure 16 has two doublets, one at s = (gm4/c4)/[(CF +CC +Cext)/CF ] associated withmatching RX CX to Equation (97), and one at s =−gm4/(CC +Cext) associated with matchingRF CF to Equation (95). The former is near the pass-band edge and its exponential has a shorttime constant, similar to system �0. The latter has a long time constant, but lies inside the outerdifferentiating feedback network; therefore, as shown in Appendix B below, its exponential has avery small amplitude. Settling time of Figure 16 is relatively immune to component mismatch.

7.4. Gain-bandwidth considerations

The complete forward-path gain of Figure 16 is found precisely by collecting terms in Equations(96) and (100) or, more simply and to a very good approximation, by inspection of Figure 16(b)and ignoring the forward leakage associated with CX and CC (and very nearly with CF too). Noneof the gains around any of the feedback loops remains finite as |s|⇒∞, so Equation (5) is notrelevant and the gain-bandwidth theorem for the complete amplifier becomes


�[zeros of A(s)]≡ G(0)× �[poles of G(s)]

�[zeros of G(s)]

= gm1 ×gm2 ×gm3 ×gm4

(CC +c2)×c3 ×c4 ×(CF +CC +Cext).

Hence Equation (9) becomes

�3dB =2-NDFL

� 4

√h

(gm1

CF +CC +Cext

)(gm2

CC +c2

)(gm3

c3

)(gm4

c4

). (110)

The radical in Equation (110) is the geometric mean of the distances of the poles from the origin.Under it �T =gm/cG for the third and fourth stages appears unaltered, but �T 2 is diluted by theloading effect of CC , and �T 1 is massively diluted by the external load capacitance Cext.

Persevere with the assumption of Section 7.3 that the far-out singularities of the current-amplifiercan be neglected. This implies that the anticipated system �0 in Equation (107) is much greaterthan �0 for the current amplifier in Equation (104). In turn this requires the dilution of �T 1 byCext to be much greater than the dilution of �T 2 by CC , which seems reasonable. The poles ofthe current amplifier lie far beyond the system cut-off, and root-locus considerations demand thatthey appear almost unchanged in the overall gain. They have negligible effect on the bandwidth.Thus the bandwidths of the four-stage NDFL amplifier and two-stage LHP PZC amplifier shouldbe equal.

However, the geometric mean of the poles in Equation (110) is far greater than in Equation (109);the current-amplifier poles are ‘far out’. Therefore � must be smaller in Equation (110) thanEquation (109). Therefore the bandwidth of the NDFL amplifier is less than it might have been,and it can be increased by moving the non-dominant poles (the current-amplifier poles) closer (sic)to the origin. This is (h) of Section 2.2, and is a direct consequence of Equation (4); the geometricmean of the poles is constant for given gain and

∏(gm/C), so the dominant poles must move out

if the non-dominant ones are moved in. In outline:

(a) Do not alter CF and RF .(b) Divide (reduce) the outer CC by a factor . Note that this reduces the dilution of �T 2,

incurring a gain-bandwidth advantage.



(c) Multiply (increase) the gain of the current amplifier by the same factor but do not alter�X . In accordance with the gain-bandwidth theorem the poles in Equation (102) move in bya factor

√1/.

(d) The gain around the CC loop is unchanged, but the overall gain of the CC loop has increasedby a factor .

(e) With the consequent increased gain around the overall or h loop, the poles in Equation (106)move out by a factor

√.

The four-stage NDFL amplifier now has a greater bandwidth than the two-stage LHP PZC amplifier.Note that, for either amplifier, maximum bandwidth is achieved for specified total gm whengm1 gm4.

As is increased, the assumption of a large ratio between system and current-amplifier�0 becomes invalid. The non-dominant poles from the current amplifier increasingly repel the mainpoles and push the system towards instability. Standard control theory applies. There is a broadoptimum where the �0 ratio is 2–3, and at this optimum �∼0 ·43. The current-amplifier responseshould be significantly under-damped [perhaps �∼0 ·5 in Equation (105)].

If the dilution of �T 1 by Cext is insufficient to achieve a workable �0 ratio, there are twoalternatives:

(a) Increase gm2 to reduce the dilution of �T 2; this costs power consumption.(b) Reduce gm1 to increase the dilution of �T 1; this costs bandwidth.

8. CONCLUSIONS

Equation (4) and its consequences constrain the singularities that can be achieved with specifiedDC gain and external load capacitance, for a given selection of transistors and operating conditions.Hence ultimately they determine the bandwidth:

A(0) × �[poles of A(s)]

�[zeros of A(s)]=�

(gm

C

),

�3dB = �

[�(gm/C)

A(0)

] 1n p−nz

.

Here∏

(C) involves the capacitances that connect each signal node directly to ground. Two factorscome into play in ranking linear aspects of compensation techniques for operational amplifiers:the relative dilution of intrinsic transistor �T =gm/cG by the compensating capacitor(s), and thebandwidth multiplication factor � of the achievable singularity pattern type.

If a feedback compensating network is given its two-port representation, the ideal feedbackfactor does not enter into the gain-bandwidth theorem except in the special case where loop gainhas equal numbers of poles and zeros. Therefore the gain-bandwidth theorem as applied to the DCgain, poles and zeros of the forward path applies also to the overall transfer function. However,the input and output loading terms may contribute to

∏(C) of the forward path.

Forward leakage through a feedback compensating network is unlikely to be significant if theloop encompasses more than a single amplifying stage. Leakage contributes zeros, and these movefarther out in the complex frequency plane as the enclosed gain is increased. Leakage affects∏

(gm) in the gain-bandwidth theorem, and can indirectly affect∏

(C) as illustrated in Section 3.4.Far-out singularities (such as those associated with forward leakage) obfuscate interpretation

of the gain-bandwidth theorem. Approximate but meaningful interpretations often come fromneglecting the circuit elements responsible for such singularities.

For specified total circuit gm then, at least for all compensating techniques considered in thispaper, maximum bandwidth is achieved when first-stage gm is large. Counter-intuitively, first-stagegm in the gain-bandwidth theorem is associated with the external load capacitance. It is conjecturedthat this result applies to other techniques.


1136 E. M. CHERRY

The factors which maximize � are listed in Section 2.2, and include the rule that all poles shouldbe approximately equidistant from the origin. Achievement of large � is a measure of the circuitdesigner’s ingenuity. Standard control theory is involved.

The technique of NDFLs has several desirable features, including large DC gain, wide bandwidth,and insensitivity to doublets. It is not claimed that this technique is the best but, if some othertechnique is to achieve greater bandwidth, it must have a superior combination of the dilution ofintrinsic transistor �T by the compensating capacitors and the bandwidth multiplication factor �of its singularity pattern type.

Aside from the main analysis, several conclusions appear at variance with current teaching.Phase margin of an inner compensating loop is not predictive of system dynamics. gm1/CFis not a reliable measure of overall bandwidth. Production-process �T is relevant to theoptimum distribution of total gm among stages. A figure of merit expressed in MHz·pF/mWcan be misleading. The effects of non-dominant singularities (RHP zeros in particular) appearto have been over-stated. So-called Miller compensation is open to a different interpretation(in Appendix A).

APPENDIX A: SO-CALLED MILLER COMPENSATION

Miller effect [54] was introduced in 1919 to account for the anomalous contribution of anode-grid(=output-input) capacitance to the total input capacitance of a triode vacuum tube. As is now wellknown, the output–input or feedback capacitance in Figure A1(a) can be shifted to the input aftermultiplication by unity-plus-DC-voltage-gain:

Cin =C1 +CMiller =C1 +CF (1+gm R2).

The contribution to the load is usually taken as CF as shown in Figure A1(b), although sometimesthis is multiplied by (1+1/gm R2)≈1.

iS

v1 v2

CF

C2C1R1 R2gmv1

CMiller =CF(1+gmR2)

iS

v1 v2

CF C2C1R1 R2

gmv1

iS

v1 v2

CF C2C1R1 R2

gmv1

CF(1+gmR1)Calt =

Figure A1. Miller effect: (a) original circuit; (b) Miller’s approximation; and(c) an alternative approximation.



The transfer functions of Figures A1(a) and A1(b) are:

v2

iS=

precise− gm R1 R2[1−s(CF/gm)]

1+s[R1C1 + R2C2 +(R1 + R2 +gm R1 R2)CF ]+s2 R1 R2[C1C2 +(C1 +C2)CF ]

(A1a)

≈approximatefactorization

− gm R1 R2[1−s(CF/gm)]

{1+s[R1C1 + R2C2 +(R1 + R2 +gm R1 R2)CF ]} . . .

×{

1+s

[C1C2

gm

(1

C1+ 1

C2+ 1

CF

)]}, (A1b)

v2

iS=

Miller− gm R1 R2

{1+s R1[C1 +CF (+gm R2)]}×[1+s R2(C2 +CF )](A2a)

= − gm R1 R2

1+s[R1C1 + R2C2 +(R1 + R2 +gm R1 R2)CF ]+s2 R1 R2[C1 +CF (1+gm R2 +gm R1 R2)](C2 +CF ).

(A2b)

The Miller approach gets the sum of the pole time constants correctly [compare the coefficientsof s in Equations (A1a) and (A2b)], and hence also the dominant pole. However the second poleis substantially wrong [Equation (A1b) versus Equation (A2a)], and the zero is lost entirely.

In Miller’s approach the dominant pole is securely located at the input node. Apparently itis such considerations which have lead to coining of phrases like Miller integrator and Millercompensation, but there is nothing in Miller’s paper that anticipates either§ : a case of mis-attributedinvention. For this reason the Author prefers differentiating feedback for compensation techniqueslike those in Figures 6–11.

There is an alternative to Miller’s approximation. In Figure A1(c) the feedback capacitance isshifted to the output node after multiplication by unity-plus-DC-current-gain, and

v2

iS=

Fig. A1(c)− gm R1 R2

[1+s R1(C1 +CF )]×{1+s R2[C2 +CF (1+gm R1)]} (A3a)

= − gm R1 R2

1+s[R1C1 + R2C2 +(R1 + R2 +gm R1 R2)CF ]+s2 R1 R2[C1 +CF (1+gm R2)](C2 +CF ).

(A3b)

Like Miller’s approximation, the sum of the pole time constants is correct, and hence also thedominant pole which is now located at the output node. However, in situations such as operationalamplifiers where C2 C1, the second pole in Equation (A3a) is a (slightly) better approxima-tion than Miller’s. But, in the Author’s opinion the main contribution of Figure A1(c) is thatit debunks a common myth: the dominant pole of Figure A1(a) (and therefore in all so-calledMiller compensation techniques) can with equal validity be located at either input or output.Neither can be asserted as uniquely correct. Any explanation of a compensating technique thatrelies on locating some pole at a particular node is unsound. Poles belong to a circuit as awhole.

The phenomenon of pole splitting in Equation (A1b), by which the inner pole moves closer tothe origin as CF is increased from zero whereas the second pole moves outwards, can be seen as

§ If page count is any indication, Miller was more concerned with the situation in which the load is inductive andthe input conductance becomes negative. The resulting oscillation in tuned band-pass amplifiers plagued the earlydays of radio, before the advent of the vacuum tetrode.


1138 E. M. CHERRY

an exemplification of Equation (4). The product of the pole time constants [the coefficient of s2

in Equation (A1a)] initially remains constant. Of course this product increases at larger values ofCF , comparable with C1 and/or C2, where loading becomes significant.

APPENDIX B: MORE ABOUT DOUBLETS

Zeros of A(s) occur at the zeros of G(s) and the poles of H (s). Poles of A(s) occur at the solutionsof G H (s)=−1 and, subject to some qualifications, tend to approach the zeros of G(s) and H (s).Therefore:

• A pole-zero doublet does not occur in A(s) as a consequence of imperfect cancellation betweena pole of G(s) and a zero of H (s). A(s) merely has a pole at such a point.

• A doublet does not occur from imperfect cancellation between a zero of G(s) and a pole ofH (s). A(s) has a zero at such a point.

• In the unlikely circumstance where H (s) itself contains a doublet, A(s) has a zero at thedoublet pole plus a pole near the doublet zero. In other words, the doublet appears in A(s)inverted but otherwise little changed.

• The interesting case is where G(s) contains a doublet. A(s) has a zero at the doublet zero,plus a pole which lies closer to this zero than did the original pole in G(s). Thus, a doubletin forward-path gain appears also in overall gain, but reduced in width.

Figure B1 shows two dimensionless block diagrams of which one or the other represents manyoperational amplifiers with a doublet in the forward path [47–49]. In Figure B1(a) the doubletoccurs inside the compensating feedback loop; its zero time constant is �D and the ratio of poleto zero is (1+). In Figure B1(b) the doublet is outside the compensating feedback. Of interest isthe resulting doublet pole in overall gain, hence the factor by which the forward-path doublet isreduced in width.

In practice the ‘2nd stage’ (1/s�X )2 in Figure B1 may be as simple as a single transistor, or acomplicated multi-transistor structure such as the nest in Figure 14.

The overall gain of Figure B1(a) is

A(s)= k(1+s�D)

[1+s�D(1+)](s�X )2 +(1+s�D)(kh+s�F ). (B1)

+–

+–

h

sτ

2nd stage with doublet1st stage

compensating feedback

overall feedback

k1+ sτ

1+ sτ (1+δ)

1

sτ

+–

+–

2nd stage with doublet1st stage

overall feedback compensatingfeedback

k

sτ

h

1+ sτ1+ sτ (1+δ)

1

sτ

Σ Σ

ΣΣ

(a)

(b)

Figure B1. Dimensionless block diagrams of an operational amplifier with a pole-zero doublet in itssecond stage: (a) doublet inside compensating feedback and (b) doublet outside compensating feedback.



In the absence of the doublet

A(s) ⇒=0

k

kh+s�F +(s�X )2,

from which

�0 = �X√kh

, (B2)

� = �F

2�X√

kh. (B3)

Equation (B1) can then be written as

A(s)= 1

h× 1+s�D

1+s�D(1+ε)× 1

1+2�(s�0)+(s�0)2, (B4)

where ε is a measure the overall doublet in A(s).The poles of A(s) are the solutions of

[1+s�D(1+)](s�X )2 +(1+s�D)(kh+s�F )=0. (B5)

The doublet pole is the solution near s =−1/�D:

s ⇒ pdoublet =− 1

�D(1+ε).

Hence, substituting into Equation (B5),(1− 1+

1+ε

)[− �X

�D(1+ε)

]2

+(

1− 1

1+ε

)[kh− �F

�D(1+ε)

]=0.

Then, using Equations (B2) and (B3) and assuming ε is small,

ε=

[1

1−2�(�D/�0)+(�D/�0)2

]. (B6)

In the Laplace domain, the normalized unit-step response of A(s) (i.e. the response after dividingout the DC gain 1/h) follows from Equation (B4) as

�(s) = 1

s× 1+s�D

1+s�D(1+ε)× 1

1+2�(s�0)+(s�0)2

≡ 1

s+ B1

1+s�D(1+ε)+ s B2 + B3

1+2�(s�0)+(s�0)2,

and the residue B1 at the doublet pole is

B1 = Limits⇒−1/�D(1+ε)

[1+s�D(1+ε)]×�(s)

= −ε�D

[(�D/�0)2

1−2�(�D/�0)+(�D/�0)2

].

Now use Equation (B6):

B1 =−�D

[(�D/�0)

1−2�(�D/�0)+(�D/�0)2

]2

.

Hence, in the time domain the normalized exponential associated with the doublet is

d(t)= B1

�Dexp

(− t

�D

)=−

[(�D/�0)

1−2�(�D/�0)+(�D +�0)2

]2

exp

(− t

�D

)(B7)


1140 E. M. CHERRY

and the time for its amplitude to decay to 1/� is

Tdecay = �D ln

{�

[(�D/�0)

1−2�(�D/�0)+(�D/�0)2

]2}

⇒�D�0

�D ln

[�

(�0

�D

)2]

. (B8)

For Figure B1(b)

A(s)= k(1+s�D)

[1+s�D(1+)][s�F +(s�X )2]+kh(1+s�D), (B9)

and it follows that

=

[1−2�(�D/�0)

1−2�(�D/�0)+(�D/�0)2

], (B10)

d(t) = −[1−2�(�D/�0)]×[

(�D/�0)

1−2�(�D/�0)+(�D/�0)2

]2

exp

(− t

�D

), (B11)

Tdecay = �D ln

{�[1−2�(�D/�0)]×

[(�D/�0)

1−2�(�D/�0)+(�D/�0)2

]2}

⇒�D�0

�D ln

[2��

(�0

�D

)]. (B12)

If �1 so that the system has a dominant pole, Equation (B11) becomes consistent withEquations (1) and (2) of Kamath et al. [47].

By comparison of Equations (B8) and (B12), it is apparent that Figure B1(a) settles more quicklythan Figure B1(b):

Tdecay (Figure B1(b))=Tdecay (Figure B1(a))+�D ln

[2�

(�D

�0

)]. (B13)

Unfortunately, all the two-stage compensation techniques in Section 3 are modeled by Figure B1(b),but this is not the case for some nested-loop structures.

The enhanced performance of Figure B1(a) can be ascribed to the greater loop gain around itsdoublet:

G Hdoublet (Figure B1(a)) = kh+s�F

(s�X )2, (B14)

G Hdoublet (Figure B1(b)) = kh

s�F +(s�X )2. (B15)

For Figure B1(a), loop gain increases inversely with frequency at a double-pole rate below thesystem cut-off. For Figure B1(b) it is merely single pole.

APPENDIX C: PARALLEL-PATH STRUCTURES

Some multi-loop compensation techniques involve forward-feeding parallel-path structures[41, 14, 18–24]. This Appendix outlines the gain-bandwidth implications of such topologies. It issomewhat relevant also to Section 5.1.



R C R C

vvg

– sΠ /z )

– sΠ /p )

g

g

high-gain low-bandwidth path

low-gain high-bandwidth path

Figure C1. Basic forward-feeding parallel-path topology.

Figure C1 shows the basic parallel-path topology before any other compensation is applied.When two amplifying blocks are connected in parallel, their y parameters add. For simplicity ofinitial presentation, assume the high-gain low-bandwidth path is truly low-pass and has more polesthan zeros, whereas the low-gain wide-band path has no singularities other than those associatedwith the input and output circuits. Thus the forward short-circuit transfer admittances are

YT 2(s) = gm2

[�(1−s/z j )

�(1−s/pk)

],

YT 3(s) = gm3.

R1C1 and R2C2 represent the total shunt admittances at the input and output of the parallelblocks, that is, the sum of their short-circuit input and output admittances. The reverse short-circuittransfer admittances are taken as zero or, if not zero, can be absorbed into the yet-to-be-appliedcompensating networks.

The overall voltage gain is

A(s) = vo

vi=gm1

(R1

1+s R1C1

){gm2

[�(1−s/z j )

�(1−s/pk)

]+gm3

}(R2

1+s R2C2

)

= gm1

(R1

1+s R1C1

)[gm2�(1−s/z j )+gm3�(1−s/pk)

�(1−s/pk)

](R2

1+s R2C2

), (C1)

from which



C1 ×C2. (C2)

Evidently the high-gain low-bandwidth path drops out of gain-bandwidth considerations, althoughit is vital to the detail of the singularities in the theorem.

From Equation (C1), A(s) has poles associated with the interstage circuits, and also at thevarious pk of the high-gain low-bandwidth path. Zeros occur at the solutions of

gm2�(1−s/z j )+gm3�(1−s/pk)=0,

that is, where [�(s−z j )

�(−z j )

][�(−pk)

�(s− pk)

]=−gm3

gm2. (C3)

In the complex frequency plane, terms of the form (s−z j ) and (s− pk) represent vectors from azero or pole of YT 2(s) to a solution point [that is, a zero of A(s)]. Terms of the form (−z j ) and(−pk) represent vectors from a zero or pole to the origin. Therefore Equation (C3) is of the form

product of vectors in the complex plane=a negative real number


1142 E. M. CHERRY

It follows that

�[angles of vectors from zeros of YT2(s) to a solution point]

−�[angles of vectors from zeros of YT2(s) to the origin]

−�[angles of vectors from poles of YT2(s) to a solution point]

+�[angles of vectors from poles of YT2(s) to the origin]

=an odd multiple of 180◦ (C4)

�[lengths of vectors from zeros of YT2(s) to a solution point]

�[lengths of vectors from zeros of YT2(s) to the origin]

× �[lengths of vectors from poles of YT2(s) to the origin]

�[lengths of vectors from poles of YT2(s) to a solution point]

= gm3

gm2. (C5)

Rules can be formulated for constructing the loci of the solution points [i.e. the zeros of A(s)] asgm3 is varied. Perhaps most useful are:

1. As gm3 is increased from zero, some zeros of A(s) start from the zeros of YT 2(s) and movetowards its poles.

2. As gm3 is increased from zero, a number of other zeros of A(s) [equal to the differencebetween the numbers of poles and zeros of YT 2(s)] appear far out in the complex frequencyplane and move inwards.

3. The loci of the zeros of A(s) lie along the negative real axis when an odd number ofsingularities of YT 2(s) lie to the right.

4. As gm3 is increased from zero the far-out zeros move rapidly along their loci towards a pole,whereas the close-in zeros move slowly.

There are many equivalents to the rules for root-locus plotting in a control system.

The comments in parentheses following some references are the Author’s notes as to the significanceof the contribution, in cases where the title is not self-explanatory.

REFERENCES

1. Solomon JE, Davis WR, Lee PL. A self-compensated monolithic operational amplifier with low input current andhigh slew rate. International Solid-State Circuits Conference Digest of Technical Papers, vol. 12, 1969; 14–15.Reprinted in Integrated-Circuit Operational Amplifiers, Meyer RG (ed.). Wiley: New York, 1978; 88–89.

2. Solomon JE. The monolithic op amp: a tutorial study. IEEE Journal of Solid-State Circuits 1974; 9:314–332.3. Ribner DB, Copeland MA. Design techniques for cascoded CMOS OP AMPS with improved PSRR and common-

mode input range. IEEE Journal of Solid-State Circuits 1984; 19:919–925. (Cancellation of RHP zero usingcascode FET as series R.)

4. Black Jr WC, Allstot DJ, Reed RA. A high performance low power CMOS channel filter. IEEE Journal ofSolid-State Circuits 1980; 15:929–938. (LHP pole-zero cancellation. Tracking of compensating resistor overprocess variations.)

5. Tsividis YP, Gray P. An integrated NMOS operational amplifier with internal compensation. IEEE Journal ofSolid-State Circuits 1976; 11:746–754. (Early instance of voltage buffer to eliminate RHP zero, no analysis.)

6. Palmisano G, Palumbo G. An optimized compensation strategy for two-stage CMOS op amps. IEEE Transactionson Circuits and Systems Part I 1995; 42:178–182. (Voltage buffer with analysis.)

7. Senderowicz D, Gray PR, Hodges DA. High-performance NMOS operational amplifier. IEEE Journal of Solid-State Circuits 1978; 13:760–766. (Early instance of current buffer to eliminate RHP zero, no analysis.)



8. Palmisano G, Palumbo G. A compensation strategy for two-stage CMOS OP AMPS based on current buffer. IEEETransactions on Circuits and Systems Part 1 1997; 44:257–262. (Early analysis of current buffer. ‘Mandatory’compensation of RHP zero.)

9. Ahuja BK. An improved frequency compensation technique for CMOS operational amplifiers. IEEE Journal ofSolid-State Circuits 1983; 18:629–633. (Current buffer to eliminate RHP zero, no analysis.)

10. Rincon-Mora GA. Active capacitor multiplier in Miller-compensated circuits. IEEE Journal of Solid-State Circuits2000; 35:26–32. (Early instance of current amplifier.)

11. Mahattanakul J. Design procedure for two-stage operational amplifiers employing current buffer. IEEE Transactionson Circuits and Systems Part 2 2005; 52:766–770. (Current buffer with pole-zero cancellation.)

12. Hurst P, Lewis S, Keane J, Aram F, Dyer K. Miller compensation using current buffers in fully differentialCMOS two-stage operational amplifiers. IEEE Transactions on Circuits and Systems Part I 2004; 51:275–285.(4 variants of RHP zero removal.)

13. Huijsing JH. Multistage amplifier with capacitive nesting for frequency compensation. U.S. Patent 4,559,502, 17December 1985.

14. Huijsing JH, Fonderie MJ. Multi-stage amplifier with capacitive nesting and multi-path forward feeding forfrequency compensation. U.S. Patent 5,155,447, October 4, 1992.

15. Eschauzier RGH, Huijsing JH. Multistage amplifier with hybrid nested Miller compensation. U.S. Patent 5,426,790,23 January 1996.

16. Ho K-P, Chan C-F, Choy C-S, Pun K-P. Reverse nested Miller compensation with voltage buffer and nullingresistor. IEEE Journal of Solid-State Circuits 2003; 38:1735–1738.

17. Lee H, Leung KN, Mok PKT. A dual-path bandwidth extension amplifier topology with dual-loop parallelcompensation. IEEE Journal of Solid-State Circuits 2003; 38:1739–1744.

18. Grasso AD, Palumbo G, Pennisi S. Three-stage CMOS OTA for large capacitive loads with efficient frequencycompensation scheme. IEEE Transactions on Circuits and Systems Part 2 2006; 53:1044–1048. (Nesting plusfeed-forward.)

19. Peng X, Sansen W. Transconductance with capacitances feedback compensation for multistage amplifiers. IEEEJournal of Solid-State Circuits 2005; 40:1514–1520. (Nesting plus current buffer plus feed-forward.)

20. Leung KN, Mok PKT. Analysis of multistage amplifier-frequency compensation. IEEE Transactions on Circuitsand Systems Part I 2001; 48:1041–1056. (Summary of 10 techniques.)

21. Peng X, Sansen W. AC boosting compensation scheme for low-power multistage amplifiers. IEEE Journal ofSolid-State Circuits 2004; 39:2074–2077. (Parallel paths with AC coupling in HF.)

22. You F, Embali SHK, Sanchez-Sinencio E. Multistage amplifier topologies with nested Gm-C compensation. IEEEJournal of Solid-State Circuits 1997; 32:2000–2011. (Nesting plus parallel paths.)

23. Fan X, Mishra C, Sanchez-Sinencio E. Single Miller capacitor frequency compensation technique for low-powermultistage amplifiers. IEEE Journal of Solid-State Circuits 2005; 40:584–592. (Interleaved forward-feeding paths.)

24. Thandri BK, Silva–Martınez J. A robust feedforward compensation scheme for multistage operationaltransconductance amplifiers with no Miller capacitors. IEEE Journal of Solid-State Circuits 2003; 38:237–243.(Nested feed-forward.)

25. Ivanov VV, Filanovsky IM. Operational Amplifier: Speed and Accuracy Improvement. Kluwer: Boston, 2004.26. Cherry EM, Hooper DE. Amplifying Devices and Low-Pass Amplifier Design. Wiley: New York, 1968. (Gain-

bandwidth theorem p. 694ff. LHP pole-zero cancellation p. 766.)27. Nordholt EH. The design of high-performance negative-feedback amplifiers. Ph.D. Thesis, Delft University of

Technology, The Netherlands, 1980. Re-published in book form by Elsevier, Amsterdam, 1983.28. Verhoeven CJM, van Staveren A, Monna GLE, Kouwenhoven MHL, Yiditz E. Structured Electronic Design

(Negative-Feedback Amplifiers). Kluwer: Boston, 2003.29. Cherry EM. Loop gain, input impedance and output impedance of feedback amplifiers. IEEE Circuits and Systems

Magazine 2008; 6(1):55–71.30. Temes GS. The prolate filter: an ideal low-pass filter with optimum step-response. Journal of the Franklin Institute

1972; 293:77–103. (Zero overshoot in step response.)31. Filanovsky IM. A new class of wide-band amplifiers with monotonic step response. IEEE Transactions on Circuits

and Systems Part I 2003; 50:569–571. (Zero overshoot in step response.)32. Alves LN, Aguiar RL. A time-delay technique to improve GBW on negative feedback amplifiers. International

Journal of Circuit Theory and Applications 2008; 36:375–386.33. Cherry EM, Hooper DE. The design of wide-band transistor feedback amplifiers. Proceedings of the Institution

of Electrical Engineers (London) Part B 1963; 110:375–389.34. Bode HW. Network Analysis and Feedback Amplifier Design. van Nostrand: Princeton, NJ, 1948.35. Elmore WC. The transient response of damped linear networks with particular regard to wideband amplifiers.

Journal of Applied Physics 1948; 19:55–63.36. Staric ME. Wideband Amplifiers. Springer: Dordrecht, The Netherlands, 2006.37. Palumbo G, Pennisi S. Design methodology and advances in nested-Miller compensation. IEEE Transactions on

Circuits and Systems Part I 2002; 49:893–903. (Phase margin of inner loop. ‘Mandatory’ removal of RHP zero.)38. Aloisi W, Palumbo G, Pennisi S. Design methodology of Miller frequency compensation with current

buffer/amplifier. IET Circuits, Devices and Systems 2008; 2:227–233. (Phase margin of inner loop.)39. Llewellyn FB. Wave translation system. U.S. Patent 2,245,598, 17 June 1941. (System with potentially-unstable

positive-feedback loop enclosed by outer negative-feedback loop, leading to improved sensitivity.)


1144 E. M. CHERRY

40. Nyquist H. Regeneration theory. Bell System Technical Journal 1932; 11:126–147.41. Cherry EM. Design study of a feedback sample-and-hold circuit using current-mode switching. Bell System

Technical Memorandum, MM-64-1355-3, 23 January 1964. (Possibly the first use of R in series with compensatingC , and of LHP zero via multi-path forward-feeding.)

42. Reay RJ, Kovacs GTA. An unconditionally stable two-stage CMOS amplifier. IEEE Journal of Solid-State Circuits1995; 30:591–594. (Low first-stage gain required for stability with arbitrary load capacitance.)

43. Mita R, Palumbo G, Pennisi S. Design guidelines for reversed nested Miller compensation in three-stage amplifiers.IEEE Transactions on Circuits and Systems Part 2 2003; 50:227–233. (Voltage and current buffers compared.)

44. Grasso AD, Palumbo G, Pennisi S. Analytical comparison of frequency compensation techniques in three-stageamplifiers. International Journal of Circuit Theory and Applications 2008; 36:53–80. (Figures of merit, phasemargin of inner loop.)

45. Grasso AD, Palumbo G, Pennisi S. Comparison of the frequency compensation techniques for CMOS two-stageMiller OTAs. IEEE Transactions on Circuits and Systems Part 2 2008; 55:1099–1103.

46. Middlebrook RD. A modern approach to semiconductor and vacuum device theory. Proceedings of the Institutionof Electrical Engineers (London) Part B 1959; 106(Suppl. 17): 887–902.

47. Kamath BY, Meyer RG, Gray PR. Relationship between frequency response and settling time of operationalamplifiers. IEEE Journal of Solid-State Circuits 1974; 9:347–352. (In-band doublet in single-pole system.)

48. Yang HC, Allstot DJ. Considerations for fast-settling operational amplifiers. IEEE Transactions on Circuits andSystems 1990; 37:326–334. (LHP pole-zero cancellation, phase margin versus settling time.)

49. Palmisano G, Palumbo G. Analysis and compensation of two-pole amplifiers with a pole-zero doublet. IEEETransactions on Circuits and Systems Part I 1999; 46:854–868. (Doublet near pass-band edge.)

50. Huijsing JH, Eschauzier RGH. Amplifier arrangement with multipath Miller zero cancellation. U.S. Patent5,485,121, 16 January 1996.

51. Cherry EM. Feedback systems. U.S. Patent 4,243,943, 6 January 1981. (NDFL patent.)52. Cherry EM. A new result in negative feedback theory and its application to audio power amplifiers. International

Journal of Circuit Theory and Applications 1978; 6:265–288.53. Cherry EM. A high-quality audio power amplifier. Proceedings of the Institution of Radio and Electronics

Engineers (Australia) 1978; 38:1–8.54. Miller JM. Dependence of the input impedance of a three-electrode vacuum tube upon the load in the plate

circuit. National Bureau of Standards Scientific Papers 1919–1920; 15(351):367–385.


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