6421c vol ii system manual for mark vi

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g GE Industrial Systems GEH-6421C, Volume II (Supersedes GEH-6421B) SPEEDTRONIC TM Mark VI Turbine Control System Guide, Volume II (2 of 2)

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Page 1: 6421C Vol II System Manual for Mark VI

gGE Industrial Systems

GEH-6421C, Volume II(Supersedes GEH-6421B)

SPEEDTRONICTM

Mark VI Turbine ControlSystem Guide, Volume II (2 of 2)

Page 2: 6421C Vol II System Manual for Mark VI
Page 3: 6421C Vol II System Manual for Mark VI

Publication: GEH-6421C, Volume II(Supersedes GEH-6421B)

Issued: 2001-06-27

SPEEDTRONICTM

Mark VI Turbine ControlSystem Guide, Volume II (2 of 2)

Page 4: 6421C Vol II System Manual for Mark VI

����2001 by General Electric Company, U.S.A.All rights reserved.

Printed in the United States of America.

These instructions do not purport to cover all details or variations in equipment, or to providefor every possible contingency to be met during installation, operation, and maintenance. Iffurther information is desired or if particular problems arise that is not covered sufficientlyfor the purchaser�s purpose, the matter should be referred to GE Industrial Systems, Salem,VA.

This document contains proprietary information of General Electric Company, USA and isfurnished to its customer solely to assist that customer in the installation, testing, operationand/or maintenance of the equipment described. This document shall not be reproduced inwhole or in part nor shall its contents be disclosed to any third party without the writtenapproval of GE Industrial Systems.

ARCNET is a registered trademark of Datapoint Corporation.CIMPLICITY is a trademark of GE Fanuc Automation North America, Inc.Ethernet is a trademark of Xerox Corporation.Genius is a registered trademark of GE Fanuc Automation North America, Inc.IBM is a registered trademark of International Business Machines Corporation.Intel is a registered trademark of Intel Corporation.Modbus is a registered trademark of Modicon.PC is a registered trademark of International Business Machines Corporation.Pentium is a registered trademark of Intel Corporation.PI-ProcessBook is a registered trademark of OSI Software Inc.PI-Data Archive and PI-DataLink are registered trademarks of OSI Software Inc.Proximitor, Velomitor, and KeyPhasor are registered trademarks of Bently Nevada.QNX is a registered trademark of QNX Software Systems, LTD.Series 90 is a trademark of GE Fanuc Automation North America, Inc.SPEEDTRONIC is a trademark of General Electric Company, USA.Windows is a registered trademark of Microsoft Corporation.Windows NT is a registered trademark of Microsoft Corporation.

Page 5: 6421C Vol II System Manual for Mark VI

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Page 6: 6421C Vol II System Manual for Mark VI

.........................................................................Fold here and close with staple or tape ..........................................................................................

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...........................................................................................Fold here first.........................................................................................................

Placestamphere.

Page 7: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Safety Symbol Legend •••• a

Safety Symbol Legend

Indicates a procedure, condition, or statement that, if notstrictly observed, could result in personal injury or death.

Indicates a procedure, condition, or statement that, if notstrictly observed, could result in damage to or destruction ofequipment.

Indicates a procedure, condition, or statement that shouldbe strictly followed in order to optimize these applications.

Note Indicates an essential or important procedure, condition, or statement.

Page 8: 6421C Vol II System Manual for Mark VI

b •••• Safety Symbol Legend Mark VI System Guide GEH-6421C, Vol. II

This equipment contains a potential hazard of electric shockor burn. Only personnel who are adequately trained andthoroughly familiar with the equipment and the instructionsshould install, operate, or maintain this equipment.

To minimize hazard of electrical shock or burn, approvedgrounding practices and procedures must be strictlyfollowed.

To prevent personal injury or equipment damage caused byequipment malfunction, only adequately trained personnelshould modify any programmable machine.

The example and setup screens in this manual do not reflectthe actual application configurations. Be sure to follow thecorrect setup procedures for your application.

Note Component and equipment reliabilities have improved dramatically over thepast several years. However, component and equipment failures can still occur.Electrical and environmental conditions beyond the scope of the original design canbe contributing factors.

Since failure modes cannot always be predicted or may depend on the applicationand the environment, best practices should be followed when dealing with I/O that iscritical to process operation or personnel safety. Make sure that potential I/O failuresare considered and appropriate lockouts or permissives are incorporated into theapplication. This is especially true when dealing with processes that require humaninteraction.

Page 9: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Safety Symbol Legend •••• c

IEC 417, No. 5031

IEC 417, No. 5032

IEC 417, No. 5033

IEC 617-2,No. 02-02-06

IEC 417, No. 5017

IEC 417, No. 5019

IEC 417, No. 5020

Publication Description

Direct Current

Alternating Current

Both direct and alternating

Three-phase alternating

Earth (CCOM signal ground) Terminal

Protective Conductor Terminal(Chassis Safety Ground)

Frame or Chassis Terminal

Caution, risk of electric shock

Caution

Symbol

Safety Symbol Legend

3

IEC 417, No. 5021

IEC 417, No. 5007

IEC 417, No. 5008

IEC 417, No. 5172

Equipotentiality

On (Supply)

Off (Supply)

Equipment protected throughoutDouble Insulation or ReinforcedInsulation (equivalent to Class II of536)

ISO 3864, No. B.3.6

ISO 3864, No. B.3.1

PE Protective Conductor Terminal(Chassis Safety Ground)

Page 10: 6421C Vol II System Manual for Mark VI

d •••• Safety Symbol Legend Mark VI System Guide GEH-6421C, Vol. II

Drawing Symbols

R Remotely Mounted

Mounted on Door 1, 2, and so on

Mounted in Main Operator Station

Locations

Delta

Bus Aux Compt DeviceGenerator Compt Device

PEECC MCC

Load Commutated Inverter

Isolation Transformer

1. For wire runs internal to the controller, twisted pairs are adequate.

2. For wire runs external to the controller (and internal to the controller when longer than 20 feet), shielded twisted pair is required.

3. All shield drain wires should be terminated on one end only, that end being the shield ground points immediately adjacent to the termination boards. The other end should be cut off and the wire taped to prevent grounding.

4. None of the shield drain wires should ever be routed through any controller terminal board-mounted ferrite cores.

DevicesJ1

Cable Plug Connector

Jumper

Relay Coil

Solenoid Coil

Flame Detector

Conventions

Case Ground

Ground Bus

Signal Ground

Contact Actually Shown Elsewhere

Customer Connection

Turbine Control Generator Excitation Compartment

Generator Control Panel ISO

EX EX2000 Exciter LCI

E Equipment Exists in place SS Static Starter

OS

P Panel Mounted Packaged Electrical Cont. CTR (PEEC)

1 2 G Generator Terminal Enclosure

D Door Mounted

O Supplied by Others Purchaser's Equipment

Shielded Pair Wire

P

Low Level Signal WiringPractices Required

Wye

Low Level Wiring

Power Wiring

H High Level Wiring

L

Twisted Pair Wire

Twisted Shielded Pair Wire

Page 11: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Contents •••• i

Contents

Chapter 9 I/O Board DescriptionsIntroduction.............................................................................................................. 9-1Controller ................................................................................................................. 9-2

Operation .......................................................................................................... 9-2UCVE Controller .............................................................................................. 9-2UCVD Controller.............................................................................................. 9-6UCVB Controller.............................................................................................. 9-8Configuration Overview ................................................................................. 9-10Diagnostics ..................................................................................................... 9-10Installation ...................................................................................................... 9-10

VCMI - Bus Master Controller .............................................................................. 9-11Features........................................................................................................... 9-13

VDSK - Interface Board ........................................................................................ 9-19Operation ........................................................................................................ 9-19

Board Summary ..................................................................................................... 9-20Simplex DIN-Rail Mounted Terminal Board Summary ........................................ 9-22

Grounding....................................................................................................... 9-24VTCC/TBTCH1C (Simplex) - Thermocouple Inputs............................................ 9-25

Operation ........................................................................................................ 9-25Features........................................................................................................... 9-27Installation ...................................................................................................... 9-30

VTCC/TBTCH1B (TMR) - Thermocouple Inputs ................................................ 9-32Installation ...................................................................................................... 9-33

DTTC - Simplex DIN-rail Mounted Thermocouple Terminal Board .................... 9-34DTTC Board Installation ................................................................................ 9-35

VRTD/TRTDH1C (Simplex) - RTD Inputs .......................................................... 9-36Operation ........................................................................................................ 9-37Features........................................................................................................... 9-38Installation ...................................................................................................... 9-41

VRTD/TRTDH1B (TMR) - RTD Inputs ............................................................... 9-43Installation ...................................................................................................... 9-44

DRTD - Simplex DIN-rail Mounted RTD Terminal Board................................... 9-45Installation ...................................................................................................... 9-46

VAIC/TBAI - Analog Inputs ................................................................................. 9-47Operation ........................................................................................................ 9-48Features........................................................................................................... 9-50Installation ...................................................................................................... 9-54

DTAI - Simplex DIN-rail Mounted Analog Input Terminal Board....................... 9-56Installation ...................................................................................................... 9-57

VAOC/TBAO - Analog Outputs............................................................................ 9-58Operation ........................................................................................................ 9-59Features........................................................................................................... 9-61Installation ...................................................................................................... 9-62

DTAO - Simplex DIN-rail Mounted Analog Output Terminal Board................... 9-64

Page 12: 6421C Vol II System Manual for Mark VI

ii •••• Contents Mark VI System Guide GEH-6421C, Vol. II

Installation ...................................................................................................... 9-65VCCC/TBCI - Contact Inputs................................................................................ 9-66

Operation ........................................................................................................ 9-68Features........................................................................................................... 9-70Installation ...................................................................................................... 9-71

VCCC/TICI - Isolated Digital Inputs..................................................................... 9-73Features........................................................................................................... 9-73

DTCI - Simplex DIN-rail Mounted Contact Input Terminal Board ...................... 9-74Installation ...................................................................................................... 9-75

VCCC/TRLYH1B - Relay Outputs ....................................................................... 9-76Operation ........................................................................................................ 9-77Features........................................................................................................... 9-79Installation ...................................................................................................... 9-81

VCCC/TRLYH1C - Relay Outputs with Voltage Sensing .................................... 9-83Features........................................................................................................... 9-83Installation ...................................................................................................... 0-84

VCRC - Contact Input/Relay Output Board .......................................................... 9-86DRLYH1A and DRLYH1B - Simplex Wall MountedRelay Output Terminal Boards .............................................................................. 9-88VSVO/TSVO - Servo/LVDT................................................................................. 9-91

Operation ........................................................................................................ 9-92Features........................................................................................................... 9-96Installation .................................................................................................... 9-101

DSVO - Simplex DIN-rail Mounted Servo Terminal Board ............................... 9-102Installation .................................................................................................... 9-106

VTUR/TTUR - Turbine Control .......................................................................... 9-108Operation ...................................................................................................... 9-109Features......................................................................................................... 9-111Automatic Synchronizing ............................................................................. 9-116Installation .................................................................................................... 9-118

VTUR/TRPG - Primary Trip ............................................................................... 9-120Operation ...................................................................................................... 9-121Features......................................................................................................... 9-122Installation .................................................................................................... 9-123

DTRT - Simplex DIN-rail Mounted Trip Transition Board ................................ 9-125Installation .................................................................................................... 9-126

DTUR - Simplex DIN-rail Mounted Pulse Rate Terminal Board........................ 9-127Installation .................................................................................................... 9-128

VVIB/TVIB - Vibration/Position......................................................................... 9-129Operation ...................................................................................................... 9-131Features......................................................................................................... 9-131Configuration................................................................................................ 9-133Installation .................................................................................................... 9-135

DVIB - Simplex DIN-rail Mounted Vibration Terminal Board........................... 9-137Installation .................................................................................................... 9-138

VGEN/TGEN - Generator Board......................................................................... 9-139Operation ...................................................................................................... 9-139Features......................................................................................................... 9-141Installation .................................................................................................... 9-145

VPYR/TPYR - Pyrometer Board......................................................................... 9-147Operation ...................................................................................................... 9-148Features......................................................................................................... 9-149Installation .................................................................................................... 9-153

VSCA/DSCB - Serial Communications Board.................................................... 9-154Operation ...................................................................................................... 9-154Features......................................................................................................... 9-155

Page 13: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Contents •••• iii

DSCB - DIN-rail Mounted Terminal Board ................................................. 9-157DPWA - DIN-rail Mounted Transducer ExcitationPower Distribution Terminal Board..................................................................... 9-160VPRO/TREG - Turbine Emergency Trip ............................................................ 9-162

Operation ...................................................................................................... 9-162Features......................................................................................................... 9-164Installation .................................................................................................... 9-166

VPRO/TPRO - Turbine Protection ...................................................................... 9-168Operation ...................................................................................................... 9-171Features......................................................................................................... 9-171Specification ................................................................................................. 9-172Configuration................................................................................................ 9-173Installation .................................................................................................... 9-178

VME Rack Power Supply.................................................................................... 9-180Operation ...................................................................................................... 9-180Specification ................................................................................................. 9-184Diagnostics ................................................................................................... 9-184Installation .................................................................................................... 9-185

TTPW - Power Conditioning Board .................................................................... 9-186Operation ...................................................................................................... 9-187Installation .................................................................................................... 9-188

PDM - Power Distribution Module...................................................................... 9-189Operation ...................................................................................................... 9-190PDM for Interface Cabinet ........................................................................... 9-190Diagnostic Monitoring.................................................................................. 9-192Control Cabinet PDM................................................................................... 9-192Interface Cabinet PDM Installation .............................................................. 9-194Fuses in Interface and Control Cabinet PDM ............................................... 9-195Ground Reference Jumper ............................................................................ 9-195

Low Voltage Power Supply ................................................................................. 9-196Specification ................................................................................................. 9-197

Glossary of Terms

Index

Page 14: 6421C Vol II System Manual for Mark VI

iv •••• Contents Mark VI System Guide GEH-6421C, Vol. II

Notes

Page 15: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-1

Chapter 9 I/O Board Descriptions

IntroductionThis chapter describes the Mark VI boards including the controller, VCMI, I/Oprocessor boards along with their associated terminal boards (standard and DIN-railmounted), and power supplies.

This information in GEH-6421C, Vol. II Chapter 9 is intended to be used inconjunction with GEH-6421C, Vol. I, that includes chapters 1 through 8.

The information in GEH-6421C, Vol. I is organized as follows:

Chapter 1 Overview. Outlines the Mark VI system and the chapters in the manual.

Chapter 2 System Architecture. Describes the main system components, thenetworks, and details of the TMR architecture.

Chapter 3 Networks. Discusses the data highways and other communicationnetworks, including the links to other control systems.

Chapter 4 Codes and Standards. Discusses the codes, standards, andenvironmental guidelines used for the design of all printed circuits,modules, cores, panels, and cabinet line-ups in the Mark VI.

Chapter 5 Installation. Provides instructions for system installation, wiring,grounding, checkout, and startup.

Chapter 6 Tools. Summarizes the toolbox, CIMPLICITY HMI, and the Historian.

Chapter 7 Applications. Covers several applications including protection logic,synchronization, and details of the servo regulators.

Chapter 8 Troubleshooting and Diagnostics. Describes how process anddiagnostic alarms are generated and displayed for the operator andservice engineer. It includes a listing of the board diagnostics, and anintroduction to system troubleshooting.

Page 16: 6421C Vol II System Manual for Mark VI

9-2 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

ControllerThe Mark VI UCVE controller is a 6U high, single or double slot, single boardcomputer (SBC) that operates the turbine application code. The controller mounts ina VME rack called the control module, and communicates with the turbine I/Oboards through the VME bus. The controller operating system is QNX, a real time,multitasking OS designed for high-speed, high reliability industrial applications.Three communication ports provide links to operator and engineering interfaces asfollows:• Ethernet connections to the UDH for communication with HMIs, and other

control equipment• RS-232C connection for setup using the COM1 port• RS-232C connection for communication with DCS systems using the COM2

port (such as Modbus slave)

Three controller versions are in use. The single slot UCVE is the current generationcontroller. The double slot UCVB and UCVD are no longer shipped with newsystems, but are still in use in older systems. The UCVE may be used to replacethese other controllers, but requires a backplane upgrade. If replacing a ICVB, anEthernet cabling upgrade is also required.

OperationThe controller is loaded with software specific to its application to Steam, Gas, andLand-Marine aeroderivative (LM), or Balance of Plant (BOP) products. It canexecute up to 100,000 rungs or blocks per second, assuming a typical collection ofaverage size blocks. Application software can be modified online without requiring arestart. An external clock interrupt permits the controller to synchronize to the clockon the VCMI communication board to within ± 100 microseconds.

External data is transferred to and from the Control Signal Database (CSDB) in thecontroller over the VME bus by the VCMI communication board. In a Simplexsystem, the data consists of the process inputs and outputs from the I/O boards. In aTMR system, the data consists of the voted inputs from the input boards, singularinputs from simplex boards, computed outputs to be voted by the output hardware,and the internal state values that must be exchanged between the controllers.

UCVE ControllerThe UCVE is available in two different forms, UCVEH2 and UCVEM01. TheUCVEH2 is the standard Mark VI controller (see Figure 9-1). It is a single-slot boardusing a 300 MHz Intel Celeron processor with 16 Mb of flash memory and 32 Mb ofDRAM. A single 10BaseT (RJ-45) Ethernet port provides connectivity to the UDH.

A separate subnet address allowsthe controller to uniquelyidentify an Ethernet port. ObtainIP subnet addresses from theEthernet network administrator.(eg. 192,168.1.0, 192.168.2.0)

The UCVEM01 has all of the features of the UCVEH2 with the addition of a second10BaseT Ethernet port for use on a separate IP logical subnet, as shown in Figure 9-2. Configuration of the second Ethernet port is performed through the toolbox.

The controller validates its toolbox configuration against the existing hardware eachtime the rack is powered up.

Page 17: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-3

x

Ethernet Port for Unit DataHighway Communication

COM1 RS-232C Port forInitial Controller Setup;COM2 RS-232C Port forSerial communication

Mark VI Controller UCVEH2

STATUS

LAN

RST

x

UCVE H2

Status LEDs

VMEbus SYSFAILFlash ActivityPower Status

Monitor Port for GE use

Ethernet Status LEDs

Active

Link

Keyboard/mouse portfor GE use

Note: To connect thebatteries that enableNVRAM and CMOS, setjumper E8 to pins 7-8 ("IN")and jumper E10 to ("IN").

Also be aware that UCVEmodules may be shippedwith the batteries disabled.

M/K

PCMIP

MEZZANINE

COM1:2

SVGA

Figure 9-1. UCVEH2 Controller Front Panel

Page 18: 6421C Vol II System Manual for Mark VI

9-4 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

x

COM1 RS-232C Port forInitial Controller Setup;COM2 RS-232C Port forSerial communication

Mark VI Controller UCVEM01

STATUS

LAN

RST

x

UCVEM01

Status LEDs

VMEbus SYSFAILFlash ActivityPower Status

Monitor Port for GE use

Ethernet Status LEDs

Active

Link

Speed (Off =10 MB/sec)(On = 100 MB/sec)

Link / Active

Keyboard/mouse portfor GE use

M/K

PCMIP

MEZZANINE

COM1:2

SVGA

SPEED LINK/ ACT

Primary Ethernet Port forUnit Data HighwayCommunication (Toolbox)

Secondary Ethernet Port forExpansion IO Communication

Note: To connect thebatteries that enableNVRAM and CMOS, setjumper E8 to pins 7-8 ("IN")and jumper E10 to ("IN").

Also be aware that UCVEmodules may be shippedwith the batteries disabled.

Figure 9-2. UCVEM01 Controller Front Panel

Page 19: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-5

UCVE Controller Specification

Table 9-1. UCVE Controller Specification

Item SpecificationMicroprocessor Intel Celeron 300 MHz

Memory 32 MB DRAM16 MB Compact Flash Module128 KB L2 cacheBattery-backed SRAM - 8K allocated as NVRAM for controller functions

Operating System QNX

LEDs LED indicators on the faceplate provide status information as follows:Left Indicator Power StatusCenter Indicator Flash ActivityRight Indicator VME bus SYSFAIL

Primary Ethernet StatusUpper LAN Indicator ActiveLower LAN Indicator Link

Secondary Ethernet Status (M01 version only)Left LAN Indicator SpeedRight LAN Indicator Link/Active

Programming Control block language with Analog and Discrete blocks; Boolean logicrepresented in relay ladder diagram format. Supported data types include:• Boolean• 16-bit signed integer• 32-bit signed integer• 32-bit floating point• 64-bit long floating point

Primary Ethernet Interface Twisted pair 10Base-T, RJ-45 connector:• TCP/IP protocol used for communication between controller and

toolbox• Ethernet Global Data (EGD) protocol for communication with

CIMPLICITY HMI, and Series 90-70 PLCs• Ethernet Modbus� protocol supported for communication

between controller and third party Distributed ControlSystem (DCS)

Secondary EthernetInterface (M01 version only)

Twisted pair 10Base-T, RJ-45 connector:• Ethernet Global Data (EGD) protocol

• Ethernet Modbus� protocol supported for communicationbetween controller and third party Distributed ControlSystem (DCS)

COM Ports Two Micro-miniature 9-pin D connectors:COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,

1 stop bitCOM2 Used for serial Modbus communication, 9600 or 19200 baud

Power RequirementsUCVEH2

+5 V dc, 6 A typical, 8 A maximum+12 V dc, 180 mA typical, 250 mA maximum−12 V dc, 180 mA typical, 250 mA maximum

Power RequirementsUCVEM01

+5 V dc, 6 A typical, 8.1 A maximum+12 V dc, 180 mA typical, 250 mA maximum−12 V dc, 180 mA typical, 250 mA maximum

Page 20: 6421C Vol II System Manual for Mark VI

9-6 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

UCVD ControllerThe UCVD is a double-slot board using a 300 MHz AMD K6 processor with 8 Mbof flash memory and 16 Mb of DRAM. A single 10BaseT (RJ-45 connector)Ethernet port provides connectivity to the UDH. It includes several legacy interfacesthat are not used in the Mark VI configuration. (Refer to Figure 9-3.)

The UCVD contains a double column of 8 status LED�s. These LED�s aresequentially turned on in a rotating pattern when the controller is operatingnormally. When an error condition occurs the LED�s display a flashing error codethat identifies the problem. For more information refer to GEH-6410, InnovationSeries Controller System Manual.

HAR

D D

ISK

LPT1

x x

x x

RESET

ETH

ERN

ETM

ON

ITO

RC

OM

1

CO

M2

KEYB

OAR

DM

OU

SE

UCVD H2

GENIUS

H LSLOT1

ENET

BSLV

BMAS

SYS

ACTIVE

FLSHGENA

Status LEDs showing Runtime Error Codesresulting from Bootup, Configuration, orDownload Problems

Connector for hard disk, for GE use

Receptacle for Genius Cable Plug

Ethernet Port for Unit DataHighway Communication

Controller and CommunicationStatus LEDs

Monitor Port for GE UseOnly

COM1 RS-232C Port forInitial Controller Setup;

Special Ports for GE Use,Printer, Keyboard, andMouse

COM2 RS-232C Port forserial communications

Mark VI Controller UCVDH1, H2

ISBus Drive LAN � Not Used

Figure 9-3. UCVD Controller Front Panel

Page 21: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-7

UCVD Controller Specifications

Table 9-2. UCVDH1 Controller Specification

Item SpecificationMicroprocessor AMD-K6 300 MHz

Memory 16 MB DRAM8 MB Flash Memory in UCVD256 KB of level 2 cache

Operating System QNX

LEDs LEDs on the faceplate provide status information as follows:ACTIVE Processor is activeSLOT 1 Controller configured as slot 1 controller in VME rackBMAS VME master access is occurringENET Ethernet activityBSLV VME slave access is occurringSTATUS Display rotating LED pattern when OK

Display flashing error code when faultedFLSH Writing to Flash memoryGENX Genius I/O is active

Programming Control block language with Analog and Discrete blocks; Boolean logicrepresented in relay ladder diagram format. Supported data types include:• Boolean• 16-bit signed integer• 32-bit signed integer• 32-bit floating point• 64-bit floating point

Ethernet Interface Twisted pair 10Base-T, RJ-45 connector• TCP/IP protocol used for communication between controller and

toolbox• Serial Request Transfer Protocol (SRTP) interface between controller

and HMI• Ethernet Global Data (EGD) protocol for communication with

CIMPLICITY HMI, and Series 90-70 PLCs• Ethernet Modbus� protocol supported for communication between

controller and third party Distributed Control System (DCS)

COM Ports Two Micro-miniature 9-pin D connectors:COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,

1 stop bitCOM2 Used for serial Modbus communication, 9600 or 19200 baud

Genius Bus Interface Genius Bus controller integrated with the central processing unit

Power Requirements +5 V dc, 6 A+12 V dc, 200 mA−12 V dc, 200 mA

Page 22: 6421C Vol II System Manual for Mark VI

9-8 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

UCVB ControllerThe UCVB is a double-slot board using a 133 MHz Intel Pentium processor with 4Mb of flash memory and 16 Mb of DRAM. A single 10Base2 (BNC connector)Ethernet port provides connectivity to the UDH. It includes several legacy interfacesthat are not used in the Mark VI configuration.

The UCVB contains a double column of 8 status LED�s. These LED�s aresequentially turned on in a rotating pattern when the controller is operating normally.When an error condition occurs the LED�s display a flashing error code thatidentifies the problem. For more information refer to GEH-6410, Innovation SeriesController System Manual.

x x

x x

RESET

ETH

ERN

ETM

ON

ITO

RC

OM

1

CO

M2

HAR

D D

ISK

LPT1

DLA

N

KEYB

OAR

DM

OU

SE

UCVB G1

GENIUS

H LSLOT1

ENET

BSLV

BMAS

SYS

ACTIVE

FLSHGENA

1 0DLAN DROP

1

8

Status LEDs showing Runtime Error Codesresulting from Bootup, Configuration, orDownload Problems

Connector for hard disk, for GE use

DLAN Network Connection (Not Used)

Receptacle for Genius Cable Plug

Ethernet Port for Unit DataHighway Communication

Controller and CommunicationStatus LEDs

Monitor Port for GE UseOnly

COM1 RS-232C Port forInitial Controller Setup;

Special Ports for GE Use,Printer, Keyboard, andMouse

DLAN Network Drop NumberConfiguration Dip Switches (Not Used)

COM2 RS-232C Port forserial communications

Mark VI Controller UCVBG1

Figure 9-4. Mark VI UCVB Controller Front Panel

Page 23: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-9

UCVB Controller Specifications

Table 9-3. UCVBG1 Controller Specification

Item SpecificationMicroprocessor Intel Pentium 133 MHz

Memory 16 MB DRAM4 MB Flash Memory in UCVB256 KB of level 2 cache

Operating System QNX

LEDs LEDs on the faceplate provide status information as follows:ACTIVE Processor is activeSLOT 1 Controller configured as slot 1 controller in VME rackBMAS VME master access is occurringENET Ethernet activityBSLV VME slave access is occurringSTATUS Display rotating LED pattern when OK

Display flashing error code when faultedFLSH Writing to Flash memoryGENX Genius I/O is active

Programming Control block language with Analog and Discrete blocks; Boolean logicrepresented in relay ladder diagram format. Supported data types include:• Boolean• 16-bit signed integer• 32-bit signed integer• 32-bit floating point• 64-bit long floating point

Ethernet Interface Thinwire 10Base-2, BNC connector:• TCP/IP protocol used for communication between controller and

toolbox• Serial Request Transfer Protocol (SRTP) interface between controller

and HMI• Ethernet Global Data (EGD) protocol for communication with

CIMPLICITY HMI, and Series 90-70 PLCs• Ethernet Modbus� protocol supported for communication

between controller and third party Distributed ControlSystem (DCS)

COM Ports Two Micro-miniature 9-pin D connectors:COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,

1 stop bitCOM2 Used for serial Modbus communication, 9600 or 19200 baud

Genius Bus Interface Genius Bus controller integrated with the central processing unit

DLAN+ Interface Interface to DLAN+, a high speed multidrop network based on ARCNET,using a token passing, peer to peer protocol

Power Requirements +5 V dc, 5.64 A+12 V dc, 900 mA−12 V dc, 200 mA

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9-10 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Configuration OverviewLike all the I/O boards, the controller is configured using the Control SystemToolbox. This software is summarized in GEH-6421C, Vol. I Mark VI System Guide,Chapter 6 Tools. For details refer to GEH-6403 Control System Toolbox forConfiguring the Mark VI Turbine Controller.

DiagnosticsIf a failure occurs in the Mark VI controller while it is running application code, therotating status LEDs (if supported) on the front panel stop and an internal fault codeis generated.

Additionally, if the controller detects certain system errors (typically during boot-upor download) it displays flashing error codes on the status LEDs. These codes arecalled runtime errors, and descriptions are available on the toolbox Help screen. Theerror numbers and descriptions are also available on the controller serial port(COM1). For further information, refer to GEH-6421C, Vol. I Mark VI SystemGuide, Chapter 8, Troubleshooting and Diagnostics. Like the turbine I/O boards, thecontroller maintains an internal diagnostic queue that can be queried from thetoolbox.

InstallationA control module contains (at a minimum) the controller and a VCMI. There arethree rack types that can be used, the GE Fanuc PLC rack shown in Figure 9-5, andtwo sizes of Mark VI racks shown in the section, VCMI - Bus Master Controller. TheGE Fanuc rack is shorter and is used for stand-alone modules with remote I/O only.The Mark VI racks are longer and can be used for local or remote I/O. Whicheverrack is used, a cooling fan is mounted either above or below the controller. Thestand-alone control module implemented with a GE Fanuc PLC rack also requires aVDSK board.

x

Power Supply

VCMIH2 Communication Board withThree IONet Ports (VCMIH1 with OneIONet is for Simplex systems)

ControllerUCVX

Interface BoardVDSK

x x x

POWERSUPPLY

VME Rack

Cooling Fanbehind Panel

Fan 24 VdcPower

Figure 9-5. Typical Controller Mounted in Rack with Communication Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-11

VCMI - Bus Master ControllerThe bus master controller, known as the VCMI, is the communication interfacebetween the controller and the I/O boards, and the communication interface to thesystem control network, known as IONet. VCMI is also the VME bus master in thecontrol racks and I/O racks, and manages the IDs for all the boards in the rack andtheir associated terminal boards. In the case of TMR systems the three-networkversion (VCMIH2X) votes all incoming data from the I/O boards and passes theresults to the controller for processing. The two versions of VCMI boards are shownin Figure 9-6.

VCMI H2

x

CommunicationBoard - 3 IONets

x

SERIAL

VCMI H2

RUNFAILSTATUS

RESET

PARALLEL

8421

MODULE

TXRXCD

RST

TXRXCD

TXRXCD

IONet3 port10Base 2

IONet2 port10Base 2

IONet1 port10Base 2

VME Bus to I/OBoards and Controller

VCMI H1

x

CommunicationBoard - 1 IONet

x

SERIAL

RUNFAILSTATUS

RESET

PARALLEL

8421

MODULE

RST

TXRXCD

IONet port10Base 2

VCMI H1

VME Bus to I/OBoards and Controller

VCMI is OK

Error or Power up Failure

Pushbutton

IONet Node

Channel ID

Transmitting PacketsReceiving PacketsCollisions on IONet

Figure 9-6. VCMI Boards, Single Network and Triple Network Versions

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Figure 9-7 shows three Simplex system configurations with local and remote I/Ousing the VCMI. Multiple I/O racks can be connected to IONet, each rack with itsown VCMI board. To increase data throughput for applications requiring lowlatency, a second IONet port on the VCMI can be used as a parallel IONet as shownin the lower portion of the figure.

VCMI

UCVX

VCMI

UCVX

IONet

R

VCMI

UCVX

VCMI

IONet

R R1

VCMI

R1

VCMI

R2

IONet

Simplex System withLocal I/O

UCVX is ControllerVCMI is Bus MasterI/O are VME Boards

Simplex System withLocal & Remote I/O

Simplex System withMultiple IONets &Remote I/O

I/OBoards

I/OBoards

I/OBoards

I/OBoards

I/OBoards

Figure 9-7. Simplex System Configurations with Local and Remote I/O

Two sizes of TMR systems are shown in Figure 9-8. The first example is a smallsystem where all the I/O can be mounted in the VME control rack so no remote I/Oracks are required. Each channel (R, S, T) has its own IONet, and the VCMI hasthree IONet ports.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-13

The second example is a larger system employing remote I/O racks. Each IONetsupports multiple I/O racks, but only one rack is shown here. All I/O channels R, S,T, are identical in terms of I/O boards and points.

TMR System withLocal I/O

UCVX is ControllerVCMI is Bus MasterI/O are VME BoardsTermination Boardsnot shown

TMR System withRemote I/O,Termination Boardsnot shown

IONet SupportsMultiple RemoteI/O Racks

VCMI

R1

I/OBoards

VCMI

UCVX

VCMI

UCVX

VCMI

UCVX

IONet - RIONet - SIONet - T

R S T

VCMI

UCVX

VCMI

UCVX

VCMI

UCVX

IONet - RIONet - SIONet - T

R S T

VCMI

S1

I/OBoards

VCMI

T1

I/OBoards

I/OBoards

I/OBoards

I/OBoards

Figure 9-8. TMR System Configurations with Local and Remote I/O

FeaturesThe VCMI architecture is based on the 32-bit Texas Instruments TMS320C32 digitalsignal processor (DSP). The main hardware features are:• Interface to VME bus• Three 10Base-2 Ethernet ports• One RS-232C serial port• One parallel port• Power system monitoring• Board and cable ID reading• Processor watchdog timer

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9-14 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VME InterfaceThe VCMI is the VME system (slot 1) controller and the sole bus master in both thecontrol racks and the I/O racks. It inventories and initializes all the boards in its rack.

IONet - Communications InterfaceFast I/O communicationthrough the VCMI supportsrapid controller response

Communication between the control modules (control racks) and interface modules(I/O racks) is handled by the VCMIs. In the control module the VCMI operates asthe IONet master while in the interface module it operates as an IONet slave. VCMIestablishes the network ID, and displays the network ID, channel ID and status on itsfront panel.

Physically, IONet communication is 10Base-2 Ethernet using thin wire RG-58 coaxcable. The VCMI supports all three ports simultaneously.

The VCMI serves as the master frame counter for all nodes on the IONet. Executionframes are sequentially numbered and all nodes on IONet execute in the same frameThis ensures that selected data is transmitted and operated on correctly.

Input Data Collection - Simplex SystemsWhen used in an interface module, the VCMI collects input data from the I/O boardsand transmits it to the control module over IONet.

In the control module, as packets of input data are received from various racks on theIONet, the VCMI transfers them through the VME bus to the Mark VI controller forprocessing.

Input Data Collection and Voting - TMR SystemsFor a small TMR system, all the I/O may be handled in one (triplicated) module. Inthis case the VCMI transfers, over the VME bus, the input values from each of theI/O boards to the pre-vote table, and simultaneously transmits the data as an inputpacket on the IONet. When the input packets from the other two racks are received,they are also transferred to the pre-vote table. The input data is then voted and theresult is placed in a voted table and copied to the controller for processing. Analogdata (floating point) is voted by median select, while two-out-of-three votes logicaldata (bit values).

For a larger TMR system with remote I/O racks, the procedure is very similar exceptthat packets of input values may come into each master VCMI not only from I/Oboards in its own rack, but also from remote I/O racks in its channel through IONet.After all the input data for the channel is accumulated, it is placed in the pre-votetable and then sent to the other control modules over IONet. Once the input packetsfrom all three channels have been received by a master VCMI, volting occurs asdescribed above.

State Exchange and Voting - TMR SystemsA selected portion of the variables in a controller (for example, the internal statessuch as counter/timer values and sequence steps) must also be transferred across theIONet to be voted by the VCMIs and recopied to the controllers. This is known asthe state exchange. The synchronization of state variables ensures that no steps aregenerated in the outputs if one of the controllers fails, or is powered down and backup again.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-15

Output Data DistributionAfter application code execution, the VCMI reads the output values from thecontroller across the VME bus. All the output data from a control module VCMI isplaced in one packet. This packet is then broadcast on the IONet and received by allconnected interface and control modules. Each interface module VCMI extracts therequired information and distributes to its associated I/O boards.

Voter Disagreement DetectorThe master VCMIs generate diagnostics when local pre-volte data does not matchthe resulting voted data. The first pass through the pre-vote data determines thecontrol values to be used. On the second pass, the VCMI determines whether badvalues exist by comparing its set of local channel pre-vote values with the votedresult. If there is any disagreement then the local value has been outvoted andrepresents a bad value. For analog values, a dead band is defined to allow minorvariations in the pre-vote values without creating an alarm. For logic values, anydisagreement is considered bad. A time delay is required before generating an alarmto eliminate the problem of transients causing false alarms.

PerformanceThe Simplex frame rate can be as fast as 10 milliseconds allowing turbine control at100 Hz, while the TMR frame rate can be as fast as 20 ms for control at 50 Hz.

The control module is synchronized to the wall clock ensuring the sequence ofevents (SOE) times are within 1 ms of the actual event times.

Board IDs and AddressesEach terminal board has an ID chip for each cable connector that is read serially intothe I/O board. Each I/O board in the VME rack, plus the VCMI, also has its own IDchip which is read by the VCMI, so the VCMI can acquire the identity of all theboards and associated terminal boards in its rack. In addition, there is an eight-bitconfiguration switch on the backplane tied to slot 1 of the VME rack. This switchprovides the IONet address and R/S/T channel identity, and is read by the VCMI todetermine what channel it is on.

The VCMI in the control rack acquires packages of ID information from each I/Orack. These contain the catalog number, serial number, and revision of each board inthe module along with the slot number, and the identity of each terminal board withits slot P3/P4 location. This information is captured and stored in the controller.

Watchdog TimerThe watchdog timer protects against a processor stall condition. If a stall occurs thewatchdog times out after approximately 200 ms and resets the processor. It notifiesthe VME backplane that the processor has been reset, and shuts off IONetcommunication while stalled. The front panel reset button (if present) can be used toforce the timer to the stalled state from which it transitions to the operational state.On line testing of the watchdog function can be performed.

VCMI DiagnosticsThe internal 5V, 12V, 15V, and 28V power supply buses are monitored and alarmed.The alarm settings are configurable and usually set at 3.5%, except for the 28-Voltsupplies, which are set at 5.5%.

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9-16 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Diagnostic signals from the Power Distribution Module, connected through J301, arealso monitored. These include ground fault and over/under voltage on the P125Vbus, two differential ±5Vdc analog inputs, P28A and PCOM for external monitorcircuits, and digital inputs.

Descriptions of the VCMI diagnostics are in GEH-6421C, Vol. I Mark VI SystemGuide, Chapter 8, Troubleshooting and Diagnostics.

Specification

Table 9-4. VCMI Specification

Item Specification

Board Type 6U high VME board, 0.787 inch wide

Processor Texas Instruments TMS320C32 32-bit digital signal processor

Memory Dual-port memory, 32 Kbytes in 32 bit transfer configuration

SRAM, 64k x 32

Flash memory, 128k x 8

Communication H1 version: One IONet 10 Base-2 Ethernet Port, BNC connector, 10Mbits/sec

H2 version: Three IONet 10 Base-2 Ethernet Ports, BNC connectors, 10Mbits/sec

VME bus block transfers

1 RS-232C Serial Port, male "D" style connector, 9600, 19,200, or 38,400bits/sec

1 Parallel Port, eight bit bi-directional , EPP Version1.7 mode of IEEE1284-1994

Frame Rate 10 ms (100 Hz) for Simplex40 ms (25 Hz) for TMR

Configuration OverviewLike all I/O boards, the VCMI is configured using the Control System Toolbox. Thissoftware usually runs on a data-highway connected CIMPLICITY station orworkstation. Table 9-5 summarizes configuration choices and defaults. For detailsrefer to GEH-6403 Control System Toolbox for Configuring the Mark VI Controller.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-17

Table 9-5. VCMI Toolbox Configuration (Part 1 of 2)

Parameter Description Choices

Configuration

System Limits Enable or disable All System Limits Enable, disable

PS_Limit1 ± Power Supply Limits for P5, P15, N15 in % 0 to 10

PS_Limit2 ± Power Supply Limits for P12, N12, P28, N28 inpercent

0 to 10

PwrBusLimits Enable or disable Power Bus Diagnostics Enable, disable

125 vBusHlim High Limit for 125 Volt DC Bus in Volts 0 to 150

125 vBusLlim Low Limit for 125 Volt DC Bus in Volts 0 to 150

125 vBusGlim Low Volts to Ground Limit for 125 Volt DC bus(diagnostic)

0 to 150

J3 Power Monitor PDM Monitor Connected, Not conn.

Logic_In_1 First of 12 logical inputs � Card Point Signal Point Edit (Input BIT)

Logic_In Configurable Item Used, Unused

P125_Grd P125 with respect to Grd � Card Point Signal Point Edit (Input FLOAT)

Input Type Type of Analog Input Used, Unused

Low_Input Input Volts at Low Value −10 to +10

Low_Value Input Value in engineering units at Low MA −3.4082e+038 to3.4028e+038

High_Input Input Volts at High Value −10 to +10

High_Value Input Value in engineering units at High MA −3.4082e+038 to3.4028e+038

Input _Filter Bandwidth of input signal filter in Hz Unused, 0.75 Hz, 1.5 Hz,3 Hz,

TMR_DiffLimit Difference limit for Voted TMR inputs in % of high-low values

0 to 10

Sys Lim 1 Enabl Enable System Limit 1 Fault Check Enable, disable

Sys Lim 1 Latch Input fault latch Latch, unlatch

Sys Lim 1 Type Input fault type Greater than or equal

Less than or equal

Sys Lim 1 Input limit in Engineering Units -3.4082e+038 to3.4028e+038

Sys Lim 2 Same as above for Sys Lim 1 Same as for Sys Lim 1

N125 Gnd Same as for P125 Grd � Card Point Signal Same as for P125 Grd

Spare 01 Similar to P125 Grd � Card Point Signal Similar to P125 Grd

Spare 02 Similar to P125 Grd � Card Point Signal Similar to P125 Grd

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9-18 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Table 9-5. VCMI Toolbox Configuration (Part 2 of 2)

Parameter Description Choices

Card Point Signal Description - Point Edit (Enter Signal Connection) Direction Type

L3Diag_VCMI1 Card Diagnostic Input BIT

L3Diag_VCMI2 Card Diagnostic Input BIT

L3Diag_VCMI3 Card Diagnostic Input BIT

SysLimit1-1 P125_Grd (Input exceeds limit) Input BIT

SysLimit1-2 N125_Grd (Input exceeds limit) Input BIT

SysLimit1-3 Spare 01 (Input exceeds limit) Input BIT

SysLimit1-4 Spare 02 (Input exceeds limit) Input BIT

SysLimit1_125 P125 Bus Out of Limits (Input exceeds limit) Input BIT

SysLimit2-1 P125_Grd (Input exceeds limit) Input BIT

SysLimit2-2 N125_Grd (Input exceeds limit) Input BIT

SysLimit2-3 Spare 01 (Input exceeds limit) Input BIT

SysLimit2-4 Spare 02 (Input exceeds limit) Input BIT

SysLimit2_125 P125 Bus Out of Limits (Input exceeds limit) Input BIT

P125Bus Calc 125 V dc Bus Voltage(P125Grd - N125Grd) Input FLOAT

ResetSYS System Limit Reset (Special VCMI output to I/O bds) Output BIT

ResetDIA Diagnostic Reset (Special VCMI output to I/O bds) Output BIT

ResetSuicide Suicide Reset (Special VCMI output to I/O bds) Output BIT

MasterReset Master Reset L86MR (Special VCMI out to I/O bds) Output BIT

Logic_In_1 Battery Bus Fault Input BIT

Logic_In_2 AC1 Source Fault Input BIT

Logic_In_3 AC2 Source Fault Input BIT

Logic_In_4 Misc Contact Input BIT

Logic_In_5 Fuse 31, J19 Fault Input BIT

Logic_In_6 Fuse 32, J20 Fault Input BIT

Logic_In_7 Fuse 29, J17 Fault Input BIT

Logic_In_8 Spare 01 Input BIT

Logic_In_9 Spare 02 Input BIT

Logic_In_10 Spare 03 Input BIT

Logic_In_11 Spare 04 Input BIT

Logic_In_12 Spare 05 Input BIT

P125_Grd P125 with respect to Grd, P3 � 28 to 29 Input FLOAT

N125_Grd N125 with respect to Grd, negative number, P3 � 26 to27

Input FLOAT

Spare01 Analog spare 01, P3 � 07 to 08 Input FLOAT

Spare02 Analog spare 02, P3 � 05 to 06 Input FLOAT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-19

VDSK - Interface BoardThe VDSK interface board provides power subsystem monitoring to the VCMI.VDSK is mounted adjacent to the Mark VI controller in the standalone controllerrack as shown in Figure 9-9. It is not used in the other types of control racks.

Mark VIController

x x xVDSK

J4

J3

Cable to Power Sub-System

24 V dc Supply to CoolingFan below Rack

xxx VDSK Board

Figure 9-9. VDSK Board with Adjacent Controller

OperationVDSK supports three functions as follows:• Interconnects the PDM with the power subsystem monitoring functions of the

VCMI through the 96-pin P2 backplane connector and the 37-pin sub-miniatureD connector on the front panel. This connection is through a 64-pin ribbon cableconnected at the back of the VME backplane.

• Interconnects +12 V dc and �12 V dc from the 96-pin P1 backplane connector toa front panel mounted 2-pin connector to power the 4.3 watt 24 V dc VME rackmounted fan assembly. This is from the front panel J4 connector.

• Provides a board mounted 16-pin Ethernet ID connector, which interfaces to theVCMI board through the P2 backplane connector ribbon cable.

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9-20 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Board SummaryListed in Table 9-6 are all the I/O processor boards, the number of I/O per processorthat they support, and their associated standard terminal boards. Some standardterminal boards have Simplex and TMR versions (in addition to Simplex DIN-railmounted ones). Refer to the section, Simplex DIN-rail Mounted Terminal BoardSummary for Simplex DIN-rail mounted terminal board information.

Table 9-6. I/O Processor Boards and Standard Terminal Boards

I/O ProcessorBoard

I/O Signal Type Number of I/Oper Processor

Associated TerminalBoards

VAIC Analog Inputs, 0−1 ma, 4−20 mA, voltageAnalog Outputs, 4−20 mA, 0−200 mA

204

TBAITBAI

VAOC Analog Outputs, 4−20 mA 16 TBAO

VCCC Contact InputsSolenoid OutputsDry Contact Relay Outputs

481212

TBCI, TICITRLYTRLY

VCRC Contact InputsSolenoid OutputsDry Contact Relays Outputs

481212

TBCITRLYTRLY

VGEN Analog Inputs, 4−20 mAPotential Transformers, Gen (1) Bus (1)Current Transformers on GeneratorRelay Outputs (optional)

42312

TGENTGENTGENTRLY

VPRO Pulse rate inputsPotential Transformers, Gen (1), Bus (1)Thermocouple InputsAnalog Inputs, 4−20 mATrip Solenoid DriversTrip Interlock InputsEmergency-Stop Input (Hardwired)Economizing RelaysTrip Solenoid Drivers

Emergency-Stop Input (Hardwired)

Economizing Relays

323337133

1

3

TPROTPROTPROTPROTREG (through J3)TREG (through J3)TREG (through J3)TREG (through J3)TREG (2nd board

through J4)TREG (2nd board

through J4)TREG (2nd board

through J4)

VPYR Pyrometer Temperature Inputs (4/probe)KeyPhasor Shaft Position Inputs

22

TPYRTPYR

VRTD Resistance Temperature Device RTD 16 TRTD

VSVO Servo Outputs to Hydraulic Servo ValveLVDT Inputs from Valve PositionLVDT Excitation OutputsPulse Rate Inputs for Flow MonitoringPulse Rate Probe Excitation

412822

TSVOTSVOTSVOTSVOTSVO

VTCC Thermocouple Inputs 24 TBTC

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-21

Table 9-6. I/O Processor Boards and Standard Terminal Boards Continued

I/O ProcessorBoard

I/O Signal Type Number of I/Oper Processor

Associated TerminalBoards

VTURH1B Pulse Rate Magnetic Speed PickupsPotential Transformers, Generator and BusShaft Current and Voltage MonitorBreaker InterfaceFlame Detectors (Geiger Mueller)Trip Solenoid Drivers for ETDs

422183

TTURTTURTTURTTURTRPG (through J4)TRPG (through J4)

VTURH2B Same as Above, Plus 3 Trip Solenoid Drivers TRPG (2nd board through J4A)

VVIB Shaft Proximitor/Seismic Probes(Vib/Displ/Accel)Shaft Proximity Probes (Displacement)Shaft Proximity Reference (KeyPhasor)

16

82

TVIB

TVIBTVIB

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9-22 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Simplex DIN-Rail Mounted Terminal Board SummarySpeed control systems for small turbines require a simplified system architecture.Simplex control is used to reduce cost and save space. Compact DIN-rail mountedterminal boards are available instead of the larger T-type terminal boards used onTMR systems. IONet is not used since the D-type terminal boards cable directly intothe control chassis to interface with the I/O boards.

In the VME rack, a VCMI board provides two-way communication between thecontroller and the I/O processor boards. The controller Ethernet port is used tocommunicate with other system components, such as an operator interface or PLC.Additional PLC I/O can be tied into the system using the controller Genius port. Atypical system is illustrated in Figure 3-1. The system is powered by 24 V dc, anduses a low voltage version of the standard VME rack power supply.

The board designations and functions along with the corresponding I/O processorboards are listed in Table 9-7. In all cases, the signal conditioning on the DIN-typeterminal boards is the same as on the T-type boards, and the I/O specificationsdescribed apply. However, the number of inputs and outputs, and the groundingprovisions differ, and the boards do not support TMR. Permanently mounted high-density Euro Block terminal blocks are used to save space. The blocks haveterminals accepting wire sizes up to one #12 wire, or two #14 wires. The typical wiresize used is #18 AWG.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-23

x x x x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x x

VTUR

VTCC

VTUR

VAIC

VAIC

VSVO

VSVO

VRTD

VCRC

SPARE

UCVB

VCMI

Ethernet

Serial ModbusCommunication

COM2

To Sequencer& OperatorInterface Power

Supply

Fan

DTRTTransit-ion Bd.

DTURTurbineControl

DRLYRelayOutput

DTAIAnalogInputs

DTTCThermo-couples

DTCIContactInputs

DRLYRelay

Outputs

1 2 3 4 5 6 7 8 9 10 11 12 13

24 V dcpower

DRTDRTD

Inputs

DSVOServo

Outputs

DTURTurbineControl

DTTCThermo-couples

DTAIAnalogInputs

DTAIAnalogInputs

DTAIAnalogInputs

DTCIContactInputs

DRLYRelay

Outputs

DRTDRTD

Inputs

DSVOServo

Outputs

DSVOServo

Outputs

DSVOServo

Outputs

Figure 9-10. Small Simplex System Rack, Boards, and Cabling

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9-24 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Table 9-7. Simplex DIN-Rail Mounted Terminal Boards

DIN Euro SizeTerminal board

Number ofPoints

Description of I/O I/O ProcessorBoard

DTTC 12 Thermocouple temperature inputs with one coldjunction reference

VTCC

DRTD 8 RTD temperature inputs VRTD

DTAI 10

2

Analog current or voltage inputs with on-board 24 V dcpower supplyAnalog current outputs, with choice of 20 mA or 200 mA

VAIC

DTAO 8 Analog current outputs, 0−20 mA VAOC

DTCI 24 Contact Inputs with external 24 V dc excitation VCRC (or VCCC)

DRLY 12 Form-C relay outputs, dry contacts, customer powered VCRC (or VCCC)

DTRT -------- Transition board between VTUR and DRLY for solenoidtrip functions

VTUR

DTUR 4 Magnetic (passive) pulse rate pickups for speed andfuel flow measurement

VTUR

DSVO 2

6

2

Servovalve outputs with choice of coil currents from 10mA to 120 mALVDT valve position sensors with on-board excitationActive pulse rate probes for flow measurement, with 24V dc excitation provided

VSVO

DVIB 841

Shaft Proximitor/Seismic Probes (Vib/Displ/Accel)Shaft Proximity Probes (Displacement)Shaft Proximity Reference (KeyPhasor)

VVIB

GroundingDuring panel design, provisions for grounding the terminal board and wiring shieldsmust be made. These connections should be as short as possible. A metal groundingstrip can be firmly mounted to the panel on the right hand side of the terminal board.Shields and the SCOM connection can be conveniently made to this strip. Note thatonly the thermocouple board has screws for the shield wires.

The VME rack is grounded to the mounting panel by the metal-to-metal contactunder the mounting screws. No wiring to the ground terminal is required. Theindividual terminal boards are described in the following sections.

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VTCC/TBTCH1C (Simplex) - Thermocouple InputsThe thermocouple processor board VTCC accepts 24 type E, J, K, S (see note), or Tthermocouple inputs. These inputs are wired to two barrier type blocks on theterminal board TBTC. Cables with molded plugs connect the terminal board to theVME rack where the VTCC thermocouple board is located, as shown in Figure 9-11.Input data is transferred over the VME backplane from VTCC to the VCMI and thento the controller.

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J3

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TBTC, capacity for24 thermocouple inputs

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VMERack

Connectors onVME Rack

BarrierType TerminalBlocks can be unpluggedfrom board formaintenance

Shield BarGround

TBTC Terminal Board VTCC VME Board

TCInputs

TCInputs

Figure 9-11. Thermocouple Input Terminal Board, I/O Board, and Cabling

OperationThe 24 thermocouple inputs can be grounded or ungrounded. They can be located upto 300 meters (984 feet) from the turbine control cabinet with a maximum two-waycable resistance of 450 ohms. High frequency noise suppression and two coldjunction reference devices are mounted on TBTC as shown in Figure 9-12.

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Linearization for individual thermocouple types is performed in software by VTCC.A thermocouple, which is determined to be out of the hardware limits, is removedfrom the scanned inputs in order to prevent adverse affects on other input channels.If both cold junction devices are within the configurable limits, then the average ofthe two is used for cold junction compensation. If only one cold junction device iswithin the configurable limits, then that cold junction is used for compensation. Ifneither cold junction device is within the configurable limits, then a default value isused.

Note VTCC boards manufactured after approximately 07/01 (software versionVTCC-100100C and higher) have additional thermocouple and cold junction (CJ)features. The new design boards permit the use of S-type thermocouples, in additionto all previous types. They also provide for a remote CJ compensation feature forthermocouple inputs. This allows the user to select whether CJ compensation is donebased on a temperature reading at a remote location (Remote CJ Compensation) or atthe terminal board as explained above (Standard CJ Compensation). The calculationsare the same as previous VTCC boards, only the source of the CJ reading changes.

<R> or <S> or <T> Rack

Thermocouple Input Board VTCC

Terminal Board TBTC

JA1 J3

Connectors atbottom ofVME rack

Excitation

JB1 J4

(12) thermocouples

(12) thermocouples

Excit.

I/O CoreProcessor

TMS320C32VMEbus

NoiseSuppression

NoiseSuppression

Thermocouple

Thermocouple

Grounded orungrounded

High

Low

Low

High

LocalCold JunctionReference

LocalCold JunctionReference

ID

ID

A/D

Remote ColdJunctionReferences

Figure 9-12. Thermocouple Inputs and Processor Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-27

Features

Thermocouple LimitsThermocouple inputs are supported over a full-scale input range of �8.0 mV to +45.0mV. Table 9-8 shows typical input voltages for different thermocouple types versusminimum and maximum temperature range. It is assumed the cold junctiontemperature ranges from +32 to +158 °F.

Table 9-8. Thermocouple Types and Range

Thermocouple Type E J K S T

Low range, °F / °C −60 / −51 −60 / −51 −60 / −51 0 / −17.78 −60 / −51

mV at low range with referenceat 158 °F (70 °C)

−7.174 −6.132 −4.779 −0.524 −4.764

High range, °F / °C 1100 / 593 1400 / 798 2000 / 1093 3200 / 1760 750 / 399

mV at high range with referenceat 32 °F (0 °C)

44.547 42.922 44.856 18.612 20.801

Cold JunctionsThere are two cold junction (CJ) references used per VTCC, one for connector J3and J4. Each reference can be selected as either remote (from VME bus) or local(from associated terminal board, T type or D type). All references are then treated assensor inputs (for example, averaged, limits configured). The two references can bemixed, one local and one remote. CJ signals go into signal space and are availablefor monitoring. Normally the average of the two is used. Acceptable limits areconfigured, and if a CJ goes outside the limit, a logic signal is set. A 1 °F error in theCJ compensation will cause a 1°F error in the TC reading.

Hard coded limits are set at 32 to 158 °F, and if a CJ goes outside these, it isregarded as bad. Most CJ failures are open or short circuit. If one CJ fails, the goodone is used. If both CJs go bad, the backup value is used, which can be derived fromCJ readings on other terminal boards, or can be the configured default value.

DiagnosticsThree LEDs at the top of the front panel provide status information. The normalRUN condition is a flashing green, and FAIL is a solid red. The third LED shows asteady orange if a diagnostic alarm condition exists in the board.

Each thermocouple type has Hardware Limit Checking based on preset (non-configurable) high and low levels set near the ends of the operating range. If thislimit is exceeded a logic signal is set and the input is no longer scanned. If any one ofthe 24 inputs hardware limits is set it creates a composite diagnostic alarm,L3DIAG_VTCC, referring to the entire board. Details of the individual diagnosticsare available from the toolbox. The diagnostic signals can be individually latched,and then reset with the RESET_DIA signal.

Each thermocouple input has System Limit Checking based on configurable high andlow levels. These limits can be used to generate alarms, and can be configured forenable/disable, and as latching/nonlatching. RESET_SYS resets the out of limitsignals. In TMR, Systems Limit logic signals are voted and the resulting compositediagnostic is present in each controller.

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Each terminal board cable has its own ID device which is interrogated by the I/Oboard. The board ID is coded into a read-only chip containing the terminal boardserial number, board type, revision number, and the JA1/JB1 connector location.

The TMR version of this board has six ID devices, one for each cable connector.Details of the VTCC diagnostics are in GEH-6421C, Vol. I Mark VI System Guide,Chapter 8, Troubleshooting and Diagnostics.

CalibrationThe thermocouple inputs and cold junction inputs are automatically calibrated usingthe filtered calibration reference and zero voltages.

Specification

Table 9-9. Typical VTCC Specification

Item Specification

Number of Channels 24 channels per terminal board and I/O board

Thermocouple types E, J, K, S, T thermocouples, and mV inputs

Span -8 mV to +45 mV

A/D Converter Sampling type 16-bit A/D converter with better than 14-bitresolution

Cold junction compensation Reference junction temperature measured at two locationson each TC terminal board (optional for remove CJs).TMR board has six cold junction references.

Cold junction temperatureaccuracy

Cold junction accuracy 2 °F

Conformity error Maximum software error 0.25 °F

Measurement accuracy 53 microvolts (excluding cold junction reading)Example: 3 °F, type K, at 1000 °F, including cold junction

contribution (RSS)

Common mode rejection AC common mode rejection 110 dB @ 50/60 Hz, forbalanced impedance input

Common mode voltage +/- 5 Volts

Normal mode rejection Rejection of 250 mV Rms is 80 dB @ 50/60 Hz

Scan time All inputs are sampled at 120 times per second for 60 Hzoperation; for 50 Hz operation it is 100 times per second

Fault detection High/low (hardware) limit checkHigh/low system (software) limit checkMonitor readings from all TCs, CJs, calibration voltages, andcalibration zero readings

Configuration OverviewLike all I/O boards, the thermocouple board is configured using the Control SystemToolbox. Table 9-10 summarizes configuration choices and defaults. For details referto GEH-6403, Control System Toolbox for Configuring the Mark VI Controller.

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Table 9-10. Thermocouple Board Configuration (Part 1 of 2)

Parameter Description Choices

Configuration

SysFreq System Frequency (used for noise rejection) 50 or 60 Hz

SystemLimits Enables or Disables All System Limit Checking Enable, Disable

Auto Reset Automatic Restoring of Thermocouples removed from scan Enable, Disable

J3J4:I200TBTCH1A Terminal Board Connected, Not Connected

ThermCpl1 First of 24 thermocouples - Card Point Signal Point Edit (Input FLOAT)

ThermoCpl Type Thermocouples supported by VTCC; unused inputs areremoved from scanning, mV inputs are primarily formaintenance.

Unused, mV, S, T, K, J, E

LowPassFiltr Enable 2 Hz low pass filter Enable, Disable

SysLim1 Enabl Enables or disables a temperature limit which can be usedto create an alarm.

Enable, Disable

SysLim1 Latch Determines whether the limit condition will latch or unlatch;reset used to unlatch.

Latch, Unlatch

SysLim1 Type Limit occurs when the temperature is greater than or equal(>=), or less than or equal to (<=) a preset value.

Greater Than or Equal, LessThan or Equal

SysLimit 1 Enter the desired value. Engineering Units

SysLim2 Enabled Enables or disables a temperature limit which can be usedto create an alarm.

Enable, Disable

SysLim2 Latch Determines whether the limit condition will latch or unlatch;reset used to unlatch.

Latch, Unlatch

SysLim2 Type Limit occurs when the temperature is greater than or equal(>=), or less than or equal to (<=) a preset value.

Greater Than or Equal, LessThan or Equal

SysLimit 2 Enter the desired value. Engineering Units

TMR Diff Limt Limit condition occurs if 3 temperatures in R, S, T differ bymore than a preset value (deg F); this creates a votingalarm condition.

−60 to 2,000

ColdJunc1 First Cold Junction Reference - Card Point Signal (similarconfiguration as for thermocouples but no low pass filter orCJ type choices of local or remote).

As above (Input FLOAT)

ColdJunc2 Second Cold Junction Reference - Card Point Signal(similar configuration as for thermocouples but no low passfilter or CJ type choices of local or remote).

As above (Input FLOAT)

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Table 9-10. Thermocouple Board Configuration (Part 2 of 2)

Card Points (Signals) Description - Point Edit (Enter Signal Connection Name) Direction Type

L3DIAG_VTCC1 Card Diagnostic Input BIT

L3DIAG_VTCC2 Card Diagnostic Input BIT

L3DIAG_VTCC3 Card Diagnostic Input BIT

SysLim1TC1 System Limit 1 for Thermocouple Input BIT

: : Input BIT

SysLim1TC24 System Limit 1 for Thermocouple Input BIT

SysLim1CJ1 System Limit 1 for Cold Junction Input BIT

SysLim1JC2 System Limit 1 for Cold Junction Input BIT

SysLim2TC1 System Limit 2 for Thermocouple Input BIT

: : Input BIT

SysLim2TC24 System Limit 2 for Thermocouple Input BIT

SysLim2CJ1 System Limit 2 for Cold Junction Input BIT

SysLim2CJ2 System Limit 2 for Cold Junction Input BIT

CJ Backup Cold Junction Backup Output FLOAT

CJ Remote 1 Cold Junction Remote 1 Output FLOAT

CJ Remote 2 Cold Junction Remote 2 Output FLOAT

ThermCpl1 Thermocouple reading Input FLOAT

: : Input FLOAT

ThermCpl24 Thermocouple reading Input FLOAT

ColdJunc1 Cold Junction for TC's 1−12 Input FLOAT

ColdJunc2 Cold Junction for TC's 13−24 Input FLOAT

InstallationThermocouples are wired directly to two I/O terminal blocks. These blocks aremounted on the terminal board and held down with two screws as shown in Figure 9-13. Each block has 24 terminals accepting up to #12 AWG wires. A shieldtermination strip attached to chassis ground is located immediately to the left of eachterminal block.

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Input 1 (+)Input 2 (+)Input 3 (+)Input 4 (+)Input 5 (+)Input 6 (+)Input 7 (+)Input 8 (+)Input 9 (+)Input 10(+)Input 11(+)Input 12(+)

Input 1 (-)Input 2 (-)Input 3 (-)Input 4 (-)Input 5 (-)Input 6 (-)

Input 8 (-)Input 9 (-)Input 10(-)Input 11(-)Input 12(-)

Input 7 (-)

I/O Terminal Blocks with Barrier Terminals

Up to two #12 AWG wires per point with300 volt insulation

Terminal Blocks can be unplugged fromterminal board for maintenance

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Thermocouple Terminal Board TBTCH1C

Cable to J3on I/O Rack

JA1

JB1

Input 13(+)Input 14(+)Input 15(+)Input 16(+)Input 17(+)Input 18(+)Input 19(+)Input 20(+)Input 21(+)Input 22(+)Input 23(+)Input 24(+)

Input 13(-)Input 14(-)Input 15(-)

Input 17(-)Input 16(-)

Input 18(-)Input 19(-)Input 20(-)Input 21(-)

Input 23(-)Input 22(-)

Input 24(-)Cable to J4on I/O Rack

TMR version of this board hasconnectors JRA, JSA, and JTA forinputs 1-12, andconnectors JRB, JSB, and JTB forinputs 13-24.

Figure 9-13. TBTC Wiring and Cabling

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9-32 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VTCC/TBTCH1B (TMR) - Thermocouple InputsTBTCH1B provides redundant thermocouple inputs by fanning the inputs out toVTCC boards in the R, S, and T racks, refer to Figure 9-14. The inputs have thesame environmental, codes, resolution, suppression, and function requirements aswith the TBTC terminal board.

<R> RackTerminal Board TBTCH1B

Thermocouple Input Board VTCC

Excit.

Excitation.

(12) thermocouples

Thermocouple

Grounded orungrounded

HighLow

J3

(12) thermocouples

Thermocouple

Grounded orungrounded

HighLow

J4

LocalCold JunctionReference

JRAID

JSAID

JTAID

JRBID

JSBID

JTBID

To<S>

To<T>

To<T>

To<S>

I/O CoreProcessor

TMS320C32

VMEbus

A/D

Analog-DigitalConverter

Processor

NoiseSuppression

NS

NS

Remote ColdJunctionReferences

LocalCold JunctionReference

Figure 9-14. Redundant Thermocouple Inputs (TMR)

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-33

InstallationThermocouples are wired directly to two I/O terminal blocks. These blocks aremounted on the terminal board and held down with two screws as shown in Figure 9-15. Each block has 24 terminals accepting up to #12 AWG wires. A shieldtermination strip attached to chassis ground is located immediately to the left of eachterminal block. Two cables connect to J3 and J4 on each of the R, S, and T racks.Thermocouples 1−12 connect to the JRA, JSA, and JTA connectors; thermocouples13−24 connect to JRB, JSB, and JTB.

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Input 1 (+)Input 2 (+)Input 3 (+)Input 4 (+)Input 5 (+)Input 6 (+)Input 7 (+)Input 8 (+)Input 9 (+)Input 10(+)Input 11(+)Input 12(+)

Input 1 (-)Input 2 (-)Input 3 (-)Input 4 (-)Input 5 (-)Input 6 (-)

Input 8 (-)Input 9 (-)Input 10(-)Input 11(-)Input 12(-)

Input 7 (-)

I/O Terminal Blocks with Barrier Terminals

Up to two #12 AWG wires per point with300 volt insulation

Terminal Blocks can be unplugged fromterminal board for maintenance

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Thermocouple Terminal Board TBTCH1B

Cable to J4on I/O Rack S

Input 13(+)Input 14(+)Input 15(+)Input 16(+)Input 17(+)Input 18(+)Input 19(+)Input 20(+)Input 21(+)Input 22(+)Input 23(+)Input 24(+)

Input 13(-)Input 14(-)Input 15(-)

Input 17(-)Input 16(-)

Input 18(-)Input 19(-)Input 20(-)Input 21(-)

Input 23(-)Input 22(-)

Input 24(-)Cable to J4on I/O Rack R

JSB

JRB

JTB

JSA

JRA

JTA

Cable to J4on I/O Rack T

Cable to J3on I/O Rack R

To J3Rack T

To J3Rack S

Figure 9-15. TBTCH1B Wiring and Cabling (TMR)

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DTTC - Simplex DIN-rail Mounted ThermocoupleTerminal Board

The DTCC board is a compact terminal board, designed for DIN-rail mounting. Theboard has 12 thermocouple inputs and connects to the VTCC thermocoupleprocessor board with a single 37-pin cable. This cable is identical to the one used onthe larger TBCC terminal board. The on-board signal conditioning and cold junctionreference are identical to those on the TBTC board.

An on-board ID chipidentifies the board to theVTCC for system diagnosticpurposes.

Two DTTC boards can be connected to the VTCC for a total of 24 inputs, as shownin Figure 9-16. Only the Simplex version of the board is available. The terminalboards can be stacked vertically on the DIN-rail to conserve cabinet space. Highdensity Euro Block type terminal blocks are permanently mounted to the board withtwo screw connections for the ground connection (SCOM). Every third screwconnection is for the shield.

JA1 J3

<R> Control Rack

Thermocouple Input Board VTCC

Connectors atbottom ofVME rack

Excitation

Excit.

Sampling TypeA/D Converter

I/O CoreProcessor

TMS320C32

VMEbusJ4

24 Thermocouples

DTTC Terminal Board

(12) thermocouples

Thermocouple

Grounded orungrounded

Pos

Neg

LocalCold JunctionReference (1)

SCOM

Shld

Connector for cablefrom second DTTCterminal board

ID

1

2

3

Noise Suppression

ProcessorA/D

Remote ColdJunctionReferences

Figure 9-16. DTTC Terminal board for Thermocouple Inputs

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DTTC Board InstallationShield screws are provided onthis board, internallyconnected to SCOM.

The DTTC board slides into a plastic holder, which mounts on the DIN-rail.Thermocouples are wired directly to the terminal block as shown in Figure 9-17. TheEuro Block type terminal block has 42 terminals and is permanently mounted on theterminal board. Typically #18 AWG wires are used. There are two screws for theSCOM (ground) connection, which should be as short a distance as possible.

Input 5 Shld

JA137-pin "D" shellconnector with latchingfasteners

DIN Thermocouple Terminal Board DTTC

Input 1 (+)Input 1 Shld

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Input 6 (+)Input 7 (+)Input 7 ShldInput 8 (+)Input 9 (+)Input 9 ShldInput 10 (+)Input 11 (+)Input 11 ShldInput 12 (+)

Chassis Ground

Input 1 (-)Input 2 ShldInput 2 (-)Input 3 (-)Input 4 ShldInput 4 (-)Input 5 (-)Input 6 ShldInput 6 (-)Input 7 (-)Input 8 ShldInput 8 (-)Input 9 (-)Input 10 ShldInput 10 (-)Input 11 (-)Input 12 ShldInput 12 (-)

Cable to J3connector in I/Orack for the VTCCboard

Screw Connections

DIN-rail mounting

Euro Block typeterminal block

Plastic mountingholder

SCOM

Chassis Ground

Screw Connections

Figure 9-17. DTTC Wiring and Cabling

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VRTD/TRTDH1C (Simplex) - RTD InputsThe RTD (Resistance Temperature Device) processor board (VRTD) accepts 16,three-wire RTD inputs. These inputs are wired to two barrier type blocks on the RTDterminal board (TRTD). Inputs to TRTD have noise suppression circuitry to protectagainst surge and high frequency noise. Cables with molded fittings connect theterminal board to the VME rack where the VRTD processor board is located.

VRTD converts the inputs to digital temperature values and transfers them over theVME backplane to the VCMI, and then to the controller.

There are two versions of TRTD, the type shown in Figure 9-18, and a TMR versionthat fans out the signals to three VRTD boards,

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J3

J4

VME Bus to VCMI

TRTD capacity for16 RTD inputs

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VMEI/O Rack

Connectors onVME I/O Rack

BarrierType TerminalBlocks can be unpluggedfrom board formaintenance

ShieldBar

TRTD Terminal Board VRTD VME Board

8 RTDInputs

8 RTDInputs

JA1

JB1

Figure 9-18. RTD Input Terminal Board, I/O Board, and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-37

OperationThe terminal board supplies a 10 mA dc multiplexed (not continuous) excitationcurrent to each RTD, which can be grounded or ungrounded. The 16 RTDs can belocated up to 300 meters (984 feet) from the turbine control cabinet with a maximumtwo-way cable resistance of 15 ohms. The RTD inputs and signal processing areshown in Figure 9-19.

The VCO type A/D converter in the VRTD board uses voltage to frequencyconverters and sampling counters. The converter samples each signal and theexcitation current four times per second for normal mode scanning, and 25 times persecond for fast mode scanning, using a time sample interval related to the powersystem frequency. Linearization for the selection of 15 RTD types is performed insoftware by the digital signal processor.

RTD open and short circuits are detected by out of range values. An RTD that isdetermined to be out of hardware limits is removed from the scanned inputs in orderto prevent adverse affects on other input channels. Repaired channels are reinstatedautomatically in 20 seconds, or can be manually reinstated.

<R> or <S> or <T> I/O Rack

RTD Input Board VRTDTerminationBoard TRTD

JA1

Connectorsat

bottom ofVME rack

Excit.

RTD

(8) RTDsGrounded orungrounded

Excitation

Signal

Return

JB1

RTD

(8) RTDsGrounded orungrounded

Excitation

Signal

Return

Excit.

VCO Type A/DConverter

I/O CoreProcessor

TMS320C32

VMEbus

J3

J4

VME Bus

NoiseSuppression

NoiseSuppression

ID

IDProcessorA/D

NS

NS

Figure 9-19. RTD Inputs and Signal Processing

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Features

RTD LimitsRTD inputs are supported over a full-scale input range of 0.3532 to 4.054 volts.Table 9-11 shows the types of RTDs used and the temperature ranges.

Table 9-11. RTD Types and Ranges

RTD Type Name/Standard Range degree C Range degree F

10 ohm copper MINCO_CAGE 10 Ohm Copper

−51 to +260 −60 to +500

100 ohm platinum SAMA 100 −51 to +593 −60 to +1100

100 ohm platinum DIN 43760IEC-751MINCO_PDMINCO_PEPT100_DIN

−51 to +700 −60 to +1292

100 ohm platinum MINCO_PAIPTS-68PT100_PURE

−51 to +700 −60 to +1292

100 ohm platinum MINCO_PBRosemount 104PT100_USIND

−51 to +700 −60 to +1292

120 ohm nickel MINCO_NAN 120

−51 to +249 −60 to +480

200 ohm platinum PT 200 −51 to +204 −60 to +400

CalibrationRTD inputs are automatically calibrated using the filtered calibration source and nullvoltages.

Front panelThree LEDs at the top of the VRTD front panel provide status information. Thenormal RUN condition is a flashing green and FAIL is a solid red. The third LED isnormally off but shows a steady orange if a diagnostic alarm condition exists in theboard.

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Specification

Table 9-12. VRTD Specification

Item Specification

Number of Channels 16 channels per terminal board16 channels per VRTD board

RTD Types 10, 100, and 200 ohm platinum10 ohm copper120 ohm nickel

Span 0.3532 to 4.054 volts

A/D Converter Resolution 14-bit resolution

Scan Time Normal scan 250 ms (4 Hz)Fast scan 40 ms (25 Hz)

Power Consumption Less than 12 watts

Measurement Accuracy See Table 3-11

Common Mode Rejection Ac common mode rejection 60 dB @ 50/60 HzDc common mode rejection 80 dB

Common Mode Voltage Range ± 5 Volts

Normal Mode Rejection Rejection of up to 250 mV rms is 60 dB @ 50/60 Hzsystem frequency for normal scan

Maximum Lead Resistance 15 ohms maximum two way cable resistance

Fault Detection High/low (hardware) limit checkHigh/low (software) system limit check

Table 9-13. RTD Accuracy

RTD Type Group Gain Accuracy at 400 °F

120 ohm Nickel Normal_ 1.0 2 °F

200 ohm Platinum Normal_ 1.0 2 °F

100 ohm Platinum Normal_ 1.0 4 °F

100 ohm Platinum(−60 °F to 400 °F)

Gain_ 2.0 2 °F

10 ohm Copper 10 ohm Cu_10 10 °F

Configuration OverviewLike all I/O boards, the RTD board is configured using the Control System Toolbox.This software usually runs on a data-highway connected CIMPLICITY station orworkstation. Table 9-14 summarizes configuration choices and defaults. For detailsrefer to GEH-6403, Control System Toolbox for Configuring the Mark VI TurbineController.

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Table 9-14. Typical VRTD Configuration

Module Parameter Description Choices

Configuration

System Limits Enable or disable all system limit checking Enable, Disable

Auto Reset Enable or disable restoring of RTDs removed fromscan

Enable, Disable

Group A Rate Sampling rate and system frequency filter for firstgroup of 8 inputs

4 Hz, 50 Hz filter4 Hz, 60 Hz filter25 Hz

Group A Gain Gain 2.0 is for higher accuracy if ohms <190, firstgroup of 8 inputs

Normal_1.0Gain_2.010 ohm Cu_10.0

Group B Rate Sampling rate and system frequency filter for secondgroup of 8 inputs

4 Hz, 50 Hz filter4 Hz, 60 Hz filter25 Hz

Group B Gain Gain 2.0 is for higher accuracy if ohms <190,second group of 8 inputs

Normal_1.0Gain_2.010 ohm Cu_10.0

J3J4:IS200TRTDH1C Terminal Board Connnected, Not Connected

RTD1 First of 16 RTDs - Card Point Signal Point Edit (Input FLOAT)

RTD Type RTDs linearizations supported by VRTD; select RTDor Ohms Input (unused inputs are removed fromscanning)

UnusedCU10 MINCO_CAPT100_DIN MINCO_PDPT100_PURE MINCO_PAPT100_USIND MINCO_PBN120 MINCO_NAMINCO_PIA PT100_SAMAPT200 MINCO_PKOhms

SysLim1 Enable Enables or disables a temperature limit for eachRTD, can be used to create an alarm

Enable, Disable

SysLim1 Latch Determines whether the limit condition will latch orunlatch for each RTD; reset used to unlatch.

Latch, Unlatch

SysLim1 Type Limit occurs when the temperature is greater than orequal (>=), or less than or equal to (<=) a presetvalue.

Greater Than or EqualLess Than or Equal

System Limit 1 Enter the desired value of the limit temperature, DegF or Ohms

−60 to 1,300

SysLim2 Enable Enables or disables a temperature limit which can beused to create an alarm

Enable, Disable

SysLim2 Latch Determines whether the limit condition will latch orunlatch; reset used to unlatch.

Latch, Unlatch

SysLim2 Type Limit occurs when the temperature is greater than orequal (>=), or less than or equal to (<=) a presetvalue.

Greater Than or EqualLess Than or Equal

System Limit 2 Enter the desired value of the limit temperature, DegF or Ohms

−60 to 1,300

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-41

TMR Diff Limt Limit condition occurs if 3 temperatures in R,S,Tdiffer by more than a preset value; this creates avoting alarm condition.

−60 to 1,300

Card Point Signals Description-Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VRTD1 Card Diagnostic Input BIT

L3DIAG_VRTD2 Card Diagnostic Input BIT

L3DIAG_VRTD3 Card Diagnostic Input BIT

SysLim1RTD1 System Limit 1 Input BIT

: : Input BIT

SysLim1RTD16 System Limit 1 Input BIT

SysLim2RTD1 System Limit 2 Input BIT

: : Input BIT

SysLim2RTD16 System Limit 2 Input BIT

DiagnosticsTwo types of diagnostic checking are applied to all inputs, Hardware Limit Checkingand System Limit Checking.

Each RTD type has Hardware Limit Checking based on preset (non-configurable)high and low levels set near the ends of the operating range. If this limit is exceededa logic signal is set and the input is no longer scanned. If any one of the 16 input�shardware limits is set it creates a composite diagnostic alarm, L3DIAG_VRTD,referring to the entire board. Details of the individual diagnostics are available fromthe toolbox. The diagnostic signals can be individually latched, and then reset withthe RESET_DIA signal.

Each RTD input has System Limit Checking based on configurable high and lowlevels. These limits can be used to generate alarms, and can be configured forenable/disable, and as latching/nonlatching. RESET_SYS resets the out of limitsignals. In TMR systems limit logic signals are voted and the resulting compositediagnostic is present in each controller.

Each connector has its own ID device, which is interrogated by the I/O board. Theboard ID is coded into a read-only chip containing the terminal board serial number,board type, revision number, and the JA1/JB1 connector location. The TMR boardversion has six ID chips, one for each connector.

Descriptions of the VRTD diagnostics are in GEH-6421C, Vol. I Mark VI SystemGuide, Chapter 8, Troubleshooting and Diagnostics.

InstallationThe sixteen RTDs are wired directly to two I/O terminal blocks mounted on theterminal board. Each block is held down with two screws and has 24 terminalsaccepting up to #12 AWG wires, as shown in Figure 9-20. A shield termination stripattached to chassis ground is located immediately to the left of each terminal block.For grounded RTD operation, see application note in Figure 9-20.

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Input 1 (Exc)Input 1 (Ret)Input 2 (Sig)Input 3 (Exc)Input 3 (Ret)Input 4 (Sig)Input 5 (Exc)Input 5 (Ret)Input 6 (Sig)Input 7 (Exc)Input 7 (Ret)Input 8 (Sig)

Input 1 (Sig)Input 2 (Exc)Input 2 (Ret)Input 3 (Sig)Input 4 (Exc)Input 4 (Ret)

Input 6 (Exc)Input 6 (Ret)Input 7 (Sig)Input 8 (Exc)Input 8 (Ret)

Input 5 (Sig)

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Input 9 (Exc)Input 9 (Ret)Input 10 (Sig)Input 11 (Exc)Input 11 (Ret)Input 12 (Sig)Input 13 (Exc)Input 13 (Ret)Input 14 (Sig)Input 15 (Exc)Input 15 (Ret)Input 16 (Sig)

Input 9 (Sig)Input 10 (Exc)Input 10 (Ret)Input 11 (Sig)Input 12 (Exc)Input 12 (Ret)

Input 14 (Exc)Input 14 (Ret)Input 15 (Sig)Input 16 (Exc)Input 16 (Ret)

Input 13 (Sig)

JA1

JB1

Cable to J3on I/O Rack

Cable to J4on I/O Rack

RTD Terminal Board TRTDH1C

First 8 TCs to JA1

Second 8 TCs to JB1

Screw ConnectionsScrew Connections

RTDApplication Note:- Optional Ground: connnect the "B" wire to ground;- RTD Group wiring, that is sharing the "B" wire; tie the "B" wires together at the RTDs, tie the "Sigxx" signals together at the TRTD terminationbboard, and interconnect with one wire.

A

BC

Excxx

Sigxx

Retxx

Figure 9-20. RTD Terminal Board Wiring

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-43

VRTD/TRTDH1B (TMR) - RTD InputsTRTDH1B provides redundant RTD inputs by fanning the inputs out to VRTDboards in the R, S, and T racks, refer to Figure 9-21. The inputs meet the sameenvironmental, codes, resolution, suppression, and function requirements as with theTRTD terminal board, however, the fast scan is not available.

All RTD signals have high frequency decoupling to ground at signal entry. RTDmultiplexing on the VRTD boards is coordinated by redundant pacemakers so thatthe loss of a single cable or loss of a single VRTD does not cause the loss of anyRTD signals in the control database. VRTD boards in R, S, and T read RTDssimultaneously, but skewed by two RTDs, so that when R is reading RTD3, S isreading RTD5, and T is reading RTD7, and so on. This ensures that the same RTD isnot excited by two VRTDs simultaneously, and hence produce bad readings.

Terminal Board TRTDH1B

RTD

(8) RTDs to JRA, JSA, JTA

Grounded orungrounded

Excitation

Signal

Return

NoiseSuppression

JRAID

JSAID

JTAID

JRBID

JSBID

JTBID

RTD

(8) RTDs to JRB, JSB, JTBGrounded orungrounded

Excitation

Signal

Return

NoiseSuppression

PM, TxPM, Rx, S

PM, TxPM, Rx, R

PM, TxPM, Rx, R

PM, TxPM, Rx, T

PM, TxPM, Rx, T

PM, TxPM, Rx, S

SignalsPM= PacemakerTx = VRTD TransmitRx = VRTD Receive

NS

NS

Figure 9-21. Redundant RTD Inputs (TMR)

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TRTDH1B can be configured for TMR or Simplex operation. When configured forSimplex operation, the pacemaker is ignored. When configured for TMR operationonly the slow (4 Hz) scan rate is allowed.

InstallationThe sixteen RTDs are wired directly to two I/O terminal blocks mounted on theterminal board. Each block is held down with two screws and has 24 terminalsaccepting up to #12 AWG wires, as shown in Figure 9-22. A shield termination stripattached to chassis ground is located immediately to the left of each terminal block.For grounded RTD wiring, refer to the Application Note in Figure 9-20.

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Input 1 (Exc)Input 1 (Ret)Input 2 (Sig)Input 3 (Exc)Input 3 (Ret)Input 4 (Sig)Input 5 (Exc)Input 5 (Ret)Input 6 (Sig)Input 7 (Exc)Input 7 (Ret)Input 8 (Sig)

Input 1 (Sig)Input 2 (Exc)Input 2 (Ret)Input 3 (Sig)Input 4 (Exc)Input 4 (Ret)

Input 6 (Exc)Input 6 (Ret)Input 7 (Sig)Input 8 (Exc)Input 8 (Ret)

Input 5 (Sig)

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Input 9 (Exc)Input 9 (Ret)Input 10 (Sig)Input 11 (Exc)Input 11 (Ret)Input 12 (Sig)Input 13 (Exc)Input 13 (Ret)Input 14 (Sig)Input 15 (Exc)Input 15 (Ret)Input 16 (Sig)

Input 9 (Sig)Input 10 (Exc)Input 10 (Ret)Input 11 (Sig)Input 12 (Exc)Input 12 (Ret)

Input 14 (Exc)Input 14 (Ret)Input 15 (Sig)Input 16 (Exc)Input 16 (Ret)

Input 13 (Sig)

RTD Terminal Board TRTDH1B

Cable to J4on I/O Rack S

Cable to J4on I/O Rack R

JSB

JRB

JTB

JSA

JRA

JTA

Cable to J4on I/O Rack T

Cable to J3on I/O Rack R

To J3Rack T

To J3Rack S

8 circuits toJRA,JSA,JTA

8 circuits toJRB,JSB,JTB

Figure 9-22. RTDH1B Terminal Board Wiring

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-45

DRTD - Simplex DIN-rail Mounted RTD Terminal BoardThe DRTD board is a compact RTD terminal board, designed for DIN-rail mounting.The board has eight RTD inputs and connects to the VRTD processor board with asingle 37-pin cable, as shown in Figure 9-23. This cable is identical to those used onthe larger TRTD terminal board. The terminal boards can be stacked vertically on theDIN-rail to conserve cabinet space. Two DRTD boards can be connected to theVRTD for a total of 16 temperature inputs. Only a Simplex version of the board isavailable.

The on-board noise suppression is similar to that on the TRTD. High density EuroBlock type terminal blocks are permanently mounted to the board, with two screwconnections for the ground connection (SCOM). An on-board ID chip identifies theboard to the VRTD for system diagnostic purposes.

<R> Control Rack

RTD Input Board VRTDDRTD Board

JA1

Connectors atbottom ofVME rack

Excit.

A/D

RTD

(8) RTDs

Grounded orungrounded

Excitation

Signal

Return

Excit.

VCO Type A/DConverter

I/O CoreProcessor

TMS320C32

J3

J4

VME Bus

Connector forcable from secondDRTD board

ID

16 RTD Inputs

SCOM

1

2

3

A

BC

NoiseSuppression

Processor

Figure 9-23. DRTD Board

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9-46 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThere is no shield terminationstrip with this design.

The DRTD board slides into a plastic holder, which mounts on the DIN-rail. Theeight RTDs are wired directly to the terminal block as shown in Figure 9-24. TheEuro Block type terminal block has 36 terminals and is permanently mounted on theterminal board. Typically #18 AWG wires (shielded twisted triplet) are used.Terminals 25 through 34 are spares. There are two screws for the SCOM (ground)connection, which should be as short a distance as possible. For wiring groundedRTDs, see the section, Installation for the TRTD board.

Input 5 (Return)

JA137-pin "D" shellconnector with latchingfasteners

Input 1 (Excitation)Input 1 (Return)

135

11

79

1314 1517192123252729313335

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1618202224262830

36

3234

Input 2 (Signal)Input 3 (Excitation)Input 3 (Return)Input 4 (Signal)Input 5 (Excitation)

Input 6 (Signal)Input 7 (Excitation)Input 7 (ReturnInput 8 (Signal)

Chassis Ground

Input 1 (Signal)Input 2 (Excitation)Input 2 (Return)Input 3 (Signal)Input 4 (Excitation)Input 4 (Return)Input 5 (Signal)Input 6 (Excitation)Input 6 (Return)Input 7 (Signal)Input 8 (Excitation)Input 8 (Return)

SCOM

Cable to J3 or J4connector in I/O rackfor VRTD board

Screw Connections

Euro Block typeterminal block

Plastic mountingholder

DRTD

DIN-rail mounting

Chassis Ground

Figure 9-24. DRTD Board Wiring and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-47

VAIC/TBAI - Analog InputsThe Analog Input Board (VAIC) accepts 20 analog inputs and controls four analogoutputs. Ten inputs and two outputs are wired to each Analog Input Terminal board(TBAI). Inputs and outputs have noise suppression circuitry to protect against surgeand high frequency noise. Cables connect the terminal board to the VME rack wherethe VAIC processor board is located, as shown in Figure 9-25.

The VAIC converts the inputs to digital values and transfers these over the VMEbackplane to the VCMI, and then to the controller.

Input signals are fanned out to three VME board racks R, S, and T for TMRapplications. The VAIC requires two terminal boards to monitor 20 inputs.

VME Bus to VCMI

TBAI Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VMERack R

Connectors onVME Rack

BarrierType TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

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JS1

JR1

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x

JS1

JR1

JT1JT1

Cable to VMERack S

Cable to VMERack T

ToRack

T

ToRack

S

x

x

RUNFAILSTAT

VAIC

J3

J4

TBAI Terminal Board VAIC VME Board

Figure 9-25. Analog Input Terminal boards, I/O Board, and Cabling (TMR System)

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9-48 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Operation24 V dc power is available on the terminal board for all the transducers, and there isa choice of current or voltage inputs using jumpers. One of the two analog outputcircuits is 4 − 20 mA, and the other can be jumper configured for 4 − 20 mA or0 − 200 mA. The same terminal board can be used for TMR applications.

The VAIC board accepts 20 analog inputs, controls four analog outputs, and containssignal conditioning, an analog MUX, A/D converter, and D/A converter, as shown inFigure 9-26.

Current Limit

JR1 J3/4

Terminal Board TBAI

250ohm

Open

1 ma

20 ma

J#A+24 V dc

+/-1 ma

4-20 ma

Return

Current Limit

NoiseSuppr-ession

250 ohms

Open

Vdc

20 ma

J#A

+24 V dc

+/-5,10 Vdc

4-20 ma

Return

2 Circuits perTermination Board

8 Circuits perTermination Board

5k ohms

Maximum Load0-200 ma, 50 ohms4-20 ma, 500 ohms

200 ma

20 maJO

Signal

Return

Jump select on onecircuit only; #2 Circuitis 4-20 ma only

P28V

PCOM

P28V

Two Output Circuits

J#BReturn

J#B

SCOM

Return

<R> Module

Analog InputBoard VAIC

Controller

A/D

Application Software

Connectorsat

bottom ofVME rack

Excitation

CurrentRegulator/

Power Supply

D/A

ID

T

Typical transmitter,Mark VI powered

NS

NS

NS

Figure 9-26. Analog Input Processing, Simplex

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-49

In a TMR system, analog inputs fanout to the three control racks from JR1, JS1, andJT1. The 24 V dc power to the transducers comes from all three VAIC boards and isdiode shared on the terminal board. Each analog current output is fed by currentsfrom all three VAIC, as shown in Figure 9-27.

The actual output current is measured with a series resistor, which feeds a voltageback to each control rack. The resulting output is the voted middle value of the threecurrents.

Current Limit

JR1

Terminal Board TBAI

250ohm

Open

1 ma

20 ma

J#B

+24 Vdc

+/-1 ma

4-20 ma

Return

Current Limit

NoiseSuppr-ession

250 ohms

Open

Vdc

20 ma

J#A

2 Circuits perTermination Board

8 Circuits perTermination Board

5k ohms

Maximum Load0-200 ma, 50 ohms4-20 ma, 500 ohms

JO

Signal

Return

Two Output Circuits#2 Circuit is 4-20

ma only

JS1

JT1

200 ma

20 ma

ST

ST

P28V<S>P28V<T>P28VR

P28VR

J#B

PCOM

Return

Return

SCOM

PCOM

J#A

<R> Module

Analog InputBoard VAIC

Controller

D/A

Application Software

Connectorsat

bottom ofVME rack

Excitation

To Rack<S>

To Rack<T>

Filter 2 Pole

A/D

CurrentRegulator/

Power Supply

J3/J4

ID

ID

ID

+24 V dc

+/-5,10 Vdc

4-20 ma

Return

T

Typical transmitter,Mark VI powered

NS

NS

NS

Figure 9-27. Analog Input Processing, TMR

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FeaturesThe VAIC analog input/output capacity, using two TBAI terminal boards, is shownin Table 9-15.

Table 9-15. Quantity and Types of VAIC Analog Inputs and Outputs

Qty Analog Input Types Qty Analog Output Types

16 ± 10 Vdc, or ± 5 Vdc, or 4−20 mA 2 0−20 mA, or 0−200 mA

4 4−20 mA, or ± 1 mA 2 0−20 mA

Transmitter/transducers can be powered by the 24 V dc source in the control system,or can be independently powered. Terminal board jumpers J#A, J#B, and JO set upthe type of voltage and current inputs, and select the type of current output. Eachoutput is monitored by diagnostics, and a suicide relay disconnects the correspondingoutput if a fault cannot be cleared by a command from the processor.

Noise FilteringHardware filters on the terminal board suppress high frequency noise. Additionalsoftware filters on VAIC provide configurable low pass filtering. With the abovenoise suppression and filtering, the input ac common mode rejection (CMR) is 60dB, and the dc CMR is 80 dB.

Front panelThree LEDs at the top of the VAIC front panel provide status information. Thenormal RUN condition is a flashing green, and FAIL is a solid red. The third LED isnormally off but displays a steady orange if a diagnostic alarm condition exists in theboard.

Specification

Table 9-16. VAIC Board Specifications

Item Specification

Number of Channels 12 channels per terminal board (10 AI, 2 AO)24 channels per VAIC board (20 AI, 4 AO)

Input Span 1 � 5 V dc

Input Converter Resolution 16-bit A/D converter with 14-bit resolution

Scan Time Normal scan 10 ms (100 Hz)Inputs 1 through 4 available for scan at 200 Hz

Measurement accuracy Better than 0.1% full scale

Noise Suppression on inputs The first ten circuits (J3) have a hardware filter with singlepole down break at 500 radians/second.The second ten circuits (J4) have a hardware filter with atwo pole down break at 72 and 500 rad/second.A software filter, using a two pole low pass filter, isconfigurable for 0, .75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz

Common mode rejection Ac common mode rejection 60 dB @ 60 Hz, with up to ± 5volt common mode voltage.Dc common mode rejection 80 dB with from −5 to +7 peakvolt common mode voltage.

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Table 9-16. VAIC Board Specifications Continued

Item Specification

Common mode voltage range ± 5 Volts (± 2 Volt CMR for the ± 10 Volt inputs)

Maximum lead resistance 15 ohms maximum two-way cable resistance, cable lengthup to 300m (984 ft)

Output Converter 12-bit D/A converter with 0.5% accuracy

Output Load 500 ohms for 4−20 mA output50 ohms for 200 mA output

Power consumption Less than 31 watts

Compressor Stall Detection Detection and relay operation within 30 sec

Fault detection Monitor D/A outputs, output currents, and total currentMonitor suicide relays and 20/200 mA scaling relays

DiagnosticsEach analog input has Hardware Limit Checking based on preset (non-configurable)high and low levels set near the ends of the operating range. If this limit is exceededa logic signal is set and the input is no longer scanned. If any one of the input�shardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VAIC,which refers to the entire board. Details of the individual diagnostics are availablefrom the toolbox. The diagnostic signals can be individually latched, and then resetwith the RESET_DIA signal.

Each input has System Limit Checking based on configurable high and low levels.These limits can be used to generate alarms, and can be configured forenable/disable, and as latching/nonlatching. RESET_SYS resets the out of limits.Details of the diagnostics are in GEH-6421C, Vol. I Mark VI System Guide, Chapter8, Troubleshooting and Diagnostics.

The TBAI terminal board has its own ID device, which is interrogated by the I/Oboard. The board ID is coded into a read-only chip containing the terminal boardserial number, board type, revision number, and the JR, JS, JT connector location.

Configuration OverviewTable 9-17 summarizes configuration choices and defaults. For details refer to GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine Controller.

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Table 9-17. Typical VAIC Configuration

Parameter Description Choices

Configuration

System Limits Enable or disable system limits Enable, Disable

Output Voting Select type of output voting Simplex, TMR

Min_ MA_Input Select minimum current for healthy 4-20 mA input 0 to 21 mA

Max_ MA_Input Select maximum current for healthy 4-20 mA input 0 to 21 mA

CompStalType Select Compressor Stall Algorithm (# of transducers) 0, 2, or 3

InputForPS3A Select analog input circuit for PS3A AnalogIn 1, 2, 3, or 4

InputForPS3B Select analog input circuit for PS3B AnalogIn 1, 2, 3, or 4

InputForPS3C Select analog input circuit for PS3C AnalogIn 1, 2, 3, or 4

SelMode Select mode for excessive difference Pressure Max, Avg

PressDelta Excessive Difference pressure threshold 5 to 500

TimeDelay Time Delay on Stall Detection, in msec 10 to 40

KPS3_Drop_Min Minimum Pressure rate 10 to 2000

KPS3_Drop_I Pressure rate intercept 10 to 100

KPS3_Drop_S Pressure rate slope 0.05 to 10

KPS3_Delta_S Pressure delta slope 0.05 to 10

KPS3_Delta_I Pressure delta intercept 10 to 100

KPS3_Delta_Mx Pressure delta Max 10 to 100

KPS3_Drop_L Threshold Pressure rate 10 to 2000

KPS3_Drop_Mx Max pressure rate 10 to 2000

J3:IS200TBAIH1A Terminal board connected to VAIC via J3 Connected, not connected

AnalogIn1 First of 10 Analog Inputs - Card Point Point Edit (Input FLOAT)

Input Type Current or voltage input type Unused, 4−20 ma, ± 5 V, ± 10 V

Low_Input Value of current at the low end of scale −10 to +20

Low_Value Value of input in engineering units at low end of scale −3.4082e+038 to 3.4028e+038

High_Input Value of current at the high end of scale −10 to +20

High_Value Value of input in engineering units at high end ofscale

−3.4082e+038 to 3.4028e+038

Input _Filter Bandwidth of input signal filter Unused, 0.75, 1.5 Hz, 3 Hz, 6 Hz,12 Hz

TMR Diff Limit Difference limit for voted inputs in % of high-lowvalues

0 to 100

Sys Lim 1 Enable Input fault check Enable, Disable

Sys Lim 1 Latch Input fault latch Latch, Unlatch

Sys Lim 1 Type Input fault type Greater Than or EqualLess Than or Equal

Sys Lim 1 Input limit in Engineering Units −3.4082e+038 to 3.4028e+038

Sys Lim 2 Enable Input fault check Enable, Disable

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-53

Sys Lim 2 Latch Input fault latch Latch, Unlatch

Sys Lim 2 Type Input fault type Greater Than or EqualLess Than or Equal

Sys Lim 2 Input limit in Engineering Units −3.4082e+038 to 3.4028e+038

AnalogOut1 First of two analog outputs - Card Point Point Edit (Output FLOAT)

Output_MA Type of output current Unused, 0−20 mA, 0−200 mA

Low_MA Output mA at low value 0 to 200 mA

Low_Value Output in Engineering Units at low mA −3.4082e+038 to 3.4028e+038

High_MA Output mA at high value 0 to 200 mA

High_Value Output value in Engineering Units at high mA −3.4082e+038 to 3.4028e+038

TMR Suicide Suicide for faulty output current, TMR only Enable, Disable

Diff Limit Current difference for suicide, TMR only 0 to 200 mA

D/A Err Limit Difference between D/A reference and output, in %for suicide, TMR only

0 to 100 %

J4:IS200TBAIH1A Terminal board connected to VAIC via J4 Connected, Not Connected

AnalogIn11 First of 10 Analog Inputs - Card Point Point Edit (Input FLOAT)

AnalogOut3 First of two analog outputs - Card Point Point Edit (Output FLOAT)

Card Points (Signals) Description � Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VAIC1 Card diagnostic Input BIT

L3DIAG_VAIC2 Card diagnostic Input BIT

L3DIAG_VAIC3 Card diagnostic Input BIT

SysLimit1_1 System Limit 1 Input BIT

: : Input BIT

SysLimit1_20 System Limit 1 Input BIT

SysLimit2_1 System Limit 2 Input BIT

: : Input BIT

SysLimit2_20 System Limit 2 Input BIT

OutSuicide1 Status of Suicide Relay for Output 1 Input BIT

: : Input BIT

OutSuicide4 Status of Suicide Relay for Output 4 Input BIT

DeltaFault Excessive difference pressure Input BIT

CompStall Compressor Stall Input BIT

Out1MA Feedback, Total Output Current, mA Input FLOAT

: : Input FLOAT

Out4MA Feedback, Total Output Current, mA Input FLOAT

CompPressSel Selected Compressor Press, by Stall Algo. Input FLOAT

PressRate Sel Selected Compressor Press rate, by Stall Algor. Input FLOAT

CompStallPerm Compressor Stall Permissive Output BIT

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9-54 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThe 10 inputs and two outputs are wired directly to two I/O terminal blocks mountedon the terminal board. Each block is held down with two screws and has 24 terminalsaccepting up to #12 AWG wires. A shield termination strip attached to chassisground is located immediately to the left of each terminal block.

The types of analog inputs and outputs that can be accommodated are as follows:• Analog input, two-wire transmitter• Analog input, three-wire transmitter• Analog input, four-wire transmitter• Analog input, externally powered transmitter• Analog input, voltage ±5 V, 10 V dc• Analog output, 20 mA• Analog output, 200 mA

The various types are selected with jumpers, as shown in Figure 9-28.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-55

2468

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Input 1 (24V)Input 1 (Vdc)Input 2 (24V)Input 2 (Vdc)Input 3 (24V)Input 3 (Vdc)Input 4 (24V)Input 4 (Vdc)Input 5 (24V)Input 5 (Vdc)Input 6 (24V)Input 6 (Vdc)

Input 1 (20ma)Input 1 (Ret)Input 2 (20ma)Input 2 (Ret)Input 3 (20ma)Input 3 (Ret)

Input 4 (Ret)Input 5 (20ma)Input 5 (Ret)Input 6 (20ma)Input 6 (Ret)

Input 4 (20ma)

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x

x

Input 7 (24V)Input 7 (Vdc)Input 8 (24V)Input 8 (Vdc)Input 9 (24V)Input 9 (1ma)Input 10 (24V)Input 10 (1ma)

Output 1 (Sig)Output 2 (Sig)

Input 7 (20ma)Input 7 (Ret)Input 8 (20ma)Input 8 (Ret)Input 9 (20ma)Input 9 (Ret)

Input 10 (Ret)

Output 1 (Ret)Output 2 (Ret)

Input 10 (20ma)

Board Jumpers

20ma/1 ma OPEN/RET

Analog Input Terminal Board TBAI JT1

JS1

JR1

To I/ORackR

To I/ORackS

To I/ORackT

Circuit Jumpers

Input 1 J1A J1B

Input 2 J2A J2B

Input 3 J3A J3B

Input 4 J4A J4B

Input 5 J5A J5B

Input 6 J6A J6B

Input 7 J7A J7B

Input 8 J8A J8B

Input 9 J9A J9B

Input 10 J10A J10B

Output 2 No Jumper (0-20ma)Output 1 J0

20ma/VDC OPEN/RET

20ma/200ma

Voltage input

4-20 ma

Return

+24 V dc

T

Two-Wiretransmitter

wiring 4-20ma

J#B

J#A

20 ma

Open

Voltage input

4-20 ma

ReturnT

Three-wiretransmitter wiring

4-20 ma

Open

PCOM

J#B

J#A

20 ma

+24 V dc

Voltage input

4-20 ma

Return

+24 V dc

TPowerSupply

+ +

- -

Externally poweredtransmitter wiring

4-20 ma

J#B

J#A

20 ma

Open

Voltage input

4-20 ma

Signal Return

T

Four-wiretransmitter wiring

5 Vdc

Open

J#A

20 ma

+24 V dc

VDC

VDC VDC

VDC

PCOM

Misc returnto PCOM

Max. commonmode voltage

is 7.0 V dc PCOM

J#B

Figure 9-28. TBAI Terminal Board Wiring

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9-56 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DTAI - Simplex DIN-rail Mounted Analog Input TerminalBoard

The DTAI board is a compact analog input terminal board, designed for DIN-railmounting. The board has 10 analog inputs and two analog outputs, and connects tothe VAIC processor board with a single 37-pin cable, as shown in Figure 9-29. Thiscable is identical to those used on the larger TBAI terminal board. The terminalboards can be stacked vertically on the DIN-rail to conserve cabinet space.

Two DTAI boards can be connected to the VAIC for a total of 20 analog inputs andfour analog outputs. Only a Simplex version of the board is available.

The functions and on-board noise suppression are the same as those on the TBAI.High density Euro Block type terminal blocks are permanently mounted to the board,with two screw connections for the ground connection (SCOM). An on-board IDchip identifies the board to the VAIC for system diagnostic purposes.

<R> Module

Analog InputBoard VAIC

Controller

A/D

Application Software

JR1 J3/4

Connectorsat

bottom ofVME rack

DTAI Board

250ohm

Excitation

Open Return

1 ma

20 ma

J9A

J9B

+24 V dc

+/-1 ma

4-20 ma

Return

Current Limit

NoiseSuppr-ession

250 ohms

Open Return

Vdc

20 ma

J1A

J1B

+24 V dc

2 Circuits per TerminalBoard

8 Circuits per TerminalBoard

5k ohms

Maximum Load4-20 mA, 500 ohms0-200 mA, 50 ohms

200 ma

20 ma

JO

Return

Jump select on onecircuit only; #2Circuit is 4-20 maonly

CurrentRegulator/

PowerSupply

D/A

P28V

PCOM

P28V

SCOM

Two Output Circuits

PCOM

PCOM

SCOM ID

Typical transmitter,Mark VI powered

Current Limit

Voltage input(+/-5,10 V dc)

4-20 ma

Return

T

(For othertransmitter hookups,see Fig. 10-7)

1

3

2

4

4143

33

35

34

36

45

46

NS

NS

NS

Signal

Figure 9-29. DTAI Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-57

InstallationThere is no shield terminationstrip with this design.

The DTAI board slides into a plastic holder, which mounts on the DIN-rail. TheEuro Block type terminal block has 48 terminals and is permanently mounted on theboard. Typically #18 AWG wires (shielded twisted pair) are used. There are twoscrews for the SCOM (ground) connection, which should be as short a distance aspossible.

Input 4 (Vdc)JR1

Input 1 (24V)Input 1 (Vdc)

135

11

79

1314 15171921232527293133

373941

35

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1618202224262830

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3234

Input 2 (24V)Input 2 (Vdc)Input 3 (24V)Input 3 (Vdc)Input 4 (24V)

Input 5 (24V)Input 5 (Vdc)Input 6 (24V)Input 6 (Vdc)Input 7 (24V)Input 7 (Vdc)Input 8 (24V)Input 8 (Vdc)Input 9 (24V)Input 9 (1mA)

PCOM

Input 1 (20mA)Input 1 (Return)Input 2 (20mA)Input 2 (Return)Input 3 (20mA)Input 3 (Return)

Input 4 (Return)Input 5 (20mA)Input 5 (Return)Input 6 (20mA)Input 6 (Return)Input 7 (20mA)Input 7 (ReturnInput 8 (20mA)Input 8 (ReturnInput 9 (20mA)Input 9 (Return)

PCOM

Screw Connections

DIN-rail mounting

42

3840

48

4446

434547

Input 10 (24V)Input 10 (1mA)

Chassis GroundOutput 1 (Signal)Output 2 (Signal)

Input 4 (20mA)

Input 10 (20mA)Input 10 (Ret)

Chassis GroundOutput 1 (Return)Output 2 (Return)

Circuit Jumpers

Input 1 J1B J1A

Input 2 J2B J2A

Input 3 J3B J3A

Input 4 J4B J4A

Input 5 J5B J5A

Input 6 J6B J6A

Input 7 J7B J7A

Input 8 J8B J8A

Input 9 J9B J9A

Input 10 J10B J10A

Output 2 No jumperOutput 1 J0

Open/Return 20ma/Vdc

SCOM

37-pin "D"shellconnectorwith latchingfasteners

Cable to J3connector inI/O rack forVAIC board

JP1B JP1A

JP2B JP2A

JP4B JP4A

JP5B JP5A

JP8B JP8A

JP6B JP6A

JP7B JP7A

JP9B JP9A

JP10B JP10A

JP3B JP3A

JP0

Jumpers TB1Screw Connections

DTAI

Voltage input

4-20 ma

Return

+24 V dc

TPowerSupply

+ +

- -

+24 V dc

Externally poweredtransmitter

J1B

J1A

20 ma

Alternate Transmitter

Open Return

20ma/1ma

Voltage input

4-20 ma

ReturnT

Three-wiretransmitter

Open

PCOM

J2B

J2A20 ma

Return

PCOM

Figure 9-30. DTAI Wiring, Cabling, and Jumper Positions

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9-58 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VAOC/TBAO - Analog OutputsThe Analog Output Board (VAOC) controls 16 analog, 20 mA, outputs. Theseoutputs are wired to two barrier type blocks on the Analog Output Terminal board(TBAO). Noise suppression circuitry to protect against surge and high frequencynoise is mounted on the terminal board. Cables with molded plugs connect theterminal board to the VME rack where the VAOC processor board is located. TheVAOC receives digital values from the controller over the VME backplane from theVCMI, and converts these to analog output currents.

Note that for TMR applications control signals are fanned into the same terminalboard from three VME board racks R, S, and T, as shown in Figure 9-31. Six cablesare required to support all 16 outputs with TMR.

VME Bus to VCMICommunication Board

TBAO Terminal Board 37-pin "D"shell typeconnectorswith latchingfasteners

Cables to VMERack R

Connectors onVME Rack R

Cables to VMERack S

Cables to VMERack T

x

x

RUNFAILSTAT

VAOC

J3

J4

VAOC VME Board

Barrier Type TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

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252729313335373941434547

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x

JS2

JR1

JT1 JT2

JS1

JR2

8 AnalogOutputs

8 AnalogOutputs

Figure 9-31. Analog Output Terminal board, I/O Board, and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-59

OperationThe terminal board supports 16 analog outputs. Driven devices have a maximumresistance of 500 ohms and can be located up to 300 meters (984 feet) from theturbine control cabinet. VAOC in the VME rack contains the D/A converter anddriver which generates the controlled currents, as shown in Figure 9-32. The outputcurrent is controlled by the voltage drop across a resistor on the terminal board.

D/A JR2J4

50 ohms

D/A JR1

Maximum Load4-20 ma, 500

ohmsJ3

TBAO Terminal BoardNoiseSuppr-ession

Signal

Return

<R> Module

50 ohms

01

02 Circuit #1

Signal

Return

0304 Circuit #2

Signal

Return

0506 Circuit #3

Signal

Return

0708 Circuit #4

Signal

Return

0910 Circuit #5

Signal

Return

1112 Circuit #6

Signal

Return

1314 Circuit #7

Signal

Return

1516 Circuit #8

Signal

Return

1718 Circuit #9

Signal

Return

1920 Circuit #10

Signal

Return

2122 Circuit #11

Signal

Return

2324 Circuit #12

Signal

Return

2526 Circuit #13

Signal

Return

2728 Circuit #14

Signal

Return

2930 Circuit #15

Signal

Return

3132 Circuit #16

Analog Output Board VAOC

Group 2

Group 1

Connectors at bottomof VME rack

Sensing

Sensing

CurrentRegulator/

Power Driver

100ohms

Sensing

Sensing

CurrentRegulator/

Power Driver

100ohms

FromController

First group of 8 analog 0-20 ma outputs

Second group of 8 analog 0-20 ma outputs

SuicideRelay

FromController

SuicideRelay

ID

ID

NS

NS

Current

Output Current

Current

Output Current

Figure 9-32. Analog Output Processing, Simplex

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9-60 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

In a TMR system, each analog current output is fed by the sum of the currents fromthe three VAOCs, as shown in Figure 9-33. The total output current is measured witha series resistor which feeds a voltage back to each control rack and VAOC. Theresulting output is the voted middle value of the three currents. If one output fails,the other two pickup the current to the correct value. If one output fails high, it isdisconnected by the suicide relay.

<R>

JR1

JS1

Same for<S>

Maximum Load 500 ohms

J3

J3

Terminal Board TBAO

NoiseSuppr-ession

Signal

Return

<S><T>

JT1

Same for<T>

J3

50 ohms

01

02 Circuit #1

Signal

Return

0304 Circuit #2

Signal

Return

0506 Circuit #3

Signal

Return

0708 Circuit #4

Signal

Return

0910 Circuit #5

Signal

Return

1112 Circuit #6

Signal

Return

1314 Circuit #7

Signal

Return

15

16 Circuit #8

Current Output Board VAOC

Group 1

D/A

Sensing

Sensing

CurrentRegulator/

Power Driver

100ohms

FromController

VME Racks

First group of (8)0-20ma outputs

SuicideRelay

Current

Total Current

Signal

Return

1718 Circuit #9

Signal

Return

1920 Circuit #10

Signal

Return

2122 Circuit #11

Signal

Return

2324 Circuit #12

Signal

Return

2526 Circuit #13

Signal

Return

2728 Circuit #14

Signal

Return

2930 Circuit #15

Signal

Return

3132 Circuit #16

JR2

JS2J4

JT2J4

J4

Group 2Same for<S>

Same for<T>

Same for<R>

Second group of(8) 0-20ma outputs

ID

ID

ID

ID

ID

ID

NS

Figure 9-33. Analog Output Processing, TMR

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-61

FeaturesEach output is monitored by diagnostics. Voltage drops across the local and outerloop current sense resistors, at the control reference, D/A outputs, and at the suiciderelay contacts are sampled and digitized. In the event of a malfunction that cannot becleared by a command from the processor, the circuit is disconnected by opening thesuicide relay contacts. This isolation function is only operational when configuredfor TMR operation. Filters reduce high frequency noise and suppress surge on eachoutput near the point of signal exit.

Front panelThree LEDs at the top of the VAOC front panel provide status information. Thenormal RUN condition is a flashing green, and FAIL is a solid red. The third LED isnormally off but displays a steady orange if a diagnostic alarm condition exists in theboard.

Specification

Table 9-18. VAOC Specification

Item Specification

Number of Channels 16 current output channels, single ended (one sideconnected to common)

Analog Outputs 0−20 mA, up to 500 ohm burdenResponse better than 50 rad/sec

D/A Converter Resolution/Accuracy 12-bit resolution with 0.5% accuracy

Frame Rate 100 Hz on all 12 outputs

Fault detection Local currentOuter total (TMR) currentD/A converter outputSuicide relay operation

DiagnosticsStandard diagnostic information is available on the inputs and outputs, includinghigh and low limit checks, and high and low system limit checks (configurable). Ifany one of the 16 outputs goes unhealthy a composite diagnostic alarm,L3DIAG_VAOC, occurs. Details of the individual diagnostics are available from thetoolbox. The diagnostic signals can be individually latched, and then reset with theRESET_DIA signal if they go healthy.

Each cable connector on the terminal board has its own ID device which isinterrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the JR, JS, JTconnector location.

Configuration OverviewLike all I/O boards, the VAOC board is configured using the Control SystemToolbox. This software usually runs on a data-highway connected CIMPLICITYstation or workstation. Table 9-19 summarizes the configuration choices. Refer toGEH-6403, Control System Toolbox for Configuring the Mark VI TurbineController.

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9-62 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Table 9-19. Typical VAOC Configuration

Parameter Description Choices

Configuration

Output Voting Select type of output voting Simplex, TMR

J3:IS200TBAOH1A Terminal board connected to VAOC via J3 Connected, Not Connected

AnalogOut1 Analog Output 1 - Card Point (first set of 8 AnalogOutputs)

Point Edit (Output FLOAT)

Output_MA Type of output current Unused, 0−20 mA

Low_MA Output MA at Low Value 0 to 20 mA

Low_Value Output in Engineering Units at Low MA −3.4028e+038 to 3.4028e+038

High_MA Output MA at High Value 0 to 20 mA

High_Value Output Value in Engineering Units at High MA −3.4028e+038 to 3.4028e+038

TMR_ Suicide Enable Suicide for faulty output current, TMR only Enable, Disable

TMR_Diff Limit Current difference in MA for suicide, TMR only 0 to 20 mA

D/A_Err Limit Difference between D/A reference and output, in %for suicide, TMR only

0 to 100 %

J4:IS200TBAOH1A Terminal board connected to VAOC via J4 Connected, Not Connected

AnalogOut9 Analog Output 9 - Card Point (second set of 8Analog Outputs)

Point Edit (Output FLOAT)

Card Points Signals Description�Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VAOC1 Card Diagnostic Input BIT

L3DIAG_VAOC2 Card Diagnostic Input BIT

L3DIAG_VAOC3 Card Diagnostic Input BIT

OutSuicide1 Status of Suicide Relay for Output 1 Input BIT

: : Input BIT

OutSuicide16 Status of Suicide Relay for Output 16 Input BIT

Out1MA Measure Total Output Current in mA Input FLOAT

: : Input FLOAT

Out16MA Measure Total Output Current in mA Input FLOAT

InstallationThe 16 analog outputs are wired directly to two I/O terminal blocks mounted on theterminal board, as shown in Figure 9-34. Each block is held down with two screwsand has 24 terminals accepting up to #12 AWG wires. A shield termination stripattached to chassis ground is located immediately to the left of each terminal block.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-63

I/O Terminal Block with Barrier Terminals

Up to two #12 AWG wires per point with 300volt insulation

Terminal Blocks can be unplugged fromterminal board for maintenance

24681012141618202224

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Output 1 (Signal)Output 2 (Signal)Output 3 (Signal)Output 4 (Signal)Output 5 (Signal)Output 6 (Signal)Output 7 (Signal)Output 8 (Signal)Output 9 (Signal)Output 10(Signal)Output 11(Signal)Output 12(Signal)

Output 1 (Return)Output 2 (Return)Output 3 (Return)Output 4 (Return)Output 5 (Return)Output 6 (Return)

Output 8 (Return)Output 9 (Return)Output 10(Return)Output 11(Return)Output 12(Return)

Output 7 (Return)

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x

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x

x

x

x

x

x

x

x

Output 13 (Signal)Output 14 (Signal)Output 15 (Signal)Output 16 (Signal)

Output 13(Return)Output 14(Return)Output 15(Return)Output 16(Return)

Analog Output Terminal Board TBAOJT2

JS2

JR2

To J4on I/ORack R

JT1

JS1

JR1

To J3on I/ORack R

To J3on I/ORack S

To J4on I/ORack S

To J3on I/ORack T

To J4on I/ORack T

Figure 9-34. TBAO Terminal Board Wiring

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9-64 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DTAO - Simplex DIN-rail Mounted Analog OutputTerminal Board

The DTAO board is a compact analog output terminal board, designed for DIN-railmounting. The DTAO board has eight analog outputs, and connects to the VAOCprocessor board with a single 37-pin cable, as shown in Figure 9-35. This cable isidentical to those used on the larger TBAO terminal board.

The terminal boards can be stacked vertically on the DIN-rail to conserve cabinetspace. Two DTAO boards can be connected to the VAOC for a total of 16 analogoutputs. Only a Simplex version of this board is available.

The functions and on-board noise suppression are the same as those on TBAO. Highdensity Euro Block type terminal blocks are permanently mounted to the board, withtwo screw connections for the ground connection (SCOM). An on-board ID chipidentifies the board to the VAOC for system diagnostic purposes

D/A JR1

Analog OutputsMaximum Load

4-20 mA,500 ohmsJ3

DTAO Terminal Board

NoiseSuppresion

Signal

Return

<R> Module

50 ohms01

02Circuit #1

SignalReturn

0304 Circuit #2

SignalReturn

0506 Circuit #3

SignalReturn

0708 Circuit #4

SignalReturn

0910 Circuit #5

SignalReturn

1112 Circuit #6

SignalReturn

1314 Circuit #7

SignalReturn

1516 Circuit #8

VAOC Board

Connectors atbottom of VME rack

Sensing

Sensing

CurrentRegulator/

Power Driver

100ohms

FromController

First group of 8 analog 4-20 mA outputs

SuicideRelay

To second DTAOterminal board

D/A J4

Sensing

Sensing

CurrentRegulator/

Power Driver

100ohms

Second group of 8 analog 4-20 mA outputs

FromController

SuicideRelay

Eight AnalogOutputs

ID

SCOM

Figure 9-35. DTAO Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-65

InstallationThere is no shield terminationstrip with this design.

The DTAO board slides into a plastic holder, which mounts on the DIN-rail. Theeight analog outputs are wired directly to the terminal block as shown in Figure 9-36. The Euro Block type terminal block has 36 terminals and is permanentlymounted on the terminal board. Typically #18 AWG wires (shielded twisted pair)are used. There are two screws for the SCOM (ground) connection which should beas short a distance as possible.

Output 8 (Signal)

JR137-pin "D" shellconnector withlatching fasteners

DTAO

Output 1 (Signal)Output 2 (Signal)

135

11

79

1314 1517192123252729313335

2468

1012

1618202224262830

36

3234

Output 3 (Signal)Output 4 (Signal)Output 5 (Signal)Output 6 (Signal)Output 7 (Signal)

Output 1 (Return)Output 2 (Return)Output 3 (Return)Output 4 (Return)Output 5 (Return)Output 6 (Return)

Output 8 (Return)

Cable to J3 or J4connector in I/Orack for VAOCboard

Screw Connections

Euro Block typeterminal block

Plastic mountingholder

DIN-rail mounting

Output 7 (Return)

SCOM

Chassis Ground Chassis Ground

Screw Connections

Figure 9-36. DTAO Wiring and Cabling

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9-66 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VCCC/TBCI - Contact InputsThe Contact Input/Relay Output Board (VCCC) with its associated daughter board,accepts 48 discrete inputs and controls 24 relay outputs. VCCC is a double widthmodule and connects to two sets of J3/J4 plugs via the VME backplane as shown inFigure 9-37. The Contact Input Terminal board (TBCI) accepts 24 dry contactinputs, and two boards are required to support 48 inputs. The Relay Output Terminalboard (TRLY) controls 12 relays and is described in the next section.

VCRC is a single slot version of VCCC with the same functionality. Contact inputcables plug into the front of the board, as discussed in the VCRC section.

VME Rack

VCCCBoard

VCCCDaughter Board

J1

J2 J2

J3 J3

J4 J4

Backplane Wiring

Terminal Boards

Backplane Cable Connectors

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

TB3 JF1 JF2Power Plugs

JG1PowerPlug

JT1

JS1

JR1

TBCIContactInputs24 perboard

JE1 JE2Power Plugs

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

TB3 JF1 JF2Power Plugs

JG1PowerPlug

JT1

JS1

JR1

TBCIContactInputs24 perboard

JE1 JE2Power Plugs

Figure 9-37. Boards and Cabling for Contact Inputs and Relay Outputs, Simplex

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-67

The first 24 dry contact inputs are wired to two barrier type blocks on the TBCI, anda second terminal board is required for inputs 25 − 48. Dc power for the contacts isprovided. Contact inputs have noise suppression circuitry to protect against surgeand high frequency noise. Cables with molded plugs connect the terminal board tothe VME rack where the VCCC processor board is located, as shown in Figure 9-38.

VME Bus to VCMI

TBCI Contact Input Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cable to VMERack R

Connectors onVME Rack R

Barrier Type TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

2468

1012141618202224

x

xxxxxxxxxxxx

1357911131517192123

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262830323436384042444648

x

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252729313335373941434547

xxxxxxxxxxxx

x x

x

JS1

JR1

JT1

Cable to VMERack S

Cable to VMERack T

JE2JE1

x

x

RUNFAILSTAT

VCCC

VCCC VME Board

J3

J4

J3

J4

Cable fromSecond TBCI

To RelayOutput Boards

12 ContactInputs

12 ContactInputs

Figure 9-38. Contact Input Terminal board, I/O Board, and Cabling

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9-68 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

OperationThe VCCC passes the input voltages through optical isolators and transfers thesignals over the VME backplane to the VCMI. The VCMI then sends them to thecontroller. The contact input processing is shown in Figure 9-39.

The dry contact inputs are powered from a floating 125 V dc (100 − 145 V dc)supply from the turbine control. Power converters convert the 115/230 V ac and/or125 V dc power sources to a redundant, internal 125 V dc bus to power theelectronics. The 125 V dc bus is current limited in the Power Distribution Moduleprior to feeding each contact input.

Contact Input Board VCCC

Terminal Board TBCI

JR1

From PowerDistributionModule <PDM>125 VdcPower Source

NoiseSuppr-ession

<R> Rack

JE2

JE1(+)

(+)

(-)

(-)

Floating

Field Contact

Field Contact

Field Contact

(+)

(-)

(+)

(-)

(+)

(-)

Ref.

P5

Gate

Gate

Gate

Gate

Gate

Gate

Gate

Field Contact

Field Contact

Field Contact

(+)

(-)

(+)

(-)

(+)

(-)

Optical Isolation

J3

J4

Contact Inputs from SecondTBCI Terminal Board

24 Contact Inputs perTerminal Board

Total of 48 circuits

ID

BCOM

BCOM

NS

NS

NS

NS

NS

NS

Figure 9-39. Contact Input Processing, Simplex

A pair of termination points is provided for each input with one point (screw)providing the positive dc source and the second point providing the return (input) tothe board. The current loading is 2.5 mA per point for 21 of the inputs on eachterminal board, and the other three have a 10 mA load to support interface withremote solid-state output electronics.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-69

Each input is optically isolated and sampled at frame rate for control functions, andat 1ms for sequence of events (SOE) reporting. A 4 ms hardware filter is used, andnoise rejection is 60 V rms at 125 V dc excitation. Contact input circuitry is designedfor NEMA Class G creepage and clearance.

For TMR applications contact input voltages are fanned out to three VME boardracks R, S, and T via plugs JR1, JS1, and JT1, as shown in Figure 9-40. The signalsare processed by the three VCCC and the results voted by the VCMI board in eachcontroller rack.

Terminal Board TBCI

JR1

From PowerDistributionModule <PDM>125 V dcPower Source

NoiseSuppr-ession

JE2

JE1(+)

(+)

(-)

(-)

Floating

Field Contact

Field Contact

Field Contact

(+)

(-)

(+)(-)

(+)(-)

Field Contact

Field Contact

Field Contact

(+)(-)

(+)(-)

(+)(-)

JS1

JT1

<R><S>

Shown for <R>

<T>

Ref.

P5

Gate

Gate

Gate

Gate

Gate

Gate

Gate

Each contact input terminates on onepoint and is fanned to <R>, <S>, and <T>

Optical IsolationJ3

J3

J3

From Second TBCI

J4

VME Racks

24 Contact Inputs per Terminal Board.

Total of 48 circuits

Contact Input Board VCCC

BCOM

BCOM

ID

BCOMID

BCOM

ID

ID

NS

NS

NS

NS

NS

NS

Figure 9-40. Contact Input Processing, TMR

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9-70 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Features

Sequence of EventsHigh speed scanning and recording at 1 ms rate is available for inputs monitoringimportant turbine variables. The sequence of events recorder reports all contactopenings and closures with a time resolution of 1 ms. Contact chatter and pulsewidths down to 6 ms are reported.

Noise FilteringFilters reduce high frequency noise and suppress surge on each input near the pointof signal exit. Noise and contact bounce is filtered with a 4 ms filter. AC voltagerejection (50/60 Hz) is 60 V rms with 125 V dc excitation.

Front panelThree LEDs at the top of the VCCC front panel provide status information. Thenormal RUN condition is a flashing green, FAIL is a solid red. The third LED isnormally off but shows a steady orange if a diagnostic alarm condition exists in theboard.

Specification

Table 9-20. VCCC Specification

Item Specification

Number of Channels 48 dry contact voltage input channels (24 per terminal board)

Excitation Voltage Nominal 125 V dc, floating, ranging from 100 to 145 V dc

Input Current For 125 V dc applications:First 21 circuits draw 2.5 mA (50 kohms)Last three circuits draw 10 mA (12.5 kohms)

Isolation Optical Isolation to 1500 volts on all inputs

Input Filter Hardware filter, 4 ms

AC Voltage Rejection 60 V rms @ 50/60 Hz at 125 V dc excitation

Frame Rate System dependent scan rate for control purposes1,000 Hz scan rate for Sequence of Events monitoring

Power consumption 20.6 watts on the terminal boardNA watts in the VCCC board

Fault detection Loss of contact input excitation voltageNon-responding contact input in test modeUnplugged cable

Configuration OverviewLike all I/O boards, the VCCC is configured using the toolbox. This software usuallyruns on a data-highway connected CIMPLICITY station or workstation. Table 9-21summarizes configuration choices and defaults. Refer to GEH-6403, Control SystemToolbox for Configuring the Mark VI Turbine Controller.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-71

Table 9-21. Typical VCCC (Contact Input) Configuration

Parameter Description Choices

Configuration

System Limits Enable all System Limit Checking Enable, Disable

J3A:IS200TBCIH1A Terminal board connected to VCCC from J3 Connected, Not Connected

Contact01 First contact of 24 on first terminal board -Card Point

Point Edit (Input BIT)

Contact Input Select contact input Used, Unused

Signal Invert Inversion makes signal true if contact open Normal, Invert

Sequence of Events Select input for sequence of events scanning Enable, Disable

Signal Filter Contact Input Filter in msec 0, 10, 20, 50

J4A:IS200TBCIH1A Terminal board connected to VCCC from J4 Connected, Not Connected

Contact01 First contact of 24 on second terminal board -Card Point

Point Edit (Input BIT)

Card Points Signals Description-Enter Signal Connection Name Direction Type

L3DIAG_VCCC1 Card Diagnostic Input BIT

L3DIAG_VCCC2 Card Diagnostic Input BIT

L3DIAG_VCCC3 Card Diagnostic(For relay output points, see TRLY)

Input BIT

DiagnosticsThe dry (isolated) external contacts are monitored, and also the excitation voltage. Ifthe excitation drops to below 40% of the nominal voltage, a diagnostic alarm is setand latched. All inputs associated with this TB are forced to the open contact (failsafe) state. Any input that fails the diagnostic test is forced to the failsafe state.

If any one of the 48 inputs goes unhealthy a composite diagnostic alarm,L3DIAG_VCCC occurs. Details of the individual diagnostics are available from thetoolbox. The diagnostic signals can be individually latched, and then reset with theRESET_DIA signal if they go healthy.

Each terminal board connector has its own ID device which is interrogated by theI/O board. The board ID is coded into a read-only chip containing the board serialnumber, board type, revision number, and the JR1/JS1/JT1 connector location. Referto GEH-6421C, Vol. I Mark VI System Guide, Chapter 8, Troubleshooting andDiagnostics

InstallationThe 24 dry contact inputs are wired directly to two I/O terminal blocks mounted onthe terminal board. Each block is held down with two screws and has 24 terminalsaccepting up to #12 AWG wires. A shield termination strip attached to chassisground is located immediately to the left of each terminal block. The 125 V dcexcitation voltage is cabled in through plugs JE1 and JE2, as shown in Figure 9-41.

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9-72 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Contact Input Terminal Board TBCI

Up to two #12 AWG wires perpoint with 300 volt insulation

Terminal Blocks can be unpluggedfrom terminal board for maintenance

2468

1012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

1357911131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

Input 1 (Positive)Input 2 (Positive)Input 3 (Positive)Input 4 (Positive)Input 5 (Positive)Input 6 (Positive)Input 7 (Positive)Input 8 (Positive)Input 9 (Positive)Input 10 (Positive)Input 11 (Positive)Input 12 (Positive)

Input 1 (Return)Input 2 (Return)Input 3 (Return)Input 4 (Return)Input 5 (Return)Input 6 (Return)

Input 8 (Return)Input 9 (Return)Input 10(Return)Input 11(Return)Input 12(Return)

Input 7 (Return)

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

Input 13 (Positive)Input 14 (Positive)Input 15 (Positive)Input 16 (Positive)Input 17 (Positive)Input 18 (Positive)Input 19 (Positive)Input 20 (Positive)Input 21 (Positive)Input 22 (Positive)Input 23 (Positive)Input 24 (Positive)

Input 13 (Return)Input 14 (Return)Input 15 (Return)Input 16 (Return)Input 17 (Return)Input 18 (Return)

Input 20 (Return)Input 21 (Return)Input 22 (Return)Input 23 (Return)Input 24 (Return)

Input 19 (Return)

JE1 JE2

JT1

JS1

JR1

Contact ExcitationSource, 125 Vdc

To Rack T

To Rack S

To Rack R

1

3

1

3

Inputs 22, 23, 24are 10 mA, allothers are 2.5 mA

Figure 9-41. TBCI Terminal Board Wiring

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-73

VCCC/TICI - Isolated Digital InputsThe Isolated Digital Input terminal board (TICI) is an input board which works withVCCC (but not VCRC) in a similar way to TBCI. TICI provides voltage detectioncircuits to detect a range of voltages across relay contacts, fuses, and switches, asshown in Figure 9-42.

FeaturesThe TICI is similar to the TBCI, except for the following items:• TICI input voltage ranges are:

− 70 − 145 V dc, nominal 125 V dc, with a detection threshold of 39 to 61 Vdc

− 200 − 250 V dc, nominal 250 V dc, with a detection threshold of 39 to61 V dc

− 90 − 132 V rms, nominal 115 V rms, 47-63 Hz, with a detection thresholdof 35 to 76 V ac

− 190 − 264 V rms, nominal 230 V rms, 47-63 Hz, with a detection thresholdof 35 to 76 V ac

• Input hardware filtering is provided using time delays of 15 msec, nominal:− For dc applications the time delay is 15 ± 8 msec− For ac applications the time delay is 15 ± 13 msec

• In addition to hardware filters, the contact input state is software filtered usingconfigurable time delays, selected from 0, 10, 20, 50, and 100 msec. For acinputs, a filter of at least 10 ms is recommended.

Auto

Run

V acSupply TICI Terminal Board

VoltageSensingCircuit

Customer'sLoad/Motor

Figure 9-42. TICI Sensing Available Control Voltage Across Device

The following restrictions should be noted regarding creepage and clearance on the230 V rms application:• For NEMA requirements: 230 V single-phase• For CE Mark: 230 V single or 3-phase

Refer to the section Contact Inputs TBCI for information on monitoring dry(isolated) contact inputs, and on the VCCC board.

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9-74 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DTCI - Simplex DIN-rail Mounted Contact Input TerminalBoardVCRC is a single-width boardand is preferred to VCCC.

The DTCI board is a compact contact input terminal board, designed for DIN-railmounting. The DTCI board has 24 contact inputs with a nominal excitation of 24 Vdc, and connects to the VCRC processor board with a single 37-pin cable, as shownin Figure 9-43. This cable is identical to those used on the larger TBCI terminalboard. The terminal boards can be stacked vertically on a DIN-rail to conservecabinet space. Two DTCI boards can be connected to the VCRC for a total of 48contact inputs. Only a Simplex version of this board is available.

The function and on-board signal conditioning are the same as those on TBCI,except they are scaled for 24 V dc. High density Euro Block type terminal blocks arepermanently mounted to the board with two screw connections for the groundconnection (SCOM). The input excitation range is 18 to 32 V dc, and the thresholdvoltage is 50% of the excitation voltage. The ac voltage rejection is 12 V rms.Contact inputs take 2.5 mA nominal current on the first 21 circuits, and 10 mA oncircuits 22 through 24.

Contact Input Board VCRC

<R> Rack

Reference

P5

Gate

Gate

Gate

Gate

Gate

Gate

Gate

Optical Isolation

J3

J4

Contact Inputs from SecondDTCI Terminal Board

24 Contact Inputs perTerminal Board

Total of 48 circuits

DTCI Board

JR1

24 V dcExcitationPower Source

Noise Supp-ression

(+)

(+)

(-)

(-)

Input 1 Positive

Input 1 Return

Field Contacts (24)

(+)(-)

BCOM

ID

SCOM

5249

5053

51

54

.

.

.

.

.

.

.

.

Input 2 Positive

Input 2 Return

Input 3 Positive

Input 3 Return

Input 4 Return

Input 4 Positive

Input 24 Positive

Input 24 Return

12

34

56

78

47

48

NS

NS

NS

NS

NS

Figure 9-43. DTCI Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-75

InstallationThere is no shieldtermination strip with thisdesign.

The DTCI board slides into a plastic holder, which mounts on the DIN-rail. Thecontact inputs are wired directly to the terminal block as shown in Figure 9-44. TheEuro Block type terminal block has 60 terminals and is permanently mounted on theterminal board. Typically #18 AWG wires are used. There are two screws for theSCOM (ground) connection, which should be as short a distance as possible, and sixscrews for the 24 V dc excitation power.

Input 8 (Positive)JR1

37-pin "D" shellconnector withlatching fasteners

Input 1 (Positive)Input 2 (Positive)

135

11

79

1314 1517192123252729313335

2468

1012

1618202224262830

36

3234

Input 3 (Positive)Input 4 (Positive)Input 5 (Positive)Input 6 (Positive)Input 7 (Positive)

Input 9 (Positive)Input 10 (Positive)Input 11 (Positive)Input 12 (Positive)Input 13 (Positive)Input 14 (Positive)Input 15 (Positive)Input 16 (Positive)Input 17 (Positive)Input 18 (Positive)

Input 1 (Return)Input 2 (Return)Input 3 (Return)Input 4 (Return)Input 5 (Return)Input 6 (Return)

Input 8 (Return)Input 9 (Return)

Input 10 (Return)Input 11 (Return)Input 12 (Return)Input 13 (Return)Input 14 (Return)Input 15 (Return)Input 16 (Return)Input 17 (Return)Input 18 (Return)

Cable to J3 or J4connector in I/Orack for VCRCboard

Screw Connections

Euro Block typeterminal block

Input 19 (Positive)

Input 21 (Positive)

Chassis Ground

Input 7 (Return

Input 19 (Return)Input 20 (Return)

Plastic mountingholderDIN-rail mounting

37394142

3840

48

4446

43454749515354

5052

60

5658

555759

DTCI Board

Input 20 (Positive)

Input 22 (Positive)Input 23 (Positive)Input 24 (Positive)

Input 21 (Return)Input 22 (Return)Input 23 (Return)Input 24 (Return)

Excitation (Positive)Excitation (Negative)

Excitation (Positive)Excitation (Positive)Excitation (Negative)

Contact Excitation24 V dc

SCOM

Chassis GroundExcitation (Negative)

Figure 9-44. DTCI Wiring and Cabling

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9-76 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VCCC/TRLYH1B - Relay OutputsThe Contact Input/Relay Output Board (VCCC), with its associated daughter board,controls 24 relay/solenoid outputs. VCCC is a double-width module and connects totwo sets of J3/J4 plugs via the VME backplane as shown in Figure 9-45 below. Themain board controls 12 relays via the Relay Output Terminal board (TRLY). TwoTRLY boards are required for a total of 24 relays.

VCRC is a single slot version of VCCC with the same functionality (except drivingTICI). Relay output cables plug into J3 and J4, as discussed in the VCRC section.

VME Rack

VCCCBoard

VCCCDaughter Board

J1

J2 J2

J3 J3

J4 J4

Backplane Wiring

Terminal Boards

Backplane Cable Connectors

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

TB3 JF1 JF2Power Plugs

JG1PowerPlug

JT1

JS1

JR1

TBCIContactInputs24 perboard

JE1 JE2Power Plugs

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

TB3 JF1 JF2Power Plugs

JG1PowerPlug

JT1

JS1

JR1

TBCIContactInputs24 perboard

JE1 JE2Power Plugs

Figure 9-45. Cabling for Contact Inputs and Relay Outputs, Simplex

TRLY holds twelve plug-in magnetic relays. A second board is required for outputrelays 13-24. Cables with molded fittings connect the terminal board to the VMErack where the VCCC processor board is located, as shown in Figure 9-46. Plug JA1connnects to J3/4 on Simplex systems, and plugs JR1, JS1, and JT1 are used forTMR systems.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-77

Cable to VMERack R

Barrier Type TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

2468

1012141618202224

xxxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

x

xxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

TB3

JF1

x

JS1

JR1

JT1x

x

RUNFAILSTAT

VCCC

VME Bus to VCMI

VME Board VCCC

Connectors onVME Rack R

Relay Output Terminal Board TRLY

J3

J4

J3

J4

To Contact Input Board

Cable to VMERack S

Cable to VMERack T

Cables to RelayOutput TerminalBoards

OutputRelays

Fuses

JF2

X

JA1

DaughterBoard

SolenoidPower

SolenoidPower

To SecondTRLY

Figure 9-46. Relay Output Terminal board, I/O Board, and Cabling

OperationFor Simplex operation, cables carry control signals plus monitor feedback voltagesbetween VCCC to TRLY through JA1. Relay drivers, fuses, and jumpers aremounted on the relay board. The first six relay circuits can be jumper configured foreither dry, Form-C contact outputs, or to drive external solenoids. A standard 125 Vdc or 115 V ac source, or an optional 24 V dc source, with on-board suppression canbe provided for solenoid power. This comes in on JF1 (or TB), as shown in Figure9-47. The next five relays (7 − 11) are unpowered isolated Form-C contacts. Output12 is an isolated Form-C contact, used for ignition transformers, for example.

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9-78 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

JG1Available forGT Ignition Transformers(6 Amp at 120 Vac 3 Amp at 240 Vac)

13

DryContact,Form-C

"5" of these circuits

NC

NO

Com

K7K7

K7

27

26

25

Relay Terminal Board - TRLYH1B

JR1

J3/4

P28V

K1

VCCCRelayOutput

Coil

RD

"12" of the above circuits

<R>

JS1

JT1

JA1

ID

ID

Sol"1" of these circuits 48

Normal PowerSource,pluggable(7 Amp)

JF1

JF2

TB312

34

1

3

13

SpecialCircuit

NO

NC

Com

47

46

45

AlternatePower, 20 A24 V dc or125 V dc or115 V ac or240 V ac

Sol"6" of the above circuits

N125/24 Vdc

+

-

FieldSolenoid4

K1

NC

Com 2

1

K1

NO 3

P125/24 V dcJP1

Dry

ID

FU7

3.15 Ampslow-blow

FU1

PowerDaisy-Chain Monitor

>14 Vdc>60 Vac

Monitor>14 Vdc>60 Vac

K12

K12K12

Monitor Select

<R>

K#

Output 01

Output 07

Output 12

RelayDriver

Figure 9-47. Relay Output Board, Simplex

For TMR applications, relay control signals are fanned into TRLY from the threeVME board racks R, S, and T through plugs JR1, JS1, and JT1. These signals arevoted and the result controls the corresponding relay driver. Power for the relay coilscomes in from all three racks and is diode shared, as shown in Figure 9-48.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-79

JG1Available forGT Ignition Transformers(6 Amp at 120 Vac 3 Amp at 240 Vac)

13

DryContact,Form-C

"5" of these circuits

NC

NO

Com

K7K7

K7

27

26

25

Relay Terminal Board - TRLYH1B

JR1J3/4

P28V

K1

VCCCRelayOutput

Coil

RD

"12" of the above circuits

<T><S>

<R>

JS1

JT1

Same for<S>

Same for<T>

J3/4

J3/4

JA1

ID

ID

Sol"1" of these circuits 48

Normal PowerSource,pluggable(7 Amp)

JF1

JF2

TB312

34

1

3

13

SpecialCircuit

NO

NC

Com

47

46

45

AlternatePower, 20 A24 V dc or125 V dc or115 V ac or240 V ac

Sol"6" of the above circuits

N125/24 Vdc

+

-

FieldSolenoid4

K1

NC

Com 2

1

K1

NO 3

P125/24 V dc

Dry

ID

FU7

3.15 Ampslow-blow

FU1

PowerDaisy-Chain Monitor

>14 Vdc>60 Vac

Monitor>14 Vdc>60 Vac

<R>

K12

K12K12

Monitor Select

JP1

K#

Output 01

Output 07

Output 12

RelayDriver

Figure 9-48. Relay Output Board, TMR

FeaturesRelays are driven at the frame rate. For system powered solenoids, the excitationvoltage is monitored and an alarm is latched if this voltage drops below 12 V dc.Each relay coil current is also monitored and if it does not agree with the controlsignal an alarm is latched.

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9-80 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Relay CharacteristicsRelays have a 3.0 Amp rating. The rated contact to contact voltage is 500 V ac forone minute, and the rated coil to contact voltage is 1,500 V ac for one minute. Thetypical time to operate is 10 ms.

Failsafe OutputsThe relay outputs have failsafe features so that when a cable is unplugged, the inputsvote to de-energize the corresponding relays. Similarly, if communication with theassociated VME board is lost, the relays de-energize.

Front panelThree LEDs at the top of the VCCC front panel provide status information. Thenormal RUN condition is a flashing green, FAIL is a solid red. The third LED isnormally off but shows a steady orange if a diagnostic alarm condition exists in theboard.

DiagnosticsThe output of each relay (coil current) is monitored and checked against thecommand, at the frame rate. If there is no agreement for two consecutive checks, analarm is latched. The solenoid excitation voltage is monitored downstream of thefuses and an alarm is latched if it falls below 12 Volts (ac or dc).

If any one of the 12 outputs goes unhealthy a composite diagnostic alarm,L3DIAG_VCCC occurs. Details of the individual diagnostics are available from thetoolbox. The diagnostic signals can be individually latched, and then reset with theRESET_DIA signal if they go healthy.

Each of the three terminal board connectors have their own ID device which isinterrogated by the I/O board. The board ID is coded into a read-only chip containingthe board serial number, board type, revision number, and the JR1/JS1/JT1 connectorlocation.

Specification

Table 9-21. VCCC Relay Output Specification

Item Specification

Number of Relay Channels onone TRLY board

12 relays: 6 relays with optional solenoid driver voltages5 relays with dry contacts only1 relay with 7 Amp rating

VCCC total is 24 relays on two TRLY boards

Rated Voltage on Relays a: Nominal 125 V dc or 24 V dcb: Nominal 120 V ac or 240 V ac

Max Load Current a: 0.6 Amp for 125 V dc operationb: 3.0 Amp for 24 V dc operation;c: 3.0 Amp for 120/240 V ac, 50/60 Hz operation

Max response Time On 25 ms typical

Max response Time Off 25 ms typical

Contact Material Silver cad-oxide

Contact Life Electrical operations: 100,000Mechanical operations: 10,000,000

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-81

Fault detection Loss of relay solenoid excitation current or coil currentdisagreement with command.Unplugged cable or loss of communication with VME board.Relays deenergize if communication with associated VMEboard is lost.

Configuration OverviewLike all I/O boards, the VCCC module is configured using the Control SystemToolbox. This software usually runs on a data-highway connected CIMPLICITYstation or workstation. Table 9-22 summarizes the configuration choices anddefaults. Refer to GEH-6403, Control System Toolbox for Configuring the Mark VITurbine Controller.

Table 9-22. Typical VCCC Relay Configuration

Parameter Description Choices

Configuration

System Limits Select System Limits Enable, Disable

J3:IC200TRLYH1B Terminal board 1 connected to VCCC via J3 Connected, Not Connected

Relay01 First Relay Output (from first set of 12 relays) - CardPoint

Point Edit (Output BIT)

Relay Output Select Relay Output Used, Unused

FuseDiag Enable fuse diagnostic Enable, Disable

Relay01Fdbk Relay 01 Contact Voltage (first set of 12 relays) -Card Point

Point Edit (Input BIT)

Contact Input Configurable Item:slot# Used, Unused

Signal Invert Inversion makes Signal True if contact is open Normal, Invert

Signal Filter Contact Input filter in msec 0, 10, 20, 50

J4:IC200TRLYH1B Terminal board 2 connected to VCCC via J4 Connected, not connected

Relay01 Relay Output 1 (second set of 12 relays) - CardPoint

Point Edit (Output BIT)

Relay01Fdbk Relay 1 Contact Voltage (second set of 12 relays)- Card Point

Point Edit (Input BIT)

Card Points Signals Description- Enter Signal Connection Name Direction Type

L3DIAG_VCCC1 Card Diagnostic Input BIT

L3DIAG_VCCC2 Card Diagnostic Input BIT

L3DIAG_VCCC3 Card Diagnostic Input BIT

For VCCC contact input points, see TBCI section.

InstallationThe customer�s 12 relay outputs are wired directly to two I/O terminal blocksmounted on the terminal board as shown in Figure 9-49. Each block is held downwith two screws and has 24 terminals accepting up to #12 AWG wires.

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9-82 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

A shield termination strip attached to chassis ground is located immediately to theleft of each terminal block. Solenoid power for outputs 1−6 is plugged to JF1normally. JF2 can be used to daisy-chain power to other TRLYs. Alternativelycustomer power may be wired directly into TB3 when power is not plugged intoJF1/JF2. JG1 provides power to customer�s special solenoid, Output 12.

Jumpers JP1−JP6 are removed in the factory and shipped in a plastic bag. Reinstallthe appropriate jumper if power to a field solenoid is required. These jumpers (JP1-6) are for isolation of the monitor circuit when used on isolated contact applications.The fuses should also be removed for this application to ensure that suppressionleakage is removed from the power bus.

Relay Output Terminal BoardTRLYH1B

To Connectors JA1, JR1, JS1, JT1

JF1 JF21

3

1

3

1

4

2

3

Customer Power

Customer Return

JG1

Output 01 (NC)Output 01 (NO)Output 02 (NC)

-

-

-

-

-

-

FU1

FU2

FU3

FU4

FU5

FU6

Output 01 (COM)

FusesNeg,return

Output 01 (SOL)Output 02 (COM)Output 02 (SOL)Output 03 (COM)Output 03 (SOL)Output 04 (COM)Output 04 (SOL)Output 05 (COM)Output 05 (SOL)Output 06 (COM)Output 06 (SOL)

Output 03 (NC)Output 02 (NO)

Output 03 (NO)Output 04 (NC)Output 04 (NO)Output 05 (NC)Output 05 (NO)Output 06 (NC)Output 06 (NO)

Output 07 (COM)

Output 09 (COM)

Output 08 (COM)

Output 10 (COM)

Output 11 (COM)

Output 12 (COM)Output 12 (SOL)

Output 07 (NC)

Output 08 (NC)

Output 09 (NC)

Output 10 (NC)

Output 11 (NC)

Output 12 (NC)

Output 07 (NO)

Output 08 (NO)

Output 09 (NO)

Output 10 (NO)

Output 11 (NO)

Output 12 (NO)

24681012141618202224

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x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

Power to Special Circuit 12

Out 01

Out 02

Out 03

Out 04

Out 05

Out 06

JF1, JF2, and JG1 are Power Plugs

Powered,FusedSolenoidsForm-C

DryContactsForm-C

SpecialCircuit,Form-C,Ign. Xfmr.

ToConnectorsJA1, JR1,JS1, JT1

+

+

+

+

+

+

FU7

FU8

FU9

FU10

FU11

FU12 JP6

JP5

JP4

JP3

JP2

JP1

JumperChoices:Power (JPx)or DryContact (Dry)

PowerSource

Alternative CustomerPower Wiring

x x x x

4321

TB3

N125/24 Vdc

P125/24 Vdc

Relays

FusesPos, High

Power

Return

Figure 9-49. TRLY Terminal Board Wiring

Page 97: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-83

VCCC/TRLYH1C - Relay Outputs with Voltage SensingRelay contact voltage detection is available with the optional TRLYH1C relayterminal board. TRLYH1C is driven by VCCC (or VCRC) in the same way asTRLY, and has the same 12 output relays. Voltage sensing is done with 24 smallvoltage monitor boards as shown in Figure 9-50. Individual voltage monitors can beisolated by removing a jumper.

FeaturesTRLYH1C is the same as the standard TRLY board except for the following:• Six jumpers for converting the solenoid outputs to dry contact type are removed.

These jumpers were associated with the fuse monitoring.• Input relay coil monitoring is removed from the 12 relays.• Relay contact voltage monitoring is added to the 12 relays. Individual

monitoring circuits have voltage suppression, and can be isolated by removingtheir associated jumper.

• High frequency snubbers are installed across the NO and Sol terminals on thesix solenoid driver circuits and on the special circuit, output 12.

The contact voltage ranges for the monitors are as follows:• 16-32 V dc, nominal 24 V dc• 70-145 V dc, nominal 125 V dc• 90-132 V rms, nominal 115 V rms, 47-63 Hz• 190-264 V rms, nominal 230 V rms, 47-63 Hz

The threshold voltage ranges for the monitors are as follows:• 24 V dc applications: 10 to 16 V dc• 125 V dc applications: 40 to 65 V dc• 115/230 V ac applications: 45 to 72 V ac

The contact input state is software filtered using time delays.

Page 98: 6421C Vol II System Manual for Mark VI

9-84 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

JG1Available forGT Ignition Transformers(6 Amp at 120 Vac 3 Amp at 240 Vac)

13

Relay Terminal Board - TRLYH1C

JR1J3/4

P28V

VCCCRelayOutput

RD

"12" of the above circuits

<T><S>

<R>

JS1

JT1

Same for<S>

Same for<T>

J3/4

J3/4

JA1

ID

ID

"1" of these circuits

Normal PowerSource,pluggable(7 Amp)

JF1

JF2

TB312

34

1

3

13

AlternatePower, 20 A24 V dc or125 V dc or115 V ac or240 V ac "6" of these

circuitsN125/24 Vdc

P125/24 V dc

ID

FU7

3.15 Ampslow-blow

FU1

PowerDaisy-Chain Monitor

>14 Vdc>60 Vac

Monitor>14 Vdc>60 Vac

<R>

Monitor Select

DryContactForm-C

"5" of these circuits

NC

NO

Com

K7K7

K7

27

26

25

K1

Sol 48

SpecialCircuit

NO

NC

Com

47

46

45

Sol

FieldSolenoid4

K1

NC

Com 2

1

K1

NO 3

K12

K12K12

K#

+

-

JP1

JP7

JP12

Snub

Snub

Output 01

Output 07

Output 12

CoilRelayDriver

Figure 9-50. Relay Output Board with Contact Voltage Sensing

InstallationTRLYH1C wiring is the same as for TRLY, but the jumpers are different. It is notpossible to jumper convert the solenoid driver circuits to isolated output contacts, butthe two fuses can be removed for this purpose. Twelve jumpers are available toisolate the contact voltage monitors. The default is jumper in place, and isolation isby removing the jumper. The board is shown in Figure 9-51.

Page 99: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-85

Relay Output Terminal BoardTRLYH1C (Contact Voltage Sensing)

CableConnectorsJA1, JR1,JS1, JT1

x x x x

4321

TB3 JF1 JF21

3

1

3

CustomerPower

CustomerReturn

Output 01 (NC)Output 01 (NO)Output 02 (NC)

-

-

-

-

-

-

FU1

FU2

FU3

FU4

FU5

FU6

Output 01 (COM)

FusesNeg,Return

Output 01 (SOL)Output 02 (COM)Output 02 (SOL)Output 03 (COM)Output 03 (SOL)Output 04 (COM)Output 04 (SOL)Output 05 (COM)Output 05 (SOL)Output 06 (COM)Output 06 (SOL)

Output 03 (NC)Output 02 (NO)

Output 03 (NO)Output 04 (NC)Output 04 (NO)Output 05 (NC)Output 05 (NO)Output 06 (NC)Output 06 (NO)

Output 07 (COM)

Output 09 (COM)

Output 08 (COM)

Output 10 (COM)

Output 11 (COM)

Output 12 (COM)Output 12 (SOL)

Output 07 (NC)

Output 08 (NC)

Output 09 (NC)

Output 10 (NC)

Output 11 (NC)

Output 12 (NC)

Output 07 (NO)

Output 08 (NO)

Output 09 (NO)

Output 10 (NO)

Output 11 (NO)

Output 12 (NO)

24681012141618202224

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x

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x

x

x

x

x

x

x

x

1357911131517192123

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x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

Power to Circuit 12

Powered,FusedSolenoidsForm-C

DryContactsForm-C

SpecialCircuit,Form-C,Ign. Xfmr.

+

+

+

+

+

+

FU7

FU8

FU9

FU10

FU11

FU12

JP2 Solenoid

1

4

2

3

JG1

JP7

JP8

JP9

JP10

JP11

JP12

Relays

JP1 Solenoid

JP3 Solenoid

JP4 Solenoid

JP5 Solenoid

JP6 Solenoid

Dry Contact

Dry Contact

Dry Contact

Dry Contact

Dry Contact

Special Circuit

Out 01

Out 02

Out 03

Out 04

Out 05

Out 06

PowerReturn

Alternative CustomerPower Wiring

N125/24 Vdc

P125/24 Vdc

PowerSource

FusesPos,High

Figure 9-51. TRLYH1C (Voltage Sensing) Terminal Board Wiring

Page 100: 6421C Vol II System Manual for Mark VI

9-86 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VCRC - Contact Input/Relay Output BoardThe VCRC board has the same functionality as the VCCC board but takes up onlyone VME slot. The VCCC daughter board is not required, and two front panelconnectors, J33 and J44, accept the contact inputs from the TBCI boards. Relayoutputs on TRLY use the J3 and J4 ports on the VME rack, as shown in Figure 9-52.VCRC does not support the TICI contact voltage sensing board.

P1

P2

37

37

VCRCSingle WidthFront Panel

J33

J44

JT1

JS1

JR1

TBCIContactInputs24 perboard

JT1

JS1

JR1

TBCIContactInputs24 perboard

TerminalBoards

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

JA1

JT1

JS1

TRLYRelay/SolOutputs12 perboard

VMEbackplanewiring

J3

J4

Figure 9-52. VCRC with Boards and Cabling to Contact Inputs and Relay Outputs

The VCRC firmware, configuration, and specifications are the same as for theVCCC board. Cabling to TBCI is shown in Figure 9-53.

Page 101: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-87

TBCI Contact Input Terminal Board

Cable to VMERack R

Connectorson VMERack R

BarrierType TerminalBlocks can be unpluggedfrom board for maintenance

Shield Bar

24681012141618202224

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xxxxxxxxxxxx

1357911131517192123

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262830323436384042444648

x

xxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x x

x

JS1

JR1

JT1

Cable to VMERack S

Cable to VMERack T

JE2JE1

Cable from Second TBCI

To Relay Output Boards

12 ContactInputs

12ContactInputs

VME Bus to VCMI

x

x

RUNFAILSTAT

VCRC

J3

J4

VCRC VME Board

J33

J44

Figure 9-53. VCRC with Contact Input Board and Cabling

Page 102: 6421C Vol II System Manual for Mark VI

9-88 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DRLYH1A and DRLYH1B - Simplex Wall Mounted RelayOutput Terminal BoardsVCRC is a single-width boardand is preferred to the VCCC.

There are two versions of the DRLY terminal board, IS200DRLYH1A andIS200DRLYH1B. The IS200DRLYH1B is certified by UL to UL-1604 Class 1,Groups A and B, Temperature Class T4, Division 2. This certification is commonlyreferred to as Class 1 Div. 2. The DRLYH1A has high powered relay contacts thanDRLYH1B.

Certification under UL-1604 Class 1, Groups A and B, Temperature Class T4,Division 2 certifies the following:• That the DSVO can operate in hazardous locations where acetylene and

hydrogen (groups A and B) may be present (class 1), but not likely to existunder normal operating conditions (division 2).

• That no part on the board will exceed 135 °C with the terminal board ambienttemperature at its maximum 65 °C (temperature class T4).

Note Turbine fuel is not specifically addressed by UL-1604, but UL equates turbinefuel to the acetylene and hydrogen groups (A and B) in terms of volatility andflammability.

The DRLY board is a compact relay output terminal board, designed for wallmounting (not DIN-rail mounting). The board has 12 output relays, each with oneForm-C contact, and connects to the VCRC processor board with a single 37-pincable, as shown in Figure 9-54. The 37-pin cable is identical to those used on thelarger TRLY terminal board. Two DRLY boards can be connected to the VCRC fora total of 24 contact outputs. Only a Simplex version of this board is available.Solenoid source power is not included, and there is one set of dry contacts per relay,(there are two NO contacts in series). The relay outputs meet NEMA Class B 300 Vcreepage and clearance. Unlike TRLY, there is no on-board suppression, and norelay state monitoring.

Table 9-23A lists the output ratings for the DRLYH1A board and Table 9-23B liststhe output ratings for the DRLYH1B board. The DRLYH1A is designed for generalpurpose use and has ratings covering most applications, whereas the DRLYH1Brelay is sealed and has smaller contacts for Class 1 Div. 2 applications. An on-boardID chip identifies the board to the VCRC for system diagnostic purposes

LED COIL

RelayDriver

P28V

JR1

DRLY Board

From J3 or J4on I/O rack,from VCRCboard

NC

COM

NO

Output 1of 12 DryContactOutputs

12 of the above circuitsID

1

2

SCOM

TB1

TB2

1

3

5

RD

P28 OK

Figure 9-54. Wall Mounted DRLY Board

Page 103: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-89

Table 9-23A. DRLYH1A Output Specifications

Application Conditions Output Specification

Environment 0 � 65 C ambient General purpose

GeneralRequirements

Safety, electrical, environmental,packaging

See GEH-6421C, Vol. I Mark VISystem Guide Chapter 4, Codes andStandards

28 V dc Resistive loadInductive load without suppression

10 A2 A, L/R = 7 ms

125 V dc Resistive loadInductive load without suppressionInductive load, MOV suppressionacross load, 2 contacts used in serieson the same relay

0.5 A0.2 A, L/R = 7 ms0.65 A, L/R = 150 ms

120 V ac Resistive loadInductive load without suppressionMotor load

10 A2 A, 10 A inrush, PF = 0.41/3 Hp

240 V ac Resistive loadInductive load without suppressionMotor load

3 A2 A, 10 A inrush, PF = 0.41/2 Hp

Response Time OperateRelease

15 ms typical10 ms typical

Table 9-23B. DRLYH1B Output Specifications

Application Conditions Output Specification

Environment 0 � 65 C ambient Class 1, Div. 2

GeneralRequirements

Safety, electrical, environmental,packaging

See GEH-6421C, Vol. I Mark VISystem Guide Chapter 4, Codes andStandards

28 V dc Resistive load 2 A

125 V dc Resistive load 0.5 A

120 V ac Resistive load 1 A

240 V ac Resistive load 0.5 A

Maximumswitching voltage

Dc, resistive loadAc, resistive load

220 V dc250 V rms

Maximumoperating current

Dc, resistive loadAc, resistive load

2 A dc2 A rms

Maximumswitching capacity

Dc, resistive loadAc, resistive load

60 watts125 VA

Response Time OperateRelease

3 ms typical2 ms typical

Page 104: 6421C Vol II System Manual for Mark VI

9-90 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThere is no shield terminationstrip with this design.

The DRLY board is supported on a metal plate, which can be wall mounted withfour screws. The 12 relay outputs are wired directly to the odd-numbered screws onthe terminal blocks as shown in Figure 9-55. The high-density Euro Block typeterminal blocks can be plugged into the numbered receptacles on the board. Thereare two separate screws on TB2 for the SCOM (chassis ground) connection, whichshould be as short a distance as possible.

123456789

101112

131415161718192021222324

252627282930313233343536

373839404142434445464748

495051525354555657585960

616263646566676869707172

K1

K8

K2

K3

K4

K5

K6

K7

K9

K10

K11

K12

TB2SCOMOutput 1 (NC)

Output 1 (COM)

Output 1 (NO)

Output 2 (NC)

Output 2 (COM)

Output 2 (NO)

Output 3 (NC)

Output 3 (COM)

Output 3 (NO)

Output 4 (NC)

Output 4 (COM)

Output 4 (NO)

Output 5 (NC)

Output 5 (COM)

Output 5 (NO)

Output 6 (NC)

Output 6 (COM)

Output 6 (NO)

Output 7 (NC)

Output 7 (COM)

Output 7 (NO)

Output 8 (NC)

Output 8 (NO)

Output 8 (COM)

Output 9 (NC)

Output 9 (NO)

Output 9 (COM)

Output 10 (NC)

Output 10 (COM)

Output 10 (NO)

Output 11 (NC)

Output 11 (COM)

Output 11 (NO)

Output 12 (NC)

Output 12 (COM)

Output 12 (NO)

1 2

JR1

Cable from J3 or J4on I/O rack, fromVCRC board

LED relaystate indicator

TB1

DRLY Board

MountingHoles

37-pin "D" shellconnector

Screw ConnectionsScrew Connections

P28 OK LED

Figure 9-55. DRLY Wiring and Cabling

Page 105: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-91

VSVO/TSVO - Servo/LVDTThe Servo Board (VSVO) controls four electrohydraulic servo valves that actuate thesteam/fuel valves. These four channels are divided between two TSVO terminalboards. Valve position is measured with linear variable differential transformers(LVDT). Three cables to VSVO use the J5 plug on the front of the board and theJ3/4 connectors on the VME rack, as shown in Figure 9-56. TSVO provides simplexsignals via the JR1 connector, and fans out TMR signals to the JR, JS, and JTconnectors. Plugs JD1 or JD2 are for an external trip from the protection module.

VME Bus to VCMI

TSVO Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VMERack R

Connectors onVME Rack R

Cables to VMERack S

Cables to VMERack T

x

x

RUNFAILSTAT

VSVO

J3

J4

VSVO VME Board

Barrier Type TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

x

x

JS1

JS5

JR5

JT1

JT5

JR1

24681012141618202224

xxxxxxxxxxxxx

1357911131517192123

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x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

From Second TSVO

Externaltrip

JD2JD1

J5

Figure 9-56. Servo/LVDT Terminal Board, Processor Board, and Cabling

Page 106: 6421C Vol II System Manual for Mark VI

9-92 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

OperationThe servo board provides four channels consisting of bi-directional servo currentoutputs, LVDT position feedback, LVDT excitation, and pulse rate flow inputs. TheTSVO provides excitation for, and accepts inputs from, up to six LVDT valveposition inputs. There is a choice of one, two, three, or four LVDTs for each servocontrol loop. If three inputs are used they are voted in a median selector. Two pulserate inputs are available for gas turbine flow measuring applications, and thesesignals come through TSVO and go directly to the VSVO board front at J5. Theseinputs are shown in Figure 9-57, and the outputs in Figure 9-58.

Each servo output is equipped with an individual suicide relay under firmwarecontrol that shorts the VSVO output to signal common when de-energized, andrecovers to nominal limits after a manual reset command is issued. Diagnosticsmonitor the output status of each servo voltage, current, and suicide relay.

J3

Capacity6 LVDT/R inputs on each of 2 TerminationBoards, and total of 2 active/passivemagnetic pickups.

3.2k Hz,7 V rmsExcitationSource

LVDT

Pulse RateInputsActive Probes0 - 12 k Hz

or LVDR

Pulse RateInputs,MagneticPickups0 - 12 k Hz

P24V1

(PR only availableon 1 of 2 TSVOs)

PRTTL

P24VR1

P24V2

PRMPU

P24VR2

P1TTL

<R> Control Module

Servo BoardVSVO

Controller

A/D Regulator

Application Software

3.2KHz

J3

SuicideRelay

P28V

ConfigurableGain

PulseRate

Connectoron front ofVSVOboard

J5

To ServoOutputs

Excitation

ToSecondTSVO

To TSVO

VoltageLimit

Servo Driver

D/A

JR5

TerminationBoard TSVOH1B(Input portion)

CurrentLimit

43

44

6 Ckts.

1

2

SCOM

41

42

39

(

Noise Suppr.

CL4546

48

47 (

40

JR1

P28VR

P28V

P1H

P1L

LVDT1H

LVDT1L

P2TTL

P2H

P2L

DigitalServoRegulator

D/A ConverterA/D Converter

Figure 9-57. LVDT and Pulse Rate Inputs, Simplex

Page 107: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-93

Each of the servo output channels can drive either one or two-coil servos in Simplexapplications, or two or three-coil servos in TMR applications. The two-coil TMRapplications are for 200# oil gear systems where each of two control modules driveone coil each, and the third control module has no servo coil interface. Servo cablelengths up to 300 meters (984 feet) are supported with a maximum two-way cableresistance of 15 ohms. Since there are many types of servo coils, a variety of bi-directional current sources are jumper selectable, as shown in Figure 9-58.

The primary and emergencyoverspeed systems will tripthe hydraulic solenoidsindependent of this circuit

Another trip override relay K1 is provided on each terminal board which is drivenfrom the <P> Protection Module. If an emergency overspeed condition is detected inthe Protection Module, the K1 relay will energize and disconnect the VSVO servooutput from the terminal block and apply a bias to drive the control valve closed.This is only used on Simplex applications to protect against the servo amplifierfailing high, and is functional only with respect to the servo coils driven from <R>.

Servo BoardVSVO

Controller

A/D

Application Software

3.2KHz

ConfigurableGain

P28V

PulseRate

Connector onfront of VSVO

J5Excitation

VoltageLimit

Servo Driver

Regulator

D/AFromLVDTTSVO

<R>

J3

P28VR

Coil Current Range10,20,40,80,120 ma

22 ohms89 ohms1k ohm

3.2KHz,7V rmsExcitationSourcefor LVDTs

JR1

Terminal BoardTSVOH1B (continued)

JP1

2 Ckts.

P28VR

JD2

JD1 Trip input from<P> Module(J1)

12

Servo coil from<R>

2 Ckts.

12

10204080

120120B

25

31

26

1 kohm

17

18

ToSecondTSVO

K1

SCOM

SCOM

SuicideRelay

S1RH

S1SH

S1RL

ER1H

ER1L

NS

NS

NoiseSuppr-ession

DigitalServoRegulator

D/A Converter

A/D Converter

Figure 9-58. Servo Coil and LVDT Outputs, Simplex (continued)

Only two pulse rate probes onone TSVO are used

In TMR applications the LVDT signals on TSVO fan out to three racks via JR1, JS1,and JT1, as shown in Figure 9-59. These connectors also bring power into TSVOwhere the three voltages are diode high-selected and current limited to supply 24 Vdc to the pulse rate active probes.

Page 108: 6421C Vol II System Manual for Mark VI

9-94 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

JR5

TerminalBoard TSVOH1B

(Input Portion)

LVDT

NoiseSuppression

P24V1

6 Ckts.

JS1

JT1

CL

JS5

JT5

P28V

1

2SCOM

Pulse RateInputsActive Probes0 - 12 kHz

43

44

Pulse RateInputs,MagneticPickups0 - 12 kHz

(PR only availableon 1 of 2 TSVOs)

41

42

39

(

P24VR1

CL4546

48

P24V2

P24VR2

47(

40

P1TTL

Diode VoltageSelect

<R>

Servo BoardVSVO

Controller

A/D

Application Software

3.2KHz

ConfigurableGain

P28V

PulseRate

Connector onfront of VSVOcard in <R>

J5Excitation

VoltageLimit

Servo Driver

To TSVO

<S><T>

J3

J3

Same for <S>

Same for <T>

J5 in <S>

J5 in <T>

To ServoOutputson TSVO

Regulator

D/A

JR1 J3

P28VR

P28VS

P28VT

3.2k Hz,7 V rmsExcitationSource

LVDT1H

LVDT1L

P1L

P2H

P2L

P2TTL

PRTTL

PRMPU

P1H

DigitalServoRegulator

D/A Converter

A/D Converter

Figure 9-59. LVDT and Pulse Rate Inputs, TMR

Page 109: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-95

For TMR systems, each servo channel has connections to three output coils with arange of current ratings up to 120 mA, selected by jumper, as shown in Figure 9-60.

<R>

22 ohms89 ohms1k ohm

3.2KHz,7V rmsExcitationSourceFor LVDTs

Trip input from<P> Not Used forTMR

Servo coil from <R>

Servo coil from <S>

3.2KHz,7V rmsExcitationSource

3.2KHz,7V rmsExcitationSourceFor LVDTs

Servo coil from <T>

Servo BoardVSVO

Controller

A/D

Application Software

3.2KHz

J3

SuicideRelay

ConfigurableGain

PulseRate

Connector onfront of VSVO

card

J5Excitation

VoltageLimit

Servo Driver

FromTSVOLVDT

<T><S>

J3

J 3

Regulator

D/A

Servo Current Range10,20,40,80,120 ma

JR1

Terminal BoardTSVOH1B (continued)

JP1

2 Ckts

P28VR

JD2

JD112

JS1

JT1

2 Ckts.

12

10204080

120120B

1 Ckt.

2 Ckts.

10204080

120120BJP2

2 Ckts.

10204080

120120BJP3

1 Ckt.

25

31

26

27

28

29

30

17

18

21

22

23

24

P28VR

S1RH

S1RL

ER1H

ER1L

S1SH

S1SL

ESH

ESL

S1TL

S1TH

ETH

ETL

NS

NS

NS

NS

NS

NS

Noise Suppression

DigitalServoRegulator

A/D Converter

Figure 9-60. Servo Coil Outputs and LVDT Excitation, TMR

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9-96 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

FeaturesThe range of servo coil ratings that can be jumper selected on the terminal board areshown in Table 9-24.

Table 9-24. Servo Coil Ratings

CoilType

NominalCurrent

Coil Resistance(Ohms)

Internal Resistance(Ohms)

Application

1 ± 10 mA 1,000 180 Simplex and TMR

2 ± 20 mA 125 442 Simplex

3 ± 40 mA 62 195 Simplex

4 ± 40 mA 89 195 TMR

5 ± 80 mA 22 115 TMR

6 ± 120 mA (A) 40 46 Simplex

7 ± 120 mA (B) 75 10 TMR

Table 9-24 summarizes the standard servo coil resistance and their associatedinternal resistance, selectable with the terminal board jumpers shown in Figure 3-36.In addition to these standard servo coils, it is possible to drive non-standard coils byusing a non-standard jumper setting. For example, an 80 mA, 125-ohm coil could bedriven by using a jumper setting 120B. The total resistance would be equivalent tothe standard setting.

Regulation of the output current is within 2% of the nominal full scale, whenproperly configured and loaded for the coil resistance specified in the previous table.Resolution over the full-scale range is 12 bits. Servo coil inductance is not aspecified parameter, but it is nominally less than 5 Henries.

Control Valve Position FeedbackValve position is sensed with either a four wire LVDT or a three-wire linear variabledifferential reluctance (LVDR). Redundancy implementations for the feedbackdevices is determined by the application software to allow the maximum flexibility.LVDT/Rs can be mounted up to 300 meters (984 feet) from the turbine control witha maximum two-way cable resistance of 15 ohms.

Two LVDT/R excitation sources are located on each terminal board for Simplexapplications and another two for TMR applications. Excitation voltage is 7 V rmsand the frequency is 3.2 kHz with a total harmonic distortion of less than 1% whenloaded. The excitation source is isolated from signal common (floating), and iscapable of operation at common mode voltages up to 35 V dc, or 25 V rms, 50/60Hz.

A typical LVDT/R has an output of 0.7 V rms as the zero stroke position of the valvestem, and an output of 3.5 V rms at the designed maximum stroke position (someapplications have these reversed). The LVDT/R input is converted to dc andconditioned with a low pass filter. Diagnostics perform a high/low (hardware) limitcheck on the input signal and a high/low system (software) limit check. The softwarelimit check is adjustable in the field.

Pulse Rate InputsTwo pulse rate inputs are cabled to a single J5 connector on the VSVO board front.This is a dedicated connection to minimize noise sensitivity on the pulse rate inputs.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-97

Inputs support both passive magnetic pickups and active pulse rate transducers (TTLtype) interchangeably without configuration. Normally, these inputs are not used onsteam turbine applications, but are usually for liquid fuel flow measurement, andmonitoring flow divider feedback in gas turbine applications. Pulse rate inputs can belocated up to 300 meters (984 feet) from the turbine control cabinet; this assumesshielded-pair cable is used with typically 70 nF single-ended or 35 nF differentialcapacitance and 15 ohms resistance.

A frequency range of 2 to 12 kHz can be monitored at a normal sampling rate ofeither 10 or 20 ms. Magnetic pickups typically have an output resistance of 200ohms and an inductance of 85 mH excluding cable characteristics. The transducer isa high impedance source, generating energy levels insufficient to cause a spark. Themaximum short circuit current is approximately 100 mA with a maximum poweroutput of 1 watt.

Front panelThree LEDs at the top of the VSVO front panel provide status information. Thenormal RUN condition is a flashing green, and FAIL is a solid red. The third LED isnormally off but displays a steady orange if an alarm condition exists in the board.

Specification

Table 9-25. Specification

Item Specification

Number of Inputs (per TSVO) 6 LVDT windings2 Pulse Rate signals (total of 2 per VSVO)External trip signal

Number of Outputs (per TSVO) 2 Servo Valves (total of 4 per VSVO board)4 Excitation Sources for LVDTs2 Excitation Sources for Pulse Rate transducers

Internal Sample Rate 200 Hz

Power Supply Voltage Nominal 24 V dc

LVDT Accuracy 1 % with 14-bit resolution

LVDT Input Filter Low pass filter with 3 down breaks at 50 rad/sec ±15%

LVDT Common Mode Rejection CMR is 1 Volt, 60 dB at 50/60 Hz

LVDT Excitation Output Frequency of 3.2 +/- 0.2 kHzVoltage of 7.00 +/- 0.14 V rms

Pulse Rate Accuracy 0.05% of reading with 16-bit resolution at 50 Hz frame rateNoise of acceleration measurement is less than ± 50Hz/sec for a 10,000 Hz signal being read at 10 ms

Pulse Rate Input Minimum signal for proper measurement at 2 Hz is 33mVpk, and at 12 kHz is 827 mVpk.

Magnetic PR Pickup Signal Generates 150 V p-p into 60 K ohms

Active PR Pickup Signal Generates 5 to 27 V p-p into 60 K ohms

Servo Valve Output Accuracy 2% with 12-bit resolutionDither amplitude and frequency adjustable

Fault detection Suicide servo outputs initiated by:Servo Current out of limits or not respondingRegulator Feedback signal out of limits

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9-98 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DiagnosticsServo diagnostics cover items such as out of range LVDT voltage, servo suicide,servo current open circuit, and short circuit. If any one of the signals goes unhealthya composite diagnostic alarm, L3DIAG_VSVO occurs. If the associated regulatorhas two sensors, the bad sensor is removed from the feedback calculation and thegood sensor is used. Details of the individual diagnostics are available from thetoolbox. The diagnostic signals can be individually latched, and then reset with theRESET_DIA signal if they go healthy.

Connectors JR1, JS1, JT1 on the terminal board have their own ID device that isinterrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the plug location.

Configuration OverviewLike all I/O boards, the VSVO module is configured using the toolbox. This softwareusually runs on a data-highway connected CIMPLICITY station or workstation.Table 9-26 summarizes the configuration choices and defaults. For details refer toGEH-6403, Control System Toolbox for Configuring the Mark VI TurbineController.

Table 9-26. Typical VSVO Configuration

Parameter Description Choices

Configuration

System Limits Select System Limits Enable, Disable

Regulator

Regulator 1 LVDT/R Calibration Online LVDT calibration, Yes/No

RegType Algorithm used in the regulator Unused 1_PulseRate2_PlsRateMAX 1_LVPosition2_LV_PosMIN 2_LV_PosMID2_LvpilotCyl 4_LVp/cylMAX4_LV_LM 2_LV_posMAX

RegGain Position Loop Gain in (%Current/%position) −100 to 100

RegNullBias Null Bias in % current, Balances Servo Spring Force −100 to 100

Dither Ampl Dither in % Current (minimizes hysteresis) Dither Amp: 0 to 10

Monitor

Monitor 1

Monitor Type Monitor Algorithm Unused 1_Lvposition2_LVposMIN 2_LVposMAX3_LVposMID 1_LvposRatio2_LVposRatio

J3:IS200TSVOH1A Terminal Board 1 connected to VSVO via J3 Connected, Not Connected

Servo Output1 Measured Output Current in Percent � Card Point Point Edit (Input FLOAT)

Reg Number Identify Regulator Number Unused, Reg1, Reg2, Reg3, Reg4

Servo_MA_Out Select current output for coil windings 10, 20, 40, 80, 120 mA

EnableCurSuic Select Suicide function based on current Enable, Disable

Curr_Suicide Percent current error to initiate suicide 0 to 100% (output current error)

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-99

EnablFbkSuic Select Suicide function based on feedback Enable, Disable

Fdbk_Suicide Percent position error to initiate suicide 0 to 100% (actuator position error)

Servo Output2 Measured Output Current in Percent - Card Point Point Edit (Input FLOAT)

J4:IS200TSVOH1A Terminal Board 2 connected to VSVO via J4 Connected, not connected

Servo Output3 Servo current output wired to valve - Card Point Point Edit (Input FLOAT)

Servo Output4 Servo current output wired to valve - Card Point Point Edit (Input FLOAT)

J5:IS00TSVOH1A Pulse Rate inputs cabled to J5 connector Connected, Not Connected

FlowRate1 Pulse rate input selected - Card Point Point Edit (Input FLOAT)

PRType Select Speed or Flow type signal Unused, Speed, or Flow

PRScale Convert Hz to Engineering Units 0 to 1,000

SysLim1Enabl Select System Limit Enable, Disable

SysLim1Latch Select whether alarm will latch Latch, Not Latch

SysLim1Type Select type of alarm initiation >= or <=

SysLimit Select alarm level in GPM or RPM 0 to 12,000

SystemLim2 Same as above Same as above

TMR_DiffLimt Difference Limit off voted pulse inputs (EU) 0 to 12,000

FlowRate2 Pulse rate input selected - Card Point (as above) Point Edit (Input FLOAT)

Card Points Signals Description �Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VSVO1 Card Diagnostic Input BIT

L3DIAG_VSVO2 Card Diagnostic Input BIT

L3DIAG_VSVO3 Card Diagnostic Input BIT

SysLim1PR1 Process Alarm Input BIT

SysLim2PR1 Process Alarm Input BIT

SysLim1PR2 Process Alarm Input BIT

SysLim2PR2 Process Alarm Input BIT

Reg1Suicide Reg1 Suicide relay status Input BIT

: : Input BIT

Reg4Suicide Reg4 Suicide relay status Input BIT

Reg1_PosAFlt Reg1, LM Machine only, Position A failure Input BIT

: : Input BIT

Reg4_PosAFlt Reg4, LM Machine only, Position A failure Input BIT

Reg1_PosBFlt Reg1, LM Machine only, Position B failure Input BIT

: : Input BIT

Reg4_PosBFlt Reg4, LM Machine only, Position B failure Input BIT

Reg1_PosDif1 Reg1, LM Machine only, Position Diff failure Input BIT

: : Input BIT

Reg4_PosDif1 Reg4, LM Machine only, Position Diff failure Input BIT

Reg1_PosDif2 Reg1, LM Machine only, Position Diff failure Input BIT

: : Input BIT

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9-100 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Reg4_PosDif2 Reg4, LM Machine only, Position Diff failure Input BIT

RegCalMode Regulator under Calibration Input BIT

Reg1_Fdbk Regulator 1 Feedback Input FLOAT

: : Input FLOAT

Reg4_Fdbk Regulator 4 Feedback Input FLOAT

PilotFdbk1 Pilot/Cyl Input FLOAT

: : Input FLOAT

PilotFdbk4 Pilot/Cyl Input FLOAT

Reg1_Error Null Bias error Input Input FLOAT

: : Input FLOAT

Reg4_Error Null Bias error Input Input FLOAT

Accel1 GPM/sec Input FLOAT

Accel2 GPM/sec Input FLOAT

Mon1 Position Monitor Input FLOAT

: : Input FLOAT

Mon12 Position Monitor Input FLOAT

CalibEnab1 Enable Calibration Reg 1 Output BIT

: : Output BIT

CalibEnab4 Enable Calibration Reg 4 Output BIT

SuicideForce1 Force Suicide Reg 1 Output BIT

: : Output BIT

SuicideForce4 Force Suicide Reg 4 Output BIT

PossDiffEnab1 Position Difference Enable Reg 1, LM only Output BIT

: : Output BIT

PossDiffEnab4 Position Difference Enable Reg 4, LM only Output BIT

Reg1_Ref Reg 1 Position Ref Output FLOAT

: : Output FLOAT

Reg4_Ref Reg 4 Position Ref Output FLOAT

Reg1-GainMod Reg 1 Gain Modifier Output FLOAT

: : Output FLOAT

Reg4-GainMod Reg 4 Gain Modifier Output FLOAT

Reg1_NullCor Reg 1 Null Bias Correction Output FLOAT

: : Output FLOAT

Reg4_NullCor Reg 4 Null Bias Correction Output FLOAT

Internal Variables Internal variables to service the auto-calibrationdisplay, not configurable

Page 115: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-101

InstallationSensors and servo valves are wired directly to two I/O terminal blocks mounted onthe terminal board. Each block is held down with two screws and has 24 terminalsaccepting up to #12 AWG wires. Shielded twisted 18 AWG wire is recommendedfor the pulse rate sensors. A shield termination strip attached to chassis ground islocated immediately to the left of each terminal block. External trip wiring isplugged into either JD1 or JD2. The screw connections and position choices for theservo current jumpers are shown in Figure 9-61.

Servo/LVDT Terminal Board TSVOH1B

Up to two #12 AWG wires perpoint with 300 volt insulation

Terminal Blocks can be unpluggedfrom terminal board for maintenance

To ConnectorsJR5, JS5, JT5,JR1, JS1, JT1

LVDT 01 (H)LVDT 02 (H)LVDT 03 (H)

LVDT 01 (L)LVDT 02 (L)LVDT 03 (L)LVDT 04 (L)LVDT 05 (L)LVDT 06 (L)

Exc R1 (L)Exc R2 (L)Exc S (L)Exc T (L)

LVDT 06 (H)

Exc R1 (H)Exc R2 (H)Exc S (H)Exc T (H)

Servo 01 R (L)

Servo 01 T(L)

Pulse 01 (24R)

Servo 01 R (H)

Servo 01 T (H)

Pulse 01 (24V)

Servo 01 S (H)

Servo 01 SMX (H)

Pulse 01 (H)

24681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

JP1

JP2

JP3

JP4

JP5

JP6

JD1

JD2

External Trip

LVDT 04 (H)LVDT 05 (H)

Servo 01 S (L)

Servo 02 R (H)

Servo 02 T (H)

Servo 02 R (L)Servo 02 S (L)Servo 02 T (L)

Servo 02SMX(H)

Pulse 01 (L)Pulse 02 (24V)Pulse 02 (H)Pulse 02 (24R)

Pulse 02 (L)

12

1

2

GND

Servo 01 R

Servo 01 S

Servo 01 T

Servo 02 T

Servo 02 S

Servo 02 R

External Trip from <P>

GND

Jumper Choices:120B +/-120 ma (75 ohm coil)120A +/-120 ma (40 ohm coil)80 +/- 80 ma40 +/- 40 ma20 +/- 20 ma10 +/- 10 ma

Pulse 01 (TTL)Pulse 02 (TTL)

Servo 02 S (H)

Figure 9-61. Servo/LVDT Terminal Board Wiring

Page 116: 6421C Vol II System Manual for Mark VI

9-102 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DSVO - Simplex DIN-rail Mounted Servo Terminal BoardThe DSVO board is a compact servo terminal board, designed for DIN-railmounting. This board has two servo valve outputs, I/O for six LVDT positionsensors, and two active pulse rate inputs for flow measurement, as shown in Figure9-62 (DSVOH1A) and Figure 9-63 (DSVOH1B, H2B). Servo coil currents rangingfrom 10 to 120 mA can be jumper selected. DSVO connects to the VSVO processorboard with a 37-pin cable and a 15-pin cable, which are identical to those used on thelarger TSVO board. The terminal boards can be stacked vertically on the DIN-rail toconserve cabinet space. Two DSVO boards can be connected to the VSVO, ifrequired. Only the Simplex version of this board is available.

The on-board functions and high frequency decoupling to ground are the same asthose on the TSVO. High density Euro Block type terminal blocks are permanentlymounted to the board with six screws for the ground connection (SCOM). Each ofthe two connectors, JR1 and J5, connect to signals from on-board ID chips whichidentify the board to the VSVO for system diagnostic purposes.

There are currently two versions (groups) of the DSVO, IS200DSVOH1B andIS200DSVOH2B. The IS200DSVOH1B is a direct replacement for the previousIS200DSVOH1A design. The IS200DSVOH2B is certified by UL to UL-1604 Class1, Groups A and B, Temperature Class T4, Division 2. (This certification iscommonly referred to as Class 1 Division 2.

Certification under UL-1604 Class 1, Groups A and B, Temperature Class T4,Division 2 certifies the following:• That the DSVO can operate in hazardous locations where acetylene and

hydrogen (groups A and B) may be present (class 1), but not likely to existunder normal operating conditions (division 2).

• That no part on the board will exceed 135 °C with the terminal board ambienttemperature at its maximum 65 °C (temperature class T4).

Note Turbine fuel is not specifically addressed by UL-1604, but UL equates turbinefuel to the acetylene and hydrogen groups (A and B) in terms of volatility andflammability.

The differences between the H1B and H2B versions of DSVO are shown in thefollowing chart.

Function H1B H2B

Class 1, Div. 2Certification

No Yes

Servo ValvesAccommodated

75, 40, 22, 62, 89, 125,1k Ohms

1k Ohms (10 mA)

LVDT Excitation Outputs Qty. = 2, 120 mA each Qty. = 4, 60 mA each

Excitation for Pulse RateProbes

Qty. = 2, 24 V dc, 100mA each

No

Additional Pulse RateInputs for TTL Signals

No Qty. = 2

Page 117: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-103

JR5

DSVOH1A

LVDTExcitation

Jumper position:120B is 75 ohm coil120A is 40 ohm coil

P28VT External TripK1

Servovalvecoil

17

21

18

JP1

10204080

120A120B

Servovalvecoil

19

22

20

JP2

10204080

120A120B

P28VR

P28VR

3.2 kHz Excitation131415

16

JD2

JD112

1

2

SCOM

SCOM

SR1H

SS1H

SR1L

SR2H

SS2H

SR2L

SCOM

K1

3.2k Hz, 7 V rmsExcitation Source

Pulse RateInputs -Active Probes0 - 12 kHz

23Current

Limit

24

25

26

NoiseSuppression

Pulse RateInputs -Active Probes0 - 12 kHz

27

28

29

30

1

2

3

4

JR1

P28V

CL

P28V

P28V

Total of sixLVDT inputcircuits

Cable to J3 connectorin I/O rack for VSVO board

Cable to front of VSVO board

ID

SCOM

SCOM

LVDTLVDT1H

LVDT1L

P1 24V

P1 24R

P1 H

P1 L

P2 24V

P2 24R

P2 H

P2 L

E1HE1L

E2H

E2L

NS

NS

NoiseSuppression

Figure 9-62. DSVOH1A Board

Page 118: 6421C Vol II System Manual for Mark VI

9-104 •••• Chapter 9 I/O Board Descriptions Mark VI System Gu

JR1

S

S

Total of six LVDTinput Ckts.

Exc

LVDT

12

S

S

LV1H

LV2L

LV2H

LV1L

CL P28VRS

S

S

P24V1

P24R1S

PR

CL P28VRS

S

S

P24V2

P24R2S

PR

PR1H

PR1L

PR2H

PR2L

RP28V

4

4

EXTTRIP

ServoValveCoils

ERL1

ERH1 13

14

39

40

4

3

2

1

24

23

27

26

25

30

29

28

JD1

JD2K1

P28VR

SSS1H

SSR1H

SR1L

1

17

21

ID

S18

JR5

4ERL2

ERH2

2

12

P28VR

K1

ServoValveCoils

SSS2H

SSR2H

SR2L

19

22

JP2

S20

P28VR

K1 10204080

120A120B

TTL1

TTL2

37

38

v:06-04-01

15

16

41

42

S

(IS200DSVOH1B Replaces IS200DSVOH1A)

332�

332�

JPx (mA) Coil Res. 120 B 75 ohm 120 A 40 ohm 80 22 ohm 40 62 or 89 ohm 20 125 ohm 10 1000 ohm

170�

170�

432�185�105�

36�0�

JP1

10204080

120A120B

170�

170�

432�185�105�

36�0�

CHASSIS

SCOM31 3635343332

(SCREWS 37 & 38 ARE NC IN H1B)

PCOM

PCOM

S

(SCREWS 39-42 ARE NC IN H1B)

10� IN VSVO

10� IN VSVO

10� IN VSVO

10mA, 1K Coil

10mA, 1K Coil

PCOM

H2B is Certified to UL-1604 Class 1 Div 2

LVD

T Ex

cita

tionERL3

ERH3

ERL4

ERH4

(SCREWS 23, 24,27,28 ARE NC IN H2B)

PCOM

FROM CNTL RACK P28

PCOM{

P28VR

H1B ONLY

10mA, 1K CoilH2B ONLY

H1B ONLY

10mA, 1K CoilH2B ONLY

CONN SHLD

CONN SHLD

ID

FROM CNTL RACK {

LVDT Input TB Locations: LVx H L . 1 1 2 2 3 4 3 5 6 4 7 8 5 9 10 6 11 12

Current Limit

Mark VI Servo Valve Terminal Board IS200DSVOH1B, H2B

Figure 9-63. DSVOH1B, H2B Board (Part 1 of 2)

b

ide GEH-6421C, Vol. II

Page 119: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-105

Mark VI Servo Valve Terminal Board IS200DSVOH1B, H2B

VSVODSVOH#B

10 ohm

ConfigurableGain

J3/J4Backplane

J2

JP1

ServoCoils

P28VP28VR

Ext TripCkt

JD1

JD2

SuicideRelay

VoltageLimiter11 vlt

Current Ref

Dir. of Current toShutdown Actuated

Device

VSVO

3.2 Khz

To Second DSVOTermination Board

Monitoring

Monitoring

80

20

10

120A

40

120B (75 Ohm Coil)

(40 )

LVDT Excitation:

J4

J3 JR1

DSVOH#B

To LVDT's

1314

1516

P2

Servo Driver Circuit:

(22)

(62 or 89)

(125)

(1K)

4142

3940

#1

#4 -- NC in H1B

#2

#3 -- NC in H1B7.0 Vrms

10 mA, 1K Coil

10 mA, 1K CoilH2B Only

H1B Only

ACOM

120 mA Each

Monitoring

Monitoring7.0 Vrms120 mA Each

P2

Isc = 19mA

Figure 9-63. DSVOH1B, H2B Board (Part 2 of 2)

Page 120: 6421C Vol II System Manual for Mark VI

9-106 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThere is no shield terminationstrip with this design.

The DSVO board slides into a plastic holder, which mounts on the DIN-rail. Theservo I/O are wired directly to the Euro Block type terminal block as shown inFigure 9-64 (DSVOH1A) and Figure 9-65 (DSVOH1B, H2B). This has 36 terminals(DSVOH1A) or 42 terminals (DSVOH1B, H2B); typically #18 AWG shieldedtwisted pair wiring is used. There are six screws for the SCOM (ground) connection,which should be as short a distance as possible.

LVDT 1 (High)135

11

79

1314 1517192123252729313335

2468

1012

1618202224262830

36

3234

Excitation 1 (High)

Pulse 1 (24V)

Chassis Ground

SCOM

Euro Block typeterminal block

Plastic mountingholder

DSVOH1A

DIN-rail mounting

Chassis GroundChassis Ground

Chassis Ground

Chassis Ground

LVDT 2 (High)LVDT 3 (High)

LVDT 5 (High)LVDT 4 (High)

LVDT 6 (High)

LVDT2 (Low)LVDT1 (Low)

LVDT4 (Low)LVDT3 (Low)

LVDT5 (Low)LVDT6 (Low)

Excitation 2 (High)Excitat1(Low)Excitat2(Low) ServoR1 (High)

ServoR2 (High)ServoS1 (High)

ServoR1(Low)ServoR2(Low)

ServoS2(High)

Pulse 1 (High)Pulse 2 (24V)Pulse 2 (High)

Pulse1 (Low)Pulse 2(24R)Pulse2 (Low)

Pulse 1(24R)

JD2 JD1External tripcircuits

Chassis Ground

Screw Connections

JR1

37-pin "D" shellconnector withlatching fasteners

Cable to J3connector in I/Orack for VSVOboard

JR5

Cable to J5 onfront of VSVOboard

JP1

JP2

120A

120B

Screw Connections

CoilCurrentJumpers

10204080120A

120B

10204080

Figure 9-64. DSVOH1A Wiring and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-107

LVDT 1 (High)135

11

79

1314 1517192123252729313335

2468

1012

1618202224262830

36

3234

Excitation 1 (High)

Pulse 1 (24V)

Euro Block typeterminal block

Plastic mountingholder

DSVOH1B, H2B

DIN-rail mounting

31 - 36 DSVOSCOM, connect tochassis ground

LVDT 2 (High)LVDT 3 (High)

LVDT 5 (High)LVDT 4 (High)

LVDT 6 (High)

LVDT2 (Low)LVDT1 (Low)

LVDT4 (Low)LVDT3 (Low)

LVDT5 (Low)LVDT6 (Low)

Excitation 2 (High)Excitat1(Low)Excitat2(Low) ServoR1 (High)

ServoR2 (High)ServoS1 (High)

ServoR1(Low)ServoR2(Low)

ServoS2(High)

Pulse 1 (High)Pulse 2 (24V)Pulse 2 (High)

Pulse1 (Low)Pulse 2(24R)Pulse2 (Low)

Pulse 1(24R)

JD2 JD1

External tripcircuits

Screw Connections

JR1

JR5

JP1 JP2

120A120B

Screw Connections

CoilCurrentJumpers

10204080

120A120B

10204080

373941

384042

Pulse1TTL (High)Excitation3 (High)Excitation4 (High)

Pulse2TTL (High)Excitation3 (Low)Excitation4 (Low)

H1B and H2B Connection DifferencesScrew # H1B H2B23, 24 N/C27, 28 N/C37, 38 N/C39, 40 N/C41, 42 N/C

N/C = Not Connected

37-pin "D" shellconnector withlatching fasteners

Cable to J3connector in I/Orack for VSVOboard

Cable to J5 onfront of VSVOboard

Figure 9-65. DSVOH1B, H2B Wiring and Cabling

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9-108 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VTUR/TTUR - Turbine ControlThe Turbine Control Board (VTURH1) controls three primary overspeed tripsolenoids and automatic synchronizing. It also interfaces to four passive pulse ratedevices, and monitors shaft voltage and current. The speed signal cable to VTURuses the J5 plug on the front of the board, and the other signals use the J3 connectoron the VME rack. Terminal board TTUR provides simplex signals through the JRconnector, and fans out TMR signals to the JR, JS, and JT connectors. J4 on theVME rack connects to the TRPG terminal board described in the Primary Tripsection. The cable connections are shown in Figure 9-66.

A two-slot version of this board (VTURH2) is available for driving six trip solenoidsusing two TRPG boards. VTURH2 only accepts eight flame detectors.

VME Bus to VCMI

TTURH1B Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VMERack R

Connectors onVME Rack R

Cables to VMERack S

Cables to VMERack T

x

x

RUNFAILSTAT

VTUR

J3

J4

VTUR VME Board

BarrierType TerminalBlocks can be unpluggedfrom board for maintenance

ShieldBar

x

x

JS1

JS5

JR5

JT1

JT5

JR1

2468

1012141618202224

xxxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

Cable to TRPG

J5

TB3

Wiring toTTL SpeedPickups

Figure 9-66. Turbine Control Terminal Board, Processor Board, and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-109

OperationIn the Simplex application, up to four pulse rate signals may be used to measureturbine speed. Pulse rate to digital circuits are on the VTUR board. Generator andbus voltages are brought into VTUR for automatic synchronizing in conjunction withthe turbine controller and GE excitation system. TTUR has permissive generatorsynchronizing relays and controls the main breaker relay coil 52G. Shaft voltage ispicked up with brushes and monitored along with the current to the machine case.VTUR alarms high voltages and tests the integrity and continuity of the circuitry.

Note 2: An externalclosed auxiliarycontact must be providedthe Breaker close coilas indicated.Note 3: Signal tocomes fromthrough TRPG &

Gen.Volts120 V acfrom PT

BusVolts120 Vacfrom PT

Machine Case

175V

14V

41

ToTPRO

#1 PrimaryMagneticSpeed PU 42

#3 PrimaryMagneticSpeed PU

45

46

#4 PrimaryMagneticSpeed PU

47

48

Shaft

TripSignalstoTRPG

Note 1: TTL optionavailable on first twoPickups.

JR1

Terminal Board TTURH1B (continued)

28Vdc

K25P

02 01

52G

a

TMRSMX

JP1

GeneratorFeedback

P125Gen

RD

RD K25

K25A

Mon

Synch. Perm.

Auto Synch

Synch. checkfrom VPRO

08 0506,7 04 03

TMR

SMXJP2

N125Gen

Bkr Coil

52G b

AUT

MAN

BKR

Mon

Mon

J8

MPU1RH

MPU1RL

<R> ControlRack

TurbineBoardVTUR

J3

Connectorsat bottom ofVME rack

J3

J5

J4

Terminal BoardTTURH1B (input

ti ) JR1 17

18

19

20

21

22

23

24

FilterClamp

ACCoupling

JR5

FilterClampACCoupling

FilterClamp

ACCoupling

ID

ID

)TTL1_R

GENH

GENL

BUSL

BUSH

SVH

SVL

SCH

SCL

5 (TB3)

6 (TB3)

#2 PrimaryMagneticSpeed PU

43

44

MPU2RH

MPU2RL

)TTL2_R

FilterClamp

ACCoupling

PulseRate/Digital

MUX

A/D

AC&DCshafttest

NoiseSuppression

NS

NS

NS

NS

NS

NS

NS

NS

Figure 9-67. Turbine Control Inputs, Synchronizing, and Primary Trip Interface, Simplex

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9-110 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

In TMR applications all inputs fan to the three control racks. Control signals cominginto TTUR from R, S, and T are voted before they actuate permissive relays K25 andK25P. Relay K25A is controlled by the VPRO and TREG boards. All three relayshave two normally open contacts in series with the breaker close coil. The TMRarrangement is shown in Figure 9-68.

Terminal BoardTTURH1B (input portion)

Gen. Volts120 Vacfrom PT

17

18

19

20

Bus Volts120 Vacfrom PT

MachineC

175V

14V

21

22

23

24

#1 PrimaryMagneticSpeed PU

#2 PrimaryMagneticSpeed PU

#3 PrimaryMagneticSpeed PU

33

34

25

26

ToTPRO

TripSignals toTRPG

To RackS

To Rack T

Shaft

JR1

Terminal BoardTTURH1B (continued)

28Vdc

02 01

52G aGenerator

Feedback

Note 1: TTL option onlyavailable on first two ccts.each group of 4

P125Gen

RDK25P

RD K25

K25A

Mon

Synch.Permissve

Auto Synch.

Synch. checkfrom VPRO

08 0507 04 03

23

23

JS1

JT1

N125Gen

Bkr Coil

52G b

AUTO

MAN

BKRH

J8

MPU1RH

MPU1RL

MPU1SL

MPU1SH

MPU1TL

MPU1TH

06

B52GL

B52GH

TMRSMX

JP1

TMR

SMXJP2

<R>TurbineBoardVTUR J3

Connectors at bottom of

VME rack

J3

J5

J4

<S><T>

J3

J3

JR1

FilterClamp

ACCoupling

FilterClamp

ACCoupling

FilterClamp

ACCoupling

JR5

42

JS5

JT5

4 Circuits*

4 Circuits*

4 Circuits*

JS1

JT1

41)TTL1R

)TTL1S

)TTL1T

5 (TB3)

1 (TB3)

3 (TB3)

GENH

GENL

BUSH

BUSL

SVH

SVL

SCH

SCL

Note 2: An externalclosed auxiliarycontact must be providedthe Breaker close coilas indicated.Note 3: Signal tocomes fromthrough TRPG &

f( )

PulseRate/Digital

MUX

A/D

AC&DCshafttest

NoiseSuppression

NS

NS

NS

NS

NS

NS

NS

Figure 9-68. Turbine Control Inputs, Synchronizing, and Primary Trip Interface, TMR

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-111

Features

Speed PickupsAn interface is provided for four passive, magnetic speed inputs with a frequencyrange of 2 − 14,000 Hz. The median speed signal is used for speed control and forthe primary overspeed trip signal. Using passive pickups on a 60-tooth wheel, circuitsensitivity allows detection of 2 rpm turning gear speed to determine if the turbine isstopped (zero speed). If automatic turning gear engagement is provided in the turbinecontrol, this signal initiates turning gear operation.

The primary overspeed trip calculations are performed in the controller usingalgorithms similar to (but not the same as) those shown in the section on the VPROProtection Module. The fast trip option used on gas turbines runs in VTUR and isdescribed below.

Primary Trip Solenoid InterfaceThe normal Primary Overspeed trip is calculated in the controller and passed to theVTUR and then to the TRPG terminal board. TRPG contains magnetic relays forinterface with the Electrical Trip Devices (ETDs). TRPG works in conjunction withthe TREG board to form the Primary and Emergency sides of the interface to theETDs. Usually this applies to turbines which do not have a mechanical overspeedbolt and require a separate emergency overspeed (EOS) system. Three ETDs can bedriven from each TRPG/TREG combination with the positive side of each solenoidconnected to the TREG and the negative side connected to the TRPG. A metal oxidevarister (MOV) and a current limiting resistor are used in each circuit.

Two different versions of the TRPG are available, with version 1 used for tripleredundant (TMR) systems and version 2 used for Simplex systems. The onlydifference is that the TMR version has three voting relays per ETD circuit and theSimplex version has one relay per circuit. The VTUR board monitors the currentflowing in its relay driver control line to determine its energize or de-energizevote/status of the relay coil. A normally closed contact from each relay on the TRPGboard is monitored by the diagnostics to determine its proper operation.

Shaft Voltage and Current MonitorBearings can be damaged by the flow of electrical current from the shaft to the case.This current can occur for several reasons.• A static voltage can be caused by droplets of water being thrown off the last

stage buckets in a steam turbine. This voltage will build up until a dischargeoccurs through the bearing oil film.

• An ac ripple on the dc generator field can produce an ac voltage on the shaftwith respect to ground through the capacitance of the field winding andinsulation. Note that both of these sources are weak, so high impedanceinstrumentation is used to measure these voltages with respect to ground.

• A voltage may be generated between the ends of the generator shaft due to dis-symmetries in the generator magnetic circuits. If the insulated bearings on thegenerator shaft break down, the current will flow from one end of the shaftthrough the bearings and frame to the other end. Brushes can be used todischarge damaging voltage buildup, and a shunt should be used to monitor thecurrent flow.

The turbine control continuously monitors the shaft to ground voltage and current,and alarms excessive levels. There is an ac test mode and a dc test mode. The ac testapplies an ac voltage to test the integrity of the measuring circuit.

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9-112 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

The dc test checks the continuity of the external circuit, including the brushes,turbine shaft, and the interconnecting wire.

Note The dc test is driven from the <R> controller only. If the <R> controller isdown, this test cannot be run successfully.

Specification

Table 9-27. VTUR Board Specifications

Item Specification

Number of Inputs TTUR: 12 Passive Speed Pickups1 Shaft Voltage and 1 Shaft Current Measurement1 Generator and 1 Bus VoltageGenerator Breaker Status contact

VTUR: 4 Passive Speed Pickups1 Shaft Voltage and 1 Current Measurement1 Generator and 1 Bus VoltageGenerator Breaker Status8 Flame Detectors from first TRPG

Number of Outputs TTUR: Generator Breaker Coil, 5A at 125 V dcVTUR: Automatic Synchronizing

Primary Trip Solenoid Interface, 3 outputs to TRPGAdditional 3 trip outputs from second TRPG using VTURH2

Trip Solenoids (TRPG) Solenoids draw up to 1 A at 125 V dc and have a time constant of L/R =0.1 sec.

Power Supply Voltage TTUR: Nominal 125 V dc to breaker coil

MPU Pulse Rate Range 2 Hz to 14 kHz

MPU Pulse Rate Accuracy 0.05% of reading

MPU Input Circuit Sensitivity 27 mV pk (detects 2 rpm speed)

Shaft Voltage Monitor Voltage signal is ± 5 V dc pulses from 0 to 2,000 Hz

Shaft Voltage wiring Up to 300 m (984 ft), with maximum two-way cable resistance of 15ohms

Shaft Voltage DC Test Applies a 5 V dc source to test integrity of the circuit. Circuit reads adifferential resistance between 0 and 150 ohms within ± 5 ohms.Readings above 50 ohms indicate a fault.Return signal is filtered to provide 40 dB of noise attenuation at 60 Hz.

Shaft Voltage AC Test Applies a test voltage of 1 kHz to the input of the VTUR shaft voltagecircuit (R module only).

Shaft current input Measures ac voltage up to 0.1 V pp

Generator and Bus VoltageSensors

Two Single Phase Potential Transformers, with secondary outputsupplying a nominal 115 V rms.Each input has less than 3 VA of loading.Allowable voltage range for synch is 75 to 130 V rms.Each PT input is magnetically isolated with a 1,500 V rms barrier.Cable length can be up to 1,000 ft. of 18 AWG wiring.

Synchronizingmeasurements

Frequency Accuracy 0.05% over 45 to 66 Hz range.Zero crossing of the inputs is monitored on the rising slope.Phase Difference Measurement is better than ± 1 degree.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-113

Generator Breaker Circuits(Synchronizing)

External circuits should have a voltage range within 20 to 140 V dc. Theexternal circuit must include a Normally Closed Breaker Aux Contact tointerrupt the current.Circuits are rated for NEMA class E creepage and clearance.250 V dc applications require interposing relays.

Contact Voltage Sensing 20 V dc indicates high and 6 V dc indicates low.Each circuit is optically isolated and filtered for 4 ms.

Configuration OverviewTable 9-28 summarizes the configuration choices and defaults. For details refer toGEH-6403, Control System Toolbox for Configuring the Mark VI TurbineController.

Table 9-28. Typical VTUR Configuration

Parameter Description Choices

Configuration

VTUR System Limits Select System Limits Enable, Disable

SMredundancy Select Simplex or Redundant system Simplex or TMR

AccelCalType Select Acceleration Calculation Type Slow, Medium, Fast

FastTripType Select Fast Trip algorithm Unused, PR_Single, PR_Max

J3J5:IS200TTURH1A TTUR connected to VTUR via J3 and J5 Connected, Not Connected

PulseRate1 Pulse Rate Input 1 - Card Point Point Edit (Input FLOAT)

PRType Select Speed or Flow type input Unused, Speed, Flow,Speed_LM

PRScale Select Pulses per Revolution 0 to 1,000

SysLim1Enable Select System Limit 1 Enable, Disable

SysLim1Latch Select whether alarm will latch Latch, Not Latch

SysLim1Type Select type of alarm initiation >= or <=

SysLimit1 Select alarm level in GPM or RPM 0 to 20,000

SysLim2Enable Select System Limit 2 (as above) Enable, Disable

TMRDiffLimit Difference Limit for voted PR inputs EU 0 to 20,000

ShVoltMon Shaft Voltage Monitor - Card Point Point Edit (Input FLOAT)

SysLim1Enable Select System Limit 1 Enable, Disable

SysLim1Latch Select whether alarm will latch Latch, Not Latch

SysLim1Type Select type of alarm initiation >= or <=

SysLimit1 Select alarm level in frequency 0 to 100

SysLim2Enable Select System Limit 2 (as above) Enable, Disable

ShCurrMon Shaft Current Monitor - Card Point Point Edit (Input FLOAT)

ShuntOhms Shunt resistance 0 to 100

Shunt Limit Shunt maximum ohms 0 to 100

Brush Lim Shaft Brush maximum ohms 0 to 100

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9-114 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

SysLim1Enable Select System Limit 1 Enable, Disable

SysLim1Latch Select whether alarm will latch Latch, Not Latch

SysLim1Type Select type of alarm initiation >= or <=

SysLimit1 Select alarm level in Amps 0 to 100

SysLim2Enable Select System Limit 2 Enable, Disable

GenPT_KVolts Generator Potential Transfomer - Card Point Point Edit (Input FLOAT)

PT_Input PT input in kVrms for PT output 0 to 1,000

PT_Output PT output in Vrms, nominal 115 V rms 0 to 150

SysLim1 Select alarm level in kVrms 0 to 1,000

SysLim2 Select alarm level in kVrms 0 to 1,000

BusPT_Kvolts Bus Potential Transformer - Card Point Point Edit (Input FLOAT)

Ckt_Bkr Circuit Breaker - Card Point Point Edit (Input BIT)

System Frequency Select frequency in Hz 50 or 60

CB1CloseTime Breaker 1 Closing Time, ms 0 to 1,000

CB1 AdaptLimit Breaker 1 Self Adaptive Limit, ms 0 to 1,000

CB1 AdaptEnabl Select Breaker 1 Self Adaptive Limit Enable, Disable

CB1FreqDiff Breaker 1 special window Frequency Difference, Hz 0 to 10

CB1PhaseDiff Breaker 1 special window Phase Diff, Degr 0 to 30

CB2CloseTime Breaker 2 Closing Time, ms (as above) 0 to 1,000

J4:IS200TRPGH1A TRPG Terminal Board, 8 Flame Detectors Connected, Not Connected

Card Points Signals Description � Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VTUR1 Card Diagnostic Input BIT

L3DIAG_VTUR2 Card Diagnostic Input BIT

L3DIAG_VTUR3 Card Diagnostic Input BIT

ShShntTst_OK Shaft Voltage Monitor Shunt Test OK Input BIT

ShBrshTst_OK Shaft Voltage Brush Test OK Input BIT

CB_Volts_OK L3BKR_VLT Circuit Breaker Coil Voltage Available Input BIT

CB_K25P_PU L3BKR_PERM Sync Permissive Relay Picked Up Input BIT

CB_K25_PU L3KBR_GES Auto Sync Relay Picked Up Input BIT

CB_K25A_PU L3KBR_GEX Sync Check Relay Picked Up Input BIT

Gen_Sync_LO Generator Sync Trouble (Lockout) Input BIT

L25_Command -------- Input BIT

Kq1_Status -------- Input BIT

: : Input BIT

Kq6_Status -------- Input BIT

FD1_Flame -------- Input BIT

: : Input BIT

FD16_Flame -------- Input BIT

SysLim1PR1 -------- Input BIT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-115

: : Input BIT

SysLim1PR4 -------- Input BIT

SysLim1SHV AC Shaft Voltage Frequency High L30TSVH Input BIT

SysLim1SHC AC Shaft Current High L30TSCH Input BIT

SysLim1GEN -------- Input BIT

SysLim1BUS -------- Input BIT

SysLim2PR1 (same set as for Limit1 above) Input BIT

GenFreq Hz frequency Input FLOAT

BusFreq Hz frequency Input FLOAT

GenVoltsDiff KiloVolts rms - Gen Low is Negative Input FLOAT

Gen Freq Diff Slip Hz-Gen Slow is Negative Input FLOAT

Gen Phase Diff Phase Degrees - Gen Lag is Negative Input FLOAT

CB1CloseTime Breaker #1 Close Time in milliseconds Input FLOAT

CB2CloseTime Breaker #2 Close Time in milliseconds Input FLOAT

Accel1 RPM/SEC Input FLOAT

: : Input FLOAT

Accel4 RPM/SEC Input FLOAT

FlmDetPwr1 335 V dc Input FLOAT

FlmDetPwr2 335 V dc Input FLOAT

ShTestAC L97SHAFT_AC SVM_AC_TEST Output BIT

ShTestDC L97SHAFT_DC SVM_DC_TEST Output BIT

FD1_Level 1 = High Detection Cnts Level Output BIT

: : Output BIT

FD16_Level 1 = High Detection Cnts Level Output BIT

Sync_Perm_AS L83AS - Auto Sync Permissive Output BIT

Sync_Perm L25P - Sequencing Sync Permissive Output BIT

Sync_Monitor L83S_MTR - Monitor Mode Output BIT

Sync_Bypass1 L25_BYP-1 = Auto Sync Bypass Output BIT

Sync_Bypass0 L25_BYPZ-0 = Auto Sync Permissive Output BIT

CB2_Selected L43SAUT2 - 2nd Breaker Selected Output BIT

AS_Win_Sel L43AS_WIN - Special Window Selected Output BIT

Sync_Reset L86MR_SYNC - Sync Trouble Reset Output BIT

Kq1 L20PTR1 - Primary Trip Relay Output BIT

: : Output BIT

Kq6 L20PTR6 - Primary Trip Relay Output BIT

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9-116 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

DiagnosticsDiagnostic information includes feedback from the solenoid relay driver and contact,high flame detector voltage, slow synch check relay, slow auto synch relay, andlocked up K25 relay. If any one of the signals goes unhealthy a composite diagnosticalarm, L3DIAG_VTUR occurs. The diagnostic signals can be individually latched,and then reset with the RESET_DIA signal if they go healthy.

Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID devicewhich is interrogated by the I/O board. The ID device is a read-only chip coded withthe terminal board serial number, board type, revision number, and plug location.

Automatic SynchronizingAll synchronizing connections are located on the TTUR terminal board. Thegenerator and bus voltages are supplied by two, single phase, potential transformers(PTs) with a fused secondary output supplying a nominal 115 V rms. Measurementaccuracy between the zero crossing for the bus and generator voltage circuits is 1degree.

Turbine speed is matched against the bus frequency, and the generator and busvoltages are matched by adjusting the generator field excitation voltage fromcommands sent between the turbine controller and the EX2000 over the Unit DataHighway (UDH). A command is given to close the breaker when all permissives aresatisfied, and the breaker is predicted to close within the calculated phase/slipwindow. Feedback of the actual breaker closing time is provided by a 52G/a contactfrom the generator breaker (not an auxiliary relay) to update the data base. Aninternal K25A synch check relay is provided on the TTUR; the independent backupphase/slip calculation for this relay is performed in the <P> Protection Module.Diagnostics monitor the relay coil and contact closures to determine if the relayproperly energizes or de-energizes upon command.

Synchronizing ModesThere are three basic synchronizing modes. Traditionally, these modes are selectedfrom a generator panel mounted selector switch:• Off The breaker will not be closed by the Mark VI control. The check relay will

not pickup.• Manual The operator initiates breaker close, which is still subject to the K25A

Synch Check contacts driven by VPRO. The manual close is initiated from anexternal contact on the generator panel, normally connected in series with aSynch Mode in Manual contact.

• Auto The system will automatically match voltage and speed, and then closethe breaker at the right time to hit top dead center on the synchroscope. All threeof the following functions must agree for this closure to occur:K25A synch check relay, checks the allowable slip/phase window, from

VPRO.K25 auto synch relay, provides precision synchronization, from VTUR.K25P synch sequence permissive, checks the turbine sequence status, from

VTUR.

Details of the various checks are discussed in the following sections.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-117

Synch CheckThe K25A synch check function is based on phase lock loop techniques. Thecalculations for this function are done in the VPRO, but interfaces to the Breakerclose circuit on the TTUR board. It performs limit checks against adjustableconstants as follows:• Generator undervoltage• Bus undervoltage• Voltage error• Frequency error (slip), with a maximum value of 0.33 Hz, typically set to

0.27 Hz.• Phase error with a maximum value of 30 degrees, typically set to 10 degrees.

In addition, synch check arms logic to enable the function, and provides bypass logicfor deadbus closure. The synch window in Figure 9-69 is based on typical settings:

SLIP

PHASEDegrees+10-10

+0.27 Hz

-0.27 Hz

Figure 9-69. Typical Synch Window

Auto SynchThe Auto Synch K25 function uses zero voltage crossing techniques. It compensatesfor the breaker time delay, which is defined by two adjustable constants with logicselection between the two (for two breaker applications). The calculations, which aredone on the VTUR board, include phase, slip, acceleration, and anticipated time leadfor the breaker delay. Based on the measured breaker close time, the time delayparameter is adjusted, up to certain limits.

In addition, auto synch arms logic to enable the function, and bypasses logic toprovide for deadbus or manual closure. The auto synch projected synch window isshown in Figure 9-70, where positive slip indicates the generator frequency is higherthan the bus frequency.

SLIP

10

0.3 Hz

Gen. Lag Gen. Lead (phase degrees)

0.12 Hz

0

Figure 9-70. Auto Synch Projected Window

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9-118 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

The projected window is based on current phase, current slip, and currentacceleration. The generator must currently be lagging and have been lagging for thelast 10 consecutive cycles, and projected (anticipated) to be leading when the breakeractually reaches closure. Auto synch will not allow the breaker to close with negativeslip; speed matching typically aims at around +0.12 Hz slip.

Synchronization DisplayA special synchronization screen is available on the HMI with a real-time graphicalphase display and control pushbuttons. The display items are listed in Table 9-29.

Table 9-29. Synchronizing Display Items

Synch Display Description

Dynamic Parameters Voltages: Generator, Bus, DifferenceFrequencies: Generator, Bus, Slip (difference)Phase: Difference angle, degrees

Status Indication Mode: Synch OFF, MANUAL, AUTOSynch Monitor: OFF, ONDead Bus Breaker: Open/closeSecond Breaker if applicable: Open/closeSynch Permissive: K25PAuto Synch enabled

Speed Adjust: Raise/lowerVoltage Adjust: Raise/lower

Synch Permissives Gen Voltage: OK/not OKBus Voltage: OK/not OKGen Frequency: OK/not OKBus Frequency: OK/not OKDifference Volts: OK/not OKDifference Frequ: OK/not OKPhase: K25 OK/not OK

K25A OK/not OK

Limit Constants Upper and Lower Limits for the above permissives

Breaker Performance Diagnostics: Slow check relaySynch relay lockupBreaker #1 close time out of limitsBreaker #2 close time out of limitsRelay K25P troubleBreaker closing voltage (125 V dc) missing

Control Pushbuttons Synch Monitor: ON, OFFSpeed Adjust: RAISE, LOWERVoltage Adjust: RAISE, LOWER

InstallationMagnetic pick ups, shaft pick ups, potential transformers, and breaker relays arewired to two I/O terminal blocks on TTUR. Each block is held down with twoscrews and has 24 terminals accepting up to #12 AWG wires. A shield terminationstrip attached to chassis ground is located immediately to the left of each terminalblock. Jumpers JP1 and JP2 select either SMX or TMR for relay drivers K25 andK25P. TB3 is for optional TTL connections to active speed pickups; these require anexternal power supply. The wiring connections are shown in Figure 9-71.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-119

Turbine Terminal Board TTURH1B

To Connectors JR5,JS5, JT5, JR1, JS1, JT1

52G (H)P125GENMAN

52G (L)AUTOBKRHN125GEN

Gen (L)Bus (L)ShaftV (L)ShaftC (L)

Gen (H)Bus (H)ShaftV (H)ShaftC (H)

MPU 1T (H)

24681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

1357911131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

25272931333537

41434547

x

x

x

x

x

x

x

x

x

x

x

BKRH

JP1K1

K3

K2

MPU 2T (H)MPU 3T (H)MPU 4T (H)MPU 1S (H)MPU 2S (H)MPU 3S (H)MPU 4S (H)MPU 1R (H)MPU 2R (H)MPU 3R (H)MPU 4R (H)

MPU 1T (L)MPU 2T (L)MPU 3T (L)MPU 4T (L)MPU 1S (L)

MPU 4S (L)

MPU 2S (L)MPU 3S (L)

MPU 1R (L)MPU 2R (L)

MPU 4R (L)MPU 3R (L)

TMR SMX

x

TB3

J8

JP2

TMR SMX

TB3 Screw Connections

TB1

TB2

TTL1T 01

TTL1S

TTL2T

TTL2S

TTL1RTTL2R

02

0304

0506

39x

x

01

Figure 9-71. TTUR Terminal Board

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9-120 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VTUR/TRPG - Primary TripThe TRPG terminal board contains nine magnetic relays to interface with three tripsolenoids, known as the Electrical Trip Devices (ETD). The TRPG works inconjunction with the TREG to form the Primary and Emergency sides of theinterface to the ETDs. The TRPGH1A version for TMR applications, shown inFigure 9-72, has three voting relays per trip solenoid. The TRPGH2A version is forsimplex applications and has one relay per trip solenoid. TRPG also accommodateseight Geiger Mueller flame detectors.

An optional double-width VTURH2A board can be cabled to a second TRPG boardfor interface to three additional ETDs, but no additional Flame Detectors.

VME Bus to VCMI

TRPGH1A Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cable to VME Rack R

Connectors onVME Card Rack R

Cables to VMERack S

Cables to VMERack T

x

x

RUNFAILSTAT

VTUR

J3

J4

VTUR VME Board

Shield Bar

x

x

JS1

JT1

JR1

Cable to TTUR

J5

2468

1012141618202224

xxxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

J2J4J5J3

J1

Cable to TTURCable toTREG

335 V fromRack PowerSuppliesR, S, T

ETD Powerfrom PDM

(Speed signals)

Figure 9-72. TRPG Terminal Board, I/O Board and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-121

OperationVTUR provides the primary trip function by controlling the relays on TRPG, whichtrip the main protection solenoids. In the TMR case the three inputs are voted inhardware using a relay ladder logic two-out-of-three voting circuit. Relay coilcurrents, contact status, and supply voltages are monitored for diagnostic purposes,as shown in Figure 9-73.

J2

J2

Terminal BoardTRPGH1A (TMR), H2A (Simplex)

JR1RD KR1

KR2

KR3

RD

RD

JS1RD KS1

KS2

KS3

RD

RD

JT1RD KT1

KT2

KT3

RD

RD

KR1 KS1

KS1

KT1 KR1

<PDM> 125 Vdc

J1-+

TerminalBoard TREG

<R>VTUR

J4

<S>VTUR

J4

<T>VTUR

J4

28 Vdc

28 Vdc

28 Vdc

TripSolenoid

1 or 4

01 03 05 09 10

KT1

02

KR2 KS2

KS2

KT2 KR2

KT2

KR3 KS3

KS3

KT3 KR3

KT3

TripSolenoid

2 or 504

TripSolenoid

3 or 606

KE101

J2 J2

0403

KE205

J2

08

07

KE309

J2

1211

- +

- +

- +

These relays in TMR systems

KT1,2,3

KS1,2,3

KR1,2,3

Mon

Mon

Mon

Mon

Mon

Mon

NS

NS

Voltage Supplyand Monitor

Voltage Supplyand Monitor

Voltage Supplyand Monitor

Supply 8Detectors

Eight FlameDetector Circuits

8 Signals toJR1,JS1,JT1 J3

J4

J5

3 MonitorSignals to

JR1,JS1,JT1 335 Vdc from R rack

335 Vdc from S rack

335 Vdc from T rack

J2 J2-+

0610

02

SolenoidPower Monitor

To JR1,JS1, JT1

"PTR 2/5"

"PTR 3/6"

"PTR 1/4"

N125 Vdc

OptionalEconomizingResistor

Monitoring Outputs

33

34

IDID

ID

ID

N125P125

FLAME1H

FLAME1L

335 V dc

Figure 9-73. TRPG and Trip Solenoids

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9-122 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

FeaturesVTUR controls the main breaker via TTUR, and three trip solenoids via TRPG. Witha second TRPG, six trip solenoids can be controlled. In addition, VTUR handlesshaft speed, generator voltage, and bus voltage inputs from TTUR, plus up to eightflame detector inputs from one TRPG board.

Control of Trip SolenoidsBoth TRPG and TREG control the trip solenoids so that either one can removepower and close the steam or fuel valves. TRPG holds nine relays in three votinggroups of three, one group for each trip solenoid. Voltage for the relay coils issupplied from the R, S, and T rack backplane. The trip solenoids are supplied withpower through plug J1. A metal oxide varistor (MOV) for current suppression is onTREG, and an optional economizing current limiting resistor can be wired to theTREG terminals.

In Simplex systems TRPGH2 is used. This board has one relay per ETD circuitinstead of three and is controlled by only one VTUR board.

Flame DetectorsUp to eight flame detectors can be used for gas turbine applications. The detectorsare supplied with 335 V dc, 0.5 mA through plugs J3, J4, and J5.

With no flame present the detector charges up to the supply voltage, but presence ofthe flame causes the detector to charge to a level and then discharge through theTRPG board. As the flame intensity increases the discharge frequency increases.When the detector discharges, VTUR and TRPG convert the discharged energy intoa voltage pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltagepulses are fanned out to all three modules. Voltage pulses above 2.5 volts generate alogic high, and the pulse rate over a 40 ms time period is measured in a counter.

Specification

Table 9-30. TRPG Specification

Item Specification

Trip Solenoids 3 Solenoids per TRPG (total of 6 per VTUR)

Solenoid Rated Voltage/Current 125 V dc standard with up to 1 Amp draw24 V dc is alternate with up to 1 Amp draw

Solenoid Response Time L/R time constant is 0.1 sec

Current Suppression Metal oxide varister (MOV) on TREG

Current Economizer Terminals for optional 10 ohm, 70 watt economizingresistor

Control Relay Coil Voltage Supply Relays supplied with 28 V dc from R, S, and T racks

Flame Detectors 8 detectors per TRPG (total of 8 per VTUR)

Detector Supply Voltage/Current 335 V dc with 0.5 mA per detector

Configuration OverviewLike all I/O boards, the TRPG board is configured using the toolbox. This softwareusually runs on a data-highway connected CIMPLICITY station or workstation.Table 9-31 summarizes the configuration choices. For details refer to GEH-6403,Control System Toolbox for Configuring the Mark VI Turbine Controller.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-123

Table 9-31. Typical TRPG Configuration

Parameter Description Choices

Configuration

J4:IS200TRPGH1A First TRPG Terminal board Connected, not connect.

FlameInd1 Intensity (Hz), Flame detector Number 1 - Card Point Point Edit (Input FLOAT)

FlmDetTime Flame Detector Time Interval 0.04, 0.08, 0.16 sec

FlameLimitHI Flame Threshold Limit HI (HI detection cnts meansLOW sensitivity)

0 to 160

FlameLimitLOW Flame Threshold Limit LO (LOW detection cnts meansHI sensitivity)

0 to 160

Flame_Det Flame Detector selected Used, Unused

FlameIndN Flame detectors 2 through 8 as above - Card Point Point Edit (Input FLOAT)

Kq1_Status Primary Trip relay status, first of 3 PTRs - Card Point Point Edit (Input BIT)

Kq1 Primary Trip Relay, first of three PTR - Card Point Point Edit (Output BIT)

PTR_Output Primary Trip relay Used/Unused Used, Unused

J4A:IS200TRPGH1A Second TRPG Board for expanded VTUR, with threemore Trip Solenoid outputs, and Flame Detectors 9through 16 (not used)

Connected, Not Connected

Card Points Signals Description � Point Edit (Enter Signal Connection) Direction Type

FlameInd1 Intensity (Hz) Input FLOAT

: Intensity (Hz) Input FLOAT

FlameInd8 Intensity (Hz) Input FLOAT

DiagnosticsDescriptions of the TRPG diagnostics are listed under VTUR. The diagnosticsinclude feedback from the trip solenoid relay driver and contact, solenoid power bus,and the flame detector excitation voltage too low or too high.

Connectors JR1, JS1, and JT1 on the terminal board have their own ID device whichis interrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the plug location.

InstallationThe three trip solenoids are wired directly to the first I/O terminal block, and theflame detectors (if used) to the second terminal block. Power to the flame detectors iswired to J3, J4, and J5. These connections are shown in Figure 9-74.

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9-124 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Turbine Primary Trip Terminal Board TRPG

Up to two #12 AWG wires perpoint with 300 volt insulation

Terminal Blocks can be unpluggedfrom terminal board for maintenance

To ConnectorsJR1, JS1, JT1

125 Vdc (P)

Flame 1 (L)

Flame 3 (L)

Flame 5 (L)

Flame 7 (L)Flame 8 (L)

Flame 1 (H)

Flame 3 (H)

Flame 5 (H)

Flame 7 (H)

Flame 2 (H)

Flame 4 (H)

Flame 6 (H)

Flame 8 (H)

24681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

J1

J2

J4

J5

J3

Cable to TREG

335 Vdc

125 V dc

125 Vdc (P)125 Vdc (P)

125 Vdc (N)125 Vdc (N)

Trip Solenoid 1 or 4Trip Solenoid 2 or 5Trip Solenoid 3 or 6

Flame 2 (L)

Flame 4 (L)

Flame 6 (L)335 Vdc

335 Vdc

To ConnectorsJR1, JS1, JT1

Figure 9-74. TRPG Terminal Board Wiring

Page 139: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-125

DTRT - Simplex DIN-rail Mounted Trip Transition BoardThe DTRT board is a DIN-rail mounted trip transition board that interfaces theVTUR board with the DRLY board. DTRT allows up to six trip functions on theVTUR to interface with DRLY, instead of the normal TRPG board. Two VTURboards can be connected to the DTRT to control a total of six relays on DRLY, asshown in Figure 9-75. Only the Simplex version of this board is available. DTRTtransfers board identification from the ID chip on DRLY to VTUR for diagnosticpurposes. DTRT has its own ID chip connnected to J2.

DTRT must be used in all applications where trips from VTUR to DRLY arerequired. DTRT cannot be eliminated if the application requires only one VTUR.Three 37-pin D connectors for the three cables are provided. A high density EuroBlock type terminal block is permanently mounted to the board with three screwconnections for the ground connection (SCOM).

VME Bus to VCMI

x

x

RUNFAILSTAT

VTUR

J3

J4

J5

x

x

RUNFAILSTAT

VTUR

J3

J4

J5

VTUR Boards

Three relay circuits

Three relay circuits

To DRLY board

(Six relay circuits)

DTRT Board

J1

J2

ID

J3

To first DTUR board

To second DTUR board

To first DTUR board

To second DTUR board

Figure 9-75. DTRT Board

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9-126 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThere is no shield terminationstrip with this design.

The DTRT board slides into a plastic holder, which mounts on the DIN-rail. Thethree cables connecting VTUR and DRLY plug into the 37-pin D type connector asshown in Figure 9-76. The first three DRLY circuits are driven by the VTURconnected to J1, and the second three DRLY circuits are driven by the VTURconnected to J2. Three screws are provided on terminal block TB1 for the SCOM(ground) connection, which should be as short a distance as possible.

DTRT must be used in all applications where trips from VTUR to DRLYs arerequired. DTRT is still required if the application only requires one VTUR

J1 J2 J3

To DRLY board(Six relay circuits)

TB1

DTRT

123

SCOM

DIN-railmounting

Cable from first VTUR board

Cable from second VTUR board

Plastic mounting holder

Chassis GroundChassis GroundChassis Ground

Figure 9-76. DTRT Wiring and Cabling

Page 141: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-127

DTUR - Simplex DIN-rail Mounted Pulse Rate TerminalBoard

The DTUR board is a compact pulse-rate terminal board, designed for DIN-railmounting. The board accepts four passive pulse-rate transducers (magnetic pickups)for speed and flow measurement. It connects to the VTUR processor board with a37-pin cable and a 15-pin cable as shown in Figure 9-77. These cables are identicalto those used on the larger TTUR terminal board. DTUR boards can be stackedvertically on the DIN-rail to conserve cabinet space. VTUR only accommodates oneDTUR board, and only the Simplex version is available.

DTUR has on-board pulse rate signal conditioning identical to that on the TTUR.High density Euro Block type terminal blocks are permanently mounted to the boardwith two screws for the ground connection (SCOM). Two on-board ID chips identifythe connectors and board to VTUR for system diagnostic purposes.

<R> Control Rack

VTUR

J3

Connectorsat bottom ofVME rack

J5

J4

f( )Pr/DMUXA/D

FilterClamp

ACCoupling

JR5

1

#1 MagneticSpeed Pickup

FilterClamp

ACCoupling

NS

#2 MagneticSpeed Pickup

2

3

4

FilterClamp

ACCoupling

#3 MagneticSpeed Pickup

5

6

FilterClamp

ACCoupling

#4 MagneticSpeed Pickup

7

8

JR1

CircuitTerminals

DTUR Board

SCOM

SCOM

SCOM

SCOM

ID

ID

MPU1H

MPU1L

MPU2H

MPU2L

MPU3H

MPU3L

MPU4H

MPU4L

NoiseSuppresion

NS

NS

NS

Figure 9-77. DTUR Board

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9-128 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThere is no shield terminationstrip with this design.

The DTUR board slides into a plastic holder, which mounts on the DIN-rail. Themagnetic pickups are wired directly to the terminal block which has 36 terminals asshown in Figure 9-78. Typically #18 AWG shielded twisted pair wiring is used.There are two screws for the SCOM (ground) connection, which should be as short adistance as possible.

JR1

37-pin "D" shellconnector withlatching fasteners

MPU 1 (High)135

11

79

1314 1517192123252729313335

2468

1012

1618202224262830

36

3234 Chassis ground

Cable to J3connector in I/Orack for VTURboard Euro Block type

terminal block

Plastic mountingholder

JR5

SCOM

MPU 2 (High)MPU 3 (High)MPU 4 (High)

MPU 2 (Low)MPU 1 (Low)

MPU 4 (Low)MPU 3 (Low)

DIN-rail mounting

Cable to J5 onfront of VTURboard

DTUR

Chassis ground

Screw ConnectionsScrew Connections

MPU meansMagnetic Pick Up

Figure 9-78. DTUR Wiring and Cabling

Page 143: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-129

VVIB/TVIB - Vibration/PositionThe Mark VI system uses Bently Nevada probes for shaft vibration monitoring. Upto 14 probes connect directly to the TVIB terminal board, two of which can becabled to the VVIB board. The signals are processed by the VVIB board, and thedigitized displacement and velocity signals are sent over the VME bus to thecontroller. If desired a Bently Nevada 3500 monitoring system can be cabled into theterminal board to permanently monitor turbine vibration. Also the type 2 terminalboard (TVIBH2A) has BNC connectors allowing portable vibration data gatheringequipment to be plugged in for predictive maintenance purposes. (The BNC signalsinclude a 10µ ohm isolating resistance.) These connectors are shown in Figure 9-79,and details of the TVIB board are shown in Figure 9-80.

VME Bus to VCMI

TVIB Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cable to VMERack R

Connectors onVME Rack R

Cable toRack S

Cable toRack T

x

x

RUNFAILSTAT

VVIB

J3

J4

VVIB VME Board

x

x

JS1

JB1

JC1

JT1JA1

JR1

Cable from second TVIB

Shield Bar

2468

1012141618202224

xxxxxxxxxxxxx

13579

11131517192123

xxxxxxxxxxxx

x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

JD1

Plugs for Portable Bently-Nevada Data Gathering &Monitoring Equipment

VibrationSignals

VibrationSignals

Cables to fixed Bently-Nevada 3500 VibrationMonitoring System

P1P2

P3P4P5P6

P7P8P9P10

P11121314

.......

...

.......

.......

.......

.......

.......

.......

.......

Figure 9-79. Vibration Terminal Board, Processor Board, and Cabling

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9-130 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Terminal Board TVIBH2A

PROX

N28V

V

S

1

2

3

S

S

S

CL

<S><T>

N28VR

PCOM

3mAJP1A

s

N24V1

PR01H

PR01LN28V

N28V

Vibration BoardVVIB

JR1

JS1

JT1

<R><S>

<T>

Vib. or Pos.Prox. (P), orSeismic (S),or Accel (A),or Velomiter(V)

Eight of theabove ccts.

JA1

JB1

JC1

JD1

BufferAmplifiers

BufferAmplifiers

BufferAmplifiers

P,A

V

S

P,V,A

NegativeVolt Ref

JP1B

S

S

S

CL

N28V

PCOM

N24V9

PR09H

PR09L

PROX

25

26

27

S

S

S

CL

N28V

PROX

N24V13

PR13H

PR13L

37

38

39

PCOM

28Vdc

Amp A/D

Same as<S>

Same as<T>

TMRApplications

Samplingtype A/DConverter(16 bit)

ToController

Four cables to BentlyNevada 3500 System

PositionProx

Reference orKeyphasorProx.

Four of theabove ccts.

One of the above ccts for Mark VI.(Two of the above ccts for B/N

P1-P8

P9-P12

P13-P14

BNCConnectors

DB25

DB25

DB25

DB9

J3

J3

J3

J4

J4

J4

ID

ID

ID

CurrentLimit

Figure 9-80. TVIB Board, Vibration Probes, and Bently Nevada Interface

Page 145: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-131

OperationTVIB supports Proximitor, Seismic, Accelerometer, and Velomitor probes of thetype supplied by Bently Nevada. Power for the vibration probes comes from theVVIB boards, in either Simplex or TMR mode. The probe signals return to VVIBwhere they are A/D converted and sent over the VME bus to the controller.Vibration, eccentricity, and axial position alarms and trip logic are generated in thecontroller.

A �28 V dc source is supplied to the terminal board from the VME board forProximitor power. In TMR systems, a diode high-select circuit selects the highest�28 V dc bus for redundancy. Regulators provide individual excitation sources, �23to �26 V dc, short circuit protected. Probe inputs are sampled at high speed overdiscrete time periods. The maximum and minimum values are accumulated, thedifference is taken (max-min) for vibration, and the results are filtered. The resultingpeak to peak voltage is scaled to yield mils (peak to peak) displacement, or velocity.

Features

Vibration FunctionsVibration probe inputs are normally used for four protective functions in turbineapplications as follows:

Vibration: Proximity probes monitor the peak-to-peak radial displacement of theshaft (the shaft motion in the journal bearing) in two radial directions. This systemuses non-contacting probes and Proximitors, and results in alarm, trip, and faultdetection.

Rotor Axial Position: A probe is mounted in a bracket assembly off the thrustbearing casing to observe the motion of the thrust collar on the turbine rotor. Thissystem uses non-contacting probes and Proximitors, and results in thrust bearingwear alarm, trip, and fault detection.

Differential Expansion: This application uses non-contacting probe(s) andProximitor(s) and results in alarm, trip, and fault detection for excessive expansiondifferential between the rotor and the turbine casing.

Rotor Eccentricity: A probe is mounted adjacent to the shaft to continuously sensethe surface and update the turbine control. The calculation of eccentricity is madeonce per revolution while the turbine is on turning gear. Alarm and fault indicationsare provided.

ProbesThe eight vibration inputs on each terminal board can be applied as eitherproximitor, accelerometer, seismic (velocity), or velomitor inputs. Jumpers on theterminal board are used to assign a specific vibration sensor type to each input pointwith the seismic type assigned to point (S), the velomitor type assigned to point (V),and the proximitor and accelerometer types sharing point (P/A). A proximitor reads ashaft keyway to generate a once per revolution KeyPhasor input for phase anglereference.

Alarms and TripsDiagnostics perform a high/low (hardware) limit check on the input signal and ahigh/low system (software) limit check. The software limit check is adjustable in thefield.

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9-132 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

A probe fault, alarm, or trip condition will occur if either of an X or Y probe pairexceeds its limits. In addition, the application software will inhibit a vibration trip(the ac component) if a probe fault is detected based on the dc component.

Position inputs for thrust wear protection, differential expansion, and eccentricity aremonitored similar to the vibration inputs except only the dc component is used for aposition indication. A 16-bit sampling type A/D converter is used with 14-bitresolution and overall circuit accuracy of 1% of full scale.

Vibration Monitoring and AnalysisMark VI provides vibrationprotection and displays thebasic vibration parameters

Each input is actively isolated and the signals made available through four plugs fordirect cabling to a Bently Nevada 3500 monitor. This configuration provides themaximum reliability by having a direct interface from the proximitors to the turbinecontrol for trip protection and still retain the real-time data access to the BentlyNevada system for static and dynamic vibration monitoring. Note that the Mark VIdisplays the total vibration, the 1X vibration component and the 1X vibration phaseangle, but it is not intended as a vibration analysis system.

Fourteen BNC connectors on TVIB provide buffered signals available to portabledata gathering equipment for predictive maintenance purposes. Buffered outputshave unity gain, 10 K ohm internal impedance, and can drive loads up to 1500 ohms.

Specification

Table 9-32. VVIB Specification

Item Specification

Number of Channels TVIB: 13 probes: 8 Vibration, 4 Position, 1 Key PhasorVVIB: 26 probes with two TVIB boards

Vibration Measurement Range Accuracy FrequencyProximity Displacement 0 to 4.5 V pp ±0 .030 V pp 5 to 200 Hz

Displacement 0 to 4.5 V pp ±0 .150 V pp 200 to 500 Hz

Seismic Velocity 0 to 2.25 V p Max [2% reading, ±0.008 Vp] 5 to 200 HzVelocity 0 to 2.25 V p Max [5% reading, ±0.008 Vp] 200 to 500 Hz

Velomitor Velocity 0 to 2.25 V p Max [2% reading, ±0.008 Vp] 5 to 200 HzVelocity 0 to 2.25 V p Max [5% reading, ±0.008 Vp] 200 to 500 Hz

Accelerometer Velocity (track filter) 0 to 2.25 V p ±0 .015 Vp 10 to 233 Hz

Position Position −.5 to −20 V dc ±0.2 V dc Air Gap (average)

Phase Degrees 0 to 360 degrees ±2 degrees up to 14,000 rpm(1X vibration component with respect to key slot)

Probe Power �24 V dc from the �28 V dc bus; each probe supply is current limited.12 mA load per transducer

Probe Signal Sampling 16-bit A/D converter with 14-bit resolution on the VVIBSampling rate is 4,600 samples per second in fast scan mode (4,000 to 17,500 rpm)Sampling rate is 2,586 samples per second for nine or more probes (less than 4,000 rpm)All inputs are simultaneously sampled in time windows of 160 ms.

Rated RPM If greater than 4,000 rpm, can use eight vibration channels, (others can be Prox/position)If less than 4,000 rpm, can use 16 vibration channels, and other probes

Buffered outputs Amplitude accuracy is 0.1% for signal to Bently Nevada 3500 vibration analysis system

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-133

ConfigurationTable 9-33. VVIB Configuration

Parameter Description Choices

Configuration

System Limits Enable system limits Enable, Disable

Vib_PP_Fltr First order filter time constant (sec) 0.01 to 2

LMVib1A Vib, 1X component, for LM_RPM_A, input #1 - CardPoint

Point Edit (Input FLOAT)

SysLim1Enable Enable System Limit 1 Fault Check Enable, Disable

SysLim1Latch Latch System Limit 1 Fault Latch, Not Latch

SysLim1Type System Limit 1 Check Type >= or <=

SysLimit1 System Limit 1 - Vibration in mils (Prox) or Inch/sec(seismic, accel)

−100 to +100

SysLim2Enable Enable System Limit 2 (same configuration as above) Enable, Disable

TMR_DiffLimt Difference Limit for Voted TMR Inputs in Volts or Mils −100 to +100

LMVib1B Vib, 1X component, for LM_RPM_B, #1 - Card Point Point Edit (Input FLOAT)

LMVib1C Vib, 1X component, for LM_RPM_C, #1 - Card Point Point Edit (Input FLOAT)

LMVib2A Vib, 1X component, for LM_RPM_A, #2 - Card Point Point Edit (Input FLOAT)

LMVib2B Vib, 1X component, for LM_RPM_B, #2 - Card Point Point Edit (Input FLOAT)

LMVib2C Vib, 1X component, for LM_RPM_C, #2 - Card Point Point Edit (Input FLOAT)

LMVib3A Vib, 1X component, for LM_RPM_A, #3 - Card Point Point Edit (Input FLOAT)

LMVib3B Vib, 1X component, for LM_RPM_B, #3 - Card Point Point Edit (Input FLOAT)

LMVib3C Vib, 1X component, for LM_RPM_C, #3 - Card Point Point Edit (Input FLOAT)

J3:IS200TVIBH1A Vibration Terminal board, first of two Connected, Not Connected

GAP1_VIB1 Average Air Gap (for Prox) or DC volts (for others) -Card Point

Point Edit (Input FLOAT)

VIB_Type Type of vibration probe Unused, PosProx, VibProx,VibProx-KPH1, VibProx-KPH2,VibLMAccel, VibVelomitor,KeyPhasor

VIB_Scale Volts/mil or Volts/ips 0 to 2

ScaleOff Scale offset for Prox position only, in mils 0 to 90

SysLim1Enable Enable System Limit 1 Enable, Disable

SysLim1Latch Latch the alarm Latch, Not Latch

SysLim1Type System Limit 1 Check Type >= or <=

SysLimit1 System Limit 1 � GAP in negative volts (for Vel) orpositive mils (Prox)

−100 to +100

SysLim2Enabl Enable System Limit 2 (same configuration as above) Enable, Disable

TMR_DiffLimt Difference Limit for Voted TMR Inputs in Volts or Mils −100 to +100

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9-134 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Vib1 Vibration, displacement (pk-pk) or velocity (pk) - CardPoint

Point Edit (Input FLOAT)

SysLim1Enable System limits configured as above Enable, Disable

GAP2_VIB2 Second Vibration Probe of 8 - Card Point Point Edit (Input FLOAT)

Vib2 Vibration, displacement (pk-pk) or velocity (pk) - CardPoint

Point Edit (Input FLOAT)

GAP9_POS1 First Position Probe of 4 - Card Point Point Edit (Input FLOAT)

GAP13_KPH1 Key Phasor Probe air gap - Card Point Point Edit (Input FLOAT)

J4:IS200TVIBH1A Second Vibration Terminal board Connected, Not Connected

GAP14_VIB9 First Vibration Probe of 8 - Card Point Point Edit (Input FLOAT)

Vib9 Vibration, displacement (pk-pk) or velocity (pk) - CardPoint

Point Edit (Input FLOAT)

GAP22_POS5 First Position Probe of 4 - Card Point Point Edit (Input FLOAT)

GAP26_KPH2 Key Phasor Probe air gap - Card Point Point edit (Input FLOAT)

Card Points Signals Description - Point Edit (Enter Signal Connection) Direction Type

L3DIAG_VVIB1 Card Diagnostic Input BIT

L3DIAG_VVIB2 Card Diagnostic Input BIT

L3DIAG_VVIB3 Card Diagnostic Input BIT

SysLim1GAP1 Gap signal limit Input BIT

: : Input BIT

SysLim1GAP26 Gap signal limit Input BIT

SysLim2GAP1 Gap signal limit Input BIT

: : Input BIT

SysLim2GAP26 Gap signal limit Input BIT

SysLim1VIB1 Vibration signal limit Input BIT

: : Input BIT

SysLim1VIB16 Vibration signal limit Input BIT

SysLim1ACC1 Acceleration signal limit Input BIT

: : Input BIT

SysLim1ACC9 Acceleration signal limit Input BIT

SysLim2VIB1 Vibration signal limit Input BIT

: : Input BIT

SysLim2VIB16 Vibration signal limit Input BIT

SysLim2ACC1 Acceleration signal limit Input BIT

: : Input BIT

SysLim2ACC9 Acceleration signal limit Input BIT

RPM_KPH1 Speed RPM, of KP #1 Input FLOAT

RPM_KPH2 Speed RPM, of KP #2 Input FLOAT

Vib1X1 Vibration, 1X component only, displacement Input FLOAT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-135

: : Input FLOAT

Vib1X16 Vibration, 1X component only, displacement Input FLOAT

Vib1XPH1 Angle of 1X component to KP Input FLOAT

: : Input FLOAT

Vib1XPH16 Angle of 1X component to KP Input FLOAT

LM_RPM_A -------- Output FLOAT

LM_RPM_B -------- Output FLOAT

LM_RPM_C -------- Output FLOAT

InstallationFourteen vibration probes are wired to the two terminal blocks, three wires perprobe. Jumpers JP1 through JP8 select the type of the first eight probes. Refer toFigure 9-81 for wiring and connector pin assignments. Use of connectors JA1, JB1,JC1, and JD1 for a Bently Nevada system is optional, and there are no permanentcable connections to BNCs P1 through P14.

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9-136 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Vibration TerminalBoard TVIBH2A

N24V0124681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

1357911131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

PR01 (L)

PR03 (L)

PR02 (L)PR03 (H)

PR04 (H)PR04 (L)PR05 (H)

PR05 (L)PR06 (H)PR06 (L)

Connectors JR1, JS1, JT1, to VME Racks

Connectors JA1,JB1, JC1, JD1 to optionalBentley Nevada 3500 system

P1P2

P3P4P5P6

P7P8P9P10

P11P12P13P14

JP1BJP1AJP2BJP2AJP3BJP3AJP4BJP4AJP5BJP5AJP6BJP6AJP7BJP7AJP8BJP8A

N24V02

N24V03

N24V04

N24V05

N24V06

N24V07N24V08

N24V09

N24V10

N24V11

N24V12

N24V13

N24V14

PR01 (H)

PR02 (H)

PR07 (H)

PR08 (H)

PR09 (H)

PR10 (H)

PR11 (H)

PR12 (H)

PR13 (H)

PR14 (H)

PR07 (L)

PR08 (L)

PR09 (L)

PR10 (L)

PR11 (L)

PR12 (L)

PR13 (L)

PR14 (L)

ProbeSelectionJumpers

BNCconnectorsfor portabledatagatheringequipment

S P,V,A

VS

P,AJumperPositions

P1 is PR01P2 is PR02and so on.P14 is forBently Nevada

Jumper JPXA:S = SeismicV = VelomitorP = ProximitorA = Accelerometer

Jumper JPXB:S = SeismicV = VelomitorP = ProximitorA = Accelerometer

JPxB B/N Buffer:JPxA Sensor Input:

Connector Pin AssignmentsCkt Sensor Conn Comm Sign Shld01 Vib 1 JA1 2 3 402 Vib 2 JA1 6 7 803 Vib 3 JA1 10 11 1204 Vib 4 JA1 24 23 2205 Vib 5 JB1 2 3 406 Vib 6 JB1 6 7 807 Vib 7 JB1 10 11 1208 Vib 8 JB1 24 23 2209 Pos 1 JC1 2 3 410 Pos 2 JC1 6 7 811 Pos 3 JC1 10 11 1212 Pos 4 JC1 24 23 2213 Ref probeJD1 3 1 214 B/N only JD1 9 5 4

Vibrationprobes

Positionprobes

Referenceprobe

Bently Nevadaprobe

Px, BNCConnector

P1P2P3P4P5P6P7P8P9

P10 P11 P12 P13P14

Figure 9-81. Terminal Board TVIB Wiring

Page 151: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-137

DVIB - Simplex DIN-rail Mounted Vibration TerminalBoard

The DVIB board is a compact vibration terminal board, designed for DIN-railmounting. (Designed to meet UL 1604 specification for operation in a 65 °C class 1,division 2 environment.) The board accepts eight vibration, four position, and onekeyphasor input. It connects to the VVIB processor board with a 37-pin cable asshown in Figure 9-82. These cables are identical to those used on the larger TVIBterminal board. VVIB accommodates two DVIB boards, and only the simplexversion is available.

High-frequency decoupling to ground on all signals is the same as on TVIB. Highdensity Euro Block type terminal blocks are permanently mounted to the board withtwo screws for the ground connection (SCOM). An on-board ID chip identifies theboard to VVIB for system diagnostic purposes.

DVIB Board

PROX

N28V

V

S

1

2

3

S

S

S

CL

N28VR

PCOM

3mAJP1A

S

N24V1

PR01H

PR01L

JR1

Vib. or Pos.Prox. (P), orSeismic (S),or Accel (A),or Velomiter(V)

Eight of theabove ccts.

P,A

V

S

S

S

CL

N28V

PCOM

N24V9

PR09H

PR09L

PROX

25

26

27

S

S

S

CL

N28V

PROX

N24V13

PR13H

PR13L

37

38

39

PCOM

PositionProx

Reference orKeyphasorProx.

Four of theabove ccts.

IDCurrent

Limit

Vibration BoardVVIB

<R>

28Vdc

Amp A/D

Samplingtype A/DConverter(16 bit)

ToController

J4

J3

P28V

Figure 9-82. DVIB Board

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9-138 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Installation

There is no shield terminalstrip with this design.

The DVIB board slides into a plastic holder, which mounts on the DIN-rail. Thevibration probes are wired directly to the terminal block which has 42 terminals asshown in Figure 9-83. Typically #18 AWG shielded twisted triplet wiring is used.There are two screws for the SCOM (ground) connection, which should be as short adistance as possible.

PR05 (L)

JR1

DIN Vibration Terminal Board DVIB

N24V01PR01 (L)

135

11

79

1314 15171921232527293133

373941

35

42

2468

1012

1618202224262830

36

3234

3840

PR02 (H)N24V03PR03 (L)PR04 (H)IN24V05

PR06 (H)N24V07PR07 (L)PR08 (H)N24V09PR09 (L)PR10 (H)N24V11PR11 (L)PR12 (H)

PR01 (H)N24V02PR02 (L)PR03 (H)N24V04PR04 (L)PR05 (H)N24V06PR06 (L)PR07 (H)N24V08PR08 (L)PR09 (H)N24V10PR10 (L)PR11 (H)N24V12PR12 (L)

Screw Connections

DIN-rail mounting

Euro Block typeterminal block

Plastic mountingholder

SCOM

Screw Connections

37-pin "D" shellconnector with latchingfasteners

Cable to J3connector in I/Orack for the VVIBboard

N24V13

SCOMSCOM

PR13 (H) PR13 (L)

JP1AV P

JP5AV P

JP2AV P

JP3AV P

JP4AV P

JP6AV P

JP7AV P

JP8AV P

S

S

S

S

S

S

S

S

Vib1-8

Pos1-4

RefProbe

Figure 9-83. DVIB Wiring and Cabling

Page 153: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-139

VGEN/TGEN - Generator BoardThe generator board VGEN and its terminal board TGEN monitor the generatorthree-phase voltage and currents, and calculate three-phase power and power factor.The boards and cabling are shown in Figure 9-84. For large steam turbineapplications, VGEN provides the Power Load Unbalance (PLU) and Early ValveActuation (EVA) functions, using fast acting solenoids located on the TRLYterminal board.

VME Bus to VCMI

TGEN Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cable to VMERack R

Connectors onVME Rack R

Cable to VMERack S

Cable to VMERack T

x

x

RUNFAILSTAT

VGEN

J3

J4

VGEN VME Board

x

x

JS1

JT1

JR1

Cable to Optional TRLY,for Fast Acting Solenoids

Shield Bar

24681012141618202224

xxxxxxxxxxxxx

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11131517192123

xxxxxxxxxxxx

x

CurrentInputs &Gen PTSignals

Gen CTSignals

TB1

TB2

TB3

TB4

Figure 9-84. Generator Terminal Board, Processor Board, and Cabling

OperationVGEN monitors two, three-phase potential transformer (PT) inputs, and three, one-phase current transformer (CT) inputs. On TGEN there are four analog inputs whichcan be configured for 4-20 mA or ± 5, ± 10 V dc.

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9-140 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Test points on the generator and bus voltages and currents are for checking the phaseof the input signals. Signal conversion and calculations of power, power factor andfrequency take place on the VGEN board. Details of the terminal board are shown inFigure 9-85.

Note TGEN may be used with on VGEN board (Simplex) or three VGEN boards(TMR).

Terminal Board TGEN

Current Limit

NoiseSuppression.

250 ohms

Vdc

20 ma

JP1A+24 Vdc

+/-5,10 Vdc

4-20 ma

Return

4 Circuits per Term. Board

19

20

21

A

B

C

Generator3-PhaseVolts(115 Vac)

TP-GA

TP-GB

TP-GC

22

23

24

A

B

C

Bus3-PhaseVolts(115 Vac)

TP-BA

TP-BB

TP-BC

TB1

<R><S>

<T>

GeneratorBoardVGEN

Controller

JR1

Connectors at bottomof VME Racks

A/D

Shownfor <R>

Samefor <S>

Samefor <T>

+28 VdcJ3

JS1

JT1

J3

J3

Buffer

Open Return

To TRLYfrom<R><S><T>

17

18 PCOMTB1

115 Vrms yields1.5333 Vrms,Gen & Bus

Test Points

ID

ID

ID

01

03

H1

L1Current -Phase C(115 Vac)

TP-IC11:2000

TP-IC202

04

H2

L2

01

03

H1

L1Current -Phase B(115 Vac)

TP-IB11:2000

TP-IB202

04

H2

L2

Noise Suppr.

01

03

H1

L1

Current -Phase A(115 Vac)

TP-IA11:2000

TP-IA202

04

H2

L2TB3

100 ohms0.01%

TB4

TB4

TB2

Analog Inputs

01

03

02

04

P28V, RP28VVS

T

5 amp input yields0.25 Vrms (line-neutral) or0.433 Vrms (line-line)

100 ohms0.01%

100 ohms0.01%

JP1B

PCOM

Figure 9-85. TGEN Board Showing Potential and Current Transformer Inputs

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-141

FeaturesVGEN monitors generator three-phase power, and supplies the Power LoadUnbalance (PLU) and Early Valve Actuation (EVA) functions for large steamturbines.

Power MonitoringThe generator and bus PT inputs are three-wire, open delta, voltage measurementsthat are used to calculate all three line-to-line voltages. They are not used forautomatic synchronizing which requires two separate single-phase PT inputs. EachPT input is nominally 115 V rms, and the PTs are magnetically isolated.

Three single-phase CT inputs are provided with a normal current range of 0 to 5 Acontinuous. The CTs are magnetically isolated on TGEN. Terminations for the CTsare on non-pluggable terminal blocks with captive lugs accepting are up to #10AWG wires. Test points are provided for all PT and CT inputs to verify the phase inthe field. The following parameters are calculated from these inputs:• Total MWatts• Total MVars• Total MVA• Power Factor• Bus Frequency (5 to 66 Hz)

The four analog inputs can accept 4−20 mA inputs or ± 5, ±10 V dc inputs. A +24 Vdc source is available for all four circuits with individual current limits for eachcircuit. The 4−20 mA transducer can be connected to use the +24 V dc source fromthe turbine control or as a self-powered source. A jumper is located on the terminalboard to select between current and voltage inputs for each circuit. High frequencyand 50/60 Hz noise is reduced with an analog hardware filter

Specification

Table 9-34. VGEN Specification

Item Specification

Inputs to TGEN and VGEN 2 Three-phase Generator and Bus PTs3 One-phase Generator CTs4 Analog Inputs (4−20 mA, ± 5, ± 10 V dc)

Outputs from VGEN via TRLY 12 Relay Outputs (for large steam turbines)

Generator and Bus Voltages Nominal 115 V rms with range of interest of 10 to 120%Nominal frequency 50/60 Hz with range of interest 25 to 66 HzMagnetic isolation to 1,500 V rms and loading less than 3 VAInput measurement resolution is 0.1%Input accuracy is 0.5% of rated V rms from 45 to 66 HzInput accuracy is 1.0% of rated V rms from 25 to 45 HzInput loading less than 3 VA per circuit

Generator Current Inputs Normal current range is 0 to 5 A with overange to 10 ANominal frequency 50/60 Hz with range of interest 45 to 66 HzMagnetic isolation to 1,500 V rmsInput accuracy 0.5% of full scale (5A) with resolution of 0.1% FSInput burden less than 0.5 ohms per circuit

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9-142 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Analog Inputs Current Inputs: 4−20 mAVoltage Inputs: ± 5 V dc or ± 10 V dcTransducers can be up to 300 m (984 ft) from the control cabinetwith a two-way cable resistance of 15 ohms.Input burden resistor on TGEN is 250 ohms.Jumper selection of single ended or self powered inputsJumper selection of voltage or current inputsAnalog Input Filter: Breaks at 72 and 500 radians/secAc Common Mode Rejection (CMR) 60 dBDc Common Mode Rejection (CMR) 80 dB

Conversion Accuracy Sampling type 16-bit A/D Converter, 14 bit resolutionAccuracy 0.1% overall

Frame Rate 100 Hz

Calculated values Total MWatts and MVars have an accuracy of 1% FS, and 0.5%for totalizing.Total MVA and Power Factor have an accuracy of 1% full scale.Bus frequency (5 to 66 Hz) has an accuracy of ± 0.1%.

Configuration

Table 9-35. Typical VGEN Configuration

Parameter Description Choices

Configuration

PLU_Enab Enable PLU function Enable, Disable

PLU_Del_Enab Enable PLU delay Enable, Disable

MechPwrInput Mech. Power via TMR (first 3 MA ccts), Dual Xducer(Max), Single Xducer, or Signal Space

TMR_1 thru 3, Dual 1 and 2,SMX_1, SMX_2, Signal Space

PLU_Rate Select PLU threshold rate ME, LO, HI

PLU_Unbal PLU Unbalance threshold % 20 to 80

PLU_Delay PLU delay, secs 0 to 10

Press Ratg Reheat press equiv. to 100% Mech. Power 50 to 600

Current Ratg Generator Current equivalent to 100% Elect Power 1,000 to 60,000

EVA_Enab Enable EVA function Enable, Disable

EVA_ExtEnab Enable external EVA function Enable, Disable

EVA_Rate Select EVA threshold rate LO, ME, HI

EVA_Unbal EVA unbalance threshold % 20 to 80

EVA_Delay EVA drop out time, seconds 0 to 10

MW_Ratg Generator MW equivalent to 100 % Electrical Power 10 to 1,500

IVT_Enab Enable IVT function Enable, Disable

Min_MA_Input Minimum MA for Healthy 4-20 mA Input 0 to 21

MAx_MA_Input Maximum MA for Healthy 4-20 mA Input 0 to 21

SystemFreq System Frequency in Hz 50 or 60

J3:IS200TGENH1A Connected, Not Connected

AnalogIn1 First Analog Input (of four) - Card Point Point Edit (Input FLOAT)

Input Type Type of analog input Unused, 4−20 ma, ± 5 V, ± 10 V

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-143

Low Input Input MA at low value −10 to 20

Low Value Input value in Engineering Units at low MA(configuration inputs the same as for TBAI)

−3.4028e+038 to 3.4028e+038

System Limits Standard System Limits (see TBAI configuration)

GenPT_Vab_KV Generator Potential Transformer Input "ab", (first of 3)- Card Point

Point Edit (Input FLOAT)

PT_Input PT Input in KiloVolts rms for PT_output 1 to 1,000

PT_Output PT Output in Volts rms for PT_Input-typically 115 60 to 150

Phase Shift Compensating Phase Shift, applied to PT signals Zero, Plus 30, Plus 60, Minus 30,Minus 60

System Limits Standard System Limits (similar to Analog Inputs)

BusPT_Vab_KV Bus Potential Transformer Input "ab", (first of three)configuration similar to GenPT - Card Point

Point Edit (Input FLOAT)

GenCT_A Generator Current Transformer A (first of three) - CardPoint

Point Edit (Input FLOAT)

CT_Input CT Input in Amperes rms for rated CT_Output 100 to 50,000

CT_Output Rated CT Output in Amperes rms, typically 5 1 to 5

System Limits Standard System Limits (similar to genPT)

J4:IS200TRLYH1A Connected, Not Connected

Relay01_Tst Fast Acting Solenoid #1 Test, first of 12 relays - CardPoint

Point Edit (Output BIT)

Relay Output FAS Valve Type Unused, CV, Tst Only, CV EVA

RelayDropTime Relay dropout time 0 to 5

Card Points Signals Description � Point Edit (Enter Signal Name) Direction Type

L3DIAG_VGEN1 Card Diagnostic Input BIT

L3DIAG_VGEN2 Card Diagnostic Input BIT

L3DIAG_VGEN3 Card Diagnostic Input BIT

SysLim1Anal1 System Limit 1 exceeded on Analog cct #1 Input BIT

: : Input BIT

SysLim1Anal4 System Limit 1 exceeded on Analog cct #4 Input BIT

SysLim2Anal1 System Limit 2 exceeded on Analog cct #1 Input BIT

: : Input BIT

SysLim2Anal4 System Limit 2 exceeded on Analog cct #4 Input BIT

SysL1GenPTab System Limit 1 exceeded on Gen PT, Vab Input BIT

SysL1GenPTbc System Limit 1 exceeded on Gen PT, Vbc Input BIT

SysL1GenPTca System Limit 1 exceeded on Gen PT, Vca Input BIT

SysL1BusPTab System Limit 1 exceeded on Bus PT, Vab Input BIT

SysL1BusPTbc System Limit 1 exceeded on Bus PT, Vbc Input BIT

SysL1BusPTca System Limit 1 exceeded on Bus PT, Vca Input BIT

SysL2GenPTab System Limit 2 exceeded on Gen PT, Vab Input BIT

SysL2GenPTbc System Limit 2 exceeded on Gen PT, Vbc Input BIT

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9-144 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

SysL2GenPTca System Limit 2 exceeded on Gen PT, Vca Input BIT

SysL2BusPTab System Limit 2 exceeded on Bus PT, Vab Input BIT

SysL2BusPTbc System Limit 2 exceeded on Bus PT, Vbc Input BIT

SysL2BusPTca System Limit 2 exceeded on Bus PT, Vca Input BIT

SysL1GenCTa System Limit 1 exceeded on Gen CT, Phase A Input BIT

SysL1GenCTb System Limit 1 exceeded on Gen CT, Phase B Input BIT

SysL1GenCTc System Limit 1 exceeded on Gen CT, Phase C Input BIT

SysL2GenCTa System Limit 2 exceeded on Gen CT, Phase A Input BIT

SysL2GenCTb System Limit 2 exceeded on Gen CT, Phase B Input BIT

SysL2GenCTc System Limit 2 exceeded on Gen CT, Phase C Input BIT

Relay01_Fdbk Status of Relay 01 Input BIT

: : Input BIT

Relay12_Fdbk Status of Relay 12 Input BIT

L10PLU_EVT Power Load Unbalance event Input BIT

L10EVA_EVA Early Valve Actuation event Input BIT

GenMW Generator MWatts Input FLOAT

GenMVAR Generator MVars Input FLOAT

GenMVA Generator MVA Input FLOAT

GenPF Generator Power Factor, 0/1/0 Input FLOAT

BusFreq Bus Frequency, Hz Input FLOAT

PLU_Tst Power Load Unbalance Test Output BIT

EVA_Tst Early Valve Actuation Test Output BIT

IV_Trgr Intercept Valve Trigger Command Output BIT

EVA_ExtCmd Early Valve Actuation External Command Output BIT

EVA_ExtPrm Early Valve Actuation External Permissive Output BIT

TN_Hz PLL Center Frequency, Hz Output FLOAT

MechPower Mech Power, percent, when config via signal space Output FLOAT

AnalogIn1 Analog Input 1 Input FLOAT

: : Input FLOAT

AnalogIn4 Analog Input 4 Input FLOAT

GenPT_Vab_KV Kilo-Volts RMS Input FLOAT

GenPT_Vbc_KV Kilo-Volts RMS Input FLOAT

GenPT_Vca_KV Kilo-Volts RMS Input FLOAT

BusPT_Vab_KV Kilo-Volts RMS Input FLOAT

BusPT_Vbc_KV Kilo-Volts RMS Input FLOAT

BusPT_Vca_KV Kilo-Volts RMS Input FLOAT

GenCT_A Generator Amperes RMS, phase A Input FLOAT

GenCT_B Generator Amperes RMS, phase B, same config asPhase A

Input FLOAT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-145

GenCT_C Generator Amperes RMS, phase C, same config asPhase A

Input FLOAT

Relay01_Tst Fast Acting Sol #1 Test Output BIT

: : Output BIT

Relay12_Tst Fast Acting Sol #12 Test Output BIT

DiagnosticsDiagnostics perform a high/low (hardware) limit check on the input signal and ahigh/low system (software) limit check. The software limit check is adjustable in thefield. Open wire detection is provided for voltage inputs, and relay drivers and coilcurrents are monitored.

Connectors JR1, JS1, and JT1, on the terminal board have their own ID device whichis interrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the plug location. .

InstallationThe analog current and PT inputs are wired to terminal block 1. The CTs are wired tospecial terminal blocks TB2, 3, and 4, which cannot be unplugged. This protectsagainst an open CT circuit. Jumpers J1A,B through J4A,B set the desired inputcurrent or voltage on analog inputs 1 through 4. The wiring connections are shown inFigure 9-86.

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9-146 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Generator Terminal Board TGEN

Terminal Block 1 can beunplugged from terminalboard for maintenance. TB2,TB3, TB4 are not pluggable.

RET (2)

20 mA (1)RET (1) VDC (1)

24681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

1357911131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

VDC (2)P24V (2)20mA (2)

P24V (3)20mA (3)VDC (3)

20mA (4) P24V (4)VDC (4)PCOMGenAGenCBusB

RET (4)PCOMGenBBusABusC

TB2

TB3

TB4

JP1A

JP2A

JP3A

JP4A JP4B

JP3B

JP2B

JP1B

20ma VDC RET OPEN

P24V (1)

RET (3)

1234

1234

1234

CurAH1CurAH2CurAL1CurAL2

CurBH1CurBH2CurBL1CurBL2

CurCH1CurCH2CurCL1CurCL2

TB1

Analog Input Jumpers

Test Points

JT1

JS1

JR1

Figure 9-86. Terminal Board TGEN and Wiring

Page 161: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-147

VPYR/TPYR - Pyrometer BoardThe Optical Pyrometer Board (VPYR) provides a dynamic temperature profile of therotating turbine blades, and computes temperature conditions that can lead to a trip.The Pyrometer terminal board (TPYR) is wired to two infrared TBTMSthermometers, known as Pyrometers, and to two KeyPhasor Proximitor probes forshaft reference. Dedicated analog to digital converters on VPYR provide samplingrates up to 200,000 samples per second for burst data from two of the temperaturechannels. Fast temperature data is made available for display and off-line evaluation.The terminal board has Simplex and TMR capability, as shown in Figure 9-87.

2468

1012141618202224

x

xxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

x

xxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x x

x

JS1

JR1

x

x

RUNFAILSTAT

VPYR

J3

J4

VME Bus to VCMI

37-pin "D" shell typeconnectors withlatching fasteners

Cable to VMERack R

Connectors onVME Rack

BarrierType TerminalBlocks can be unpluggedfrom board for maintenance

Shield Bar

VPYR VME BoardTPYR Terminal Board

JT1

PyrometerWiring

KeyPhasorWiring

Cables to VMERacks S and T

Figure 9-87. Pyrometer Terminal Board, Processor, and Cabling

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OperationAnalog signals from the terminal board, shown in Figure 9-88, are cabled to theVPYR processor board where signal sampling and conversion take place. VPYRcalculates the temperature profiles and runs turbine protection algorithms using bothpyrometer signals. If a trip is indicated and the signals are validated, VPYR issuesthe trip signal.

TPYR Terminal Board

JR1

P28VRP28VS

CurrentLimiter

CurrentLimiter

N28VXCurrentLimiter

Chan B

Chan A

N24A

P24B

N24Pr1

FanDistrib-ution5

6

78

910

1112

3

13

1718

19

2221

20

2324

303132

N28VRN28VSN28VT

N28VX

CurrentLimiter

P24A1 P28VXPCOM2

PCOM4N28VX

PCOM14P28VX

CurrentLimiter

N24B15PCOM16

N28VX

P28VRN28VRAverage

Max-Pk

Avg-Pk

Fast

Avg

Max Pk

Fast

Avg-Pk

PrH1PrL1

N28VXCurrentLimiterN24Pr233

3435

PrH2

PrL2

KeyPhasor#1

KeyPhasor#2

<R>

J3

<S><T>

P28VXP28VT

Noise Suppression on allInputs & Power Outputs

20ma A1RetA1

100 ohms

JS1

JT1

P28VSN28VS

P28VTN28VT

J3

J3

VPYR Pyrometer Board

sampling

sampling

A/D

A/D

A/D

Chan A

Chan B

Mux

Fast

Fast

Allothers

Fast

Fast

Same for <S>

Same for<T>

ID

ID

ID

20ma A2

20ma A3

20ma A4

RetA2

RetA3

RetA4

20ma B1RetB1

20ma B2

20ma B3

20ma B4

RetB2

RetB3

RetB4

PROX

PROX

PYROMETER

PYROMETER

Figure 9-88. TPYR Terminal Board and Processor Board

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Features

Optical Pyrometer MeasurementsTwo infrared pyrometers dynamically measure the temperature profile of the rotatingturbine blades. Each pyrometer is powered by a +24 V dc and a �24 V dc source onthe terminal board, diode selected from voltages supplied by the three VPYR boards.Four 4−20 mA signals are returned from each pyrometer, representing the followingblade measurements:• The average temperature• The maximum peak temperature• The average peak temperature• A fast dynamic profile, with 30 kHz bandpass, providing the full signature.

Each 4−20 mA input generates a voltage across a resistor which is sent to the VPYRboard where it is multiplexed and converted. A dedicated A/D converter is used tosample the fast input (#4) at up to 200,000 samples per second. VPYR can beconfigured for different numbers of turbine buckets, with up to 30 temperaturesamples per bucket.

KeyPhasor InputsTwo keyphasors are used for shaft position reference, one as a backup. Thesekeyphasor probes and associated circuitry are identical to those used withTVIB/VVIB. They sense a shaft keyway or pedestal to provide a time stamp.

Turbine Protection AlgorithmFast burst data is used for the protection algorithms. One peak temperature perbucket is isolated and the highest for that revolution is selected. The deltatemperature compared to the previous revolution is calculated (the rate of change)and compared to a calculated value which uses configurable parameters. Three ofthese are computed using different parameters. Similarly a distance variable iscomputed by taking the difference between the revolution peak and a peak taken ysamples ago, where y is configurable. This delta is also compared to a configurablevalue. Finally the three rate signals and one distance signal are logically combinedwith permissives and the other channel trip condition to produce the trip signal.

DiagnosticsVPYR provides system limit checking on the KeyPhasor gap signals. The twopyrometer inputs are compared against configuration limits to determine if they aretracking, and the fast data is compared with other inputs to check validity.

Connectors JR1, JS1, and JT1, on the terminal board have their own ID device whichis interrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the plug location.

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Specification

Table 9-36. VPYR Board Specifications

Item Specification

Number of Inputs 2 Pyrometers, each with 4 analog 4�20 mA current signals

(TPYR and VPYR) 2 Key Phasor probes, each with �0.5 to �20 V dc inputs

Current Inputs from Pyrometers 4-20 mA across a 100 ohm resistorCommon Mode Rejection: Dc up to ± 5 V dc, CMRR of 80 dB

Ac up to ± 5 Volt peak, CMRR of 60 dBMeasurement accuracy of ± 0.1 % full scale, 14-bit resolutionBandwidth of 0 to 100 Hz on 6 slow inputs using multiplexed A/D converterBandwidth of 0 to 30,000 Hz on two fast inputs using dedicated A/D converters,sampling at 200,000 per sec.

Keyphasor Inputs Input voltage range of �0.5 to �20 V dcCommon Mode Rejection: CMR of 5 Volt, CMRR of 50 dB at 50/60 HzAccuracy 2 % of full scale (0.2 V dc)Dc level detection typically 0.2 V/mil sensitivitySpeed measurement 2 to 5,610 RPM with accuracy of 0.1 % of reading

Device Excitation Pyrometers have individual power supplies, current limited:P24V source is diode selected, +22 to +30 V dc, 0.175 AmpN24V source is diode selected, -22 to -30 V dc, 0.175 Amp

Measurement Parameters Rated RPM up to 5,100 RPMNumber of Buckets per stage, up to 92Number of samples per bucket, up to 30Fast inputs sampled in bursts covering three revolutions, at twice per second.

Configuration OverviewLike all I/O boards, VPYR is configured using the Control System Toolbox. Thissoftware usually runs on a data-highway connected CIMPLICITY station orworkstation. Table 9-37 summarizes the configuration choices and defaults. Fordetails refer to GEH-6403, Control System Toolbox for Configuring the Mark VITurbine Controller.

Table 9-37. Typical VPYR Configuration

Module Parameter Description Choices

Calibration

System Limits Enables or Disables all System Limit Checking Enable, Disable

Min_MA_Input Min MA for healthy 4−20 mA Input 0 to 21

Max_MA_Input Max MA for healthy 4−20 mA Input 0 to 21

RPMrated Rated turbine RPM 0 to 10,000

BuckSamples Minimum samples per bucket at 110 percent speed 10 to 30

BuckOffset_A Offset from key to the first bucket, % bucket, Pyr A 0 to 100

BuckSpan_A Percent of bucket to include in Protection Algorithm,Pyr A

0 to 100

BuckNumb_A Number of Buckets, Pyr A 30 to 92

SetptR1_A Setpoint, Rate 1, Pyr A 0 to 30

SetptR1B_A Setpoint, Rate 1, Bias, Avg temp, Pyr A −1 to 1

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SetptR2_A Setpoint, Rate 2, Pyr A 0 to 30

SetptR2B_A Setpoint, Rate 2, Bias, Avg temp, Pyr A −1 to 1

SetptR3_A Setpoint, Rate 3, Pyr A 0 to 30

SetptR3B_A Setpoint, Rate 3, Bias, Avg temp, Pyr A −1 to 1

SetptD_A Setpoint distance, Pyr A 0 to 30

SetptDB_A Setpoint distance. Bias, Avg Temperature, Pyr A −1 to 1

SetptDDepth_A Setpoint, Depth of the Distance measurement, Pyr A 0 to 30

Rate2Enab_A Enable, Temperature rate 2, Pyr A Enable, Disable

Rate3Enab_A Enable, Temperature rate 3, Pyr A Enable, Disable

DistEnab_A Enable Temperature rate 3, Pyr ASame Configuration for Channel B Pyrometer

Enable, Disable

J3:IS200TPYRH1A Terminal board 1 connected to VPYR via J3 Connected, Not connected

SlowAvg_A Slow, Average temperature, Pyr A - Card Point Point Edit (Input FLOAT)

Input Use Is this point used? Used, Unused

Low_Input Input MA at Low Value 0 to 21

Low_Value Input value in Engineering Units at Low MA −3.4e+038 to 3.4e+038

High_Input Input MA at High Value 0 to 21

High_Value Input Value in Engineering Units at High MA −3.4e+038 to 3.4e+038

TMR_Diff Difference Limit for Voted TMR Inputs in % of(High Value-Low Value)

0 to 100

SlowMXPk_A Slow, Max Peak Temperature, Pyr A (configurationsimilar to above) - Card Point

Point Edit (Input FLOAT)

SlowAvgPk_A Slow, Average Peak Temperature, Pyr A - Card Point Point Edit (Input FLOAT)

FastAvg_A Fast, Average Temperature, Pyr A - Card Point Point Edit (Input FLOAT)

SlowAvg_B Slow, Average Temperature, Pyr B - Card Point Point Edit (Input FLOAT)

SlowMXPk_B Slow, Max Peak Temperature, Pyr B - Card Point Point Edit (Input FLOAT)

SlowAvgPk_B Slow, Average Peak Temperature, Pyr B - Card Pt Point Edit (Input FLOAT)

FastAvg_B Fast, Average Temperature, Pyr B - Card Point Point Edit (Input FLOAT)

GAP_KPH1 Air Gap, Keyphasor #1 - Card Point Point Edit (Input FLOAT)

VIB-Type Configurable Item Used, Not used

VIB_Scale Volts/mil 0 to 2

KPH_Thrshld Voltage difference from gap voltage where KeyphasorTrigger

1 to 5

KPH_Type Type of Pulse Generator Slot, Pedestal

SysLim System Limits 1 and 2, and TMR same as above Standard Choices

GAP_KPH2 Air Gap, Keyphasor #2, config. Same as above - CardPoint

Point Edit (Input FLOAT)

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Card Points (Signals) Description � Point Edit (Enter Signal Name) Direction Type

L3DIAG_VPYR1 Card Diagnostic Input BIT

L3DIAG_VPYR2 Card Diagnostic Input BIT

L3DIAG_VPYR3 Card Diagnostic Input BIT

TripPyrA Bucket Temp Rate Trip, Pyrometer A Input BIT

TripPyrB Bucket Temp Rate Trip, Pyrometer B Input BIT

KeyPh1Act Keyphasor 1 Active Input BIT

KeyPh2Act Keyphasor 2 Active Input BIT

SysLim1KP1 System Limit Input BIT

SysLim2KP1 System Limit Input BIT

SysLim1KP2 System Limit Input BIT

SysLim2KP2 System Limit Input BIT

FastMxMxPk_A Fast, Max of the Max Peaks Temp, Pyr A Input FLOAT

FastAgMxPk_A Fast, Average of the Max Peaks Temp, Pyr A Input FLOAT

FastMnMnPk_A Fast, Min of the Min Peaks Temp, Pyr A Input FLOAT

FastAgMnPk_A Fast, Average of the Min Peaks, Pyr A Input FLOAT

FastMxMxPk_B Fast, Max of the Max Peaks Temp, Pyr B Input FLOAT

FastAgMxPk_B Fast, Average of the Max Peaks Temp, Pyr B Input FLOAT

FastMnMnPk_B Fast, Min of the Min Peaks Temp, Pyr B Input FLOAT

FastAgMnPk_B Fast, Average of the Min Peaks, Pyr B Input FLOAT

RPM_KPH1 RPM Keyphasor #1 Input FLOAT

RPM_KPH2 RPM Keyphasor #2 Input FLOAT

TripBuckIx_A Index of the first Bucket causing trip, Pyr A Input FLOAT

TripBuckNb_A Number of Buckets causing trip, Pyr A Input FLOAT

TripBuckIx_B Index of the first Bucket causing trip, Pyr B Input FLOAT

TripBuckNb_B Number of Buckets causing trip, Pyr B Input FLOAT

LogTrigger When true, records freeze, two before, one after Output BIT

TurbRPM Turbine Speed in RPM Output FLOAT

SlowAvg_A Slow, Average Temperature, Pyr A Input FLOAT

SlowMXPk_A Slow, Max Peak Temperature, Pyr A (configurationsimilar to above)

Input FLOAT

SlowAvgPk_A Slow, Average Peak Temperature, Pyr A Input FLOAT

FastAvg_A Fast, Average Temperature, Pyr A Input FLOAT

SlowAvg_B Slow, Average Temperature, Pyr B Input FLOAT

SlowMXPk_B Slow, Max Peak Temperature, Pyr B Input FLOAT

SlowAvgPk_B Slow, Average Peak Temperature, Pyr B Input FLOAT

FastAvg_B Fast, Average Temperature, Pyr B Input FLOAT

GAP_KPH1 Air Gap, Keyphasor #1 Input FLOAT

GAP_KPH1 Air Gap, Keyphasor #1 Input FLOAT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-153

InstallationThe two optical pyrometers are wired to the first terminal block on TPYR, and thetwo KeyPhasor probes are wired to the second terminal block. Power comes inthrough the JR1, JS1, and JT1 connectors. There are no jumpers as on the TVIBboard. The wiring connections are shown in Figure 9-89.

TPYR Terminal Board

2468

1012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

P24 (A)N24 (A)

20ma (A2)

P24 (B)N24 (B)

PCOM1 (A)

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

20ma (A1)

20ma (A3)20ma (A4)

PCOM2 (A)

N24 Pr (1)PrH (1)PrL (1)N24Pr (2)PrH (2)PrL (2)

Ret (A1)Ret (A2)Ret (A3)Ret (A4)

Ret (B1)Ret (B2)Ret (B3)Ret (B4)

PCOM1 (B)PCOM2 (B)

20ma (B1)20ma (B2)20ma (B3)20ma (B4)

JR1

JS1

JT1

Terminal Blocks can be unplugged fromterminal board for maintenance

Cable to <R>

Cable to <S>

Cable to <T>

Pyr Awiring

Pyr Bwiring

Keyphasors1 & 2

Figure 9-89. Terminal Board TPYR and Wiring

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9-154 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VSCA/DSCB - Serial Communications BoardThe Serial Communications Board (VSCA) provides I/O interfaces with externaldevices, using RS232C, RS422, and RS485 serial communications (see Figure 9-90).Currently the IS200VSCAH2A version is available. The associated Din-Railmounted Serial Communications Terminal Board (DSCB) is wired to the externaldevices, which include intelligent pressure sensors such as the smart HoneywellPressure Transducers (see Figure 9-91).

Connectivity between VSCA and the DSCB terminal board(s) is through the J6 andJ7 front panel connectors. These are parallel connected, each using the a 37-pin Dshell connector, with group shielded twisted pair wiring. Connectivity between theterminal board and the external device is through the Euro Block (Phoenix type),using screw terminations and twisted shielded pair, AWG#18, wiring.

The DSCB terminal board includes two screws for SCOM (ground) that must beconnected to a good shield ground. DSCB can interface external devices up todistances of 1000 ft. for RS422 and RS485, at baud rates up to 375 kbps. ForRS232C, the distance is only 50 ft, or 2500 pF of cable capacitance (including thecable from VSCA to the DSCB). It supports short haul modems for longer distances.

OperationThe VSCA is a single slot board, providing six serial communication ports. Eachport is independently configurable to an RS232C, RS485, or RS422 interface, usinga three position group jumper (berg array). Both RS232C and RS422 support fullduplex. The line drivers are located on the VSCA board, and include appropriatetermination resistors, with configurable jumpers, to accommodate multidrop linenetworks. Outputs for RS422 and RS485 have tri-state capability. Inputs/Outputs goto high impedance condition when powered down. They do not cause significantdisturbance when powered down/up (less than 10 ms) on a party line. The open wirecondition on a receiver is biased to a high state.• RS232C supports: RXD, TXD, DTR/RTS, GND, CTS (five wire)• RS422 supports: TX+, TX-, RX+, RX-, GND• RS485 supports: TX/RX+, TX/RX-, GND

The VSCA/DSCB is a Data Terminal Device (DTE).

VSCA JumpersJumpers JP1 thru JP6 are block jumpers, used to select the port electricalcharacteristic, RS232C, RS422, or RS485. Each jumper has three positions marked232, 422, and 485.

Jumpers JP7 thru JP12 are block jumpers, used to select the correct terminationconfiguration for all the transmission lines (Tx). Each jumper has three positionsmarked TRM, THR, and PRK where:• TRM means with terminating resistor.• THR means no terminating resistor, pass through to J7.• PRK means no terminating resistor, or Park position.

Jumpers JP13 thru JP18 are block jumpers, and are used to select the correcttermination configuration for all the Receive lines (Rx). Each jumper has threepositions marked TRM, THR, and PRK, where the meanings are the same as above.

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Table 9-38. VSCA Board Jumper Positions

Network PortNumber

232/422/485Communication

TxTRM/THR/PRK

RxTRM/THR/PRK

Port 1 JP1 JP7 JP13

Port 2 JP2 JP8 JP14

Port 3 JP3 JP9 JP15

Port 4 JP4 JP10 JP16

Port 5 JP5 JP11 JP17

Port 6 JP6 JP12 JP18

Features

Data Flow from VSCA to ControllerData Flow from VSCA to the controller UCV_ is of two types, fixed I/O andModbus I/O. Fixed I/O is associated with the smart pressure transducers and theKollmorgen electric drive data. This data is completely processsed every frame, thesame as conventional I/O. The required frame rate is 100 Hz. These signals aremapped into signal space, using the .tre file, and have individual health bits, usesystem limit checking, and have offset/gain scaling.

Modbus I/O is the I/O associated with the Modbus ports. Because of the quantity ofthese signals, they are not completely processed every frame; instead they arepacketized, and transferred to the UCV_ processor, over the IONet through a specialservice. This can accommodate up to 2400 bytes, at 4 Hz, or 9600 bytes at 1 Hz, orcombinations thereof. This I/O is known as second class I/O, where coherency is atthe signal level only, not at the device or board level. Health bits are assigned at thedevice level, the UCV_ expands (fully populate) for all signals, and system limitchecking is not performed. Two consecutive time outs are required before a signal isdeclared unhealthy. Diagnostic messages are used to annunciate all communicationproblems.

Ports 1 and 2 only (as an option) support the Honeywell pressure configuration. Itreads inputs from the Honeywell Smart Pressure Transducers, type LG-1237; thisservice is available on ports 1 and 2 only, as an option (Pressure Transducers orModBus). The Pressure Transducer Protocol utilizes interface boardDS200XDSAG#AC, and RS422. Each port can service up to six transducers. Theservice is 375 kbaud, asynchronous, 9 data bits, (11 bits including start and stop). Itincludes failsafe features as follows:• Communication miss counters, one per device, and associated diagnostics.• After four consecutive misses it forces the input pressure to 1.0 psia, and posts a

diagnostic. After four consecutive hits (good values) it removes the forcing andthe diagnostic.

Three ports (any three, but no more than three) support the Kollmorgen electricdrive. It communicates with a Kollmorgen Electric Fast Drive FD170/8R2-004 at19200 Baud rate, point to point, using RS422.

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Modbus service. The current Modbus design supports the Master mode, howeverthe design does not preclude the future enhancement of Modbus slave mode ofoperation. It is configurable, at the port level as follows:• Used , Not Used• Baud Rate RS232C: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600

RS485/422: 19200, 38400, 57600, 115000• Parity: none, odd, even• Data Bits: seven, eight• Stop Bits: one, two• Station Addresses• Multidrop, up to 8 devices per port; maximum of 18 devices per board• RTU• Time Out (seconds) per device

The Modbus service is configurable at the signal level as follows:• Signal Type• Register Number• Read/Write• Transfer Rate, 0.5, 1, 2, or 4 Hz• Scaling, Offset, and Gain

The service supports Function Codes 1-7, 15, and 16; it also supports double 16-bitregisters for floating point numbers and 32-bit counters. It periodically (20 s)attempts to reestablish communications with a dead station.

Type casting and scaling of all I/O signals to/from engineering units are supportedon the VSCA and the toolbox, for both fixed I/O and Modbus I/O.

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Electric DriveFD170/8F2-004

Actuator/Valve

+125 VDC Power

-

J1

Ph A

Ph B

Ph C

Grd

Motor GrdMotorFrame

4

Shield(int)

J4

chassis

Resolver

Ref

Sin

Cos

6Ther

excexcsec2sec2sec1sec1

123456

LVDT

Mark VI Control J2

J4

89465

Rx

Tx

Grd

Enable3678

3132

P24VEnable

Crit FaultRelay

+-

+-

VSCA

DSCB

VCCC

TRLY

TBCI

VSVO

TSVO

Twisted shielded pairAWG#18 min, up to1000 ft, ground shields atMark VI end only

4 5 1 2 3 6 30 27 17 19 21 2823 18 20 22

21 3 5 7 8 E A B D C GFContact InputL5FMVn_CFZFault = Open

Drive Enable RelayL4FMVn_ENAXEnable = Close

Monitoring Signals

Figure 9-90. VSCA Interface to Electric Servo Drive

DSCB - DIN-rail Mounted Terminal BoardThe DSCB board is held in a plastic frame and mounts on a DIN-rail. Six intelligenttransducers are wired to DSCB using shielded twisted pair. There are six jumpers onthe board for the six channels. The wiring connections to the Euro Block typeterminal block are shown in Figure 9-91. There are four terminals for the SCOM(ground) connection, which should be as short as possible.

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Note Jumpers J1 � J6 direct SIGRET either directly to SCOM or through acapacitor to SCOM. The shield must be grounded at one end or the other, but notboth. If the shield is grounded at the device end, the jumpers should be set to includethe capacitor in the circuit. If the shield is not grounded at the device end, thejumpers should be set to go directly to SCOM.

Terminal Assignments,

RS422 TX+ TX- RX+ RX- NC SIGRET JPx SCOMRS485 NC NC Tx/RX+ Tx/RX- NC SIGRET JPx SCOMRS232 CTS DTR/RTS RX NC TX SIGRET JPx SCOM

1 2 3 4 5 6 JP1 79 10 11 12 13 JP2 14

16 17 18 19 20 JP3 2123 24 25 26 27 JP4 2830 31 32 33 34 JP5 3537 38 39 40 41 JP6 42

43,44,45,46

Six channels

Comments: The RS422/RS485 transmit and receive pairs musttwisted pair in the VSCA to DSCB

To/from VSCA, J6

DSCB DIN-rail mountedTerminal Board

37 wire cable,with twisted pair,group shielding

JA1Twisted ShieldedAWG#18, to externaldevices.Configurable toRS422, or RS485.Six channels,definitions below

SCOM

SIGRETSCOM

CapJ1

SCOM GRD

ss

ss

Chan 1Chan 2Chan 3Chan 4Chan 5Chan 6

815222936

Figure 9-91. DSCB Wiring, Cabling, and Jumper Positions

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JA1DSCB

From VSCABoard Front,J6

43444546

Mark VI Control Fuel Skid

XDSAG1ACCP1

Press XdrLG-1237

Outer ValveGP1OA

P2Press XdrLG-1237

Outer ValveGP2OA

P3Press XdrLG-1237

Outer ValveGP1OB

P4Press XdrLG-1237

Outer ValveGP2OB

12345678

910111213141516

PowerAdr= 0

Adr= 1

Adr= 2

Adr= 3

Power

XDSAG1ACCP1

Press XdrLG-1237

Pilot ValveGP1PA

P2Press XdrLG-1237

Pilot ValveGP2PA

P3Press XdrLG-1237

Pilot ValveGP1PB

P4Press XdrLG-1237

Pilot ValveGP2PB

12345678

910111213141516

PowerAdr= 4

Adr= 5

Adr= 6

Adr= 7

Power

XDSAG1ACCP1

Press XdrLG-1237

Inner ValveGP1IA

P2Press XdrLG-1237

Inner ValveGP2IA

P3Press XdrLG-1237

Inner ValveGP1IB

P4Press XdrLG-1237

Inner ValveGP2IB

12345678

910111213141516

PowerAdr= 8

Adr= 9

Adr=10

Adr=11

Power

Chan A

Chan B

Chan B

Chan A

Chan B

Chan A

Chan A, RS422+

+

+

GndSCOM

12

34

+

Chan B, RS42289

1011

Tx

Rx

Tx

Rx

Port #1

Port #2

Stab-on

nearest gnd

Stab-on

nearest gnd

Stab-on

nearest gnd

XDSA Jumper Settings:

Termination: Tx Only, JP1, JP2:Set to "IN" if end of line;Set to "OUT" if not end of line.

Address:Jumper Outer Pilot Inner

JP3 0 1 0 Chan AJP4 0 0 1 Chan A

JP5 0 1 0 Chan BJP6 0 0 1 Chan B

Figure 9-92. DSCB Connections to XDSA and Pressure Transducers

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DPWA - DIN-rail Mounted Transducer Excitation PowerDistribution Terminal Board

DPWA is DIN-rail mounted and has an input voltage of 28 V dc ± 5%, providedthrough 2-pin locking connectors (see Figure 9-93). Connectivity between theterminal board and the external devices is through the Euro Block (Phoenix type)terminal block, using screw terminations and twisted shielded pair, AWG#18,wiring. DPWA provides three voltage output sources of 12 V dc ± 5%, with eachoutput rated at 0 to 0.4 A, and is compatible with interface boardDS200XDSAG#AC. Outputs are short circuit protected, and self recovering. Twoterminal boards per system are required when servicing redundant ports.

DPWA provides excitation power to the type LG-1237 Honeywell pressuretransducers (see Figure 9-94).

Note The DPWA terminal board includes two screw terminals for SCOM (ground)that must be connected to a good shield ground.

DPWA

Returns

1 k 1 kBuscenteringbridge

20 k

SCOM

SCOM100 k

20 k

100 k

20 k

SCOM

P12V1P12R1

P12V2P12R2

P12R3P12V3

PSRetSCOM

PS28VA

PS28VBSCOM

SCOM

12

3

4

5

6

910

1112

1314

P1

P3

P4

PeripherialP28V dc fromcontrol rack P12Vdc,

1.2 Amp

P12

P12

P12

s

s

100k

SCOM15

SCOM16

12

P28V dc toP12 V dcIsolation

s

P2

Figure 9-93. DPWA Board Block Diagram

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P1

P2

P3

P4

DPWA

Power Supply,IS2020RKPS

28 VDC +/-5% 11

12

13

14

15

16

28 Vto

12 V

1

2

3

4

5

6

Return

100K20K

ReturnSCOM

100K20K

P28_J1SCOM

100KP28_J2SCOM 20K

12 Vdc +/-5%1.2 Amp

P1

P2

P3

P4

DPWA9

10

11

12

13

14

15

16

28 Vto

12 V

1

2

3

4

5

6

Return

100K20K

ReturnSCOM

100K20K

P28_J1SCOM

100KP28_J2SCOM 20K

12 Vdc +/-5%1.2 Amp

Mark VI Control Fuel Skid

XDSAG1ACC P1Press XdrLG-1237

Outer ValveGP1OA

P2Press XdrLG-1237

Outer ValveGP2OA

P3Press XdrLG-1237

Outer ValveGP1OB

P4Press XdrLG-1237

Outer ValveGP2OB

12345678

910111213141516

PowerAdr= 0

Adr= 1

Adr= 2

Adr= 3

Power

XDSAG1ACC P1Press XdrLG-1237

Pilot ValveGP1PA

P2Press XdrLG-1237

Pilot ValveGP2PA

P3Press XdrLG-1237

Pilot ValveGP1PB

P4Press XdrLG-1237

Pilot ValveGP2PB

12345678

910111213141516

PowerAdr= 4

Adr= 5

Adr= 6

Adr= 7

Power

XDSAG1ACC P1Press XdrLG-1237

Inner ValveGP1IA

P2Press XdrLG-1237

Inner ValveGP2IA

P3Press XdrLG-1237

Inner ValveGP1IB

P4Press XdrLG-1237

Inner ValveGP2IB

12345678

910111213141516

PowerAdr= 8

Adr= 9

Adr= 10

Adr=11

Power

Chan A

Chan B

Chan B

Chan A

Chan B

Chan A

Power for Chan A

Power for Chan B

9

10

+

+

+

+

+

+

+

+

+

+

+

+

VAIC

VDCxRetx

RetxVDCx

RedundantPower Supplywhen required

RetxVDCx

Power SupplyMonitoring

Stab-on

nearest gnd

Stab-on

nearest gnd

Stab-on

nearest gnd

12

+

1

32

28V

ComPS28C

12

PS28C"Normal"

Return

ReturnP12

P12

P12

Grd1Grd2

Isol

Isol

Return

Return

P12

P12

P12

Grd1Grd2

Figure 9-94. DPWA Power Distribution to XDSA and Smart Pressure Transducers

Page 176: 6421C Vol II System Manual for Mark VI

9-162 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VPRO/TREG - Turbine Emergency Trip

OperationThe VPRO board in the Protection Module <P> provides the emergency tripfunction. Up to three trip solenoids can be connected between the TREG and TRPGterminal boards. TREG provides the positive side of the 125 V dc to the solenoidsand TRPG provides the negative side. VPRO provides emergency overspeedprotection and the emergency stop functions. It controls the 12 relays on TREG, nineof which form three groups of three to vote inputs controlling the three tripsolenoids. A second TREG board may be driven from VPRO through J4.

VPRO also connects to the TPRO terminal board and has an Ethernet connection forIONet communications with the control modules (refer to Figure 9-95). Details ofthe TREG board are shown in Figure 9-96.

TREG Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cable to VPRO-S8

Cable to VPRO-T8

x

STAT

VPRO

VPRO Module � R8

BarrierType TerminalBlocks can beunpluggedfrom board formaintenance

ShieldBar

x

x

JY1

JX1

Cable to VPRO-R8

J3

24681012141618202224

xxxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

JH1 J1

JZ1

x x

x x x

RUNFAIL

IONET

CSER

J5

J6

J4

PARAL

P5COMP28AP28BETHR

POWER

To TSVOTerminationBoards (SMX)

P125 Vdc

R

XYZ

8421

T

J2

To TRPG EthernetIONet

To TPRO

To TPRO

To Second TREG(optional)

NF

Figure 9-95. Trip Emergency Terminal Board, VPRO Board, and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-163

J2

To RelayK25A on

TTUR

Servo Clamp

Trip Interlockseven circuits2

3RDK4CL JX1

JY1JZ1

Mon

J1K4CL

To TSVOBoards on

SMX Systems

J223RD

JX1JY1JZ1

MonJH1 P125XN125X

ToJX1JY1JZ1

P28VV

K4CL

BCOM

JX1JY1JZ1

J2

J2

Terminal Board TREGH1AKX1

KX2

KX3

RD

RD

RD

<P>VPRO

Section XJ3

JX1

28Vdc

TripSolenoid

1 or 402

Trip Solenoid2 or 5

04

TripSolenoid

3 or 606

K4X KX1,2,3

KX1 KY1

KY1

KZ1 KX1

KZ1

KE101

J2 J2

0403

KY1

KY2

KY3

RD

RD

RD

<P>VPRO

Section YJ3

JY1

28VdcK4Y KY1,2,3

KX2 KY2

KY2

KZ2 KX2

KZ2

KE205

J2

0807

KZ1

KZ2

KZ3

RD

RD

RD

<P>VPRO

Section ZJ3

JZ1

28VdcK4Z KZ1,2,3

KX3 KY3

KY3

KZ3 KX3

KZ3

KE309

J2

12

11

- +

- +

- +

TerminalBoard TRPG

Mon

Mon

Mon

Mon

Mon

Mon0610

02

P28X1

P28Y1

P28Z1

Sol Pwr Monitor

OptionalEconomizingResistor,100 ohm,70W

ID

ID

ID

J2 J2-+

MonJX1JY1JZ1

P125VN125V

3031

JX1JY1JZ1

P28VV

Three Economizing Relay Circuits

23RD

KE1,2,3

MonJX1JY1JZ1 KE1,2,3

NS

NS

35

36

P125XExc

TRP

TRP1H

TRP1L

14

15

16

17

18

E-Stop

CL

K4X

K4YK4Z

P28VVETRPH

ETRPL

N125X

Second E-STOPwhen applicable

JUMPR

JUMPR

PWR_P1PWR_P2

for test probe

PWR_N1for test

13

Figure 9-96. TREG Board, Trip Interlocks, and Trip Solenoids

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9-164 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

FeaturesTREG is entirely controlled by VPRO, and the only connections to the controlmodules are the J2 power cable and the trip solenoids. In Simplex systems a thirdcable carries a trip signal from J1 to the TSVO terminal board, providing aServovalve clamp function upon turbine trip.

Control of Trip SolenoidsBoth TRPG and TREG control the trip solenoids so that either one can removepower and actuate the hydraulics to close the steam or fuel valves. The nine trip relaycoils on TREG are supplied with 28 V dc from VPRO boards in X, Y, and Z. Thetrip solenoids are supplied with 125 V dc via plug J2, and draw up to 1 Amp with a0.1 second L/R time constant. The solenoid circuit has a metal oxide varistor (MOV)for current suppression and a 10 ohm, 70 watt economizing resistor.

A separately fused 125 V dc feeder is provided from the turbine control for thesolenoids which energize in the run mode and de-energize in the trip mode.Diagnostics monitor each 125 V dc feeder from the Power Distribution Module at itspoint of entry on the terminal board to verify the fuse integrity and the cableconnection.

Two series contacts from each emergency trip relay (ETR1, 2, 3) are connected tothe positive 125 V dc feeder for each solenoid, and two series contacts from eachprimary trip relay (PTR1,2,3 in TRPG) are connected to the negative 125 V dcfeeder for each solenoid. An economizing relay (KE1, 2, 3) is supplied for eachsolenoid with a normally closed contact in parallel with the current limiting resistor.These relays are used to reduce the current load after the solenoids are energized.The ETR and KE relay coils are powered from a 28 V dc source from the VPROboards. Each VPRO board in each of the X, Y, and Z sections supplies anindependent 28 V dc source. A normally closed contact from each relay is used tosense the relay status for diagnostics.

The 28 V dc bus is current limited and used for power to an external manualemergency trip contact, shown as E-Stop. Three master trip relays (K4X, K4Y, K4Z)disconnect the 28 V dc bus from the ETR, and KE relay coils if a manual emergencytrip occurs. Any trip which originates in either the Protection Module (such as EOS)or the TREG (such as a manual trip) will cause each of the three Protection Modulesections to transmit a trip command over the IONet to the control module, and maybe used to identify the source of the trip.

In addition, the K4CL servo clamp relay will energize and send a contact feedbackdirectly from the TREG terminal board to the TSVO servo terminal board. TSVOdisconnects the servo current source from the terminal block and applies a bias todrive the control valve closed. This is only used on Simplex applications to protectagainst the servo amplifier failing high. Note that the primary and emergencyoverspeed systems will trip the hydraulic trip solenoids independent of this circuit.

Solenoid Trip TestsApplication software in the control module is used to initiate tests of the tripsolenoids. Online tests allow each of the trip solenoids to be manually tripped one ata time either through the PTR relays from the control module(s) or through the ETRrelays from the Protection Module. A contact from each solenoid circuit is wiredback as a contact input to give a positive indication that the solenoid has tripped.Primary and emergency off-line overspeed tests are provided too for verification ofactual trips due to software simulated trip overspeed conditions.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-165

Specification

Table 9-39. TREG Board Specifications

Item Specification

Number of Trip Solenoids (TREG) 3 Solenoids per TREG (total of 6 per VPRO)

Trip Solenoid Rating 125 V dc standard with 1 Amp draw24 V dc is alternate with 1 Amp draw

Trip Solenoid Circuits Circuits rated for NEMA class E creepage and clearance.Circuits can clear a 15 A fuse with all circuits fully loaded.

Solenoid Response Time Solenoid L/R time constant is 0.1 sec.

Suppression MOV across the solenoid

Relay outputs 3 Economizer relay outputs, 2 second delay to energize

Driver to breaker relay K25A on TTUR

Servo clamp relay on TSVO

Solenoid Control Relay Contacts Contacts are rated to interrupt inductive solenoid loads at125 V dc, 1 ABus voltage can vary from 70 to 145 V dc

Trip Inputs 7 trip interlocks to VPRO protection module, 125/24 V dc1 Emergency Stop hardwired trip interlock, 24 V dc

Configuration OverviewLike all I/O boards, TREG is configured using the toolbox. This software usuallyruns on a data-highway connected CIMPLICITY station or workstation. Table 9-40summarizes the configuration choices and defaults. For details refer to GEH-6403Control System Toolbox for Configuring the Mark VI Turbine Controller.

Table 9-40. Typical TREG Configuration

Parameter Description Choices

Configuration

J3:IS200TREGH1A First TREG Board Connected, Not Connected

KESTOP1_Fdbk1 Emergency Stop - When TREG, ESTOP1, inverse sense,K4 relay, True = Run - Card Point

Point Edit (Input BIT)

Contact1 Trip Interlock 1 (first of 7) - Card Point Point Edit (Input BIT)

ContactInput Trip Interlock 1 used Used, Unused

TripEnable Trip Interlock active Enable, Disable

TrpTimeDelay Time delay before Tripping Turbine after Contact Opens(sec)

0 to 10

SeqOfEvents Record Contact Transitions in Sequence of Events Enable, Disable

K1_Fdbk Trip Relay 1 feedback (first of 3) - Card Point Point Edit (Input BIT)

RelayOutput Relay feedback used Used, Unused

KE1_Fdbk Economizer Relay for Trip Solenoid Feedbk (first of 3)- Card Point

Point Edit (Input BIT)

RelayOutput Economizer Relay Feedback Used Used, Unused

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9-166 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

K4CL_Fdbk Drive Control Valve Servos Closed, use ONLY for SteamTurbine Simplex - Card Point

Point Edit (Input BIT)

Relay Output Servo Valve Clamp used Used, Unused

K25A Synchronizing Check Relay on TTUR - Card Point Point Edit (Input BIT)

SynchCheck Synch Check Relay K25A Used Used, Unused

SystemFreq System Frequency in Hz 50 or 60

ReferFreq Select Generator Frequency Reference for PLL, standardPR input or from Signal Space

PR Std or Sg Space

TurbRPM Rated Load Turbine RPM 0 to 20,000

VoltageDiff Maximum Voltage Difference in kV rms for Synchronizing 0 to1,000

FreqDiff Maximum Frequency Difference in Hz for Synchronizing 0 to 0.5

PhaseDiff Maximum Phase Difference in Degrees for Synchronizing 0 to 30

GenVoltage Minimum Generator Voltage in kVolts RMS forSynchronizing

1 to 1,000

BusVoltage Minimum Bus Voltage in kVolts rms for Synchronizing 1 to 1,000

J4A:IS200TREGH1A Second TREG Board Connected, Not Connected

KESTOP2_Fdbk When TREG, ESTOP, inverse sense, K4 relay, True =Run - Card Point

Point Edit (Input BIT)

K4_Fdbk Trip Relay 4 Feedback (first of three) - Card Point Point Edit (Input BIT)

KE4_Fdbk Economizing Relay for Trip Solenoid 4 (first of three) -Card Point

Point Edit (Input BIT)

Card Points (Signals) Description - Point Edit (Enter Signal Connnection) Direction Type

See Point Edit names above

DiagnosticsDescriptions of the TREG diagnostics are contained in the VPRO section. Thediagnostics cover the trip relay driver and contact feedbacks, solenoid voltage,economizer relay driver and contact feedbacks, K25A relay driver and coil, servoclamp relay driver and contact feedback, and the solenoid voltage source.

Connectors JX1, JY1, and JZ1 on the terminal board have their own ID device that isinterrogated by the I/O board. The ID device is a read-only chip coded with theterminal board serial number, board type, revision number, and the plug location.

InstallationThe three trip solenoids, economizing resistors, and the emergency stop are wireddirectly to the first I/O terminal block. Up to seven trip interlocks can be wired to thesecond terminal block. The wiring connections are shown in Figure 9-97.

Page 181: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-167

Turbine Emergency TripTermination Board TREGH1A

Up to two #12 AWG wires perpoint with 300 volt insulation

Terminal Blocks can be unpluggedfrom terminal board for maintenance

SOL 1 or 4

Contact TRP2 (L)

Contact TRP4 (L)

Contact TRP6 (L)Contact TRP7 (L)

Contact TRP2 (H)

Contact TRP4 (H)

Contact TRP6 (H)

Contact TRP1 (H)

Contact TRP3 (H)

Contact TRP5 (H)

Contact TRP7 (H)

24681012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

RES 1ASOL 2 or 5

SOL 3 or 6PWR_N3

PWR_N1RES 1BPWR_N2

Contact TRP1 (L)

Contact TRP3 (L)

Contact TRP5 (L)

J1J2JH1

RES 2ARES 2B

RES 3ARES 3B E-TRP (H)E-TRP (H)E-TRP (L)

PWR_P1 (for probe)PWR_P2 (for probe)

Power 125 V dc

To TRPG, 12 wiresTo TSVOboards onSMXsystems

JZ1

JY1

JX1

JUMPER

VPROZ

VPROY

VPROX

Figure 9-97. TREG Terminal Board

Page 182: 6421C Vol II System Manual for Mark VI

9-168 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VPRO/TPRO - Turbine ProtectionThe Turbine Protection Module (VPRO) and associated terminal board (TPRO)provide an independent emergency overspeed protection system. The protectionsystem consists of triple redundant VPRO boards in a module separate from theturbine control system, controlling the trip solenoids through TREG. Figure 9-98shows the cabling to VPRO from the TPRO terminal boards.

TPRO Terminal Board

37-pin "D" shelltype connectorswith latchingfasteners

Cables to VPRO-S8

Cables to VPRO-T8

x

STAT

VPRO

VPRO- R8

BarrierType TerminalBlocks can be unpluggedfrom board for maintenance

x

x

JY1

JX1

Cables to VPRO-R8

J3

JZ1

x x

x x x

RUNFAIL

IONET

CSER

J5

J6

J4

PARAL

P5COMP28AP28BETHR

POWER

R

XYZ

8421

T

EthernetIONet

To Second TREG(optional)

NF

ShieldBar

24681012141618202224

xxxxxxxxxxxxx

1357911131517192123

xxxxxxxxxxxx

x

262830323436384042444648

xxxxxxxxxxxxx

252729313335373941434547

xxxxxxxxxxxx

x

JZ5

JY5

JX5

To TREG

Figure 9-98. Turbine Protection Terminal Board, VPRO Board, and Cabling

Figure 9-99 shows how the VTUR and VPRO processor boards share in the turbineprotection scheme. Either one can independently trip the turbine via the relays onTRPG or TREG. Figure 9-100 provides details of the TPRO terminal board.

Page 183: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-169

J3

J4

VTUR

VPRO

Trip Solenoids,three circuits

Cable

JR5

JR1

Special speed cable

JR1

J1

J2

JX5

JX1

JX1

JS5

JT5

JS1

JT1

JS1

JT1

JY1

JZ1

JY5

JZ5

JY1

JZ1

Special speed cable

125 VDC

Twoxfrs

Twoxfrs

12 Relays

9 Relays

335 V dc from <Q>

125 VDCJ2

J3 J4 J5

J1Trip signal toTSVO TB's

J5

J5

J4

J3

J7

TPRO

TREG

TRPG

TTUR

(3 x 3 PTR's)

3 RelaysGen Synch

OptionalDaughterBoard

To secondTRPG board

(optional)

(9 ETR's,3 Econ Relays)

P125 V dc from <PDM>NEMA class F

JH1

To secondTREG Board

(optional)

J6

J4

Figure 9-99. Turbine Control and Protection Boards

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9-170 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VPRO R8Protection

VPRO S8Protection

VPRO T8Protection

J5 J5 J5

J3 J3 J3

OverspeedEm Stop

SyncCheck

Overtemp

OverspeedEm Stop

SyncCheck

Overtemp

OverspeedEm Stop

SyncCheck

Overtemp

J6 J6 J6

To TREG andTrip Solenoids

J4 J4 J4

NS

NS

NS

JX5 31

32

37

38

43

44

JY5

JZ5

3 Circuits

3 Circuits

3 Circuits

Termination Board TPRO

Gen. Volts120 V acfrom PT

1

2

3

4

Bus Volts120 Vacfrom PT

To TTUR

Three TC ccts to X

Three TC ccts to Y

Three TC ccts to Z

RetOpen

JPB1

250 ohms

JPA1VDC

20 maTo R8,S8, T8

One of the above ccts

JX1

JY1

JZ1

P28V,XCurrentLimiter

P28V,YP28V,Z

CurrentLimiter

P28VV

Two of the above ccts

To R8, S8, T8250ohms

20mA1

TCX1H

TCX1L

TCY1H

P28VV

NS

NS

NS

NS

NS

NS

FilterClamp

ACCoupling

FilterClamp

ACCoupling

FilterClamp

ACCoupling

Thermocouple Inputs CJ

CJ

CJ

1

1

1

ID

ID

ID

ID

ID

P24V2

20 mA2

P24V1

V dc

mAret

TCY1L

TCZ1H

TCZ1L

5

7

6

8

9

10

13

14

19

20

25

26

MX1H

MY1L

MY1H

MX1H

MZ1L

MZ1H

ID

#1EmergencyMagneticSpeedPickup

#2EmergencyMagneticSpeedPickup

#3EmergencyMagneticSpeedPickup

Noise Suppression

Noise Suppression

NS

NS

Figure 9-100. TMR Protection System

Page 185: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-171

OperationThe main purpose of the <P> Protection Module is emergency overspeed (EOS)protection for the turbine. In addition, the module has backup synchronization checkprotection, three analog current inputs, and nine thermocouple inputs, primarilyintended for exhaust over-temperature protection on gas turbines.

The Protection Module is always triple redundant with three completely separate andindependent sections named X, Y, and Z. Any one of these sections can be powereddown and replaced while the turbine is running without jeopardizing the protectionsystem. Each section contains its own I/O interface, processor, power supply, andEthernet communications (IONet) to the control modules. The communicationsallow initiation of test commands from the control module to the Protection Moduleand the monitoring of EOS system diagnostics in the control module and on theoperator interface. Communications are resident on the VPRO board which is theheart of the system. The VPRO board has a VME interface to allow programmingand testing in a VME rack; however, the backplane is neutralized when plugged intothe Protection Module to eliminate any continuity between the three independentsections.

Features

Speed Control and Overspeed ProtectionSpeed control and overspeed protection is implemented with six passive, magneticspeed pickups. The first three are monitored by the control module(s) which use themedian signal for speed control and the primary overspeed protection. The secondthree are separately connected to the X, Y, and Z sections of the Protection Module.Provision is made for nine passive magnetic speed pickups or active pulse ratetransducers (TTL type) on the TPRO terminal board with three being monitored byeach of the X, Y, and Z sections. Separate overspeed trip settings are programmedinto the application software for the primary and emergency overspeed trip limits,and a second emergency overspeed trip limit must be programmed into the I/Oconfigurator to confirm the EOS trip point.

The speed is calculated by counting passing teeth on the wheel and measuring thetime involved. Another protection feature is the calculation of the rate of change ofspeed which is compared with 100%/sec and transmitted to the control module to tripthe unit if it is detected after the turbine reaches a predetermined steady-state speed.This steady-state speed limit is a tuning constant located in the controller�sapplication software. Another speed threshold which is monitored by the EOSsystem is 10% speed. This is transmitted to the control module to verify that there isno gross disagreement between the first set of three speed pickups being monitoredby the controller (for speed control and the primary overspeed protection) and thesecond set of three speed pickups being monitored by the EOS system.

Interface To Trip SolenoidsThe trip system combines the Primary Trip Interface from the control module(s) withthe EOS Trip Interface from the Protection Module. Three separate, triple redundanttrip solenoids (also called Electrical Trip Devices - ETDs) are used to interface withthe hydraulics. The ETDs are connected between the TRPG and TREG terminalboards. A separately fused 125 V dc feeder is provided from the turbine control foreach solenoid which energize in the run mode and de-energize in the trip mode.

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9-172 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Backup Synch Check ProtectionBackup synch check protection is provided in the <P> Protection Module. Thegenerator and bus voltages are supplied from two, single phase, potentialtransformers (PTs) secondary output supplying a nominal 115 V rms. The maximumcable length between the PTs and the turbine control is 100 meters of 18 AWGtwisted, shielded wire. Each PT is magnetically isolated with a 1,500 V rms ratedbarrier and a circuit load less than 3 VA. The synch algorithms are based on phaselock loop techniques. Phase error between the generator and bus voltages is less than+/-1 degree at nominal voltage and 50/60 Hz. A frequency range of 45 to 66 Hz issupported with the measured frequency within 0.05% of the input frequency. Thealgorithm is illustrated under TTUR, generator synchronizing.

Each PT input is internally connected in parallel to the X, Y, and Z sections of theProtection Module. The triple redundant phase slip windows result in a voted logicaloutput on the TREG terminal board which drives the K25A relay. This relay�scontacts are connected in series with the synch permissive relay (K25P) and the autosynch relay (K25) to insure that no false command is issued to close the generatorbreaker. Similarly, contacts from the K25A contact are connected in series with thecontacts from remote, manual synchronizing equipment to insure no falsecommands.

Thermocouple and Analog InputsThermocouple and analog inputs are available in the Protection Module, primarilyfor gas turbine applications. Nine thermocouple inputs are monitored with threeconnected to each section of the Protection Module. These are generally used forbackup exhaust over-temperature protection. Also, one ± 5, 10 V dc, 4−20 mA(selectable) input, and two 4−20 mA inputs can be connected to the TPRO terminalboard which feeds the inputs in parallel to the three sections of the ProtectionModule.

Power SupplyEach VPRO board has its own on-board power supply. This generates 5 V dc and 28V dc using 125 V dc supplied from the cabinet PDM. The entire TMR VPROmodule therefore has three power supplies for high reliability.

SpecificationTable 9-41. VPRO Board Specifications

Item Specification

Number of Inputs TPRO: 9 Passive Speed Pickups1 Generator and 1 Bus Voltage9 Thermocouples1 4−20 mA current or voltage2 4−20 mA current

VPRO: 3 Passive Speed Pickups1 Generator and 1 Bus Voltage3 Thermocouples1 4−20 mA current or voltage2 4−20 mA current7 Trip interlocks2 Emergency Stop

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-173

Number of Outputs TREG: 3 Trip Solenoids per TREG3 Economizer relays1 Breaker relay command, K25A on TTUR1 Servo clamp relay contact, to TSVO boards

VPRO: 6 Trip Solenoids6 Economizer relays1 Breaker relay command, K25A on TTUR1 Servo clamp relay contact, to TSVO boards

Power Supply Voltage TPRO: 28 V dc from X, Y, and Z boards, votedVPRO: Input supply 125 V dc (70−145 V dc) Output 5 V dc and 28 V dc

Frame Rate Up to 100 Hz

MPU Characteristics Output resistance 200 ohms with inductance of 85 mH.Output generates 150 V p-p into 60 K ohms at the TPRO terminalblock, with insufficient energy for a spark.The maximum short circuit current is approximately 100 mA.The system applies up to 400 ohm normal mode load to the inputsignal to reduce the voltage at the terminals.

MPU Cable Sensors can be up to 300 m (984 ft) from the cabinet, assumingthat shielded pair cable is used, with typical 70 nF single ended or35 nF differential capacitance, and 15 ohms resistance.

MPU Pulse Rate Range 2 Hz to 14 kHz

MPU Pulse Rate Accuracy 0.05% of reading; resolution is 15 bits at 100 HzNoise of the acceleration measurement is less than ± 50 Hz/secfor a 10,000 Hz signal being read at 10 ms.

MPU Input Circuit Sensitivity Minimum signal is 27 mV pk at 2 HzMinimum signal is 450 mV pk at 14 kHz

Generator and Bus VoltageSensors

Two Single-Phase Potential Transformers, 115 V rms secondaryVoltage accuracy is 0.5% of rated Volts rmsFrequency Accuracy 0.05%Phase Difference Measurement better than 1 degree.Allowable voltage range for synchronizing is 75 to 130 V rms.Each input has a load of less than 3 VA.

Thermocouple Inputs Same specifications as for VTCC board

Analog Inputs Same specifications as for VAIC board

ConfigurationTable 9-42. Typical VPRO-TPRO Configuration

Parameter Description Choices

Configuration

Turbine_Type Define the type of turbine from selection of ten types Two gas turbineTwo LMTwo large steamOne medium steamOne small steamTwo Stag GT

LMTripZEnable On LM machine, when no PR on Z, enable vote for trip Enable, Disable

OT_Trip_Enbl Enable Overtemperature Trip Enable, Disable

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OvrTemp_Trip Iso-thermal Overtemperature Trip Setting for ExhaustThermocouples in Degree F

−60 to 2,000

CPD_Corner Overtemperature Trip Compressor DischargePressure in psi at which CDP Bias Starts

0 to 450

CPD_Slope Overtemperature Trip Compressor Discharge PressureBias Slope in Degree F/psi

−10 to 0

TA_Trip_Enab1 Steam, Enable Trip Anticipation on ETR1 Enable, Disable

RatedRPM_TA Steam, Rated RPM, used for Trip Anticipation calc 0 to 20,000

Auto Reset Automatic Restoring of Thermocouples removed fromscan

Enable, Disable

DiagSolPwrA When using TREL/TRES, Sol Power, BusA, diagnosticenable

Enable, Disable

Min_MA_Input Minimum MA for Healthy 4−20 mA Input 0 to 21

Max_MA_Input Maximum MA for Healthy 4−20 mA Input 0 to 21

AccelCalType Select Acceleration calculation type Slow, Med, Fast

J5:IS200TPROH1A J5 cable section of TPRO board

PulseRate1 First of three speed inputs - Card Point Point Edit (Input FLOAT)

PRType Selects Gearing (Resolution) Unused, PR<6,000 Hz,PR>6,000 Hz

PRScale Pulses per revolution (output RPM) 0 to 1,000

OS_Setpoint Overspeed Trip Setpoint in RPM 0 to 20,000

OS_Tst_Delta Offline Overspeed Test Setpoint Delta in RPM -2,000 to 2,000

Zero_Speed Zero Speed for this Shaft in RPM 0 to 20,000

Min_Speed Minimum Speed for this Shaft in RPM 0 to 20,000

Accel_Trip Enable Acceleration trip Enable, Disable

Acc-Setpoint Accelerate Trip Setpoint in RPM/second 0 to 20,000

TMR_DiffLimt Difference Limit for Voted Pulse Rate Inputs inEngineering Units

0 to 20,000

J6:IS200TPROH1A J6 Cable section of TPRO board

BusPT_KVolts Kilo-Volts RMS, Bus Potential Transformer - Card Point Point Edit (Input FLOAT)

PT_Input PT input in kilovolts rms for PT_Output 0 to 1,000

PT_Output PT output in Volts rms for PT_Input-typically 115 60 to 150

TMR_DiffLimt Difference Limit for Voted PT Inputs in Per Cent 0 to 100

GenPT_KVolts Kilo-Volts RMS, Generator PT, configuration similar toBus PT - Card Point

Point Edit (Input FLOAT)

TC11 Thermocouple 1, for X module (first of 3) - Card Point Point Edit (Input FLOAT)

ThermCplType Select Thermocouple Type or mV Input Unused, mV, T, K, J, E

Low Pass Filter Enable 2 Hz Low Pass Filter Enable, disable

TC21 Thermocouple 1, for Y module (first of three)Config as above - Card Point

Point Edit (Input FLOAT)

TC31 Thermocouple 1, for Z module (first of three)Config as above - Card Point

Point Edit (Input FLOAT)

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-175

Cold Junction Cold Junction for Thermocouples 1-3 Point Edit (Input FLOAT)

TMR_DiffLimt Difference Limit for Voted TMR Cold Junction Inputs inDeg F

−60 to 2,000

AnalogIn1 First of Three Analog Inputs - Card Point Point Edit (Input FLOAT)

Input Type Type of Analog Input Unused, 4−20 mA, ± 10 V

Low_Input Input MA at Low Value −10 to 20

Low_Value Input Value in Engineering Units at Low Value −3.402e+38 to 3.402e+38

High_Input Input MA at High Value −10 to 20

High_Value Input Value in Engineering Units at High MA −3.402e+38 to 3.402e+38

InputFilter Filter Bandwidth in Hz Unused, 12 Hz, 6 Hz, 3Hz, 1.5Hz, 0.75 Hz

Trip_Enable Enable Trip for this MA Input Enable, Disable

TripSetpoint Trip Setpoint in Engineering Units −3.402e+38 to 3.402e+38

TripTimeDelay Time Delay before Tripping Turbine after Signalexceeds Setpoint in seconds

0 to 10

TMR_DiffLimt Difference Limit for Voted TMR Inputs in Per Cent of(High_Value-Low_Value)

0 to 100

J3:IS200TREGH1A First TREG board (see TREG section for configuration) Connected, Not Connected

J4:IS200TREGH1A Second TREG board (optional) Connected, Not Connected

Card Points (Signals) Description - Point Edit (Enter Signal Connection) Direction Type

L3DIAG-VPRO1 Card Diagnostic Input BIT

L3DIAG-VPRO2 Card Diagnostic Input BIT

L3DIAG-VPRO3 Card Diagnostic Input BIT

PR1_Zero L14HP_ZE Input BIT

PR2_Zero L14IP_ZE Input BIT

PR3_Zero L14LP_ZE Input BIT

Spare Spare Input BIT

OS1_Trip L12HP_TP Input BIT

OS2_Trip L12IP_TP Input BIT

OS3_Trip L12LP_TP Input BIT

Dec1_Trip L12HP_DEC Input BIT

Dec2_Trip L12IP_DEC Input BIT

Dec3_Trip L12LP_DEC Input BIT

Acc1_Trip L12HP_ACC Input BIT

Acc2_Trip L12IP_ACC Input BIT

Acc3_Trip L12LP_ACC Input BIT

TA_Trip Trip Anticipate Trip L12TA_TP Input BIT

TA_StpLoss L30TA Input BIT

OT_Trip L26TRP Input BIT

MA1_Trip L3MA_TRP1 Input BIT

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9-176 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

MA2_Trip L3MA_TRP2 Input BIT

MA3_Trip L3MA_TRP3 Input BIT

SOL1_Vfdbk When TREG, Trip Solenoid 1 Voltage Input BIT

: : Input BIT

SOL6_Vfdbk When TREG, Trip Solenoid 6 Voltage Input BIT

L25A_Cmd L25A Breaker Close Pulse Input BIT

Cont1_TrEnab Config_Contact 1 Trip Enabled Input BIT

: : Input BIT

Cont7_TrEnab Config_Contact 7 Trip Enabled Input BIT

Acc1_TrEnab Config - Accel 1 Trip Enabled Input BIT

: : Input BIT

Acc3_TrEnab Config - Accel 3 Trip Enabled Input BIT

OT-TrEnab Config - Overtemp Trip Enabled Input BIT

GT_1Shaft Config - Gas Turb, 1 Shaft Enabled Input BIT

GT_2Shaft Config - Gas Turb, 2 Shaft Enabled Input BIT

LM_2Shaft Config - LM Turb, 2 Shaft Enabled Input BIT

LM_3Shaft Config - LM Turb, 3 Shaft Enabled Input BIT

LargeSteam Config - Large Steam 1, Enabled Input BIT

MediumSteam Config - Medium Steam, Enabled Input BIT

SmallSteam Config - Small Steam, Enabled Input BIT

STag_GT_1S Config - Stag 1 Shaft, Enabled Input BIT

STag_GT_2S Config - Stag 2 Shaft, Enabled Input BIT

ETR1_Enab Config - ETR1 Relay Enabled Input BIT

: : Input BIT

ETR6_Enab Config - ETR6 Relay Enabled Input BIT

K4CL_Enab Config - Servo Clamp Relay Enabled Input BIT

K25A_Enab Config - Sync Check Relay Enabled Input BIT

L5CFG1_Trip HP Config Trip Input BIT

L5CFG2_Trip IP Config Trip Input BIT

L5CFG3_Trip LP Config Trip Input BIT

OS1_SP_CfgEr HP Overspeed Setpoint Config Mismatch Error Input BIT

OS2_SP_CfgEr IP Overspeed Setpoint Config Mismatch Error Input BIT

OS3_SP_CfgEr LP Overspeed Setpoint Config Mismatch Error Input BIT

ComposTrip1 Composite Trip 1 Input BIT

ComposTrip2 Composite Trip 2 Input BIT

ComposTrip3 Composite Trip 3 Input BIT

L5ESTOP1 ESTOP1 Trip, TREG, J3 Input BIT

L5ESTOP2 ESTOP2 Trip, TREG, J4 Input BIT

L5Cont1_Trip Contact1 Trip Input BIT

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-177

: : Input BIT

L5Cont7_Trip Contact7 Trip Input BIT

LPShaftLock LP Shaft Locked Input BIT

Bus Freq SFL 2 Hz Input FLOAT

GenFreq SF 2 Hz Input FLOAT

Gen VoltsDiff DV_ERR KiloVolts rms-Gen Low is Negative Input FLOAT

GenFreqDiff SFDIFF2 Slip Hz � Gen Slow is Negative Input FLOAT

GenPhaseDiff SSDIFF2 Phase degrees � Gen Lag is Negative Input FLOAT

PR1_Accel HP Accel in RPM/SEC Input FLOAT

PR2_Accel IP Accel in RPM/SEC Input FLOAT

PR3_Accel LP Accel in RPM/SEC Input FLOAT

PR1_Max HP Max Speed since Last Zero Speed in RPM Input FLOAT

PR2_Max IP Max Speed since Last Zero Speed in RPM Input FLOAT

PR3_Max LP Max Speed since Last Zero Speed in RPM Input FLOAT

SynCk_Perm L25A_PERM - Sync Check Permissive Output BIT

SynCk_ByPass L25A_BYPASS - Sync Check Bypass Output BIT

Cross_Trip L4Z_XTRP - Control Cross Trip Output BIT

OnLineOS1Tst L97HP_TST1 - On Line HP Overspeed Test Output BIT

OnLineOS1X L43EOST_ONL - On Line HP Overspeed Test, withauto reset

Output BIT

OnLineOS2Tst L97IP_TST1 - On Line IP Overspeed Test Output BIT

OnLineOS3Tst L97LP_TST1 - On Line LP Overspeed Test Output BIT

OffLineOS1Tst L97HP_TST2 - Off Line HP Overspeed Test Output BIT

OffLineOS2Tst L97IP_TST2 - Off Line IP Overspeed Test Output BIT

OffLineOS3Tst L97LP_TST2 - Off Line LP Overspeed Test Output BIT

TrpAntcptTst L97A_TST - Trip Anticipate Test Output BIT

LokdRotorByp L97LR_BYP - Locked Rotor Bypass Output BIT

HPZeroSpdByp L97ZSC_BYP - HP ZeroSpeed Check Bypass Output BIT

TestETR1 L97ETR1 - ETR1 Test, True denergizes relay Output BIT

: : Output BIT

TestETR4 L97ETR4 - ETR4 Test, True denergizes relay Output BIT

PTR1 L20PTR1 - PrimaryTrip Relay CMD for Diagnostic only Output BIT

: : Output BIT

PTR6 L20PTR6 - Primary Trip Relay CMD for Diagnostic only Output BIT

PR_Max_Rst Max Speed Reset Output BIT

CJBackup Estimated TC Cold Junction Temperature in Deg F Output FLOAT

OS1_Setpoint HP Overspeed Setpoint in RPM Output FLOAT

OS2_Setpoint IP Overspeed Setpoint in RPM Output FLOAT

OS3_Setpoint LP Overspeed Setpoint in RPM Output FLOAT

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9-178 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

OS1_TATrpSp PR1 Overspeed Trip setpoint in RPM for Trip AnticipateFn

Output FLOAT

CPD Compressor Discharge Pressure for OvertemperatureTrip CPD Bias

Output FLOAT

DriveFreq Drive (Gen) Freq (Hz), used for non standard driveconfig.

Output FLOAT

DiagnosticsBoard diagnostics cover the thermocouple limits, reference voltage, cold junction,analog input health, and contact input test failure. Relay diagnostics cover the triprelay driver and contact feedbacks, solenoid voltage, economizer relay driver andcontact feedbacks, K25A relay driver and coil, and the servo clamp relay driver andcontact feedback. Voltage diagnostics cover the solenoid power bus, and the voltageto the solenoids.

Connectors JX1, JY1, JZ1, JX5, JY5, and JZ5 on the terminal board have their ownID device which is interrogated by the I/O board. The ID device is a read-only chipcoded with the terminal board serial number, board type, revision number, and theplug location.

InstallationThe generator and bus potential transformers, and the analog inputs are wired to thefirst TPRO terminal block. The magnetic speed pickups are wired to the secondblock. Jumpers JP1A and JP1B are set to give either a 4−20 mA or voltage input onthe first of the three analog inputs. The wiring connections are shown in Figure 9-101.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-179

Turbine ProtectionTermination Board TPRO

Up to two #12 AWG wires perpoint with 300 volt insulation

Terminal Blocks can beunplugged from terminal boardfor maintenance

Gen (H)

mAret

Gen (L)Bus (L) Bus (H)

2468

1012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

VDC

MX1 (H)MX2 (H)MX3 (H)

MY1 (H)MY2 (H)MY3 (H)MZ1 (H)MZ2 (H)MZ3 (H)

MX1 (L)MX2 (L)

MY2 (L)

MX3 (L)MY1 (L)

MY3 (L)MZ1 (L)

MZ3 (L)MZ2 (L)

P24V120mA1

P24V220mA2P24V320mA3TC1X (H)TC2X (H)TC3X (H)TC1Y (H)TC2Y (H)TC3Y (H)

TC1X (L)

TC1Z (H)TC2Z (H)TC3Z (H)

TC2X (L)TC3X (L)TC1Y (L)TC2Y (L)

TC1Z (L)TC2Z (L)TC3Z (L)

TC3Y (L)

JP1A

JP1B

ma VOLTS

OPEN RETURN

MagneticSpeedPickups

ThermocoupleInputs

AnalogInputs

GenVolts

JZ1

JY1

JX1

To VPRO-ZJ6

To VPRO-YJ6

To VPRO-XJ6

JZ5

JY5

JX5

To J5

To J5

To J5

Figure 9-101. Terminal Board TPRO

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9-180 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

VME Rack Power SupplyThe VME rack power supply mounts on the side of the VME control and interfacemodules, as shown in Figures 9-102 and 9-106. It supplies + 5, ± 12, ± 15, and ± 28V dc to the VME backplane. It runs off 125 V dc cabled in from the PowerDistribution Module (PDM). A special 335 V dc output is provided for poweringflame detectors connected to TRPG. A low voltage version (LVPS) for 24 V dcoperation is also available. Note that a different power supply is used on thestandalone control rack, which only powers the Mark VI controller, VDSK, andVCMI.

POWERSUPPLY

Cable Harnessto VME Rack

125 VdcfromPDM

335 V dc

28 V dc(special)

Front View

Side View

BottomView

Heat Sink Cooling Fins

PSA PSB

Pull to Toggle

AvailableFaultNormal

OffOn

PS125PS335PS28CPS28BPS28A

Figure 9-102. VME Rack Power Supply, Front, Side, and Bottom Views

OperationThe power supply contains no user serviceable parts and the cover must not beremoved. The power supply contains three circuit boards, an input board withcontrol, monitoring and auxiliary functions, a module board with power supplymodules, and an output board with four more power modules and output filtering.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-181

Twelve power modules, shown in Figure 9-103, are mounted to the inside surface ofthe heat sink under these boards:• Five +28 V dc supplies• Two combined +5 V dc supplies• One �28 V dc supply• One +12 V dc supply• One �12 V dc supply• One +15 V dc supply• One �15 V dc supply

The input board holds the control and monitoring circuits, plus a 335 V dc powersupply circuit along with an auxiliary 24 V dc power supply for the control logic.Schematics of the power supply are shown in Figures 9-104 and 9-105.

M-100+5V

M-101+5V

M-102+28V

M-103+28V

M-300-28V

M-301+28V

M-302+28V

M-303+28V

M-304+12V

M-305-12V

M-306+15V

M-307-15V

Output Board

Module Board

Input Board

Control &Monitoring

Circuits

Auxiliary24 V

Supply

335 VoltSupply

125 V dcPower Input

Connectors for Cable Harness

Power Supply Modules Mounted under theCircuit Boards on the Heat Sink

Heat Sink with Fins on Back of Assembly

Latching Power On-Off Switch

10 A Fuse

Output Filtering

Figure 9-103. Inside View of VME Power Supply Showing Power Modules

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9-182 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

PS125P125N125 1

2

34 NC

suppressionfuse

On/Offswitch

IS2020RKPSG1AC 400 W Power Supply

P28V50/100 W + Ret

24 22PSA

P28V50/100 W+ Ret

P28V50/100 W+ Ret

P28V50/100 W+ Ret

P28V50/100 W+ Ret

P335V1.68 W+ Ret

3

12

P335VDCPS335

16 14 12 10 8 620 18

Continued on next page

enable

startup relay

Green-- NormalRed----- FaultYellow-- Avail

I/O 21- Slot VMERack

*PS28C"Normal"

*PS28C"Isolation"

*PS28C"Normal"

*PS28C"Isolation"

FanPower

P12VdcN12Vdc

12

12341234

PS28C Configuration: The Power Supply PS28C may beisolated from the I/O Rack for external use. One plug, twopositions "Normal", "Isolation", for selection; Plug is located onleft side of Rack (from the front).P28A and P28B are for internal cabinet use only, not to gooutside of the cabinet.

Slots 1 thru 5 Slots 6 thru 9 Slots 10 thru 13 Slots 14 thru 17 Slots 18 thru 21

P28E

PCOMPCOM

P28A P28B P28C P28D

Power Input125 VDC

s

s

s

s

s

s

s

s

s

s

PL1

PL2

PL3

scom

Thesymbol,

represents a pisuppressionfilter:

s

132

PS28A

132

PS28B

132

PS28C

To SafetyGround

TestPoints

SCOM

Figure 9-104. VME I/O Rack Power Supply and Cables

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-183

P125 (power)

IS2020RKPSG1AC 400 W Power Supply

N28V25/100 W- Ret

PSA

N15V50/100 W- Ret

P15V50/100 W+ Ret

N12V25 W

- Ret

P12V50 W

+ Ret

8 6 12 10 16 1420 18

Continued from previous page

21 Slot VME Rack

Above Distribution for All Slots

P12V

PCOM

N28V

N15V N12V

enable

P5V150 W

+ Ret

PSB

28 26 32 30

ACOM

P5V

DCOM

ACOM

PCOM

*SCOM

Note: SCOM must be connected to groundvia the Rack mounting hardware, metal tometal conductivity, to the mounting base andhence to ground.

s

s

s

s

s

s

s s

s

s

SCOM

s

sP15V

sThesymbol,

represents a pisuppression filter:

scom

20,24,28,32

18,22,26,30

Figure 9-105. VME I/O Rack Power Supply and Cables (continued)

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9-184 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

SpecificationTable 9-43. Power Supply Specification

Item Description

Input Voltage 70 to 145 V dc floating supply

Up to 10 V pp ripple

Under voltage shutdown on input voltage, latching, cycle shutdown switch to recover

Isolation True isolation from Input to Output, 1500 Volts

Output Voltages Output Voltage Voltage Regulation Capacity Over Voltage ShutdownP5 +5 V dc Less than ± 3% 150 Watts 20% ± 5%P15 +15 V dc Less than ± 3% 100 Watts 20% ± 5%N15 −15 V dc Less than ± 3% 100 Watts 20% ± 5%P12 +12 V dc Less than ± 3% 25 Watts 20% ± 5%N12 −12 V dc Less than ± 3% 10 Watts 20% ± 5%P28 +28 V dc Less than ± 5% 100 Watts 20% ± 5%N28 −28 V dc Less than ± 5% 50 Watts 20% ± 5%P335 +335 V dc Less than ± 5% 1.68 Watts 10% to 20%

Total Output Maximum of 400 Watts

Short Circuit Short circuit protection on all power supplies, with self recovery

Temperature Ambient Air Convection Cooling 0 to 60 degree C

Indicating Lights Green: Normal Status is OKRed: Fault Power is applied but supply is shutdown due to:

Trouble with the supply, latched offLow input voltage, latched off

Yellow: Available Power is applied, but switch is OFF

PowerSequencing

The 5 V dc supply comes up first, then all the others

DiagnosticsIncoming and outgoing voltages and currents are monitored for control andprotection purposes. The following protective actions can occur:• An input 110 V dc undervoltage condition sets the fault latch, shuts off all

power supplies, and lights the Red LED. Upon recovery, the fault can be resetwith the on/off switch.

• Any power supply output overvoltage fault turns off the bad power supply andlights the Red LED. Reset by turning off the power supply.

• Undervoltage on the +5 Volt supply (output less than 4.7 Volts) cuts off all thepower supplies until the 5 Volts comes back. The red LED is lit.

• The 335 V dc supply has an overvoltage circuit that lights the Red LED andshuts down the 335 Volts and other supplies. The output has current limiting.

Test points for all these voltages are located at the left-hand side of the VME rack.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-185

InstallationThe power supply is mounted to the right hand side of the VME rack on a sheetmetal bracket, as shown in Figure 9-106. The 125 V dc input, 28 V dc output, and335 V dc output connections are at the bottom. Two connectors, PSA and PSB, at thetop of the assembly mate with a cable harness carrying power to the VME rack.

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

xx

x

x

VME Chassis,21 slots for I/Oand Control, orfor just I/O

PowerSupply

J301

Cable fromPDM Monitor

Fan

5 slots - A 4 slots - B 4 slots - C 4 slots - D 4 slots - E

+/- 12 Voltsto Fan, usedwith Controller

Plug PositionP28 Normal

Plug PositionP28 Isolated

Power cables toVME Chassis

P28C Power to ExternalPeripheral Device (MovePlug from Normal toIsolated Position)

335 V dc

125VdcInputfromPDM

PSAPSB

x

x

x

x

x

x

x

x

x

x

x

x

Power SupplyTest Points

Rack EthernetID Plug

GND

Figure 9-106. Power Supply, VME Chassis, and Cabling to External Devices

Each of the five 28 V dc power modules supplies a section of the VME rack. Thesesections are labeled A, B, C, D, E, and F. The P28C output at the bottom of thepower supply can be used to power an external peripheral device. To do this thejumper plug shown on the bracket to the left of the rack must be moved from theNormal position to the Isolated position below. This allows Module D to supply racksections D and E, and Module E to supply the external load via P28C. Note thatnormally only P28C is used.

The fan is only used when the controller is mounted in the rack. It is powered by ±12V from the top connector on the same bracket (located on the left side of the rack).

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9-186 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

TTPW - Power Conditioning BoardLarge steam turbines use 24 V dc electrical trip solenoid valves (ETSV). Power forthese valves is provided to the TRPL and TREL trip boards by a power transitionboard TTPW. Wiring from the rack power supplies, through TTPW, to the trip boardis shown in Figure 9-107.

VME RackPowerSupply

<R>

TBAI

TTPW

TRPL

TREL

ETSV

PS28C

VME RackPowerSupply

<S>

PS28C

Single ETSV Applications:

Double ETSV Applications:

VME RackPowerSupply

<R>

TBAI

TTPW

TREL

ETSV1

PS28C

VME RackPowerSupply

<S>

PS28C

PowerSupply

Monitoring

TBAI

TTPW

Monitoring

Monitoring

ETSV2

PwrA

PwrB

PwrA

discretewiring

P1

P2

P3

JA1

P1 JA1

P2 JA1

JP1

JP1

JP2

PL2

PL3PS28C"Isolation"

PL2

PL3PS28C

"Isolation"

PL2

PL3PS28C"Isolation"

PL2

PL3PS28C

"Isolation"

VME RackPowerSupply

<T>

PS28C

PL2

PL3PS28C

"Isolation"

VME Rack

<T>

PS28C

PL2

PL3PS28C"Isolation"

TRPL

Figure 9-107. Steam Turbine, 24 V dc Interface to Trip Valves

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-187

OperationThe turbine ETSV is a 24 V dc device with a 24 watt, 20−22 ohm coil. Power iswired from the three I/O rack supplies to TTPW, where the three 28 V supplies arediode ORed to produce a single 28 V dc output. The primary output is 0−2 A (total),22−30 V dc, and there are four secondary outputs of 0.25 A each as shown in Figure9-108.

34

78

1112

22 - 30 VDC, 2.0 Amp total

TTPWG1B P1 P2 P3 2 1 2 1 2 1

100k

10k

SCOM

1516

1920

Power Supply Monitoring

(screw compatible to TBAI)

PCOM

P28R

P28S

P28T

P28V

2526

2728

3132

3334

3536

3738

1 k 1k

SCOM

SCOM

Peripheral Power Outputs

Bus VoltageCentering Bridge

P28V

PCOM

PCOM

P28RP28S

P28T

0.25 AmpOutputs(each)

JA1

12

PCOM

100k

10k

100k

10k

100k

10k

100k

10k

SCOM

PCOM

SCOM

SCOM

SCOM

P28V

2.0 Amp(total)

P28V1

P28V2

P28V3

P28V4

P28V5

P28V6

SigGnd

GndSig

GndSig

GndSig

GndSig

To TRPL

(+)(-)

(+)(-)

(+)(-)

(+)(-)

(+)(-)

(+)(-)

Figure 9-108. TTPW Board Showing Outputs and Monitoring

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9-188 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

InstallationThree 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3.The primary 28 V dc output comes from plug JA1 and is wired to the trip boardTRPL. The power monitoring signals are wired to the top terminal block (TB1) andgo to an analog input board. The secondary voltage outputs are wired to the lowerterminal block (TB2) as shown in Figure 9-109.

2468

1012141618202224

x

x

x

x

x

x

x

x

x

x

x

x

x

13579

11131517192123

x

x

x

x

x

x

x

x

x

x

x

x

x

PCOM (Gnd) PCOM (Sig)

262830323436384042444648

x

x

x

x

x

x

x

x

x

x

x

x

x

252729313335373941434547

x

x

x

x

x

x

x

x

x

x

x

x

x

Power Conditioning Board TTPWG1B

JA1(P28V)

P28V1 (Pos)

P28R (Sig)

P28S (Sig)

P28T (Sig)

P28V (Sig)

P28R (Gnd)

P28S (Gnd)

P28T (Gnd)

P28V (Gnd)

P28V2 (Pos)

P28V3 (Pos)P28V4 (Pos)P28V5 (Pos)P28V6 (Pos)

P28V1 (Neg)P28V2 (Neg)

P28V4 (Neg)P28V5 (Neg)

P28V3 (Neg)

P28V6 (Neg)

P1(R)

P3(T)

P2(S)

12

12

12

12

28 V Power toTRPL Trip Board

28 V Power fromRacks R, S, T

MonitoringSignals toTBAI Board

PowerOutputs

P28R

P28S

P28T

PCOM

PCOM

PCOM

P28VPCOM

Figure 9-109. TTPW Board with Wiring and Cabling

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-189

PDM - Power Distribution ModuleThe Power Distribution Module (PDM) provides 125 V dc and 115 V ac (or 230 Vac) to the Mark VI system for all racks and terminal boards. The PDM arrangementis shown in Figure 9-110. There is a second version of the PDM for the controlcabinet in those systems using remote I/O cabinets.

Output PowerConnectors

TB2 TB1

TB3

Power Cables toInterface Modules125 V dc, 115/230 V ac

Customer's PowerCables, 125 Vdcand 115/230 Vac

Power Distribution Module(for Interface Modules)

InputTerminals

AC/DCConverter

Cable toPDM JZ2or JZ3

Cable toTransformerinside AC/DCConverter

JTX1115 V

JTX2230 V JZ

Diagnostics toVCMI via J301in <R> Rack

DIN railTerminationBoard

Filtered DCand AC powerto PDM

PowerFilters

TB1

TB2

One or two converters

Figure 9-110. Power Distribution Module, Ac to Dc Converter, and Diagnostic Cabling

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9-190 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

OperationThe customer's 125 V dc and 115/230 V ac power is brought through power filtersinto the PDM. The ac power is cabled out to one or two ac/dc converters whichproduce 125 V dc. This dc voltage is then cabled back into the PDM and diodecoupled to the main dc power, forming a redundant power source, as shown inFigure 9-110. This power is distributed to the VME racks and terminal boards.

Either 115 V ac or 230 V ac can be handled by the ac/dc converters. The transformercable must be plugged into either JTX1 for 115 V ac, or JTX2 for 230 V acoperation.

Diagnostic information is collected in the PDM and wired out to a DIN rail mountedterminal board. A cable then runs to the VCMI in rack <R> via J301.

PDM for Interface CabinetAc feeders, J17-20, are fused and cabled out to the relay terminal boards. 125 V dcfeeders are fused and cabled to the Interface (I/O) cabinets, protection modules,TRPG, TREG, and TRLY. To ensure a noise free supply to the boards, the PDM issupplied through a Control Power Filter (CPF) which suppresses EMI noise. TheCPF rack holds either two or three Corcom 30 A filter modules as shown in Figure9-111.

Power to the contact inputs first passes through resistors R3 and R4, through TB2,before being fused and cabled to the TBCI boards. Contact inputs operate with 125 Vdc excitation.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-191

1 2 7 83 4 5 6 9 10 11 12

DS200TCPD

DCHIDCLO

AC1HAC1N

AC2H AC2N

P125V

TB1

JZ5

ACSHIJZ2 DACA#1

JZ3 DACA#2

J1RJ2RJ1SJ2S J1T

J2TJ1CJ1D

JZ11

1096 J7X

J7YJ7ZJ7AJ7W

R122

ohm70W

R222

ohm70W

Door

12 11 10TB3

125 VDCTo TREG,

JH1,ContactInputs

J8AJ8BJ8CJ8D

J17

J18J19

J20

R322

ohm70 W

R422

ohm70 W

Door

432

TB2

P125 VR 47

1

N125 VR1112

J12AJ12BJ12C

TB31

23

45

678

9

Chassis

12

P125 VN125 V

+-

P125 VR

N125 VR

10k

10k

332k

332kN125 S(-1.82V)

P125S(+1.82V)

Diagnostic Info JPD

J16

32

J15

FU283.2

Amp

+ P125 V

For BusMonitoring

R5, 50 ohm,* 70 W

JZ4

DS2020PDMAG6

3

3

FU273.2 Amp

21

12

R6, 50 ohm,* 70 W

*Note: Field configurable

AC Feeders

DC feeders

125 VDC+ P125 - N125

AC1115/230 VAC

AC2115/230 VAC

Power Filter BoardACF2ACF1DCF1TB1 5 6 3 4 1 2

Chassis Chassis

TB2 5 6 43 1 2

BJS

FU29

FU31

FU30

FU32

FU1/FU2 SW1

SW5FU9/FU10

[[

[

FU13/FU14

FU19/FU20

FU34/FU35 SW6

FU38/FU39 SW8

FU21/FU22

FU25/FU26

Figure 9-111. Power Distribution Module for I/O Cabinet

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9-192 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Diagnostic MonitoringAs shown in Figure 9-112, the 125 V dc is reduced by a resistance divider network tosignal level for monitoring. Other items monitored include the fuses in the feeders tothe relay output boards. In the interface cabinet this diagnostic data is monitored bythe VCMI; in the control cabinet it is cabled to the VDSK board and then to theVCMI.

DS2020PDMAGx

TB3

123456789

Chassis

P125 VR

N125 VR

10k

10k

332k

332k N125 S (-1.82V)

P125S (+1.82V)

Din Rail TransitionTermination Board

2829

27267856

Analog In 1P125_Grd

Analog In 4Spare02

Analog In 3Spare01

Analog In 2N125_Grd 37-wire cable

Connect to VCMIvia J301, in <Rx>I/O Rack

One to onecompatabilitybetweenscrew (TB)and 37-pinconnectornumbers.

37-pinconnector

+

++

+

JPD

AC1BAT

AC2

J19 Fuse31J20 Fuse32J17 Fuse29

Spare

10

9

35

34

DCOM

P5V

DIN1, Logic_In_1

33

32

31

30

16

DCOMP5V DIN2, Logic_In_2

DIN3, Logic_In_3

DIN4, Logic_In_4

DIN5, Logic_In_5

DIN6, Logic_In_6

DIN7, Logic_In_7

7 81234569

Figure 9-112. PDM Diagnostic Monitoring

Control Cabinet PDMPower requirements for the control cabinet are less than for the Interface cabinet.The PDM has the same layout but different fuse ratings, since only the control racksand relay output boards require power. For additional noise filtering for thecontrollers, Corcom power filters are included with the PDM. The controller PDM isshown in Figure 9-113.

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-193

DS200TCPDDCHI DCLO

AC1H AC1NAC2H AC2N

P125VJZ5

ACSHI

JZ2

J17

J18

J19

J20

JZ4

AC Feeders toTRLY Boards

DC Feeders toController Racks<R0>,<S0>,<T0>

DACA#2

DACA#1

TB21

23

45

678

9

Chassis

P125 V

N125 V

10k

10k

332k

332k

N125 S(-1.82V)

P125S (+1.82V)

JPD7 81234569

AC1BAT

AC2

J19 Fuse31J20 Fuse32J17 Fuse29

Spare

10

9

35

34

DIN1, Logic_In_1

33

32

31

30

16

DCOMP5V DIN2, Logic_In_2

DIN3, Logic_In_3DIN4, Logic_In_4DIN5, Logic_In_5DIN6, Logic_In_6DIN7, Logic_In_7

28

29

27

26

7

8

5

6One to one compatabilitybetween screw(TB) and 37-pinconnectornumbers.

Cable to VCMIvia VDSK onfront of <R0>Control Rack.

Din Rail Transition Term. Board

120/250 V, 30 Amp

Out+ Out-

In+ In-Gnd In+ In- In+

120/250 V, 30 Amp

Out+ Out-

In-Gnd

120/250 V, 30 Amp

Out+ Out-

Gnd

Power Filters

MOV Suppression

37- pinconnector

ACF2ACF1DCF1

Diagnostic Information

1 2 3 4 5 6

125 VDC

- N125

AC1115/230

Vac

AC2115/230

Vac

ChassisTB1

IS2020CCPD

To SafetyGround

+P125 AC1H AC1N AC2NAC2H

Analog In 1P125_Grd

Analog In 2N125_GrdAnalog In 3Spare 01

Analog In 4Spare 02

P5VDCOM

BJS

+

+

+

+

FU29

FU30

FU31

FU32

JZ3

FU1/FU2 SW1 J1R

J1TJ1SFU3/FU4

FU5/FU6SW2

SW3

Figure 9-113. PDM for Controller Cabinet

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9-194 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Interface Cabinet PDM InstallationThe cabling, wiring connections, and fuse locations for the PDM in the Interfacecabinet are shown in Figure 9-114.

125 V dc Supply

120 V ac Supply

Auxiliary 120V ac Supply

PDM Cable Destination

JPD Diagnostic Term. Bd.JZ2 AC/DC Convert #1JZ3 AC/DC Convert #2JZ1 Cable to Door Resis.

J1R <R> Power SupplyJ2R <R> Power SupplyJ1S <S> Power SupplyJ2S <S> Power SupplyJ1T <T> Power SupplyJ2T <T> Power Supply

J1C SpareJ1D Spare

J7X <X> Power SupplyJ7Y <Y> Power SupplyJ7Z <Z> Power Supply

J7A TRPG#1J7W TREG

J8A TRLYJ8B TRLYJ8C TRLYJ8D TRLY

J12A TBCIJ12B TBCIJ12C TBCI

J15 MiscellaneousJ16 Miscellaneous

J17 TRLYJ18 TRLYJ19 TRLYJ20 TRLY

Ground referenceJumper BJS

JZ1

Note : When connecting AC powerto the power distribution (TB1),

fthat JTX connector on both ACsource selectors (see AC/DCConverter) are plugged into JTX1f115 V ac, or JTX2 for 230 V ac.

Figure 9-114. Interface Cabinet PDM Circuit Board

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-195

Fuses in Interface and Control Cabinet PDMInterface Cabinet PDM Fuses. Values of the fuses for the PDM(DS2020PDMAG6) in the I/O (interface) cabinet are shown in Table 9-44.

Table 9-44. I/O Cabinet PDM Fuse Ratings

PDM Fuse* No. J ConnectorCurrentRating

VoltageRating Vendor Catalog No.

FU1−FU6 J1R, S, T 15 Amps 125 V Bussman GMA-15A

FU7−FU10 J1C, D 5 Amps 125 V Bussman GMA-5A

FU13−FU20 J8A, B, C, D 15 Amps 125 V Bussman GMA-15A

FU21−FU26** J12A, B, C 1.5 Amps 250 V Bussman GMC-1.5A

FU27−FU28*** J15, 16 3.2 Amps 250 V Bussman MDL-3.2A

FU29 J17 15 Amps 250 V Bussman ABC-15A

FU30 J18 5 Amps 250 V Bussman ABC-5A

FU31−FU32 J19, 20 15 Amps 250 V Bussman ABC-15A

FU34−FU39 J7X, Y, Z 5 Amps 125 V Bussman GMA-5A

*All fuses are ferrule type 5 mm x 20 mm, except for FU27-FU32 which are 0.25" x 1.25 ".**The short circuit rating for FU21-FU26 is 100 Amps***The short circuit rating for FU27-FU28 is 70 Amps

Control Cabinet PDM Fuses. The PDM in the controller cabinet (IS2020CCPD)does not supply power to any terminal boards except the TRLY boards. Values forthe fuses in the controller cabinet PDM are similar to those in the I/O cabinet PDM,except the rating for fuses FU1−FU6 is 5 Amps instead of 15 Amps.

Ground Reference JumperJumper BJS is supplied for isolation of ground reference on systems with an externalground reference. The ground reference bridge across the 125 V dc power has tworesistances, one on each side, and BJS connects the center to ground.

Note When more than one PDM is supplied from a common 125 V dc source,remove all the BJS connections except one.

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9-196 •••• Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II

Low Voltage Power SupplyThe low voltage rack power supply mounts on the side of the VME rack and runs offa 24 V dc supply, refer to Figure 9-115. It supplies the VME rack with the samevoltages and currents as the 125 V dc version, but the 335 V output for poweringflame detectors is not available.

Cable Harnessto VME Rack

PS24PS28CPS28BPS28A

24 Vdc28 V dc(special)

Front View

Side View

BottomView

Heat Sink Cooling Fins

PSA PSB

OnOff

NormalFaultAvailable

Pull to Toggle

POWERSUPPLY

Figure 9-115. Low Voltage VME Rack Power Supply

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GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions •••• 9-197

SpecificationThe cooling air ambient temperature specification for the low voltage power supplyis 65 ºC. Other specifications are similar to the 125 V dc version. Refer to Table 9-45for details.

Table 9-45. Low Voltage Power Supply Specification

Item Description

Input Voltage 18 to 32 V dc floating supplyUp to 2 V pp rippleUnder voltage shutdown on input voltage, latching, cycle shutdown switch to recover

Isolation True isolation from input to output, 1500 V

Output Voltages Output Voltage Voltage Regulation Capacity Current Over Voltage ShutdownP5 +5 V dc Less than ± 3% 150 W 30 A 20% ± 5%P15 +15 V dc Less than ± 3% 50 W 3.33 A 20% ± 5%N15 −15 V dc Less than ± 3% 50 W 3.33 A 20% ± 5%P12 +12 V dc Less than ± 3% 50 W 4.17 A 20% ± 5%N12 −12 V dc Less than ± 3% 25 W 2.08 A 20% ± 5%P28 +28 V dc Less than ± 5% 50 W 1.78 A 20% ± 5%N28 −28 V dc Less than ± 5% 25 W 0.89 A 20% ± 5%

Total Output Maximum 325 W

Short Circuit Short circuit protection on all power supplies with self recovery

Temperature Ambient air convection cooling 0 to 65 ºC

Indicating Lights Green: Normal Status is OKRed: Fault Power is applied but supply is shutdown due to:

Trouble with the supply, latched offLow input voltage, latched off

Yellow: Available Power is applied, but switch is off

PowerSequencing

The 5 V dc supply reaches voltage first, then all the others

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Page 213: 6421C Vol II System Manual for Mark VI

GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-1

Glossary of Terms

ADLAsynchronous Device Language, an application layer protocol used for I/Ocommunication on IONet.

application codeSoftware that controls the machines or processes, specific to the application.

ARCNETAttached Resource Computer Network. A LAN communications protocol developedby Datapoint Corporation. The physical (coax and chip) and datalink (token ring andboard interface) layer of a 2.5 MHz communication network which serves as thebasis for DLAN+. See DLAN+.

ASCIIAmerican Standard Code for Information Interchange. An 8-bit code used for data.

attributesInformation, such as location, visibility, and type of data that sets something apartfrom others. In signals, an attribute can be a field within a record.

Balance of Plant (BOP)Plant equipment other than the turbine that needs to be controlled.

baudA unit of data transmission. Baud rate is the number of bits per second transmitted.

Bently NevadaA manufacturer of shaft vibration monitoring equipment.

bindA toolbox command in the Device menu used to obtain information from the SDB..

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G-2 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

BIOSBasic input/output system. Performs the controller boot-up, which includes hardwareself-tests and the file system loader. The BIOS is stored in EEPROM and is notloaded from the toolbox.

bitBinary Digit. The smallest unit of memory used to store only one piece ofinformation with two states, such as One/Zero or On/Off. Data requiring more thantwo states, such as numerical values 000 to 999, requires multiple bits (see Word).

blockInstruction blocks contain basic control functions, which are connected togetherduring configuration to form the required machine or process control. Blocks canperform math computations, sequencing, or continuous control. The toolbox receivesa description of the blocks from the block libraries.

boardPrinted wiring board.

BooleanDigital statement that expresses a condition that is either True or False. In thetoolbox, it is a data type for logical signals.

busAn electrical path for transmitting and receiving data.

bumplessNo disruption to the control when downloading.

byteA group of binary digits (bits); a measure of data flow when bytes per second.

CIMPLICITYOperator interface software configurable for a wide variety of control applications.

CMOSComplementary metal-oxide semiconductor.

COM portSerial controller communication ports (two). COM1 is reserved for diagnosticinformation and the Serial Loader. COM2 is used for I/O communication

configureTo select specific options, either by setting the location of hardware jumpers orloading software parameters into memory.

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GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-3

CRCCyclic Redundancy Check, used to detect errors in Ethernet and other transmissions.

CTCurrent Transformer, used to measure current in an ac power cable.

datagramsMessages sent from the controller to I/O blocks over the Genius network.

data serverA PC which gathers control data from input networks and makes the data availableto PCs on output networks.

DCS (Distributed Control System)Control system, usually applied to control of boilers and other process equipment.

dead bandA range of values in which the incoming signal can be altered without changing theoutput response.

deviceA configurable component of a process control system.

DIN-railEuropean standard mounting rail for electronic modules.

DLAN+GE Industrial System's LAN protocol, using an ARCNET controller chip withmodified ARCNET drivers. A communications link between exciters, drives, andcontrollers, featuring a maximum of 255 drops with transmissions at 2.5 MBPS.

DRAMDynamic Random Access Memory, used in microprocessor-based equipment.

EGDEthernet Global Data is a control network and protocol for the controller. Devicesshare data through EGD exchanges (pages).

EMIElectro-magnetic interference; this can affect an electronic control system

EthernetLAN with a 10/100 M baud collision avoidance/collision detection system used tolink one or more computers together. Basis for TCP/IP and I/O services layers thatconform to the IEEE 802.3 standard, developed by Xerox, Digital, and Intel.

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G-4 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

EVAEarly valve actuation, to protect against loss of synchronization.

eventA property of Status_S signals that causes a task to execute when the value of thesignal changes.

EX2000 (Exciter)GE generator exciter control; regulates the generator field current to control thegenerator output voltage.

fanned inputAn input to the termination board which is connected to all three TMR I/O boards.

fault codeA message from the controller to the HMI indicating a controller warning or failure.

FinderA subsystem of the toolbox for searching and determining the usage of a particularitem in a configuration.

firmwareThe set of executable software that is stored in memory chips that hold their contentwithout electrical power, such as EEPROM.

flashA non-volatile programmable memory device.

forcingSetting a live signal to a particular value, regardless of the value blockware or I/O iswriting to that signal.

frame rateBasic scheduling period of the controller encompassing one completeinput-compute-output cycle for the controller. It is the system dependent scan rate.

functionThe highest level of the blockware hierarchy, and the entity that corresponds to asingle .tre file.

gatewayA device that connects two dissimilar LAN or connects a LAN to a wide-areanetwork (WAN), PC, or a mainframe. A gateway can perform protocol andbandwidth conversion.

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GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-5

Genius busGE Fanuc�s distributed network of intelligent I/O blocks.

Genius global dataData that is automatically and repeatedly broadcast by a bus controller. All other buscontrollers on the same bus are capable of receiving the data, although some buscontrollers can choose not to. The controller can broadcast global data and receiveglobal data from certain devices, such as the Series 90-70 PLC and other controllers.

Graphic WindowA subsystem of the toolbox for viewing and setting the value of live signals.

healthA term that defines whether a signal is functioning as expected.

HeartbeatA signal emitted at regular intervals by software to demonstrate that it is still active.

hexadecimal (hex)Base 16 numbering system using the digits 0-9 and letters A-F to represent thedecimal numbers 0-15. Two hex digits represent 1 byte.

HMIHuman Machine Interface, usually a PC running CIMPLICITY software.

HRSGHeat Recovery Steam Generator using exhaust from a gas turbine.

ICSIntegrated Control System. ICS combines various power plant controls into a singlesystem.

IEEEInstitute of Electrical and Electronic Engineers. A United States-based society thatdevelops standards.

initializeTo set values (addresses, counters, registers, and such) to a beginning value prior tothe rest of processing.

Innovation Series ControllerA process and logic controller used for several types of GE industrial controlsystems.

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G-6 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

I/OInput/output interfaces that allow the flow of data into and out of a device.

I/O driversInterface the controller with input/output devices, such as sensors, solenoid valves,and drives, using a choice of communication networks.

I/O mappingMethod for moving I/O points from one network type to another without needing aninterposing application task.

IONetThe Mark VI I/O Ethernet communication network; controlled by the VCMIs.

insertAdding an item either below or next to another item in a configuration, as it isviewed in the hierarchy of the Outline View of the toolbox.

instanceUpdate an item with a new definition.

itemA line of the hierarchy of the Outline View of the toolbox, which can be inserted,configured, and edited (such as Function or System Data).

IP AddressThe address assigned to a device on an Ethernet communication network.

LCI Static StarterThis runs the generator as a motor to bring a gas turbine up to starting speed.

logicalA statement of a true sense, such as a Boolean.

macroA group of instruction blocks (and other macros) used to perform part of anapplication program. Macros can be saved and reused.

Mark VI Turbine controllerA version of the Innovation Series controller hosted in one or more VME racks thatperform turbine-specific speed control, logic, and sequencing.

medianThe middle value of three values; the median selector picks the value most likely tobe closest to correct.

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GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-7

ModbusA serial communication protocol developed by Modicon for use between PLCs andother computers.

moduleA collection of tasks that have a defined scheduling period in the controller.

MTBFOMean Time Between Forced Outage, a measure of overall system reliability.

µµµµGENI controller boardIC660ELB912_. An optional board for the controller that provides an interface to anadditional Genius I/O bus.

NEMANational Electrical Manufacturers Association; a U.S. standards organization.

non-volatileThe memory specially designed to store information even when the power is off.

onlineOnline mode provides full CPU communications, allowing data to be both read andwritten. It is the state of the toolbox when it is communicating with the system forwhich it holds the configuration. Also, a download mode where the device is notstopped and then restarted.

pcodeA binary set of records created by the toolbox, which contain the controllerapplication configuration code for a device. Pcode is stored in RAM and Flashmemory.

Power Distribution Module (PDM)The PDM distributes 125 V dc and 115 V ac to the VME racks and I/O terminationboards.

periodThe time between execution scans for a Module or Task. Also a property of aModule that is the base period of all of the Tasks in the Module.

pinBlock, macro, or module parameter that creates a signal used to makeinterconnections.

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G-8 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

Plant Data Highway (PDH)Ethernet communication network between the HMI Servers and the HMI Viewersand workstations

PLCProgrammable Logic Controller. Designed for discrete (logic) control of machinery.It also computes math (analog) function and performs regulatory control.

PLUPower load unbalance, detects a load rejection condition which can cause overspeed.

product code (runtime)Software stored in the controller�s Flash memory that converts application code(pcode) to executable code.

ProximitorBently Nevada's proximity probes used for sensing shaft vibration.

PTPotential Transformer, used for measuring voltage in a power cable.

QNXA real time operating system used in the controller.

realtimeImmediate response, referring to process control and embedded control systems thatmust respond instantly to changing conditions.

rebootTo restart the controller or toolbox.

RFIRadio Frequency Interference; this is high frequency electromagnetic energy whichcan affect the system.

register pageA form of shared memory that is updated over a network. Register pages can becreated and instanced in the controller and posted to the SDB.

relay ladder diagram (RLD)A ladder diagram represents a relay circuit. Power is considered to flow from the leftrail through contacts to the coil connected at the right.

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GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-9

resourcesAlso known as groups. Resources are systems (devices, machines, or work stationswhere work is performed) or areas where several tasks are carried out. Resourceconfiguration plays an important role in the CIMPLICITY system by routing alarmsto specific users and filtering the data users receive.

RTDResistance Temperature Device, used for measuring temperature.

runtimeSee product code.

runtime errorsController problems indicated on the front panel by coded flashing LEDS, and alsoin the Log View of the toolbox.

sampling rateThe rate at which process signal samples are obtained, measured in samples/second.

Serial LoaderConnects the controller to the toolbox PC using the RS-232C COM ports. The SerialLoader initializes the controller flash file system and sets its TCP/IP address to allowit to communicate with the toolbox over Ethernet.

ServerA PC which gathers data over Ethernet from plant devices, and makes the dataavailable to PC-based operator interfaces known as Viewers.

SIFTSoftware Implemented Fault Tolerance, a technique for voting the three incomingI/O data sets to find and inhibit errors. Note that Mark VI also uses output hardwarevoting.

signalThe basic unit for variable information in the controller.

SimplexOperation that requires only one set of control and I/O, and generally uses only onechannel. The entire Mark VI control system can operate in Simplex mode, orindividual VME boards in an otherwise TMR system can operate in Simplex mode.

simulationRunning a system without all of the configured I/O devices by modeling the behaviorof the machine and the devices in software.

stall detectionDetection of stall condition in a gas turbine compressor.

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G-10 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

Status_SGE proprietary communications protocol that provides a way of commanding andpresenting the necessary control, configuration, and feedback data for a device. Theprotocol over DLAN+ is Status_S. It can send directed, group, or broadcastmessages.

SOESequence of Events, a high-speed record of contact closures taken during a plantupset to allow detailed analysis of the event.

Static StarterSee LCI.

Status_S pagesDevices share data through Status_S pages. They make the addresses of the points onthe pages known to other devices through the system database.

symbolsCreated by the toolbox and stored in the controller, the symbol table contains signalnames and descriptions for diagnostic messages.

taskA group of blocks and macros scheduled for execution by the user.

TBAIAnalog input termination board, interfaces with VAIC.

TBAOAnalog output termination board, interfaces with VAOC.

TBCCThermocouple input termination board, interfaces with VTCC.

TBCIContact input termination board, interfaces with VCCC or VCRC.

TCP/IPCommunications protocols developed to inter-network dissimilar systems. It is ade facto UNIX standard, but is supported on almost all systems. TCP controls datatransfer and IP provides the routing for functions, such as file transfer and e-mail.

TGENGenerator termination board, interfaces with VGEN.

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GEH-6421C, Vol. II Mark VI System Guide Glossary of Terms •••• G-11

time sliceDivision of the total module scheduling period. There are eight slices per singleexecution period. These slices provide a means for scheduling modules and tasks tobegin execution at different times.

TMRTriple Modular Redundancy. An operation that uses three identical sets of controland I/O (channels R, S, and T) and votes the results.

token passing networkThe token is a message which gives a station permission to transmit on a network;this token is passed from station to station so all can transmit in turn.

toolboxA Windows-based software package used to configure the Mark VI controllers, alsoexciters and drives.

TPROTurbine protection termination board, interfaces with VPRO.

TPYRPyrometer termination board for blade temperature measurement, interfaces withVPYR.

TREGTurbine emergency trip termination board, interfaces with VPRO.

trendA time-based plot to show the history of values, similar to a recorder, available in theHistorian and the toolbox.

TRLYRelay output termination board, interfaces with VCCC or VCRC.

TRPGPrimary trip termination board, interfaces with VTUR.

TRTDRTD input termination board, interfaces with VRTD.

TSVOServo termination board, interfaces with VSVO.

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G-12 •••• Glossary of Terms Mark VI System Guide GEH-6421C, Vol. II

TTURTurbine termination board, interfaces with VTUR.

TVIBVibration termination board, interfaces with VVIB.

UCVBA version of the Mark VI controller.

Unit Data Highway (UDH)Connects the Mark VI controllers, LCI, EX2000, PLCs, and other GE providedequipment to the HMI Servers.

validateMakes certain that toolbox items or devices do not contain errors, and verifies thatthe configuration is ready to be built into pcode.

VCMIThe Mark VI VME communication board which links the I/O with the controllers.

VME boardAll the Mark VI boards are hosted in Versa Module Eurocard (VME) racks.

VPROMark VI Turbine Protection Module, arranged in a self contained TMR subsystem.

Windows NTAdvanced 32-bit operating system from Microsoft for 386-based PCs and above.

wordA unit of information composed of characters, bits, or bytes, that is treated as anentity and can be stored in one location. Also, a measurement of memory length,usually 4, 8, or 16-bits long.

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GEH-6421C, Vol. II Mark VI System Guide Index •••• I-1

Index

CCIMPLICITY HMI 9-1controller 9-155

Ddata highways 9-1Data Terminal Equipment 9-154diagnostic alarms 9-1DIN Board

DPWA 9-160DSCB 9-154, 9-157, 9-158DVIB 9-137, 9-138

DSVO 9-102DTE (see Data Terminal Equipment) 9-154

Eengineering work stations 9-190environmental 9-1Euro block 9-108, 9-109, 9-141Euro Block 9-137, 9-154, 9-157, 9-160

Ffiber-optic 9-1, 9-5, 9-7, 9-9, 9-16, 9-39, 9-61, 9-70, 9-

81, 9-98, 9-122, 9-150, 9-165

GGE Fanuc 90-70 PLC 9-1, 9-2, 9-10, 9-11, 9-12, 9-14,

9-15, 9-19, 9-22, 9-25, 9-37, 9-43, 9-49, 9-50, 9-58, 9-59, 9-60, 9-61, 9-68, 9-69, 9-70, 9-77, 9-78,9-79, 9-92, 9-93, 9-96, 9-97, 9-110, 9-111, 9-116,9-118, 9-122, 9-125, 9-131, 9-132, 9-141, 9-142,9-162, 9-164, 9-168, 9-171, 9-172, 9-180, 9-181,9-184, 9-189, 9-192

Geiger Mueller 9-25, 9-37, 9-59, 9-97, 9-142, 9-189, 9-192

generator synchronization 9-1, 9-2, 9-5, 9-7, 9-9, 9-10,9-11, 9-14, 9-15, 9-19, 9-22, 9-25, 9-27, 9-36, 9-41, 9-47, 9-58, 9-68, 9-69, 9-109, 9-111, 9-112, 9-116, 9-129, 9-131, 9-155, 9-171, 9-180, 9-185, 9-192, 9-195

Genius I/O 9-3ground reference 9-2GSM 9-139, 9-141, 9-143, 9-144, 9-145

HHealth 9-139, 9-155heat recovery steam generator 9-1Historian 9-1, 9-3humidity range 9-5, 9-7, 9-9

II/O Processor Boards

VSCA 9-154, 9-155, 9-156, 9-157VVIB 9-137

IEC 9-1IEEE 9-13, 9-16, 9-37IEEE 802.3 9-1, 9-20, 9-22, 9-125, 9-160IONet 9-155IONet port 9-24, 9-88, 9-90, 9-125, 9-126IPC 9-24, 9-45, 9-46

LLAN 9-24, 9-88, 9-102, 9-106LCI static starter 9-24, 9-64, 9-65low voltage rack power supply 9-34LVDT 9-154

Mmagnetic pickups 9-24, 9-125, 9-126Mark VI controller 9-2, 9-24, 9-127, 9-128mean time to repair 9-5, 9-7, 9-9Modbus (see Serial Modbus) 9-155, 9-156MTTR 9-93, 9-111, 9-162, 9-164, 9-168, 9-171

Nnetwork hubs 9-190

SSCOM 9-137, 9-138, 9-154, 9-157Serial Modbus 9-155, 9-156Simplex 9-137Standards (see Codes and Standards) 9-1synchronization 9-1system reliability 9-7

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I-2 •••• Index Mark VI System Guide GEH-6421C, Vol. II

TTBAO 9-20, 9-58, 9-63, 9-64TBCI 9-20, 9-66, 9-67, 9-72, 9-73, 9-74, 9-81, 9-86, 9-

190TBTC 9-20, 9-25, 9-31, 9-32, 9-34TBTCH1B 9-32, 9-33TCP/IP 9-5, 9-7, 9-9, 9-10Terminal Boards

TVIB 9-137TMR (see Triple Modular Redundant) 9-1Toolbox 9-156TPRO 9-52, 9-62TPYR 9-93, 9-108, 9-111, 9-162, 9-164, 9-168, 9-171,

9-8TREG 9-162, 9-168, 9-171trip solenoids 9-8triple modular redundant 9-17, 9-19, 9-172, 9-180, 9-

189, 9-190, 9-192, 9-193, 9-194, 9-195Triple Modular Redundant 9-1TRLYH1C 9-110, 9-172Troubleshooting 9-1TRTD 9-116, 9-118, 9-139, 9-172, 9-178TTPW 9-188TTUR 9-121, 9-164

UUCVB 9-91, 9-165, 9-190UCVD 9-38, 9-112, 9-114, 9-139, 9-141, 9-143, 9-144,

9-145, 9-172, 9-174UCVE 9-2, 9-3UDH 9-2, 9-5, 9-7, 9-9, 9-8unhealthy 9-155unit data highway 9-20, 9-24, 9-36, 9-37, 9-38, 9-39, 9-

40, 9-41, 9-42, 9-43, 9-44, 9-45

VVAIC 9-24, 9-34, 9-35, 9-45, 9-46, 9-47, 9-56, 9-57, 9-

64, 9-65, 9-74, 9-75, 9-90, 9-102, 9-106, 9-125, 9-126, 9-127, 9-128, 9-137, 9-138, 9-154, 9-157, 9-158, 9-160

VAOC 9-131, 9-133VCCC 9-15, 9-69, 9-70, 9-71VDSK board 9-1VGEN 9-108, 9-112vibration 9-9VME 9-2, 9-12, 9-14, 9-15, 9-16, 9-20, 9-22, 9-23, 9-

24, 9-25, 9-34, 9-36, 9-44, 9-45, 9-52, 9-56, 9-62,9-64, 9-66, 9-74, 9-76, 9-77, 9-88, 9-93, 9-96, 9-102, 9-109, 9-111, 9-113, 9-122, 9-125, 9-127, 9-131, 9-137, 9-140, 9-147, 9-164, 9-166

VME rack power supply 9-15, 9-69VPRO 9-7, 9-9VRTD 9-97, 9-111, 9-139, 9-141, 9-186

VSVO 9-50, 9-51, 9-60, 9-61, 9-92VTCC 9-36, 9-47, 9-58, 9-61, 9-67, 9-70VVIB 9-1, 9-116, 9-118, 9-171

XXDSA 9-159, 9-161

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