5 advancedmostransistors&analogdesign 12-13x2

8/11/2019 5 AdvancedMOSTransistors&AnalogDesign 12-13x2

1/31

Advanced MOS transistor models:

Large Signals. Weak, Moderate and Strong Inversion.Small Signals #1

Layout Techniques:

The problem; Floorplan; Mismatches; Noise and Crosstalk Latch-up

#2

Introduction to noise in electronic circuits:Definitions. Filtered noise.Noise types in components.Noise analysis for circuits.

#3

4/29/2013Analog Integrated Systems [email protected]

2

Strong inversion

2

Subthreshold or Weak in

1( ) (1 ); ;

22

exp ; 1.4 ~ 1.8.

version

.

Boundary:

22 .

.

n Dm

GS t

Dm

T

m

D D

oxD GS t DS

Ef BS

G

GS t T G

SD D

T

G t T

O

SS

C Wi v V V n

n L V LV

v

Ig

V V

Ig

nV

g

I IV V nV V

V V

i I nnV

nV

= + = +

=

=

=

=

=

=

70mVt

V +


2/31


! !"

#$ % !&' % "

Conventional designs: near weak inversion but not in

weak inversion: VOVD

150mV~200mV.


(! )" *

+& ! , -

M1

IB

VDD

vo

vI

2 2

Example:

102

100

00

E E

GS t OVD

E

OVD

V m o

V

A g r V L V L

V V V

V L VV

A

mV

= =

=


3/31


./0//1


( )

0

2

.

2 2

1.41 2

2 20.66

3

:1 3 30 1

exp 1 exp.

00

DGS M m

T

t t f SB f

M OX Tf SB

M t T S B

OX

M

GS M DS D M

T T

t t

IV V g

nV

V V v

nWI

v V vi I

C n V vL

V V CnV

nV

q N

C

C V V mV V mV

V

< =

= + + = = +

= =

=

=


4/31


2

GS

( ) (1 );2

1

1 for long channelif usually

1.25 f

Strong Inversion: >

or short channel

; 6 +200mV

2

1

1

2

( )

02

H H t T t

Dm

GS

oxD GS t DS

E

n

GS

f A

t

t

A

SB

C Wi v V V

L

V L

v V V V

n

v V

nV V

Ig

V V

v

= +

=

+

= +

== =

=

+

=

+ +

=


Rules of thumb for vGS

:

There are unified models. Cost in complexity which

translates in computation time.

There are non-physical based models, fitting on

experimental data as BSIM3


5/31


At high vGS

current becomes more linear again;

Mainly due to velocity saturation

Increase in electric field does not cause electrons to travel

through the channel faster due to colisions.

7 710 cm/s 10

_

cm/s

Velocity saturation

( ) is absolute max

does not depend on is a constant; not used for analog

VSDS ox SAT GS t ox SAT

GS

m SAT i WC V v V WC V g

v

= =


Strong Inversion: Saturation

21 1 1= ( ) 2

2

Strong Inversion: Triode =

Weak Inversion: =

GS GS

Dm

GS v V

Dm OX GS t OX D

GS t

m OX DS

Dm

T

ig

v

IW Wg C V V C I

L V V L

Wg C V

L

IgnV

=

=

= =


6/31


'0

2

0

0

1/ /

2

m m D

T

DSOX T GS t

I

g I g I InV

IWI C nV IC V V

L I

=

= =


!

[ ]

, ,

;

= ( -1)

= 0.1 to 0.3

GS DS BS

GS GS DS DS

tD Dmb m

BS t BSV V V

mb m

D D Dds

DS DS Ev V v V

Vi ig g n

v V v

g g

i i Ig

v v V L= =

= =

= =

ro,

rds,gdsvgs

G D

S

gmb vbsgm vgs

B vbs


7/31


"#


"# $%

_

__ _

__

__ _

_

Weak Inversion

1

Strong Inversion

triode ( =0): saturation:2

13

20

0

32 222 2

gb i OX

DS

gs i OXgs i gd i OX

gd igb i

OXOX gb i

bs i bd if SB DS

f SB

bs i

nC W L C

n

V

C W L C C C W L C

CC

W L CW L C C

C C V VV

C

=

= = =

=

= = =

=

_

22 2

0

OX

f SB

bd i

W L C

V

C

=


8/31


"# $&%

_ _

_

_ _

gs e gd e W

gb e L

bs e bd e S S

C C W C

C L C

C C A P

= = = = = +

% % #&'

$ ! % &2 ,


"#


9/31


# " '

REF

REF

Mismatch in Weak inversion

Mismatch in Strong invers

exp 1 15%. .

( )( / )

ion

21 6 ~ 10%

/

Better!

OUT t t

T T

OUT n oxt

n ox GS t

i V V

I n V n V

i CW LV

I W L C v V

+

+ + +



Layout Techniques:


#2


#3


10/31


/ 3, , ! !2 &

, %/ , %% ! ! ! % ! & &2 !4

% 5 !% ! %% &3 ! !% ! % 2 3

$67 8 % &2 3

,!! "((2 & %


! 2 % 7$6 !

,! 2 ! & %,

9 ! % ! !5*

9 ! 2 !*

9 ! 2 3

! ,2 3*

9 !:*

9 % &2


11/31



VDD

Input

Pad

vO

M1

M2

R

D1

D4

D3

D2


12/31


)#

57

9 ! 2 %

9& % 9 ;

9% &2 ! 2 % !


13/31


)#

! %

! , ! * %

! & !2 ! & 2

! $& ! ! &2dd

C DD B

diV R I L

dt = +


)#

!

, ! &

!

& ! !

! ,

Package Pin Bond L Bond C

40 Pin Plastic 1,2

10,11

15nH

4.4nH

2.4pF

0.7pF

40 Pin Plasticwith socket

1,210,11

18.6nH7.6nH

2.6pF0.8pF

40 Pin Ceramic 1,2

10,11

20.9nH

9.0nH

2.7pF

0.8pF

In RF/fast analog use smaller packages or chip on board


14/31


)#

! ! & 3 ,2% ! ! & &,

! =, ,!& % ! 8 *

% 2 ,!! % !! ! % 8

> ! & >

,2 & % %, 0 % %

) ! &


)#

! "

$

8

[ ] [ ]

[ ]2int int int

/ / /

/ F/cm F

S line S

ox line

R t R R L W

C x C C LW

= =

= =


15/31


)#

/% 2 ,:& ! & /

2 2 %% ! , & ,!

: !! 2

2 %% /


8 ! 2 !2

? !

2::2 2::@ ! ::

2

!2 4 !

!4 ! %:&

>2 !

9 A ,!

9 3 %

9 ,! %%

9 %, 2 %%


16/31


! ! !

! !

; 2 !

!


! 2 ! &

:

2

%* !

2

% %


17/31



6 ! :

!4 & % ! 52 %&


18/31


* # ' ++ ,

#-

)2 ,!" !

7 !

! %% ! !! %

%4 , ! 42 % %

,! !


% ! % ,

,! ! ! ;

! 42 % &2 % % B

&, % % ,2 % !


19/31


!* !

! & 22 ,! !

! ! !

Minimum size should be

avoided, higher capacitance and

higher area. Transistors

matching is proportional to

1

W L


( "

2 2 !

&" % 3

3 &2

9 $ 3 &

9 ! 3 2 &%% !! 3

,! !! 2 !! ! !

9 / :& ,! & %

3

; ! 2 &%% ,!

&2

clock

1/

ln

N

L L

i i

C CN K

C C

= =


20/31


( "

= 3 &


( "

C & : 3

" &

&2

( %3

% ,!


21/31


" !-

, !


( "

, ! ,2 !

! & &, % %, &

&

$ , % & , % !, 8 ! !

, %

%% ,!

! , 2 8 3 ! & C

, 5 8>


22/31


#

>!: ! % & 2 !4 %

8 $8 ! 2

>!: 2 5 :

, &2 %%

A2 , ! & % !

2

A2 & ! & &2 2 2


#

& !

2

& ! & % :?

>2 % : : ! ! 3 % :

, 3 % : ,

! , : :

! : : ! & !22

,! ! &

@ :

@ :


23/31


02 %, 5 : ,3 ! % &2

9 2 & &2 & 9 &3 % & &2 &

2 ,! !

9 ,! ! &2 ! & ,! %%! %

9 2 !

9 C % :



Layout Techniques:


#2


#3


24/31

(

>9)

9 D

>

D:9 )

9

D" /! "

/% " 2 2 &



(

/! D % ,!!

/ "9D !; &2 ! 4 % &

9 8 / &

9 %

9 ,! ! ! !! 2 &

9 ! &, ! 5

2 2

0

1Noise power lim ( )

T

rmst

x t dt XT

= =


25/31


(


26/31


(

D

9 ! !! - / %%-

2 2 2

no(rms) n1(rms) n2(rms)

n1(rms) n2(rms) no(rms)

example: uncorrelated

10V; 5V 11.2V

V V V

V V V

= +

= = =


().

D 2

9D; (; &,!

9 %42 ;

9 / 2; ! &,!


27/31


(

).

7 63 3

( ) Vn KV ff

=


().

6


28/31


(

#

( )2

2 1

2

0

2 2 1

2 2 1

Noise spectral density: ; depending on frequency,

[units of ] Hz

Noise Power ( )

1) Thermal noise (white):

Resistors: MOS Transistors :

4 V Hz

14 A Hz

: 1 k ; 300K

T

n

n

x f

x

x f df

v kTR

i kTR

ex R T

=

=

=

= =

2 2 1

2 2 1

_

14 V Hz

4 A Hz

; : 2 / 3 for long channels,

1 MHz; 0.2V 1 for short channels (empirical)

n

m

n m

n rms

v kTg

i kT g

ex

f v

=

=

=

= = =


( #

2 2 1

2 2 1

-25 2

2) noise in forward biased junctions:

2 A Hz

quiescient current white noise

3) noise in MOS :

1V Hz

depends on technology (in the order of 10 V F)

freque

=

=

n C

n

ox

Shot

i qI

Flicker

Kv

C WL f

K

ncy dependent: "1/ noise"f


29/31

(

#

.E!71


().

.E!71



30/31


(

+ # " #+

VDD

M5

M3

M2M1

M4

vin-vin+

vout

vn5(t)

vn1(t) vn2(t)

vn3(t) v n4(t)

( )

( ) ( )

1

1 2

3

3 4

5

5 3

2 22 2 2

1 1 3 3

2

2 2 2 31 3

1

2

output referred noise

( ) 2 ( ) 2 ( )

input referred noise

( ) 2 ( ) 2 ( )

no nom o

n n

no nom o

n n

no m

n m

no m o n m o n

mneq n n

m

V Vg R

V V

V Vg R

V V

V g

V g

V f g R V f g R V f

gV f V f V f

g

= =

= = =


31/31

(

+ # " #+

D 7 F = 7

: %%

*


2

1

2

12 23 1 11 2(rms)2 2

1 1 1 3 1 1 1 1 3

ln2

( ) 2 ln

p

f

oxn n nneq neq

ox p ox pf

K f

C fK L K LK fV f V

C f W L W L W L C f W L

= + = +

5 advancedmostransistors&analogdesign 12-13x2

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