1

CONTENTS

1. Acknowledgement

2. Objective Of The Project

3. Introduction On Microcontroller

4. Microcontroller 8051 Overview

5. Features Of 89c51 With Internal Architecture

6. Instruction Set

7. Pin Diagram Of 8051

8. Block Diagram Of The Project

9. Circuit Diagram Of The Project

10. List Of The Components And Accessories

11. List Of The Equipments Used In The Project

12. Software Used In The Project

13. Flow Chart

14. Program

15. Conclusion

16. Bibliography

2

Acknowledgement:

I take this opportunity to extend my sincerest thanks and deepest gratitude to my Project

Mentor,

Mr. K Dey, for giving valuable suggestions, helpful guidance and constant encouragement in

the execution of this Project work.

I would also like to mention an easy camaraderie among my colleagues.

3

Objective of the Project:

Unlock the door by using pre-decided password

Increase the security level to prevent an unauthorized unlocking of the door

Give the flexibility to the user to change or reset the password in case the user forgets

that combination

Lock the door by using password (preferable the same password used for unlocking)

To give user more secure yet cost-efficient way of door locking-unlocking system

4

Introduction of Microcontroller

Definition: A single chip that contains the processor (the CPU), non-volatile memory for the

program (ROM or flash), volatile memory for input and output (RAM), a clock and an I/O

control unit.

Invention: In 1971, Gary Boone of Texas Instruments designed a single integrated circuit

chip that could hold nearly all the essential circuits to form a calculator(TMS1802NC); only

the display and the keypad were not incorporated.

A microcontroller (μC or uC) is a solitary chip microcomputer fabricated from VLSI

fabrication. A micro controller is also known as embedded controller. Various types of

microcontrollers are available with different word lengths such as 4bit, 8bit, 64bit and 128bit

microcontrollers. Microcontroller is a compressed microcomputer manufactured to control

the functions of embedded systems in office machines, robots, home appliances, motor

vehicles, and a number of other gadgets. A microcontroller is comprises components like –

memory, peripherals and most importantly a processor. Microcontrollers are basically

employed in devices that need a degree of control to be applied by the user of the device.

5

Microcontroller Overview

The 8051 is designed as a strict Harvard architecture. The 8051 can only execute code

fetched from program memory. The 8051 does not have any instruction to write to program

memory. Most 8051 systems respect this distinction, and so are unable to download and

directly execute new programs. The strict Harvard architecture has the advantage of making

such systems immune to most forms of malware.

Features of 89c51

The main features of 89c51 microcontroller are:

RAM – 128 Bytes (Data memory)

ROM – 4Kbytes (ROM signify the on – chip program space)

Serial Port – Using UART makes it simpler to interface for serial communication

Two 16 bit Timer/ Counter

Input/output Pins – 4 Ports of 8 bits each on a single chip

6 Interrupt Sources

8 – bit ALU (Arithmetic Logic Unit)

Harvard Memory Architecture – It has 16 bit Address bus (each of RAM and ROM)

and 8 bit Data Bus

It can execute 1 million one-cycle instructions per second with a clock frequency of

12MHz

Compatible with MCS-51 Products

4 Kbytes of In-System Reprogrammable Flash Memory. Endurance 1,000

Write/Erase Cycles

Fully Static Operation: 0 Hz to 24 MHz

Three-Level Program Memory Lock

Programmable Serial Channel

Low Power Idle and Power Down Modes

6

Pin Diagram of 8051

Pin 1–8: Port 1- Each of these pins can be used as either input or output according to your

needs. Also, pins 1 and 2 (P1.0 and P1.1) have special functions associated with timer 2. 9:

Reset Signal; high logical state on this input halts the MCU and clears all the registers.

Bringing this pin back to logical state zero starts the program anew as if the power had just

been turned on.

Pin 10-17: Port 3 - As with Port 1, each of these pins can be used as universal input or

output. However, each pin of Port 3 has an alternative function.

Pin 10: RXD - serial input for asynchronous communication or serial output for synchronous

communication.

Pin 11: TXD - serial output for asynchronous communication or clock output for

synchronous communication.

7

Pin 12: INT0 - input for interrupt 0.

Pin 13: INT1 - input for interrupt 1.

Pin 14: T0 - clock input of counter 0.

Pin 15: T1 - clock input of counter 1.

Pin 16: WR - signal for writing to external (add-on) RAM memory.

Pin 17: RD - signal for reading from external RAM memory.

Pin 18-19: X2 and X1; Input and output of internal oscillator. Quartz crystal controlling the frequency

commonly connects to these pins. Capacitances within the oscillator mechanism (see the image) are

not critical and are normally about 30pF. Instead of a quartz crystal, miniature ceramic resonators can

be used for dictating the pace. In that case, manufacturers recommend using somewhat higher

capacitances (about 47 pF).

Pin 20: GND.

Pin Ground 21- 28: Port 2 - If external memory is not present, pins of Port 2 act as universal

input/output. If external memory is present, this is the location of the higher address byte, i.e.

addresses A8 – A15.

Pin 29: PSEN - MCU activates this bit (brings to low state) upon each reading of byte (instruction)

from program memory. If external ROM is used for storing the program, PSEN is directly connected

to its control pins.

Pin 30: ALE -Before each reading of the external memory, MCU sends the lower byte of the address

register (addresses A0 – A7) to port P0 and activates the output ALE. External register (74HCT373 or

74HCT375 circuits are common), memorizes the state of port P0 upon receiving a signal from ALE

pin, and uses it as part of the address for memory chip. During the second part of the mechanical

MCU cycle, signal on ALE is off, and port P0 is used as Data Bus.

8

Pin 31: EA - Bringing this pin to the logical state zero (mass) designates the ports P2 and P3 for

transferring addresses regardless of the presence of the internal memory. This means that even if there

is a program loaded in the MCU it will not be executed, but the one from the external ROM will be

used instead. Conversely, bringing the pin to the high logical state causes the controller to use both

memories, first the internal, and then the external (if present).

Pin 32-39: Port 0 - Similar to Port 2, pins of Port 0 can be used as universal input/output, if external

memory is not used. If external memory is used, P0 behaves as address output (A0 – A7) when ALE

pin is at high logical level, or as data output (Data Bus) when ALE pin is at low logical level.

Pin 40: VCC - Power +5V.

9

MCS-51

The MCS-51 (commonly referred to as 8051) is a Harvard architecture, CISC instruction set,

single chip microcontroller (µC) series which was developed by Intel in 1980 for use

in embedded systems.[1] Intel's original versions were popular in the 1980s and early 1990s

and enhanced binary compatible derivatives remain popular today.

Intel's original MCS-51 family was developed using NMOS technology, but later versions,

identified by a letter C in their name (e.g., 80C51) used CMOS technology and consume less

power than their NMOS predecessors. This made them more suitable for battery-powered

devices.

The family was continued in 1996 with the enhanced 8-bit MCS-151 and the 8/16/32-

bit MCS-251 family of binary compatible microcontrollers.

The MCS-51 has four distinct types of memory – internal RAM, special function registers,

program memory, and external data memory.

Internal RAM (IRAM) is located from address 0 to address 0xFF. IRAM from 0x00 to 0x7F

can be accessed directly. IRAM from 0x80 to 0xFF must be accessed indirectly, using the

@R0 or @R1 syntax, with the address to access loaded in R0 or R1. The 128 bits at IRAM

locations 0x20–0x2F are bit-addressable.

Special function registers (SFR) are located in the same address space as IRAM, at

addresses 0x80 to 0xFF, and are accessed directly using the same instructions as for the lower

half of IRAM. They cannot be accessed indirectly via @R0 or @R1. 16 of the SFRs are also

bit-addressable.

Program memory (PMEM, though less common in usage than IRAM and XRAM) is up to

64 KiB of read-only memory, starting at address 0 in a separate address space. It may be on-

or off-chip, depending on the particular model of chip being used. Program memory is read-

only, though some variants of the 8051 use on-chip flash memory and provide a method of

re-programming the memory in-system or in-application.

10

ROM

Read-only memory (ROM) is a class of storage medium used in computers and other

electronic devices. Data stored in ROM can only be modified slowly, with difficulty, or not at

all, so it is mainly used to distribute firmware (software that is very closely tied to

specific hardware, and unlikely to need frequent updates).

Programmable read-only memory (PROM), or one-time programmable ROM (OTP),

can be written to or programmed via a special device called a PROM programmer.

Typically, this device uses high voltages to permanently destroy or create internal links

(fuses or anti-fuses) within the chip. Consequently, a PROM can only be programmed

once.

Erasable programmable read-only memory (EPROM) can be erased by exposure to

strong ultraviolet light (typically for 10 minutes or longer), then rewritten with a process

that again needs higher than usual voltage applied. Repeated exposure to UV light will

eventually wear out an EPROM, but the endurance of most EPROM chips exceeds 1000

cycles of erasing and reprogramming. EPROM chip packages can often be identified by

the prominent quartz "window" which allows UV light to enter.

Electrically erasable programmable read-only memory (EEPROM) is based on a similar

semiconductor structure to EPROM, but allows its entire contents (or selected banks) to

be electrically erased, then rewritten electrically, so that they need not be removed from

the computer (or camera, MP3 player, etc.). Writing or flashing an EEPROM is much

slower (milliseconds per bit) than reading from a ROM or writing to a RAM

(nanoseconds in both cases).

11

Interrupt

In systems programming, an interrupt is a signal to the processor emitted by hardware or

software indicating an event that needs immediate attention. An interrupt alerts the processor

to a high-priority condition requiring the interruption of the current code the processor is

executing.

Hardware interrupts are used by devices to communicate that they require attention from

the operating system.[2] Internally, hardware interrupts are implemented using electronic

alerting signals that are sent to the processor from an external device, which is either a part of

the computer itself, such as a disk controller, or an external peripheral.

A software interrupt is caused either by an exceptional condition in the processor itself, or a

special instruction in the instruction set which causes an interrupt when it is executed. The

former is often called a trap or exception and is used for errors or events occurring during

program execution that are exceptional enough that they cannot be handled within the

program itself.

8051 provides 5 vectored interrupts. They are –

TF0

TF1

RI/TI

Out of these, and are external interrupts whereas Timer and Serial port interrupts

are generated internally. The external interrupts could be negative edge triggered or low level

triggered. All these interrupt, when activated, set the corresponding interrupt flags. Except for

serial interrupt, the interrupt flags are cleared when the processor branches to the Interrupt

Service Routine (ISR). The external interrupt flags are cleared on branching to Interrupt

Service Routine (ISR), provided the interrupt is negative edge triggered. For low level

triggered external interrupt as well as for serial interrupt, the corresponding flags have to be

cleared by software by the programmer.

12

Program Counter

The program counter points to the address of the next instruction to be executed. As the CPU

fetches the op-code from the program ROM, the program counter is incremented to point to

the next instruction. The program counter in the 8051 is 16 bits wide. This means that the

8051 can access program addresses 0000 to FFFFH, a total of 64K bytes of code.

when the 8051 is powered up the PC (program counter) has the value of 0000 in it. This

means that it expects the first op-code to be stored at ROM address OOOOH. For this reason

in the 8051 system, the first op-code must be burned into memory location OOOOH of

program ROM since this is where it looks for the first instruction when it is booted.

Stack Memory

Stack in the 8051: The stack is a section of RAM used by the CPU to store information

temporarily. This information could be data or an address. The CPU needs this storage area

since there are only a limited number of registers.

Pushing onto the stack: In the 8051 the stack pointer (SP) points to the last used location of

the stack. As we push data onto the stack, the stack pointer (SP) is incremented by one.

Popping from the stack: Popping the contents of the stack back into a given register is the

opposite process of pushing. With every pop, the top byte of the stack is copied to the register

specified by the instruction and the stack pointer is decremented once.

The upper limit of the stack: As mentioned earlier, locations 08 to IF in the 8051 RAM can

be used for the stack. This is because locations 20 – 2FH of RAM are reserved for bit-

addressable memory and must not be used by the stack.

CALL instruction and the stack: In addition to using the stack to save registers, the CPU

also uses the stack to save the address of the instruction just below the CALL instruction.

This is how the CPU knows where to resume when it returns from the called subroutine.

13

Register

A register is a small place in a CPU that can store small amounts of the data used for

performing various operations such as addition and multiplication and loads the resulting data

on main memory. Registers contain the address of the memory location where the data is to

be stored. The size of the register is very important for modern controllers. For instance, for a

64-bit register, a CPU tries to add two 32-bit numbers and gives a 64-bit result.

Types of Registers: The 8051 microcontroller contains mainly two types of registers

General purpose registers (Byte addressable registers)

Special function registers (Bit addressable registers)

The 8051 microcontroller consists of 256 bytes of RAM memory, which is divided into two

ways, such as 128 bytes for general purpose and 128 bytes for special function registers

(SFR) memory. The memory which is used for general purpose is called as RAM memory,

and the memory used for SFR contains all the peripheral related registers like Accumulator,

‘B’ register, Timers or Counters, and interrupt related registers.

General Purpose Registers: The general purpose memory is called as the RAM memory of

the 8051 microcontroller, which is divided into 3 areas such as banks, bit-addressable area,

and scratch-pad area.

The banks contain different general purpose registers such as R0-R7, and all such registers

are byte-addressable registers that store or remove only 1-byte of data.

14

Banks and Registers: The B0, B1, B2, and B3 stand for banks and each bank contains eight

general purpose registers ranging from ‘R0’ to ‘R7’. All these registers are byte-addressable

registers. Data transfer between general purpose registers to general purpose registers is not

possible. These banks are selected by the Program Status Word (PSW) register.

Special Function Registers (SFR): Special function registers are upper RAM memory in the

8051 microcontroller. These registers contain all peripheral related registers like P0, P1, P2,

P3, timers or counters, serial port and interrupts-related registers. The SFR memory address

starts from 80h to FFh. The SFR register is implemented by bit-address registers and byte-

address registers.

15

P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of this SFR

corresponds to one of the pins on the microcontroller. For example, bit 0 of port 0 is pin P0.0,

bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high level on the

corresponding I/O pin whereas a value of 0 will bring it to a low level.

SP (Stack Pointer, Address 81h): This is the stack pointer of the microcontroller. This SFR

indicates where the next value to be taken from the stack will be read from in Internal RAM.

If you push a value onto the stack, the value will be written to the address of SP + 1. That is

to say, if SP holds the value 07h, a PUSH instruction will push the value onto the stack at

address 08h. This SFR is modified by all instructions which modify the stack, such as PUSH,

POP, LCALL, RET, RETI, and whenever interrupts are provoked by the microcontroller.

DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and DPH work

together to represent a 16-bit value called the Data Pointer. The data pointer is used in

operations regarding external RAM and some instructions involving code memory. Since it is

an unsigned two-byte integer value, it can represent values from 0000h to FFFFh (0 through

65,535 decimal).

PCON (Power Control, Addresses 87h): The Power Control SFR is used to control the

8051's power control modes. Certain operation modes of the 8051 allow the 8051 to go into a

type of "sleep" mode which requires much less power. These modes of operation are

controlled through PCON. Additionally, one of the bits in PCON is used to double the

effective baud rate of the 8051's serial port.

TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control SFR is used

to configure and modify the way in which the 8051's two timers operate. This SFR controls

whether each of the two timers is running or stopped and contains a flag to indicate that each

timer has overflowed. Additionally, some non-timer related bits are located in the TCON

SFR. These bits are used to configure the way in which the external interrupts are activated

and also contain the external interrupt flags which are set when an external interrupt has

occurred.

TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure the mode

of operation of each of the two timers. Using this SFR your program may configure each

timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or two separate timers.

Additionally, you may configure the timers to only count when an external pin is activated or

to count "events" that are indicated on an external pin.

16

TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken together,

represent timer 0. Their exact behaviour depends on how the timer is configured in the

TMOD SFR; however, these timers always count up. What is configurable is how and when

they increment in value.

TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken together,

represent timer 1. Their exact behaviour depends on how the timer is configured in the

TMOD SFR; however, these timers always count up. What is configurable is how and when

they increment in value.

P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of this SFR

corresponds to one of the pins on the microcontroller. For example, bit 0 of port 1 is pin P1.0,

bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the

corresponding I/O pin whereas a value of 0 will bring it to a low level.

SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR is used

to configure the behaviour of the 8051's on-board serial port. This SFR controls the baud rate

of the serial port, whether the serial port is activated to receive data, and also contains flags

that are set when a byte is successfully sent or received.

SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and receive

data via the on-board serial port. Any value written to SBUF will be sent out the serial port's

TXD pin. Likewise, any value which the 8051 receives via the serial port's RXD pin will be

delivered to the user program via SBUF. In other words, SBUF serves as the output port

when written to and as an input port when read from.

P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of this

SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 2 is pin

P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the

corresponding I/O pin whereas a value of 0 will bring it to a low level.

IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable and

disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific

interrupts, whereas the highest bit is used to enable or disable ALL interrupts. Thus, if the

high bit of IE is 0 all interrupts are disabled regardless of whether an individual interrupt is

enabled by setting a lower bit.

17

P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of this

SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 3 is pin

P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the

corresponding I/O pin whereas a value of 0 will bring it to a low level.

IP (Interrupt Priority, Addresses B8h, Bit-Addressable): The Interrupt Priority SFR is

used to specify the relative priority of each interrupt. On the 8051, an interrupt may either be

of low (0) priority or high (1) priority. An interrupt may only interrupt interrupts of lower

priority. For example, if we configure the 8051 so that all interrupts are of low priority except

the serial interrupt, the serial interrupt will always be able to interrupt the system, even if

another interrupt is currently executing. However, if a serial interrupt is executing no other

interrupt will be able to interrupt the serial interrupt routine since the serial interrupt routine

has the highest priority.

PSW (Program Status Word, Addresses D0h, Bit-Addressable): The Program Status

Word is used to store a number of important bits that are set and cleared by 8051 instructions.

The PSW SFR contains the carry flag, the auxiliary carry flag, the overflow flag, and the

parity flag. Additionally, the PSW register contains the register bank select flags which are

used to select which of the "R" register banks are currently selected.

ACC (Accumulator, Addresses E0h, Bit-Addressable): The Accumulator is one of the

most-used SFRs on the 8051 since it is involved in so many instructions. The Accumulator

resides as an SFR at E0h, which means the instruction MOV A,#20h is really the same

as MOV E0h,#20h. However, it is a good idea to use the first method since it only requires

two bytes whereas the second option requires three bytes.

B (B Register, Addresses F0h, Bit-Addressable): The "B" register is used in two

instructions: the multiply and divide operations. The B register is also commonly used by

programmers as an auxiliary register to temporarily store values.

18

Oscillator

The 8051 uses the crystal for precisely that to synchronize its operation. Effectively, the

8051 operates using what are called "machine cycles."

A single machine cycle is the minimum amount of time in which a single 8051 instruction

can be executed. Although many instructions take multiple cycles.

8051 has an on-chip oscillator. It needs an external crystal that decides the operating

frequency of the 8051.

This can be achieved in two ways:

The crystal is connected to pins 18 and 19 with stabilizing capacitors. 12 MHz

(11.059MHz) crystal is often used and the capacitance ranges from 20pF to 40pF.

The oscillator can also be a TTL clock source connected with a NOT gate as shown.

19

Timers and Counters

Many microcontroller applications require the counting of external events, such as the

frequency of a pulse train, or the generation of precise internal time delays between computer

actions. Both of these tasks can be accomplished using software techniques, but software

loops for counting or timing keep the processor occupied so that other, perhaps more

important, functions are not done. To relieve the processor of this burden, two 16-bit up

counters, named T0 and T1, are provided for the general use of the programmer. Each

counter may be programmed to count internal clock pulses, acting as a timer, or programmed

to count external pulses as a counter.

TMOD is not bit addressable: The counters are divided into two 8-bit registers called the

timer low (TLO. TL I) and high (THO. TH I) bytes. All counter action is controlled by bit

states in the timer mode control register (TMOD). the timer/counter control register (TCON).

and certain program instructions.

TMOD is dedicated solely to the two timers and can be considered to be two duplicate 4-bit

registers. each of which controls the action of one of the timers. TCON has control bits and

Hags for the timers in the upper nibble. and control bits and Hags for the external interrupts

in the lower nibble. Figure 10 shows the bit assignments for TMOD and TCON.

Timer Counter Interrupts: The counters have been included on the chip to relieve the

processor of timing and counting chores. When the program wishes to count a certain number

of internal pulses or external events, a number is placed in one of the counters. The number

represents the maximum the desired count, plus one. The counter increments from the initial

number to the maximum and then rolls over to zero on the final pulse and also sets a timer

Hag. The Hag condition may be tested by an instruction to tell the program that the count has

been accomplished, or the Hag may be used to interrupt the program.

Timing

If a counter is programmed to be a timer, it will count the internal clock frequency of the

R051 oscillator divided by 12d. As an example, if the crystal frequency is 6.0 megahertz,

then the timer clock will have a frequency of 500 kilohertz.

20

The resultant timer clock is gated to the timer by means of the circuit shown in Figure 11. In

order for oscillator clock pulses to reach the timer, the CIT bit in the TMOD register must be

set to 0 (timer operation). Bit TRX in the TCON register must be set to 1 (timer run), and the

gate bit in the TMOD register must be 0, or external pin (INTX)' must he a 1 . In other words,

the counter is configured as a timer, then the timer pulses are gated to the counter by the run

bit and the gate bit or the external input bits (INTX).

Timer Modes of Operation

The timers may operate in anyone of four modes that are determined by the mode bits, M I

and MO, in the TMOD register. Figure 12 shows the four timer modes.

Timer Mode 0: Setting timer X mode bits to 00b in the TMOD register results in using the

THX register as an 8-bit counter and TLX as a 5-bit counter; the pulse input is divided by 32d

in TL so that TH counts the original oscillator frequency reduced by a total 384d. As an

example, the 6 megahertz oscillator frequency would result in a final frequency to TH of

15625 hertz. The timer flag is set whenever THX goes from FFh to 00h, or in .0164 seconds

for a 6 megahertz crystal if THX starts at 00h.

Timer Mode 1: Mode 1 is similar to mode 0 except TLX is configured as a full 8-bit counter

when the mode bits are set to 0lb in TMOD. The timer flag would be set in .1311 seconds

using a 6 megahertz crystal.

Timer Mode 2: Setting the mode bits to l0b in TMOD configures the timer to use only the

TLX counter as an 8-bit counter. THX is used to hold a value that is loaded into TLX every

time TLX overflows from FFh to 00h. The timer flag is also set when TLX overflows.

This mode exhibits an auto-reload feature: TLX will count up from the number in THX,

overflow and be initialized again with the contents of THX. For example. Placing 9Ch in

THX will result in a delay of exactly .0002 seconds before the overflow flag is set if a 6

megahertz crystal is used.

Timer Mode 3: Timers 0 and 1 may be programmed to be in mode 0, 1, or 2 independently of

a similar mode for the other timer. This is not true for mode 3; the timers do not operate

independently if mode 3 is chosen for timer 0. Placing timer I in mode 3 causes it to stop

counting; the control bit TRI and the timer I flag TFI are then used by timer 0.

Timer 0 in mode 3 becomes two completely separate 8-bit counters. TL0 is controlled by the

gate arrangement of Figure 11 and sets timer flag TF0 whenever it overflows from FFh to

00h. TH0 receives the timer clock (the oscillator divided by 12) under the control of TR 1

only and sets the TF1 flag when it overflows.

21

Timer 1 may still be used in modes 0, 1, and 2, while timer 0 is in mode 3 with one important

exception: No interrupts will be generated by timer I while timer 0 is using the TF1 overflow

flag. Switching timer I to mode 3 will stop it (and hold whatever count is in timer 1). Timer 1

can be used for baud rate generation for the serial port, or any other mode 0, 1, or 2 function

that does not depend upon an interrupt (or any other use of the TF1 flag) for proper operation.

Counting

The only difference between counting and timing is the source of the clock pulses to the

counters. When used as a timer, the clock pulses are sourced from the oscillator through the

divide-by-12d circuit. When used as a counter, pin T0 (P3.4) supplies pulses to counter 0. and

pin T1 (P3.5) to counter 1 . The C/(T)' bit in TMOD must be set to 1 to enable pulses from

the TX pin to reach the control circuit shown in Figure 11.

The input pulse on TX is sampled during P2 of state 5 every machine cycle. A change on the

input from high to low between samples will increment the counter. Each high and low state

of the input pulse must thus be held constant for at least one machine cycle to ensure reliable

counting. Since this takes 24 pulses, the maximum input frequency that can be accurately

counted is the oscillator frequency divided by 24, for our 6 megahertz crystal. The calculation

yields a maximum external frequency of 250 kilohertz.

22

Internal Architecture of 89c51:

23

Addressing Modes

Addressing mode is a way to address an operand. Operand means the data we are operating

upon (in most cases source data). It can be a direct address of memory, it can be register

names, it can be any numerical data etc.

Immediate Addressing Mode

MOV A, #6AH

In general we can write MOV A, #data

This addressing mode is named as “immediate” because it transfers an 8-bit data immediately

to the accumulator (destination operand).

Direct Addressing Mode

This is another way of addressing an operand. Here the address of the data (source data) is

given as operand

MOV A, 04H

Here 04H is the address of register 4 of register bank#0. When this instruction is executed,

whatever data is stored in register 04H is moved to accumulator. In the picture below we can

see, register 04H holds the data 1FH. So the data 1FH is moved to accumulator.

Register addressing mode

Register addressing mode involves the use of registers to hold the data to be manipulated.

Examples of register addressing mode follow.

It should be noted that the source and destination registers must match in size. In other words,

coding “MOV DPTR, A” will give an error, since the source is an 8-bit register and the

destination is a 16-bit register. Data can be moved between the accumulator and Rn (for

n •— 0 to 7) but movement of data between Rn registers is not allowed.

24

Register Indirect Addressing Mode

In this addressing mode, address of the data (source data to transfer) is given in the register

operand.

MOV A, @R0

Here the value inside R0 is considered as an address, which holds the data to be transferred to

accumulator.

Indexed Addressing Mode

MOVC A, @A+DPTR and MOVC A, @A+PC,

Where DPTR is data pointer and PC is program counter (both are 16 bit registers). Let’s take

the first example.

MOVC A, @A+DPTR

25

Instruction Set

26

27

28

29

* OP- The Oscillation Period is in microseconds at 12MHz

30

Block Diagram

+5 Volt

Microcontroller

Input

Password

XTAL

Reset

Control

Enter

Switch

Buzzer

Red LED

Green LED

Power

Supply

230V AC Supply,

50Hz

31

Circuit Diagram:

32

33

List of Components and Accessories

Password Protected Door Locking System

Serial No. Name of the components Specifications Quantity

01 Microcontroller chip AT89S52

40 pin DIP

1

02 Crystal 11.0592 Mhz 1

03 Transformer 12-0-12v/500mA 1

04 Regulator IC 7805 1

05 Diode 1n4007 2

06 Resistors 8.2 kΩ

330 Ω

1

10

07 Capacitors i)1000 mF/63v

ii)10 mF/25v

iii)33 pF/50v

1

2

2

08 LEDs Green (high intensity)

Yellow (high intensity)

Red (high intensity)

2

1

4

List Of The Equipment Used In The Project:

1. Atmel IC Programming

2. Multimeter: RISHmax 12

3. Soldering Station

4. Scopemeter

5. Pesonal Computer

Tools Used:

4. Clipper and Cutter

5. Lead Twister

6. Etching Rod

7. Forceps

Software Used:

1. ASM Notepad

2. Simulator

3. Superpro Program Burner

34

Flow Chart

Correct

Enter Key

Compare

Password

Count

limit < 3

Door

Unlocked

Administrator

Input

Administrator Reset

Attempts Left

Attempt Limit

Reached

Incorrect

Time Limit

User Input

35

Program

.org 0000h

ini: mov R1, #02h

mov R2, #150

mov R3, #0fh

beg: jb P1.0, beg1

clr P1.0

beg1: jb P1.1, beg2

clr P1.1

beg2: jb P1.2, beg3

clr P1.2

beg3: jb P1.3, beg4

clr P1.3

beg4: jb P1.4, beg5

clr P1.4

beg5: jb P1.5, beg6

clr P1.5

beg6: jb P1.6, beg7

clr P1.6

beg7: jb P1.7, check

clr P1.7

check: jnb P2.3, admin

start: jb P3.0, beg

mov R4, #20

mov A,p1

mov P1, #0ffh

cjne A, #0ach, wrong

36

clr P2.0

green: lcall delay

djnz R2, green

flash: setb P2.0

lcall delay

clr P2.0

lcall delay

djnz R3, flash

setb P2.0

sjmp ini

wrong: jnb P2.4, alarm

clr P2.1

red: lcall delay

djnz R4, red

setb P2.1

djnz R1, beg

clr P2.4

sjmp beg

alarm: clr P2.1

clr P2.2

clr P2.3

ljmp beg

admin: jb P3.1, beg

mov A, P1

mov P1, #0ffh

37

cjne A, #0f0h, beg

setb P2.1

setb P2.2

setb P2.3

setb P2.4

ljmp ini

.end

delay: mov r5, #04h

hr3: mov r6, #0ffh

hr2: mov r7, #0ffh

hr1: djnz r7, hr1

djnz r6, hr2

djnz r5, hr3

ret

38

Conclusion:

• Microcontroller can be implemented for acquiring more intelligence in our system

• 16 bit register can be used for more protection.

• We can also lock our system by using the same password.

•Multiple verification steps can be implemented.

• Finger print scanner can be used in additional.

• Practice of fudging can be minimized.

39

Bibliography:

https://www.elprocus.com/know-about-types-of-registers-in-8051-microcontroller/

http://www.electronicshub.org/microcontrollers/

http://www.8052.com/tutsfr.htm

https://www.elprocus.com/steps-to-learn-soldering-process-in-designing-electronic-circuits/