3D TCAD Model for Poly-Si Channel Current andVariability in Vertical NAND Flash Memory

D. Verreck⇤, A. Arreghini⇤, F. Schanovsky†, Z. Stanojevic†, K. Steiner†, F. Mitterbauer†, M. Karner†,G. Van den bosch⇤, A. Furnemont⇤,

⇤imec, 3001 Leuven, Belgium, email: devin.verreck@imec.be† Global TCAD Solutions GmbH., 1010 Vienna, Austria

Abstract—The polycrystalline nature of state-of-the-art 3DNAND flash channels complicates on-current and variabilitymodeling. We have therefore developed a 3D TCAD model thatcaptures percolating current behavior and the resulting variabil-ity, and implemented it into the Global TCAD Solutions softwarepackage. In our simulation flow, we model the channel transportthrough the randomly generated grain structure with thermionicemission modulated by discrete traps at the grain boundaries,combined with a crystal orientation dependent mobility modelinside the grains. We show that this approach can reproduceexperimentally observed on-current temperature dependence andvariability and use it to investigate the influence of defect densitylevels and average grain size.

I. INTRODUCTION

Flash memory scaling has turned vertical, with devicesstacked onto each other in strings with a cylindrical channelgeometry to enhance bit density and improve memory oper-ation [1]. In such a structure, the channel is created throughcrystallization of as-deposited amorphous silicon. Numerousgrains with different crystal orientations are thereby formed,as the crystallization initiates at various random nucleationsites throughout the structure. The current conduction throughsuch a polycrystalline channel leads to particular experimentalobservations that require a different modeling approach fromthe monocrystalline case to explain. First, the cell on-current(ION) is strongly reduced, as it is hampered by the increasedscattering in the grain boundary regions that results from thechange in crystal orientation [2]. Second, unwanted thresholdvoltage fluctuations are observed due to the trapping of chargecarriers in the highly defective regions at the grain boundariesand at the oxide interfaces [3]. Third, inter-device variability inION is significantly increased because of the random nature ofthe grain structure and the location of the defects. The degreeof variability is strongly determined by the percolating natureof the current flow, which results from an interplay betweenthe grain and defect configurations [4]. And finally, a positivetemperature dependence of the current is typically observed,which is a sign of conduction by thermionic emission [5], [6].

To gain understanding of these intricate experimental ob-servations, we present a 3D TCAD model implemented in theGlobal TCAD Solutions (GTS) package. We first detail themodel and then show its use in reproducing ION temperature(T ) dependence and variability of experimental macaronichannel NAND devices.

50nm

CG

TSEL

BSEL

S

D10nm

30nm

50nm

50nm

10nm

80nm

(a) (b)

O/N/O

O/N/O 7/6/4 nm VSEL 5 VNS/D 1e20 cm-3 Emid, Dit 0.1 eV

NCh 1e15 cm-3 σDit 0.7 eV

VDS 0.5 V

Fig. 1: Investigated macaroni channel 3D NAND device struc-ture. (a) Grain structure in the channel for average Lgrain

of 12 nm. The gates and other layers have been renderedtransparent. (b) Configuration details and parameters. The redareas indicate the doping extensions at source and drain. VSEL

is applied at both BSEL and TSEL and is chosen large enoughto ensure the SEL transistors are in the linear regime.

II. MODELS AND SIMULATION FLOW

The first step in the simulation flow is the definition ofthe device structure, followed by the Voronoi-based growth ofgrains in the channel region from randomly placed nucleationsites (see Fig. 1) [7]. The number of sites is determined bythe specified average grain size (Lgrain). Besides a randomlocation and shape, each grain is also assigned a randomcrystal orientation. Where the grains meet, grain boundariesare defined as 2D interfaces to prevent a mesh dependencethat occurs for boundaries with a finite volume.

At the grain boundaries, we model two main physicaleffects, based on previous ab-initio research [2]: discrete trap-ping and carrier velocity reduction. For the former, acceptor-type discrete traps are placed randomly at the boundary meshpoints. The traps interact with the charge carriers through aShockley-Read-Hall (SRH) process, which governs their occu-

978-1-7281-0940-4/19/31.00 $ c�2019 IEEE

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pancy. Once charged, they form local potential barriers that arekey to reproducing the experimental temperature behavior. Therandom nature of these local trap potentials also renders thechannel current non-uniform, with the charge carriers flowingin percolation paths. The amount of traps that are placed isdetermined by the specified trap density (Nt,GB), which servesas a calibration parameter. The traps are also placed at thechannel-oxide interfaces (Nt,ox). The second effect that ismodeled at the grain boundaries, carrier velocity reduction,results from increased carrier scattering due to the breakingof crystal periodicity in the grain boundary and is capturedwith a thermionic emission model. The current through aboundary between two grains (labeled with subscripts 1 and2) is expressed as [8]:

Jn1 = Jn2 = q

✓vbn2 � vbn1exp

✓��Eb

kBT

◆◆(1)

with q the elementary charge, vb the barrier velocity, n theelectron density, �Eb the uniform energy barrier height, kBthe Boltzmann constant and T the temperature. vb acts as acollection velocity of carriers from one grain to the other [9]:

vb = ↵vth = ↵

r2kBT

⇡m⇤ (2)

with vth the thermal velocity, m⇤ the electron effective massand ↵ the scattering factor. Through ↵, vb can be reduced torepresent increased scattering.

Inside the grains, carrier transport is governed by standarddrift-diffusion continuity equations, but with a crystal orien-tation dependent mobility. The random orientation means theoxide interfaces and the local electric field break the bandstructure symmetry differently in each grain [10]. We thereforeextract the mobility at each mesh point from a table, basedon the local crystal orientation relative to the nearest oxideinterface (see Fig. 2). This table is calculated separately on a2D slice of the device. On the slice, an effective mass Poisson-Schrodinger system is solved self-consistently, after which theobtained carrier subband wave functions and energy levels arefed into a Kubo-Greenwood based formula [11]. Combinedwith relaxation times from various scattering mechanisms(listed in Fig. 2), this module calculates a mobility value.A table of such mobilities is constructed by repeating thisprocedure for a representative sample of crystal orientationsand for each VCG. Fig. 3 shows the full simulation flow.

III. SIMULATION RESULTS AND CALIBRATION

We first confirm in Fig. 4 that the implemented modelqualitatively reproduces the expected T dependence of ION fora single device (see details in Fig. 1(b)) with varying Lgrain

and Nt,GB. The spread with T in ION indeed increases andbecomes more positive for smaller grains and larger Nt,GB,while ION itself decreases. This is a result of the increasedpresence of trap-induced energy barriers in the current paths,which hinder carrier transport and require thermal energy toovercome. The uniform barrier height at the grain boundaries

2 4 6 8 10400

500

600

700

800

l t

(cm

2 /Vs)

Orientation

(a) (b)

1 (100) 4 (110) 7 (112) 10 (118)

2 (130) 5 (111) 8 (113) 11 (001)

3 (230) 6 (223) 9 (114)

Fig. 2: (a) Calculated intrinsic non-uniform mobility in themacaroni channel and (b) longitudinal (µl) and transversal(µt) mobility variation with the surface orientations listed inthe table. Considered scattering mechanisms are optical andacoustic phonon scattering, inter-valley and surface roughnessscattering [11]. VCG is 1 V. Other configuration details arelisted in Fig. 1.

Kubo-Greenwood

Define device

2D Schrödinger-Poisson

2D slice

3D I-V device simulation

Change cryst orient

table

Change bias

En, n

Grow grainsAdd traps

Kubo-Greenwood

Define device

2D Schrödinger-Poisson

2D slice

3D I-V device simulation

Change cryst orient

table

Change bias

En, n

Grow grainsAdd traps

Fig. 3: Flowchart of the simulation procedure implemented inthe GTS software package. En and n are energy eigenval-ues and state wave functions respectively, obtained from theconverged self-consistent Schrodinger-Poisson loop.

�Eb is set to zero, which means the presence of traps alonesuffices to explain the positive T dependence.

We see the same trends in the ION distributions in Fig. 5.Here, Nt,ox and Nt,GB are varied independently for 10 randomseeds of the trap and grain configurations. The average Lgrain

is assumed to be close to the channel thickness and is thereforefixed at 12 nm [4]. Both increasing oxide and grain boundarytrap density are shown to invert the T dependence from neg-ative to increasingly positive, while ION is decreased. At thesame time, the distributions grow wider, pointing to strongerinter-device variability due to enhanced current percolation.Increasing Nt,GB has a stronger effect than Nt,ox: as the grain

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Fig. 4: Simulated transfer characteristics for a single macaronidevice for varying grain size and temperature (300K, 325K,350K) and two values for Nt,GB. Nt,ox is fixed at 1e12 cm�2.Other configuration details are listed in Fig. 1(b).

Fig. 5: Simulated ION distributions for random grain andtrap configurations, extracted at VCG=VT + 2 V with VT

at IOFF=1e-9 A/µm, for varying (a) Nt,ox and (b) Nt,GB.Average Lgrain is 12 nm. Open symbols correspond to atemperature of 300 K, closed to 350 K. Other configurationdetails are listed in Fig. 1(b).

boundaries run through the full thickness of the channel, trapsat those boundaries are located more directly in the currentpath of the charge carriers.

Finally, we calibrate the model to experimental ION distri-butions in Fig. 6. The measured devices are three-gate testvehicles fabricated on a 300 mm platform with a processflow inspired by Bit-Cost Scalable technology [12], [13]. Thetarget dimensions and doping levels are the same as thoselisted for the simulated configurations in Fig. 1(b). Afterprocessing, the experimental devices have been treated witha high pressure hydrogen anneal, which is known to improveperformance in terms of ION and STS by curing defects[14]. Again, we assume that the grain size (Lgrain) is ofthe same order as the channel thickness (12 nm). Fig. 6shows a good agreement between experimental and simulated

Fig. 6: Calibration of simulated ION distributions and temper-ature dependence to experimental results. Average Lgrain is12 nm. Open symbols correspond to a temperature of 300 K,closed to 350 K. Other configuration details are listed inFig. 1(b).

(a) (b)

5e5

[A/cm2]1e4

Fig. 7: Electron current density in the channel for a T of (a)300 K and (b) 350 K. VCG is 4 V. Average Lgrain is 12 nm.Nt,ox and Nt,GB have the calibrated values of 2.5e12 cm�2

and 3e11 cm�2, respectively. Other configuration details arelisted in Fig. 1.

distributions. The temperature dependence and distributionspread is matched by adjusting Nt,ox and Nt,GB, while theION magnitude is captured by lowering the scattering factor ↵in Eq.(1). Fig. 7 illustrates the current density for one of thesesimulated configurations at the measurement temperatures: thecurrent percolation caused by the grain boundaries and traps isclearly visible. As the temperature is increased, the percolationpaths grow wider and the flow of current increases as a resultof enhanced thermionic emission.

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IV. CONCLUSION

We reported on a polycrystalline channel current model andsimulation flow for 3D NAND flash strings that has beenimplemented in the GTS TCAD package. This model capturesthe particular conduction in a random grain structure withdiscrete traps and a reduced carrier velocity at grain bound-aries, combined with an orientation dependent intra-grainmobility. With this approach, we showed that an increasedgrain boundary trap density and a decreased grain size bothnot only deteriorate ION, but also render the ION temperaturedependence more positive. Looking at statistical distributions,we showed a larger effect of grain boundary traps on thedistribution spread than oxide interface traps. Finally, wereproduced experimental temperature behavior and statisticaldistribution of ION through a calibration of trap densities andcarrier velocity at the grain boundaries. For future research,the presented simulation flow can be a valuable tool in theinvestigation of current conduction mechanisms and variabilityin scaled 3D NAND devices.

ACKNOWLEDGMENTS

This work was supported by imec’s Industrial AffiliationProgram for advanced flash memory. The authors acknowledgeR.Degraeve and B.Lee for useful discussions.

REFERENCES

[1] S.-H. Lee, “Technology scaling challenges and opportunities of memorydevices,” in 2016 IEEE International Electron Devices Meeting (IEDM),Dec 2016, pp. 1.1.1–1.1.8.

[2] R. Degraeve, S. Clima, V. Putcha, B. Kaczer, P. Roussel, D. Linten,G. Groeseneken, A. Arreghini, M. Karner, C. Kernstock, Z. Stanojevic,G. Van den bosch, J. Van Houdt, A. Furnemont, and A. Thean,“Statistical poly-Si grain boundary model with discrete charging defectsand its 2D and 3D implementation for vertical 3D NAND channels,” in2015 IEEE International Electron Devices Meeting (IEDM), Dec 2015,pp. 5.6.1–5.6.4.

[3] G. Nicosia, A. Mannara, D. Resnati, G. M. Paolucci, P. Tessariol,A. S. Spinelli, A. L. Lacaita, A. Goda, and C. Monzio Compagnoni,“Characterization and Modeling of Temperature Effects in 3-D NANDFlash Arrays—Part II: Random Telegraph Noise,” IEEE Transactions

on Electron Devices, vol. 65, no. 8, pp. 3207–3213, Aug 2018.[4] R. Degraeve, M. Toledano-Luque, A. Arreghini, B. Tang, E. Capogreco,

J. Lisoni, P. Roussel, B. Kaczer, G. Van Den Bosch, G. Groeseneken, andJ. Van Houdt, “Characterizing grain size and defect energy distributionin vertical SONOS poly-Si channels by means of a resistive networkmodel,” in Technical Digest - International Electron Devices Meeting,

IEDM, 2013.[5] D. Resnati, A. Mannara, G. Nicosia, G. M. Paolucci, P. Tessariol, A. S.

Spinelli, A. L. Lacaita, and C. Monzio Compagnoni, “Characterizationand Modeling of Temperature Effects in 3-D NAND Flash ArraysPart I: Polysilicon-Induced Variability,” IEEE Transactions on Electron

Devices, vol. 65, no. 8, pp. 3199–3206, Aug 2018.[6] A. Subirats, A. Arreghini, E. Capogreco, R. Delhougne, C. . Tan,

A. Hikavyy, L. Breuil, R. Degraeve, V. Putcha, G. Van den bosch,D. Linten, and A. Furnemont, “Experimental and theoretical verificationof channel conductivity degradation due to grain boundaries and defectsin 3D NAND,” in 2017 IEEE International Electron Devices Meeting

(IEDM), Dec 2017, pp. 21.2.1–21.2.4.[7] C. Yang and P. Su, “Simulation and Investigation of Random Grain-

Boundary-Induced Variabilities for Stackable NAND Flash Using 3-D Voronoi Grain Patterns,” IEEE Transactions on Electron Devices,vol. 61, no. 4, pp. 1211–1214, April 2014.

[8] T. Simlinger, Simulation von Heterostruktur-Feldeffekttransistoren. PhDThesis, TU Wien, 1996.

[9] C. Crowell and M. Beguwala, “Recombination velocity effects oncurrent diffusion and imref in schottky barriers,” Solid-state electronics,vol. 14, no. 11, pp. 1149–1157, 1971.

[10] T. Sato, Y. Takeishi, H. Hara, and Y. Okamoto, “Mobility anisotropy ofelectrons in inversion layers on oxidized silicon surfaces,” Phys. Rev. B,vol. 4, pp. 1950–1960, Sep 1971.

[11] Z. Stanojevic, O. Baumgartner, L. Filipovic, H. Kosina, M. Karner,C. Kernstock, and P. Prause, “Consistent low-field mobility modelingfor advanced MOS devices,” Solid-State Electronics, vol. 112, pp. 37 –45, 2015.

[12] A. Arreghini, K. Banerjee, D. Verreck, S. V. Palayam, E. Rosseel,L. Nyns, G. Van den bosch, and A. Furnemont, “Improvement ofconduction in 3-D NAND memory devices by channel and junctionoptimization,” in 2019 IEEE 11th International Memory Workshop

(IMW), May 2019, pp. 1–4.[13] A. Subirats, A. Arreghini, L. Breuil, R. Degraeve, G. Van den bosch,

D. Linten, and A. Furnemont, “Impact of discrete trapping in highpressure deuterium annealed and doped poly-Si channel 3D NANDmacaroni,” in 2017 IEEE International Reliability Physics Symposium

(IRPS), April 2017, pp. 5A–2.1–5A–2.6.[14] L. Breuil, J. G. Lisoni, R. Delhougne, C. L. Tan, J. Van Houdt, G. Van

den bosch, and A. Furnemont, “Improvement of Poly-Si Channel Ver-tical Charge Trapping NAND Devices Characteristics by High PressureD2/H2 Annealing.” in 2016 IEEE 8th International Memory Workshop

(IMW), May 2016, pp. 1–4.

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