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LT3513

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TYPICAL APPLICATION

DESCRIPTIONFEATURES

APPLICATIONS

2MHz High Current5-Output Regulator

for TFT-LCD Panels

The LT3513 5-output adjustable switching regulatprovides power for large TFT-LCD panels. The 385mm 7mm QFN device can generate a 3.3V or 5V lsupply along with the triple output supply required forTFT-LCD panel. A lower voltage secondary logic sumay also be generated with the addition of an exterNPN driven by the internal linear regulator. A step-dregulator provides a low voltage output, VLOGIC, with upto 1.2A of current while capable of operating from a w

input range of 4.5V to 30V. A high power step-up cverter, a lower power step-up converter and an invertconverter provide the three independent output voltagAVDD, VON and VOFF required by the LCD panel. A high-sPNP provides delayed turn-on of the VON signal and canhandle up to 30mA. Protection circuitry ensures that VON is disabled if any of the four outputs are more than 1below the programmed voltage.

n Automotive TFT-LCD Displaysn Large TFT-LCD Desktop Monitorsn Flat Panel Televisions

n 4.5V to 30V Input Voltage Rangen Four Integrated Switches: 2.2A Buck, 1.5A Boost,

0.25A Boost, 0.25A Inverter (Guaranteed MinimumCurrent Limit)

n External NPN LDO Drivern Fixed Frequency, Low Noise Outputsn Inductor Current Sense for Buckn Soft-Start for All Outputsn Externally Programmable VON Delayn Three Integrated Schottky Diodesn PGOOD Pin for AVDD Output Disconnectn PanelProtect Circuitry Disables VON Upon Faultn Thermally Enhanced 38-Lead 5mm 7mm QFN

Package

Start-Up Waveforms

AVDD10V/DIV

RUN/SS 2V/DIVVLOGIC5V/DIV

IIN(AVG)1A/DIV

VOFF10V/DIV

VE3 20V/DIV

VON20V/DIV

5ms/DIV 3513 TA01b

L , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks andPanelProtect, True Color PWM and ThinSOT are trademarks of Linear Technology CorporAll other trademarks are the property of their respective owners.

VC1

7.5k 4.7k

2.7nF 4.7nF

10F

VLDO3.3V0.5A

VLOGIC5V

0.5A

VOFF10V

20mA

VIN8V TO 16V

22F

4.7H 0.22F47nF 15nF 15nF 15nF

VON22V20mA

2.2F

VC3

30k

165k

232k

10k

1.5nF

VC2VC1 GND

13k

2.2nF

VC4

VIN

VLOGIC5V

LDOPWR

LT3513

UVLO SW2

2.2F

FB5 FB3BD

FB1SENSESENSE+SW1

BOOSTBIAS

SW36.8H

42.2k

10k

30.1k

10k

69.8k

10H

0.47F

10k

60.4k

178k 53.6k 100k

10k

10F

10H

AVDD8V

80mA

10F

0.47F

NFB4

D4

SW4

RUN-SS3/4CT

RUN-SS2

RUN-SS1

VONSINK

E3

VON

VON_CLK VON_CLK

PGOOD

FB2

VLOGIC5V

3513 TA01a

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(Note 1)VIN, LDOPWR Voltage ...............................................32VUVLO Voltage ............................................................32V

SW2, SW3, SW4 Voltage ..........................................40VE3 Pin Voltage ...........................................................40VVON, VONSINK Voltage ................................................40VPGOOD Voltage .........................................................40VD4 Voltage ........................................................1V, 40VBOOST Voltage .........................................................37VBOOST Over SW1 .......................................................8VSENSE+, SENSE Voltage ..........................................10VVON_CLK Voltage ........................................................10VBIAS, BD Voltage ......................................................10VCT Pin Voltage .............................................................5V

RUN-SS1, RUN-SS2, RUN-SS3/4 Voltage ...................5VFB1, FB2, FB3, FB5 Voltage .........................................5VNFB4 Voltage ......................................................5V, 5VVC1, VC2, VC3, VC4 Voltage ..........................................5VJunction Temperature (Note 8) ............................. 125COperating Temperature Range (Note 2).. 40C to 125CStorage Temperature Range .................. 65C to 125C

The l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25C. VIN = 12V, BIAS = 3V, unless otherwise noted.

PARAMETER CONDITIONS MIN TYP MAXMinimum Input Voltage l 4.5 VQuiescent Current Not Switching

VRUNSS1 = 0V7.530

1265

mAA

RUN-SS1, RUN-SS2, RUN-SS3/4 Pin Current RUN-SS1= RUN-SS2 = RUN-SS3= RUN-SS4 = 0.4V

2 A

RUN-SS1, RUN-SS2, RUN-SS3/4 Threshold 0.8BIAS Pin Voltage to Begin RUN-SS2, RUN-SS3/4 l 2.25 2.7 VBIAS Pin Current BIAS = 3.1V, All Switches Off 16.5 20

PIN CONFIGURATION

13 14 15 16

TOP VIEW

39

UHF PACKAGE38-LEAD (5mm 7mm) PLASTIC QFN

17 18 19

38 37 36 35 34 33 32

24

25

26

27

28

29

30

31

8

7

6

5

4

3

2

1FB5

VC1RUN-SS3/4

FB3

RUN-SS2

SW3

E3

VONVONSINKVON_CLKPGOOD

VC3

SENSE+

SENSE

BIAS

BOOST

LDOPWR

BD

SW4

D4

NFB4

RUN-SS1

VC4VC2

U V L O

V I N

V I N

S W 1

S W 1

G N D

F B 1

C T

G N D

S W 2

S W 2

G N D

B I A S

F B 2

23

22

21

20

9

10

11

12

TJMAX = 125C, JA = 34C/W, JC = 1C/W

EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATLT3513EUHF#PBF LT3513EUHF#TRPBF 3513 38-Lead (5mm 7mm) Plastic QFN 40C to 125C

LT3513IUHF#PBF LT3513IUHF#TRPBF 3513 38-Lead (5mm 7mm) Plastic QFN 40C to 125C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shippinFor more information on lead free part marking, go to:http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to:http://www.linear.com/tapeandreel/

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

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ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX U

FB Threshold Offset to Begin CT Charge (Note 3) 90 125 160 mV

CT Pin Current Source All FB Pins = 1.5V, CT = 0.35V 16 20 25 ACT Threshold to Power VON All FB Pins = 1.5V 1 1.1 1.2VON Switch Drop VON Current = 30mA 200 400 mVMaximum VON Current VE3 = 30V l 30 50 mAVON_CLK Input Voltage High 1.5 VVON_CLK Input Voltage Low 0.3 VVONSINK Voltage On VONSINK Current = 1A l 1.2 VMaster Oscillator Frequency

l1.901.80

2 2.122.22

MHzMHz

Foldback Switching Frequency FB2 = 0V, FB3 = 0V, NFB4 = 0V 200UVLO Pin Threshold UVLO Pin Voltage Rising 1.25

UVLO Pin Hysteresis Current VUVLO = 1V 3.4 3.9 4.5 APGOOD Threshold Offset 90 125 160 mVPGOOD Sink Current PGOOD Connected to 40V Through 100k 4 mPGOOD Pin Leakage VPGOOD = 40V 1 ASwitch 1 (2.2A Buck)

FB1 Voltagel

1.2151.205

1.235 1.2551.265

VV

FB1 Voltage Line Regulation 4.5V < VIN < 30V 0.01 0.03 %/VFB1 Pin Bias Current (Note 4) l 30 200 nAError Amplifier 1 Voltage Gain 250 VError Amplifier 1 Transconductance I = 10A 220 mhos

Maximum Duty Cycle l 75 85 %Switch 1 Current Limit Duty Cycle = 35% (Note 6) 2.2 3 3.5Switch 1 VCESAT ISW = 1.5A 430 mVSwitch 1 Leakage Current FB1 = 1.5V, RUN-SS1 = 0V 0.1 10Minimum BOOST Voltage Above SW1 Pin ISW = 1.5A (Note 7) 1.8 2.5 VBOOST Pin Current ISW = 1.5A 30 50 mABOOST Schottky Diode Drop I = 170mA 700Switch 2 (1.5A BOOST)

FB2 Voltagel

1.201.19

1.22 1.241.25

VV

FB2 Voltage Line Regulation 4.5V < VIN < 30V 0.01 0.03 %/VFB2 Pin Bias Current (Note 5) l 30 200 nAError Amplifier 2 Voltage Gain 250 VError Amplifier 2 Transconductance I = 10A 220 mhosSwitch 2 Current Limit (Note 6) 1.5 1.85 2.4

Switch 2 VCESAT ISW2 = 1.2A 360 mVSwitch 2 Leakage Current FB2 = 1.5V, RUN-SS1 = 0V 0.1 1BIAS Pin Current Due to SW2 ISW2 = 1.2A 45 mAMaximum Duty Cycle (SW2) l 75 90 %

The l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25C. VIN = 12V, BIAS = 3V, unless otherwise noted.

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PARAMETER CONDITIONS MIN TYP MAX

Switch 3 (250mA BOOST)

FB3 Voltage l 1.201.19 1.22 1.241.25 VVFB3 Voltage Line Regulation 4.5V < VIN < 30V 0.01 0.03 %/VFB3 Pin Bias Current (Note 4) l 30 200 nAError Amplifier 3 Voltage Gain 250 VError Amplifier 3 Transconductance I = 10A 220 mhosSwitch 3 Current Limit (Note 6) 0.25 0.3 0.38Switch 3 VCESAT ISW3 = 0.2A 200 mVSwitch 3 Leakage Current FB3 = 1.5V, RUN-SS1 = 0V 0.1 1BIAS Pin Current Due to SW3 ISW3 = 0.2A 18 mAMaximum Duty Cycle (SW3) l 84 88 %

Schottky Diode Drop I = 170mA 900 mSwitch 4 (250mA Inverter)

NFB4 Voltagel

1.2051.215

1.180 1.1551.145

VV

NFB4 Voltage Line Regulation 4.5V < VIN < 30V 0.01 0.03 %/VNFB4 Pin Bias Current (Note 4) l 5 16 AError Amplifier 4 Voltage Gain 200 VError Amplifier 4 Transconductance I = 10A 220 mhosSwitch 4 Current Limit (Note 6) 0.25 0.3 0.40Switch 4 VCESAT ISW4 = 0.2A 200 mVSwitch 4 Leakage Current NFB4 = 1.5V, RUN-SS1 = 0V 0.1 1

BIAS Pin Current Due to SW4 ISW4 = 0.2A 18 mAMaximum Duty Cycle (SW4) 84 88

Schottky Diode Drop (D4) I = 170mA 700 mNPN LDO

FB5 Voltagel

0.610.6

0.625 0.630.65

VV

FB5 Pin Bias Current (Note 4) l 30 200 nABase Drive Current FB5 = 0.5V 6 8 10 mLDOPWR Minimum Voltage BD = 3.5V 4.5

Note 1: Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to any AbsoluteMaximum Rating condition for extended periods may affect devicereliability and lifetime.Note 2: The LT3513E is guaranteed to meet specified performance from0C to 125C junction temperature. Specifications over the 40C to125C operating junction temperature range are assured by design,characterization and correlation with statistical process controls. TheLT3513I is guarenteed over the full 40C to 125C operating junctiontemperature range.Note 3: The CT pin is held low until FB1, FB2, FB3 and NFB4 all rampabove the FB threshold offset.Note 4: Current flows out of FB1, FB3, NFB4 and FB5.

Note 5: Current may flow in or out of FB2. The absolute value of this teis used.Note 6: Current limit is guaranteed by design and/or correlation to statictest. Slope compensation reduces current limit at higher duty cycles.Note 7: This is the minimum voltage across the boost capacitor needed guarantee full saturation of the internal power switch.Note 8: This IC includes overtemperature protection that is intendedto protect the device during momentary overload conditions. Junctiontemperature will exceed the maximum operating junction temperaturerange when overtemperature protection is active. Continuous operationabove the specified maximum operating junction temperature may impdevice reliability.

The l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25C. VIN = 12V, BIAS = 3V, unless otherwise noted.ELECTRICAL CHARACTERISTICS

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TYPICAL PERFORMANCE CHARACTERISTICS

Maximum Output Current forVLOGIC = 3.3V SW1 Current Limit vs Duty Cycle Start and Run VLOGIC = 3.3V

BOOST Pin Current SW2 Current Limit SW3 Current Limit

SW4 Current Limit SW1 VCESAT SW2 VCESAT

VIN (V)0

2.0

2.2

2.6

15

3513 G01

1.8

1.6

5 10 20

1.4

1.2

2.4

I O U T ( M A X )

( A ) L = 2.4H

L = 4.3H

DUTY CYCLE (%)25

0

S W 1 C U R R E N T L I M I T ( A )

0.5

1.0

1.5

2.0

2.5

3.0

35 45 55 65

3513 G02

75

SW1 CURRENT LIMITvs DUTY CYCLE

MINIMUM

LOAD CURRENT (A)0.001

4 V

I N (

V )

6

8

0.01 0.1 1

3513 G03

2

3

5

7

1

0

VIN(MIN) START

VIN(MIN) RUN

SWITCH CURRENT (mA)0

70

60

50

40

30

20

10

01500 2500

3513 G04

500 1000 2000 3000

B O O S T C U R R E N T ( m A )

AMBIENT TEMPERATURE (C)40

1.5

S W

C U R R E N T L I M I T ( A )

1.6

1.8

1.9

2.0

2.5

2.2

10 60 85

3513 G05

1.7

2.3

2.4

2.1

15 35 110AMBIENT TEMPERATURE (C)

50

S W

C U R R E N T L I M I T ( m A )

300

350

400

110

3513 G06

250

200

10010 30 7030 10 50 90

150

500

450


S W

C U R R E N T L I M I T ( m A )

300

350

400

110

3513 G07

250

200

10010 30 7030 10 50 90

150

500

450

SW1 CURRENT (mA)0

0

V C E S A T

( m V )

200

400

600

500 1000 1500 2000

3513 G08

2500

800

1000

100

300

500

700

900

3000ISW2 (mA)

0

V C E 2 S A T

( m V )

200

400

600

100

300

500

400 800 1200 1600

3513 G09

20000

TA = 25C, unless otherwise noted.

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SW3 VCESAT SW4 VCESAT VON Current Limit

Oscillator Frequency Frequency Foldback Reference Voltage

ISW3 (mA)0

V C E 3 S A T

( m V ) 200

250

300

150 250

3513 G10

150

100

50 100 200 300 350

50

0

ISW (mA)0

200

250

350

150 250

3513 G11

150

100

50 100 200 300 350

50

0

300

V C E S A T

( m V )

VE3 (V)0

0

I O N

L I M I T ( m A )

5

15

20

25

20

45

3513 G12

10

105 25 3015 35

30

35

40


F R E Q U E N C Y ( M H z )

2.1

2.2

2.3

3513 G13

2.0

1.9

1.70 50 100

1.8

2.5

2.4

VFB (mV)0

S W I T C H I N G F R E Q U E N C Y ( k H z )

1500

2000

2500

450 750 1200

3513 G14

1000

500

0150 300 600 900 1050

TEMPERATURE (C)40 15

1.20

R E F E R E N C E V O L T A G E ( V )

1.22

1.25

10 60 85

3513 G15

1.21

1.24

1.23

35 110


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BIAS Pin Current Efficiency, AVDD = 13V Efficiency, VLOGIC = 5V

TEMPERATURE (C)50

0

B I A S C U R R E N T ( m A )

10

20

30

40

50

60

0 50 100 150

3513 G16

L2 = 10HL3 = 10HL4 = 10H

ISW2 = 0AISW3 = 0AISW4 = 0A

LOAD CURRENT (mA)1

40

E F F I C I E N C Y ( % )

50

60

70

80

90

100

100 200 300 400

3513 G17

500IOUT (mA)

100

E F F I C I E N C Y ( % )

70

80

90

100

700 1100

3513 G18

60

50

300 500 900 1300 150040


LDO Current Limit vs Temperature VUVLO vs Temperature Reference Voltage for FB5, LDO


0 B A S E C U R R E N T L I M I T O F I N T E R N A L P N P ( m A )

1

3

4

5

50

9

3513 G19

2

025 75 10025 125

6

7

8

AMBIENT TEMPERATURE ( C)50

1.30

1.31

1.33

100

3513 G20

1.29

1.28

0 50

1.27

1.26

1.32

U V L O

( V )

UVLO FORSTART

UVLO MINIMUMFOR RUN

TEMPERATURE (C)40

640

650

670

35 85

3513 G21

630

620

15 10 60 110

610

600

660

R E F E R E N C E V O L T A G E ( m V )


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FB5 (Pin 1): Feedback Pin. Tie the resistor tap to this pinand set the output of the LDO according to VLDO = 0.625 (1 + R14/R15). Reference designators refer to Figure 1.

VC1 (Pin 2): Control Voltage and Compensation Pin forInternal Error Amplifier. Connect a series RC from this pinto ground to compensate switching regulator 1.

RUN-SS3/4 (Pin 3): Run/Soft-Start Pin. This is the soft-start pin for switching regulators 3 and 4. Place a soft-startcapacitor here to limit start-up inrush current and outputvoltage ramp rate. When the BIAS pin reaches 2.25V, a 2Acurrent source charges the capacitor. When the voltage atthis pin reaches 0.8V, switches 3 and 4 turn on and beginswitching. For slower start-up use a larger capacitor. Forcomplete shutdown tie RUN-SS3/4 to ground.FB3 (Pin 4): Feedback Pin. Tie the resistor tap to this pinand set VON according to VON = 1.22V (1 + R8/R9) 150mV. Reference designators refer to Figure 1.

RUN-SS2 (Pin 5): Run/Soft-Start Pin. This is the soft-startpin for switching regulator 2. Place a soft-start capacitorhere to limit start-up inrush current and output voltageramp rate. When the BIAS pin reaches 2.25V, a 2A cur-rent source charges the capacitor. When the voltage at thispin reaches 0.8V, switch 2 turns on and begins switching.For slower start-up use a larger capacitor. For completeshutdown tie RUN-SS2 to ground.

SW3 (Pin 6): Switch Node. The SW3 pin is the collector ofthe internal NPN bipolar transistor for switching regulator 3.Minimize trace area at this pin to keep EMI down.

E3 (Pin 7): This is switching regulator 3s output andthe emitter of the output disconnect PNP. Tie the outputcapacitor and resistor divider here.

VON (Pin 8): This is the delayed output for switchingregulator 3. V

ON reaches its programmed voltage after the

internal CT timer times out. Protection circuitry ensuresVON is disabled if any of the four outputs are more than10% below normal voltage. This output is also disabledwhen VON_CLK is high.

VONSINK (Pin 9): This is an open-collector output controlledby the VON_CLK pin. When VON_CLK is low, this pin draws nocurrent and when VON_CLK is high, this pin draws current.

VON_CLK (Pin 10): This pin controls the output disconnedevice and the open collector of VONSINK. When this pin islow, the VON pin is enabled and the VONSINK pin is a highimpedance. When this pin is high, the VON pin is disabledand the VONSINK pin sinks current to ground.PGOOD (Pin 11): Power Good Comparator Output. Thisthe open collector output of the power good comparaand can be used in conjunction with an external P-chanMOSFET to provide output disconnect for AVDD as shown inFigure 2. When switcher 2s output reaches approxima90% of its programmed voltage,PGOOD will be pulled toground. This will pull down on the gate of the MOSconnecting AVDD. A 100k pull-up resistor between th

source and the gate of the P-channel MOSFET keepoff when switcher 2s output is low.

VC3 (Pin 12): Control Voltage and Compensation Pin Internal Error Amplifier. Connect a series RC from thito ground to compensate switching regulator 3.

CT (Pin 13): Timing Capacitor Pin. This is the inputthe VON timer and programs the time delay from all fofeedback pins reaching 1.125V to VON turning on. The CT capacitor value can be set using the equation C = (20 tDELAY)/1.1V.

GND (Pins 14, 17, 33): Ground.SW2 (Pins 15, 16): Switch Node. The SW2 pin is the clector of the internal NPN bipolar transistor for switchregulator 2. Minimize trace area at this pin to keep down.

BIAS (Pins 18, 29): The BIAS pin is used to improve efciency when operating at higher input voltages. Connecthis pin to the output of switching regulator 1 forces mof the internal circuitry to draw its operating current fVLOGIC rather than VIN. The drivers of switches 2, 3 an4 and the LDO are supplied by BIAS. Switches 2, 3 aand the LDO will not function until the BIAS pin reaapproximately 2.7V. Both BIAS pins must be tied to VLOGIC.

FB2 (Pin 19): Feedback Pin. Tie the resistor divider tto this pin and set AVDD according to AVDD = 1.22V (1 + R5/R6). Reference designators refer to Figure 2.

PIN FUNCTIONS

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RUN-SS1 (Pin 22): Run/Soft-Start Pin. This is the soft-startpin for switching regulator 1. Place a soft-start capacitorhere to limit start-up inrush current and output voltageramp rate. When power is applied to the VIN pin, a 2Acurrent source charges the capacitor. When the voltageat this pin reaches 0.8V, switch 1 turns on and beginsswitching. For slower start-up use a larger capacitor. Forcomplete shutdown tie RUN-SS1 to ground.NFB4 (Pin 23): Negative Feedback Pin. Tie the resistor di-vider tap to this pin and set VOFF according to VOFF = 1.18 (1 + R3/R4). Reference designators refer to Figure 2.

D4 (Pin 24): Internal Schottky Diode Pin. This pin is theanode of an internal Schottky diode with the other endconnected to ground. This Schottky diode is used ingenerating the VOFF output.

SW4 (Pin 25): Switch Node. The SW4 pin is the collector of

the internal NPN bipolar transistor for switching regulator 4.Minimize trace area at this pin to keep EMI down.

BD (Note 26): NPN LDO Base Drive. This pin controls thebase of the external NPN LDO transistor.

LDOPWR (Pin 27): Input Voltage for LDO Driver. This pinsupplies the current for the NPN LDO base. This pin canbe connected to VIN. To save power at high VIN voltages,the pin can alternatively be connected to the AVDD supply.

BOOST (Pin 28): The BOOST pin is used to provide adrive voltage higher than VIN to the switch 1 drive circuit.

An internal Schottky diode is connected between BIASand BOOST. A capacitor needs to be connected betweenBOOST and SW1.

SENSE (Pin 30) Negative Current Sense Input. This p(along with the SENSE+ pin) is used to sense the inductocurrent for the buck switching regulator.

SENSE+ (Pin 31) Positive Current Sense Input. This p(along with the SENSE pin) is used to sense the inductocurrent for the buck switching regulator.

FB1 (Pin 32): Feedback Pin. Tie the resistor divider tto this pin and set VLOGIC according to VLOGIC = 1.235V (1 + R1/R2). Reference designators refer to Figure 2.

SW1 (Pins 34, 35): Switch Node. The SW1 pins are temitter of the internal NPN bipolar power transistorswitching regulator 1. These points must be tied toget

for proper operation. Connect these pins to the induccatch diode and boost capacitor.

VIN (Pins 36, 37): Input Voltage. This pin supplies curreto the internal circuitry of the LT3513. This pin muslocally bypassed with a capacitor.

UVLO (Pin 38): Undervoltage Lockout. A resistor diviconnected to VIN is tied to this pin to program the minimuinput voltage at which the LT3513 will operate. This pcompared to the internal 1.25V reference. When UVLless than 1.25V, the switching regulators are not allowto operate (the RUN/SS pins are still used to turn on eswitching regulator). When this pin falls below 1.23.9A will be pulled from the pin to provide programmhysteresis for UVLO.

Exposed Pad (Pin 39): Ground. The Exposed Pad of thpackage provides both electrical contact to ground agood thermal contact to the printed circuit board. TExposed Pad must be soldered to the circuit board proper operation.

PIN FUNCTIONS

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6

12

+

+

+

S Q

1.22V

gm

1.18V

1.22V

1.1V

1.235V

R

DRIVER

BIAS

VC3

SW3

9VONSINK

10VON_CLK

VON_CLK

7E3

3513 F01

FOLDBACKOSCILLATOR

25

21

+

+

+

+

+

+

S QR

DRIVER

BIAS

VC4

23NFB4100k100k

SW4

24D4

FOLDBACKOSCILLATOR

20

+

+

+

1.1V

FB2

+

+

S QR

DRIVER

VC2

30SENSE

31

28

SENSE+

SW2

15, 16

BIAS

18, 29

FOLDBACKOSCILLATOR

gm

gm

2

+

+

+

S QR

DRIVER

BIAS

CURRENTSENSE AMP

VC1

SW134, 35

BOOST

VINSLOPE COMP/ ONE-SHOT

gm

gm

+

13CT

22RUN-SS1

3RUN-SS3/4

BIAS

38 UVLO

11 PGOOD

UVLO1.25V

3.9A

2A

2A

20A

19 FB2

32FB1

BD

1FB5

LDOPWR

GND

14,17,33

VIN36,37

2.7V +

1.1V

VON_CLK

+

SW3LOCKOUT

INTERNALREGULATOR

AND REFERENCE

MASTEROSCILLATOR

2MHz

5RUN-SS2

4 FB3

8VON

SW2LOCKOUT

+0.625V

26

27

+

Figure 1

BLOCK DIAGRAM

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The LT3513 is a highly integrated power supply IC contain-ing four separate switching regulators and a low dropoutlinear regulator (LDO). Switching regulator 1 is a step-down 2.2A regulator with inductor current sense and anintegrated boost Schottky diode. Switching regulator 2 canbe configured as a step-up or SEPIC converter and has a1.5A switch. Switching regulator 3 consists of a step-upregulator with a 0.25A switch as well as an integratedSchottky diode. Switching regulator 4 is a negative regula-tor with a switch current limit of 0.25A and an integratedSchottky diode. Linear regulator 5 is capable of providing8mA of current to the base of an external NPN transistor.The regulators share common circuitry including inputsource, voltage reference and master oscillator. Operationcan be best understood by referring to the Block Diagramas shown in Figure 1.

If the RUN-SS1 pin is pulled to ground, the LT3513 is shutdown and draws 30A from the input source tied to VIN.An internal 2A current source charges the external soft-start capacitor, generating a voltage ramp at this pin. If theRUN-SS1 pin exceeds 0.8V, the internal bias circuits turnon, including the internal regulator, reference and 2MHzmaster oscillator. The master oscillator generates fourclock signals, one for each of the switching regulators.

Switching regulator 1 will only begin to operate when theRUN-SS1 pin reaches 0.8V. Switcher 1 generates VLOGIC,which must be tied to the BIAS pin. When BIAS reaches 2.8V,the NPNs pulling down on the RUN-SS2 and RUN-SS3/4pins turns off, allowing an internal 2A current sourceto charge the external capacitors tied to RUN-SS2 andRUN-SS3/4 pins. When the voltage on RUN-SS2 reaches0.8V, switcher 2 is enabled. Correspondingly, when thevoltage on RUN-SS3/4 reaches 0.8V, switchers 3 and 4are enabled. AVDD, E3 and VOFF will then begin rising at arate determined by the capacitors tied to the RUN-SS2 and

RUN-SS3/4 pins. When all four switching outputs reach90% of their programmed voltages, the NPN pulling down

on the CT pin will turn off, and an internal 20A currsource will charge the external capacitor tied to the CT pin.When the CT pin reaches 1.1V, the output disconnect PNturns on, connecting VON to E3. In the event of any of thfour outputs dropping below 90% of their programmvoltage, PanelProtect circuitry pulls the CT pin to GNDdisabling VON.

(2a)

(2b)

Figure 2. LT3513 Power-Up Sequence. (Traces from Both Photosare Synchnonized to the Same Trigger)

RUN-SS 2V/DIVVLOGIC5V/DIV

IL1 1A/DIV

IL2 500A/DIV

SS-234 2V/DIV

AVDD10V/DIV

PGOOD 20V/DIV

5ms/DIV 3513 F02a

VOFF 10V/DIVVSS3/4 2V/DIV

VCT 2V/DIV

IL4 500mA/DIV

IL3 500mA/DIV

VE3 20V/DIV

VON 20V/DIV

5ms/DIV 3513 F02b

OPERATION

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OPERATION

A power good comparator monitors AVDD and turns onwhen FB2 is at or above 90% of its regulated value. Theoutput is an open-collector transistor that is off when theoutput is out of regulation, allowing an external resistorto pull the pin high. This pin can be used with a P-channelMOSFET that functions as an output disconnect for AVDD.

The four switchers are current mode regulators. Insteadof directly modulating the duty cycle of the power switch,the feedback loop controls the peak current in the switchduring each cycle. Compared to voltage mode control, cur-rent mode control improves loop dynamics and providescycle-by-cycle current limit.

All four switchers employ a constant-frequency currentmode control scheme. Switcher 1, the step-down regula-tor, differs slightly from the others with inductor currentsense. Instead of monitoring the current at the switch,current nodes are used to measure the current throughthe inductor. Inductor current sense does not suffer fromminimum on-time problems, therefore always keep-ing the switch current limited with any input-to-outputvoltage ratio. Switcher 1 is always synchronized to themaster oscillator. The other three switchers each havetheir own slave oscillator. The slave oscillator reduces thefrequency when the feedback voltage dips below 0.75Vand decreases linearly below the threshold as shown inthe Performance Characteristics Frequency Foldback plot.Other than these two differences, the control loop is similarin all four switchers. A pulse from the master oscillatorfor switcher 1 or a pulse from the slave oscillator for theother three switchers sets the RS latch and turns on theinternal NPN bipolar power switch. Current in the switchand the external inductor begins to increase. When thiscurrent exceeds a level determined by the voltage at VC, thecurrent comparator resets the latch, turning off the switch.The current in the inductor flows through the Schottky

diode and begins to decrease. The cycle begins againthe next pulse from the oscillator. In this way, the volton the VC pin controls the current through the inductor the output. The internal error amplifier regulates the outby continually adjusting the VC pin voltage. The thresholfor switching on the VC pin is 0.8V, and an active clamof 1.8V limits the VC voltage. Switchers 2, 3 and 4 alscontain an independent current limit not dependent onC or duty cycle. Switcher 1s current limit is controlledthe VC voltage and varies with duty cycle. All four swiers also use slope compensation to ensure stability wthe current mode scheme at duty cycles above 50%. TRUN-SS1, RUN-SS2 and RUN-SS3/4 pins control theof rise of the feedback pins.

The switch driver for SW1 operates either from VIN or fromthe BOOST pin. An external capacitor and an integrSchottky diode are used to generate a voltage at the BOOpin that is higher than the input supply. This allows driver to saturate the internal bipolar NPN power swfor efficient operation.

INPUT VOLTAGE RANGE STEP-DOWN CONSIDER

The minimum operating voltage of switcher 1 is determieither by the LT3513s undervoltage lockout of ~4V oits maximum duty cycle. A user defined undervoltlockout may be set with the UVLO pin at a voltage hithan the internal undervoltage lockout. The duty cyclthe fraction of time that the internal switch is on anddetermined by the input and output voltages:

DC= VOUT +VF

VIN VSW +VFwhere VF is the forward voltage drop of the catch dio(~0.4V) and VSW is the voltage drop of the internal swit

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(~0.3V at maximum load). This leads to a minimum inputvoltage of:

VIN(MIN) = VOUT +VFDCMAX VF +VSW

with DCMAX = 0.75.

The user defined undervoltage is set by a resistor dividerconnected to the UVLO pin. The comparator pulls 3Afrom the pin when the UVLO pin is higher than 1.25V.The hysteresis and minimum input voltage equations areas follows:

VHYS = R2+2k( ) 3.9A

VIN(MIN) =1.25VR1+R2

R1

current should be at least 30% higher. For highest efficiethe series resistance (DCR) should be less than 0.1 .Table 1 lists several vendors and types that are suitab

Table 1. Inductor VendorsVENDOR URL PART SERIES TYPECoilcraft www.coilcraft.com MSS7341 ShieldeMurata www.murata.com LQH55D Open

TDK www.component.tdk.com SLF7045SLF10145

ShieldedShielded

Toko www.toko.com DC62CBD63CBD75CD75F

ShieldedShieldedShielded

OpenSumida www.sumida.com CR54

CDRH74CDRH6D38

CR75

OpenShieldedShielded

Open

The optimum inductor for a given application may difrom the one indicated by this simple design guide. A larvalue inductor provides a higher maximum load curreand reduces the output voltage ripple. If your load is lowthan the maximum load current, then you can relax tvalue of the inductor and operate with higher ripple crent. This allows you to use a physically smaller inducor one with a lower DCR resulting in higher efficiencyaware that the maximum load current depends on inpvoltage. A graph in the Typical Performance Charactetics section of this data sheet shows the maximum locurrent as a function of input voltage and inductor vafor VOUT = 3.3V. In addition, low inductance may resin discontinuous mode operation, which further reducmaximum load current. For details of maximum outcurrent and discontinuous mode operation, see LineTechnologys Application Note 44. Finally, for duty cygreater than 50% (VOUT /VIN > 0.5), a minimum inductance is required to avoid subharmonic oscillations, sApplication Note 19.

OPERATION

R2

R1

UVLO

3513 A1

VIN

38

INDUCTOR SELECTION AND MAXIMUM OUTPUTCURRENT

A good first choice for the inductor value is:

L= VOUT +VF

1.8

where VF is the voltage drop of the catch diode (~0.4V)and L is in H. The inductors RMS current rating must begreater than the maximum load current and its saturation

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The current in the inductor is a triangle wave with an averagevalue equal to the load current. The peak switch currentis equal to the output current plus half the peak-to-peakinductor ripple current. The LT3513 limits its switch cur-rent in order to protect itself and the system from overloadfaults. Therefore, the maximum output current that theLT3513 will deliver depends on the switch current limit, theinductor value, and the input and output voltages. Whenthe switch is off, the potential across the inductor is theoutput voltage plus the catch diode drop. This gives thepeak-to-peak ripple current in the inductor:

IL =

1DC( ) VOUT +VF( )L f

where f is the switching frequency of the LT3513 and Lis the value of the inductor. The peak inductor and switchcurrent is:

ISW(PK) =ILPK =IOUT +

IL2

To maintain output regulation, this peak current must beless than the LT3513s switch current limit of ILIM. For SW1,ILIM is at least 2A at DC = 0.35, and decreases linearly to1.5A at DC = 0.75 as shown in the Typical PerformanceCharacteristics section. The maximum output current isa function of the chosen inductor value:

IOUT(MAX) =ILIM IL

2 =2.5A 1 0.57 DC( ) IL

2

Choosing an inductor value so that the ripple current issmall will allow a maximum output current near the switchcurrent limit. One approach to choosing the inductor is tostart with the simple rule given above, look at the availableinductors and choose one to meet cost or space goals.Then use these equations to check that the LT3513 willbe able to deliver the required output current. Note againthat these equations assume that the inductor current iscontinuous. Discontinuous operation occurs when IOUT is less than IL /2.

OUTPUT CAPACITOR SELECTION

For 5V and 3.3V outputs, a 10F 6.3V ceramic capa

(X5R or X7R) at the output results in very low output age ripple and good transient response. Other types avalues will also work; the following discussion expltradeoffs in output ripple and transient performance.

The output capacitor filters the inductor current to gerate an output with low voltage ripple. It also stoenergy in order satisfy transient loads and stabilizes LT3513s control loop. Because the LT3513 operates high frequency, minimal output capacitance is necessaIn addition, the control loop operates well with or withthe presence of output capacitor series resistance (ESRCeramic capacitors, which achieve very low output riand small circuit size, are therefore an option.

You can estimate output ripple with the followiequations:

VRIPPLE =

IL8 f COUT

for ceramic capacitors, and

VRIPPLE = IL ESR for electrolytic capacitors (tantalumand aluminum)

where

IL is the peak-to-peak ripple current in the inducThe RMS content of this ripple is very low so the Rcurrent rating of the output capacitor is usually notconcern. It can be estimated with the formula:

IC(RMS) =

IL12

Another constraint on the output capacitor is that it mhave greater energy storage than the inductor; if the stoenergy in the inductor transfers to the output, the resultvoltage step should be small compared to the regulatvoltage. For a 5% overshoot, this requirement indicat

COUT >10 L

ILIMVOUT

2

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The low ESR and small size of ceramic capacitors makethem the preferred type for LT3513 applications. However,not all ceramic capacitors are the same. Many of the highervalue capacitors use poor dielectrics with high temperatureand voltage coefficients. In particular, Y5V and Z5U typeslose a large fraction of their capacitance with applied volt-age and at temperature extremes.

Because loop stability and transient response depend onthe value of COUT, this loss may be unacceptable. UseX7R and X5R types. Electrolytic capacitors are also anoption. The ESRs of most aluminum electrolytic capacitorsare too large to deliver low output ripple. Tantalum andnewer, lower ESR organic electrolytic capacitors intended

for power supply use are suitable, and the manufacturerswill specify the ESR. Chose a capacitor with a low enoughESR for the required output ripple. Because the volumeof the capacitor determines its ESR, both the size and thevalue will be larger than a ceramic capacitor that wouldgive similar ripple performance. One benefit is that thelarger capacitance may give better transient responsefor large changes in load current. Table 2 lists severalcapacitor vendors.

Table 2. Low ESR Surface Mount CapacitorsVENDOR TYPE SERIES

Taiyo Yuden Ceramic X5R, X7RAVX Ceramic

TantalumX5R, X7R

TPSKemet Tantalum

Ta OrganicAl Organic

T491, T494, T495T520A700

Sanyo Ta or Al Organic POSCAPPanasonic Al Organic SP CAP

TDK Ceramic X5R, X7R

DIODE SELECTION

The catch diode (D1 from Figure 1) conducts current onlyduring switch-off time. Average forward current in normaloperation can be calculated from:

ID(AVG) =IOUT

VIN VOUTVIN

The only reason to consider a diode with a larger currrating than necessary for nominal operation is for worst-case condition of shorted output. The diode currwill then increase to the typical peak switch current. Preverse voltage is equal to the regulator input voltaUse a diode with a reverse voltage rating greater thaninput voltage. Table 3 lists several Schottky diodes their manufacturers.

Table 3. Schottky DiodesPART NUMBER VR (V) IAVE (A) VFAT 1A (mV) VF at 2A (mV)

On SemiconductorMBRM120E 20 1 530MBRM140 40 1 550MBRS240 40 2MBRA340 40 3 450Diodes Inc.

B120 20 1 500B240 40 2 500B340A 40 3 450

BOOST PIN CONSIDERATIONSThe minimum operating voltage of an LT3513 appltion is limited by the undervoltage lockout ~4V andthe maximum duty cycle. The boost circuit also limthe minimum input voltage for proper start-up. If input voltage ramps slowly or the LT3513 turns on wthe output is already in regulation, the boost capacimay not be fully charged. Because the boost capacicharges with the energy stored in the inductor, the circwill rely on some minimum load current to get the bocircuit running properly. This minimum load will depon input and output voltages. The Typical PerformaCharacteristics section shows a plot of the minimum lcurrent to start as a function of input voltage for a 3

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output. The minimum load current generally goes to zeroonce the circuit has started. Even without an output loadcurrent, in many cases the discharged output capacitorwill present a load to the switcher that will allow it to start.

INVERTER/STEP-UP CONSIDERATIONS

Regulating Positive Output Voltages

The output voltage is programmed with a resistor dividerbetween the output and the FB pin. Choose the resistorsaccording to:

R3=R4 VOUT

1.25

1

R4 should be 10k or less to avoid bias current errors.

Regulating Negative Output Voltages

The LT3513 contains an inverting op amp with a gain of 1.The NFB4 pin works just as the other FB pins. Choose theresistors according to:

R6= VOUT

R51.25

R5

R5 should be 2.5k or less to avoid bias current errors.

The duty cycle for a given application using the stepor charge pump topology is:

DC= VOUT VINVOUT

The duty cycle for a given application using the inveor SEPIC is:

DC=

VOUTVIN + VOUT

The LT3513 can still be used in applications where the cycle, as calculated above, is greater than the maximu

However, the part must be operated in discontinuous moso that the actual duty cycle is reduced.

Inductor Selection

Table 1 lists several inductor vendors and types that suitable to use with the LT3513. Consult each manufactfor detailed information and for their entire selectiorelated parts. Use ferrite core inductors to obtain the befficiency, as core losses at frequencies above 1MHzmuch lower for ferrite cores than for powdered-iron unA 10H to 22H inductor will be the best choice for

LT3513 step-up and charge pump designs. Choose inductor that can carry the entire switch current withsaturating. For inverting and SEPIC regulators, a coupinductor, or two separate inductors is an option. Whusing coupled inductors, choose one that can handat least the switch current without saturating. If usuncoupled inductors, each inductor need only handle proximately one-half of the total switch current. A 4.to 15H coupled inductor or two 10H to 22H uncouinductors will usually be the best choice for most LT3inverting and SEPIC designs.

R6

R5

NFB4

3513 A2

VOUT

22

OPERATION

Duty Cycle Range

The maximum duty cycle (DC) of the LT3513 switchingregulator is 75% for SW2, and 84% for SW3 and SW4.

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Output Capacitor Selection

Use low ESR (equivalent series resistance) capacitors at

the output to minimize the output ripple voltage. Multilayerceramic capacitors are an excellent choice, as they havean extremely low ESR and are available in very small pack-ages. X7R dielectrics are preferred, followed by X5R, asthese materials retain their capacitance over wide voltageand temperature ranges. A 10F to 22F output capaci-tor is sufficient for most LT3513 applications. Even lesscapacitance is required for outputs with |VOUT| > 20V or|IOUT| < 100mA. Solid tantalum or OS-CON capacitors willalso work, but they will occupy more board area and willhave a higher ESR than a ceramic capacitor. Always use

a capacitor with a sufficient voltage rating.Diode Selection

A Schottky diode is recommended for use with theLT3513 switcher 2 and switcher 4. The Schottky diode forswitcher 3 is integrated inside the LT3513. Choose diodesfor switcher 2 and switcher 4 rated to handle an averagecurrent greater than the load current and rated to handlethe maximum diode voltage. The average diode current inthe step-up and SEPIC is equal to the load current. Each ofthe two diodes in the charge pump configurations carriesan average diode current equal to the load current. Theground connected diode in the charge pump is integratedinto the LT3513. The maximum diode voltage in the step-up and charge pump configurations is equal to |VOUT|.The maximum diode voltage in the SEPIC and invertingconfigurations is VIN + |VOUT|.

Input Capacitor Selection

Bypass the input of the LT3513 circuit with a 4.7F or higherceramic capacitor of X7R or X5R type. A lower value ora less expensive Y5V type will work if there is additionalbypassing provided by bulk electrolytic capacitors or if the

input source impedance is low. The following paragradescribe the input capacitor considerations in more detStep-down regulators draw current from the input suply in pulses with very fast rise and fall times. The icapacitor is required to reduce the resulting voltage ripat the LT3513 input and to force this switching currinto a tight local loop, minimizing EMI. The input cator must have low impedance at the switching frequeto do this effectively and it must have an adequate ripcurrent rating. The input capacitor RMS current cancalculated from the step-down output voltage and curreand the input voltage:

CIN(RMS) =IOUTVOUT VIN VOUT( )

VIN

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