2a step down dc-to-dc converter

1 FP6340-1.3-FEB-2010

FP6340fitipower integrated technology lnc.

2A Step Down DC-to-DC Converter

Pin Assignments SO Package (SOP-8)

MP Package (MSOP- 10 <Exposed Pad>)

Figure 1. Pin Assignment of FP6340

Ordering Information

Description The FP6340 is a 380kHz monolithic buck switching regulator that accepts input voltages up to 15V. A high efficiency 2A, 0.27Ω switch is included on the die. Current mode architecture provides fast transient response and good loop stability.

Fault condition protection includes cycle-by-cycle current limiting, short circuit frequency fold-back and thermal shutdown. A shutdown control pin reduces supply current down to 6µA.

The FP6340 requires a minimum number of readily available standard external components. It is available in both SOP-8 and MSOP-10 exposed pad packages.

Features 2A Output Current 0.27Ω Internal Switch Wide Input Range: 4.75V to 15V Low Quiescent Current at 0.5mA Stable with Low ESR Output Ceramic Capacitors Up to 95% Efficiency 6µA Shutdown Mode Constant 380kHz Frequency Thermal Shutdown Cycle-by-Cycle Current Limit Short Circuit Frequency Fold-Back at 42kHz Small Package: SOP-8 and MSOP-10 Packages RoHS Compliant

Applications LCD Monitors Portable DVDs DSL Modems Battery Charger Distributed Power Pre-Regulator for Linear Regulators

P: Green G: Green

TR: Tape / Reel Blank: Tube

FP6340

Package Type SO: SOP-8 MP: MSOP-10 (Exposed Pad)

2 FP6340-1.3-FEB-2010


Typical Application Circuit

Figure 2. Typical Application Circuit of FP6340

Functional Pin Description Pin Name Pin Function

BS High-Side Gate Drive Boost Input. BS supplies the drive for the high-side NMOS switch. Connect a 10nF or greater capacitor from SW to BS to power the high-side switch

IN Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.75V to 15V power source, Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC

SW Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter form SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch.

GND Ground

FB Feedback Input. FB senses the output voltage to regulate the voltage. Drive FB with a resistive voltage divider from the output voltage. The feedback threshold is 1.22V.

COMP Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND to compensate the regulation control loop.

EN Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; Drive it low to turn it off. For automatic startup, leave EN unconnected.

NC Not Connect.

3 FP6340-1.3-FEB-2010


Block Diagram

Figure 3. Block Diagram of FP6340

Absolute Maximum Ratings Supply Voltage (IN)---------------------------------------------------------------------------------------- - 0.3V to + 16V

Enble Voltage (EN)----------------------------------------------------------------------------------------- - 0.3V to + 16V

Switch Voltage (SW)-------------------------------------------------------------------------------------- - 1V to VIN + 1V

Boost Trap Voltage (BS)---------------------------------------------------------------------------------- Vsw -0.3V to Vsw + 6V

All Other Pins ----------------------------------------------------------------------------------------------- - 0.3V to + 6V

Power Dissipation @ TA=25 (PD)

SOP-8----------------------------------------------------------------------------------------------- 630mW

MSOP-10 Exposed Pad------------------------------------------------------------------------ 910mW

Package Thermal Resistance (θJA)

SOP-8----------------------------------------------------------------------------------------------- 160°C/W

MSOP-10 Exposed Pad------------------------------------------------------------------------ 110°C/W

Maximum Junction Temperature (TJ)----------------------------------------------------------------- + 150 Storage Temperature (TS)-------------------------------------------------------------------------------- - 65 to + 150 Lead Temperature (Soldering, 10 sec.) (TLEAD)----------------------------------------------------- + 260 ESD Susceptibility

HBM (Human Body Mode)------------------------------------------------------------------------------- 1.0kV

MM (Machine Mode)-------------------------------------------------------------------------------------- 200V

Note1：Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

4 FP6340-1.3-FEB-2010


Recommended Operating Conditions Supply Voltage (VIN)----------------------------------------------------------------------------------------- + 4.75V to + 15V

Operation Temperature Range---------------------------------------------------------------------------- - 40°C to + 85°C

Electrical Characteristics (VIN=+12V, TA=25, unless otherwise specified.)

Parameter Symbol Conditions Min Typ Max Unit

Feedback Voltage VFB 4.75V ≦ VIN ≦ 15V 1.184 1.222 1.258 V

Upper Switch, VIN = 12V 0.27 Ω Switch On Resistance (Note2) RDS-ON

Lower Switch, VIN = 12V 10 Ω

Upper Switch Leakage IL VEN = 0V, VSW = 0V 1 μA

Current Limit (Note2) ILIMIT 2.4 2.95 A

Oscillator Frequency FS VFB = 1.2V 320 380 440 kHz

Short Circuit Frequency (Note2) FL VFB = 0 42 kHz

Maximum Duty Cycle DMAX VFB = 1.0V 90 %

Minimum Duty Cycle DMIN VFB = 1.5V 0 %

Enable Threshold VEN 0.7 1.0 1.5 V

VUVLO VIN rising 2.0 2.5 3.0 V Under Voltage Lockout

VHYS Hysteresis 200 mV

Shutdown Supply Current ISDN VEN = 0V, 6 10 μA

Operating Supply Current ISUP VEN = 2V, VFB = 1.5V 0.5 0.8 mA

Thermal Shutdown Temperature (Note2) TSD 160 ºC

Note2：Guarantee by design.

5 FP6340-1.3-FEB-2010


Typical Performance Curves

0.0 0.5 1.0 1.5 2.070

72

74

76

78

80

82

84

86

88

90

92

94

Effic

ienc

y (%

)

Output Current (A)

5.0V

3.3V

2.5V

VIN=12V

4 6 8 10 12 14500

510

520

530

540

550

560

570

580

590

600

Supp

ly C

urre

nt (u

A)

Supply Voltage (V)

TA=25oC

VFB=1.5V

Figure 4. Efficiency vs. Output Current and Voltage. VIN=12V, VOUT=2.5V, 3.3V, 5.0V

Figure 5. Supply Current vs. Supply Voltage

-40 -20 0 20 40 60 80 100420

430

440

450

460

470

480

490

500

Supp

ly C

urre

nt (u

A)

Temperature (oC)

VIN= 12.0VVFB=1.5V

4 6 8 10 12 143.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

Shut

dow

n cu

rren

t (uA

)

Supply Voltage (V)

TA=25oC

Figure 6. Supply Current vs. Temperature Figure 7. Shutdown Current vs. Supply Voltage

-40 -20 0 20 40 60 80 1001.20

1.21

1.22

1.23

1.24

Feed

back

Vol

tage

(V)

Temperature (oC)

VIN=12.0V

-40 -20 0 20 40 60 80 100

320

340

360

380

400

420

440

Freq

uenc

y(kH

z)

Temperature(oC)

VIN=12.0V

Figure 8. Feedback Voltage vs. Temperature Figure 9. Switching Frequency vs. Temperature

6 FP6340-1.3-FEB-2010


Typical Performance Curves (Continued)

4 6 8 10 12 14380

385

390

395

400

405

410

415

420

Freq

uenc

y (k

Hz)

Supply Voltage (V)

TA=25oC

CH1: EN, CH2: VOUT, CH3: SW, CH4: IOUT

Figure 10.Switching Frequency vs. Supply Voltage Figure 11. No Load Start-up Waveform VIN=12V,VOUT=5V

CH2, VOUT(ac), CH3:SW, CH4: IOUT

CH2, VOUT(ac), CH3:SW, CH4: IOUT Figure 12.Light Load Output Ripple Waveform

VIN =12V, VOUT=5V IOUT=100mA Figure 13.Mid-Load Output Ripple Waveform

VOUT=5V, IOUT=500mA

CH1:VIN, CH2: VOUT(ac), CH3:VOUT(dc), CH4: IOUT

CH1: EN, CH2: VOUT, CH3: SW, CH4: IOUT Figure 14. Load Transient Response

VIN=12V, VOUT=5V, Load: 200mA to 2.0A Figure 15. Turn On/Off Response

VIN=12V, VOUT=5V, No Load

7 FP6340-1.3-FEB-2010


Typical Performance Curves (Continued)

CH2: VOUT(ac), CH3:SW, CH4:IOUT

CH1: SW, CH2: VOUT(ac), CH4:Inductor Current

Figure 16. Load Transient Response VIN=12V, VOUT=2.5V, Load:300mA to 2.0A

Figure 17. Over-Current Response VIN=12V, VOUT=3.3V

8 FP6340-1.3-FEB-2010


Application Information

Introduction The FP6340 is a constant frequency, current mode buck converter. It regulates input voltage from 4.75V to 15V down to an output voltage as low as 1.22V.

The current mode operation means that there is an internal clock and two feedback loops that control the duty cycle of power switch. Besides the error amplifier, there is an extra current loop that monitors the switch current cycle-by-cycle.

A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn on the switch. When the current reaches a level which set by the error amplifier. The comparator will reset the RS flip-flop to turn off the switch.

The FP6340 also provide the cycle-by-cycle current limit protection and the feedback controlled oscillator that will fold-back frequency to decrease the input current and prevent the switch damage when the output short and over-load conditions occur. This application information discusses simple ways to select all necessary components to implement a step-down (BUCK) regulator and gives a design example. In this example, the FP6340 monolithic IC is used to design a cost-effective and high-efficiency miniature switching buck regulator.

This demonstration board allows the designer to evaluate the performance of the FP6340 series buck regulator in a typical application circuit. The user needs only to supply an input voltage and a load. The demonstration board can be configured to evaluate adjustable output voltage setting by two resistors. Operation at different voltages and currents may be accomplished by proper component selection and replacement.

Regulator Design Procedure (1) Given Power Specification

VIN(max) = Maximum input Voltage VIN(min) = Minimum input Voltage VOUT = Regulated Output Voltage VRIPPLE = Ripple Voltage (peak to peak), typical

value is 0.6% of the output voltage. ILOAD(max) = Maximum Load Current ILOAD(min) = Minimum Load Current before the

circuit becomes discontinuous, typical value is 10% of the maximum load current.

F = Switching Frequency (Fixed at a nominal 380 kHz)

(2) Programming Output Voltage The output voltage is programmed by selection of the divider R1 and R2. Designer should use resistors R1 and R2 with ±1% tolerance in order to obtain best accuracy of output voltage. The output voltage can be calculated from the following formula.

VOUT = 1.222 x (1 + R1 / R2)

Select a value for R2 between 5kΩ and 50kΩ. The lower resistor values minimize noise pickup in the sensitive feedback pin. (3) Inductor Selection a. The minimum inductor L(MIN) can be calculated

from the following design formula table.

Calculation Step-down (buck) regulator

Duty ( )

VVVVV

FSATIN

FOUT

+−

+

(min)

TT

OFF

ON

( )VVV

VVOUTSATIN

FOUT

−−

+

(min)

L(min) [ ]

ITVVV

LOAD

ONOUTSATIN

(min)

(max)(min)

2×

×−−

VSAT = ILOAD X RDS-ON (Internal switch saturation voltage of the FP6340)

VF = 0.5V (Forward voltage drop of output rectifier D1)

b. The inductor must be designed so that it does not saturate or significantly saturate at DC current bias of IPK. (IPK= Peak inductor or switch current = ILOAD(max.) – ILOAD(min.) )

(4) Output Capacitor Selection a. The output capacitor is required to filter the

output and provide regulator loop stability. When selecting an output capacitor, the important capacitor parameters are; the 100kHz Equivalent Series Resistance (ESR), the RMS ripples current rating, voltage rating, and capacitance value. For the output capacitor, the ESR value is the most important parameter. The ESR can be calculated from the following formula.

⎟⎟⎠

⎞⎜⎜⎝

⎛

×=

I2VESR

(min)LOAD

RIPPLE

9 FP6340-1.3-FEB-2010


Application Information (Continued) An aluminum electrolytic capacitor's ESR value is related to the capacitance and its voltage rating. In most case, higher voltage electrolytic capacitors have lower ESR values. Most of the time, capacitors with much higher voltage ratings may be needed to provide the low ESR values required for low output ripple voltage. If the selected capacitor's ESR is extremely low, resulting in an oscillation at the output. It is recommended to replace this low ESR capacitor by using two general standard capacitors in parallel.

b. The capacitor voltage rating should be at least 1.5 times greater than the output voltage, and often much higher voltage ratings are needed to satisfy the low ESR requirements needed for low output ripple voltage.

(5) Output Rectifier Selection a. The current rating of the output rectifier D1 must

be greater than the peak switch current IPK at least. The reverse voltage rating of the output rectifier D1 should be at least 1.25 times the maximum input voltage.

b. The output rectifier D1 must be fast (short reverse recovery time) and must be located close to the FP6340 using short leads and short printed circuit traces. Because of their fast switching speed and low forward voltage drop, Schottky diodes provide the best performance and efficiency, and should be the first choice, especially in low output voltage applications.

(6) Input Capacitor Selection a. The RMS current rating of the input capacitor

can be calculated from the following formula table. The capacitor manufactured by data sheet must be checked to assure that this current rating is not exceeded.

Calculation Step-down (buck) regulator

δ Ton/(Ton+Toff) I PK II LOADLOAD (min)(max) − I m II LOADLOAD (min)(max) + I LΔ I LOAD (min)2×

I rmsIN )( ( ) ( ) ⎥⎦⎤

⎢⎣⎡ Δ+×× 2

31 III LmPKδ

b. This capacitor should be located close to the IC using short leads and the voltage rating should be approximately 1.5 times the maximum input voltage.

(7) Compensation Values

Vo C4 R3 C3 C5

1.8 22uF ceramic 2.7k 5.6nF - 2.5 22uF ceramic 3.6k 3.9nF - 3.3 22uF ceramic 4.7k 3.3nF - 5 22uF ceramic 7.5k 2.2nF -

1.8 220uF electrolytic 10k 10nF - 2.5 220uF electrolytic 10k 10nF - 3.3 220uF electrolytic 10k 10nF - 5 220uF electrolytic 8.2k 10nF 1nF

10 FP6340-1.3-FEB-2010


Application Information (Continued)

Design Example (1) Summary of Target Specifications

Input Power VIN(max)= +12V; VIN(min)= +12V

Regulated Output Power VOUT= + 5V; ILOAD(max) = 2A; ILOAD(min) = 0.2A

Output Ripple Voltage VRIPPLE 50 mV peak-to-peak

Output Voltage Load Regulation 0.6% (0.2A to 2A)

Efficiency 87% minimum at full load.

Switching Frequency F = 380kHz ± 15 %

(2) Calculating and Components Selection (See Demo Board Schematic)

Calculation Formula Select Condition Component spec.

VOUT=Vref x ((R1/R4) + 1) 5kΩ ≤ R2 ≤ 50kΩ R1=31kΩ; R4=10kΩ

≥L(min)

[ ]I

TVVVLOAD

ONOUTSATIN

(min)

(max)(min)

2×

×−−

III LOADLOADPK (min)(max) −= L(min) ≥ 19uH Irms ≥ IPK =1.8A Select L1=27µH

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

×=

IV

LOAD

RIPPLEESR(min)2

VV OUTWVDC×≥ 5.1

ESR ≤ 125mΩ, VWDVC ≥ 7.5V Select C1, C2 10µF/10V*2pcs

VV INRRM (max)25.1 ×≥

III LOADLOADPK (min)(max) −= VRRM ≥ 15V, IPK = 1.8A Select D1: 20V/2A

( ) ( ) ⎥⎦⎤

⎢⎣⎡ Δ+××= 2

)( 31 IIII LmPKrmsIN δ

VV INWVDC (max)5.1 ×≥ Iripple ≥ IIN(rms) =1.2932A VWDVC ≥18V

Select C3, C4 10µF/25V*2pcs

11 FP6340-1.3-FEB-2010


Outline Information SOP- 8 Package (Unit: mm)

. Note：Followed From JEDEC MO-012-E

DIMENSION IN MILLIMETERSYMBOLS UNIT MIN MAX

A 1.35 1.75

A1 0.05 0.25

A2 1.30 1.50

B 0.31 0.51

D 4.80 5.00

E 3.80 4.00

e 1.20 1.34

H 5.80 6.20

L 0.40 1.27

12 FP6340-1.3-FEB-2010


Outline Information (Continued) MSOP-10 Exposed Pad Package (Unit: mm)

DIMENSION IN MILLIMETER SYMBOLS

UNIT MIN MAX A 0.75 1.10

A1 0.00 0.15

A2 0.75 0.95

B 0.17 0.30

D 2.90 3.10

E 4.80 5.00

E1 2.90 3.10

e 0.40 0.60

L 0.40 0.80

D1 0.75 2.50

E2 0.75 2.50

Note : Followed From JEDEC MO-187-E.

Life Support Policy Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.

2a step down dc-to-dc converter

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