Flyback Converter

This course introduces the operating principles of and the uses for Flyback converters. It describes the similarities between the Flyback converterand the Buck-Boost converter and introduces the basic equations use in Flyback converter design. Potential design issues are discussed and adesign example is provided.

Course Map/Table of Contents1. Course Navigation

1.1 Course Navigation1.1.2 Course Objectives2.

2. Flyback Converter Topology

2.1 Fundamental DC-DC Converter Topologies1.2.2 Isolated Topologies2.2.3 Forward / Flyback Comparison3.2.4 Flyback Converter Characteristics4.2.5 Flyback Merits and Applications5.

3. Flyback Converter Operating Principles

3.1 Key Waveforms1.3.2 Study State Analysis2.3.3 Study State Analysis Continued3.

4. Flyback Converter Design Issues

4.1 Key Design Issues1.4.2 Flyback Transformer2.4.3 Example - Design Specifications3.4.4 Primary Turns Ratio, Core Selection4.4.5 Bobbin Area Use5.4.6 Secondary Winding6.4.7 Copper Losses7.4.8 Gapping the Core8.4.9 Core Gapping Formula9.4.10 Inductance Flow Factor10.4.11 Flux and Ripple Calculations11.4.12 Auxiliary Winding12.4.13 Other Components13.4.14 Filter Capacitors14.

5. Controller Selection

5.1 Controller Choices1.5.2 Current Mode vs. Voltage Mode2.5.3 LM5020 Controller3.5.4 Load Compensation4.5.5 Right Half Plan (RHP) Zero5.5.6 Slope Compensation6.5.7 LM5020 Slope Compensation7.5.8 Loop Compensation8.5.9 Error Amplifier Design9.5.10 Loop Gain Results10.

6. Flyback Circuit Examples

6.1 Isolated Flyback Design1.6.2 Non-isolated Flyback Design2.6.3 Sync Rectifier Modification3.6.4 LM5020 Demo Board4.6.5 Demo Board Efficiency5.6.6 Primary Switch Drain Voltage6.6.7 Ripple Voltage7.

7. Conclusions

7.1 Conclusions1.

1. Course Navigation

1.1 Course Navigation

1.2 Course Objectives

1. Course Navigation

1.1 Course Navigation

1.2 Course Objectives

1.1 Course Navigation

This course is organized like a book with multiple chapters. Each chapter may have one or more pages.

The previous and next arrows move you forward and back through the course page by page.

The left navigation bar takes you to any chapter. It also contains the bookmarking buttons, 'save' and 'go to.' To save your place ina course, press the 'save' button. The next time you open the course, clicking on 'go to' will take you to the page you saved orbookmarked.

The 'Go to Final Test' button on the left navigation bar takes you back to the Analog University course listing, where you started.Take the course final test by clicking on 'Test Yourself.'

The top services bar contains additional information such as glossary of terms, who to go to for help with this subject and an FAQ.Clicking home on this bar will take you back to the course beginning.

Don't miss the hints, references, exercises and quizzes which appear at the bottom of some pages.

1.2 Course Objectives

Upon successful completion of this course the student will be able to:

Determine when a Flyback Regulator would be the best design choice.

Given a specific design requirment explain the benefits of using a Flyback Regulator instead of another type of regulating circuit.

Provide solutions to common problems associated with Flyback Regulator designs.

2. Flyback Converter Topology

This chapter introduces Flyback Regulator topology and discusses some suitable applications.

2.1 Fundamental DC-DC Converter Topologies

2.2 Isolated Topologies

2.3 Forward / Flyback Comparison

2.4 Flyback Converter Characteristics

2.5 Flyback Merits and Applications

2.1 Fundamental DC-DC Converter Topologies

These graphics show the three fundamental DC-DC power converter topologies.Based on these other popular topologies are derived; including the flyback, forward,push-pull, half-bridge, and full bridge converter topologies.

In these three fundamental topologies, the two switching elements, namely the switch andrectifier diode, are under different voltage stresses. In a Buck, the voltage stress is Vin, whilein a Boost it is Vo, and in a Buck-Boost, it is Vin+Vo. The higher stress in the Buck-Boostimplies that it is only suitable for lower power level applications.

In these three fundamental topologies, the two switching elements, namely the switch andrectifier diode, are under different voltage stresses. In a Buck, the voltage stress is Vin, whilein a Boost it is Vo, and in a Buck-Boost, it is Vin+Vo. The higher stress in the Buck-Boostimplies that it is only suitable for lower power level applications.

A major limitation of these three fundamental topologies is that they do not provideelectrical isolation between the input and output. In many applications electrical isolationis desirable.

2.2 Isolated Topologies

Input/output isolation is required in many applications. The isolation breaks the propagation paths of unwanted signals and therefore brings in thefollowing advantages:

Protection of human and equipment against dangerous transient voltages induced on the other side of the isolation.Removal of the ground loop between the isolated circuits to improve noise immunity.Ease of output connections in the system without conflicting with the primary ground.

These graphics show the two simplest isolated topologies: the forward and flyback. The parts in the yellow shaded area are additional parts to thefundamental topology.

The forward topology is evolved from the Buck, and the flyback topology is evolved from the Buck-Boost. Isolation is realized with the powertransformer. The transformer turns ratio brings in more flexibility to optimize the design for duty cycle, stress, efficiency, etc.

It is obvious that the flyback is the simplest and hence the cheapest isolated topology. In contrast, the forward converter needs the following fourextra elements: a tertiary reset winding Nr on the power transformer, a blocking diode in the reset circuit, an additional rectifier diode and aseparate filter inductor in the secondary.

2.3 Forward / Flyback Comparison

This chart summarizes the comparison between the forward and flyback topologies. It is obvious that the flyback is more advantageous over theforward for power levels lower 50W.

2.4 Flyback Converter Characteristics

Advantages:

Uses a coupled inductor to act as an isolation transformer and for energy storage.Input and output grounds are isolated.Voltage Step-down or Step-up by duty cycle and turns ratio.Multiple outputs are easy to implement.Does not need a separate output inductor.Best suited for lower power levels.

Disadvantages:

High output ripple current.High input ripple current.Loop bandwidth may be limited by the Right Half Plan (RHP) Zero.

2.5 Flyback Merits and Applications

Flyback converters use the simplest isolated topology, and thus have the lowest cost.Flyback converters use the least number of power components: 4.The flyback converter is one of the most understood, implemented and supported topologies.Flyback converters provide better cross regulation for slave rails, including bias Vcc rail then other topologies.For these reasons the flyback converter is a good choice for applications in the <50W power range.

3. Flyback Converter Operating Principles

3.1 Key Waveforms

3.2 Study State Analysis

3.3 Study State Analysis Continued

3.1 Key Waveforms

This graphic shows key waveforms of the flyback topology. It is assumed that the converter is in continuous conduction mode, which meansI(Q1)+I(D1) is always greater than zero at any time during steady state operation.

This graphic shows key waveforms of the flyback topology. It is assumed that the converter is in continuous conduction mode, which meansI(Q1)+I(D1) is always greater than zero at any time during steady state operation.

3.2 Study State Analysis

The purpose of steady state analysis is to provide guidance in power component selection. The selection of a power components needs to be madebased on the voltage and current stresses that the part is required to handle. These stresses include the peak voltage, peak current, RMS current,averaged current, ripple current, etc.

3.3 Study State Analysis Continued

More steady state analyses. Note that the average current through the rectifier diode is the loadcurrent Io.

More steady state analyses. Note that the average current through the rectifier diode is the loadcurrent Io.

4. Flyback Converter Design Issues

4.1 Key Design Issues

4.2 Flyback Transformer

4.3 Example - Design Specifications

4.4 Primary Turns Ratio, Core Selection

4.5 Bobbin Area Use

4.6 Secondary Winding

4.7 Copper Losses

4.8 Gapping the Core

4.9 Core Gapping Formula

4.10 Inductance Flow Factor

4.11 Flux and Ripple Calculations

4.12 Auxiliary Winding

4.13 Other Components

4.14 Filter Capacitors

4.1 Key Design Issues

Flyback converter components must be selected that canhandle the necessary current and voltage stresses. Thesestresses are determined by the formulae presented in theprevious chapter.

All of these stresses are transformer related: turns ratio,inductance.

Thus the key component and design issue in the converterdesign is the flyback power transformer which acts as acoupled inductor.

4.2 Flyback Transformer

The basic requirements for a flyback transformer areshown in this graphic. Note that multiple strands of thinwires are required in high switching frequencytransformers due to the skin effects.

4.2 Flyback Transformer

The basic requirements for a flyback transformer areshown in this graphic. Note that multiple strands of thinwires are required in high switching frequencytransformers due to the skin effects.

The high inductance is needed to keep operation incontinuous conduction mode over a wider load range.With higher inductance, the ripple currents in both theprimary and secondary circuit will be lower.

The smaller sized transformer uses less ferrite materialand hence is usually cheaper. It also occupies less boardarea allowing the circuit board to be made more compact.

A rule of thumb is that the transformer dissipation shouldbe limited to less than 3% of the total power. Thedissipation includes both core losses and the copper (or winding) losses.

Copper losses are conduction losses. According to electromagnetic theory, high frequency current tends to flow along a conductor’s surface.Any conductor material deeper than the skin effect depth is virtually a waste and does not help in reducing the winding copper losses. For 100%utilization and hence the minimal copper losses, a winding may need to use multiple strands of thin wires with a diameter not greater than twicethe skin effect depth at the switching frequency.

An example of transformer design will be demonstrated in the following section using an LM5020 Flyback Converter.

Note: Experience, trial-and-error iterations, and lots of trade-offs are all involved in practical transformer designs.

4.3 Example - Design Specifications

A design always starts with design specifications, including the inputvoltage range, power level, output voltage, etc. The duty cycle andswitching frequency are normally predetermined. Generally a switchingfrequency between 200 kHz and 300 kHz is a good compromise betweenthe switching losses and filter requirements.

The usable maximum duty cycle is normally limited by the PWMcontroller. In an LM5020, there are two versions of maximum duty cyclelimit, 50% or 80%. Always leave at least 5% margin in the usablemaximum duty cycle. The margin leaves room for the duty cycle toincrease in response to load variations and hence to maintain the outputregulation.

However, avoid using a very small duty cycle. A very small duty cycle willresult in high RMS, peak and ripple currents. Refer to the steady stateanalyses.

By operating the regulator at a higher frequency, the size of the transformer and filter capacitors can be smaller, but the switching lossesassociated with the turn-on and turn-off of the main switch will be significant and the overall efficiency will be very low. At a lower frequency, theswitching losses become insignificant, but the circuit requires a larger transformer and filter capacitors, and the cost will increase.

4.4 Primary Turns Ratio, Core Selection

Core selection is generally done by trial and error. Verification and refinement of the core selection is always required in each design.

4.5 Bobbin Area Use

The bobbin is a reel frame on which the transformer windings are to be held. Each ferrite core has one or a few matching bobbins for use. The openarea of the bobbin where the windings are held is usually called the bobbin window area. The Fill factor is the ratio of the total wire cross section tothe bobbin window area. Considering the space between the round wire; the space taken by the wire’s insulation coating and the isolation tapebetween the windings, the maximum filter factor should not be greater than 50%.

4.6 Secondary Winding

4.7 Copper Losses

4.8 Gapping the Core

An air gap is normally added to the center leg of the transformer core. The air gap is usually made by grinding down the center leg, or by placing aspacer in between the two halves of the core.

4.9 Core Gapping Formula

Using the this formula, determine the smallest gap that can be used for thecore and material you have chosen where:

Np = Number of primary turns (26)Ipk = Peak primary current in amperes (1.71A X ~1.2)lg = Center leg gap in centimeters (0.0254cm)

Using the this formula, determine the smallest gap that can be used for thecore and material you have chosen where:

Np = Number of primary turns (26)Ipk = Peak primary current in amperes (1.71A X ~1.2)lg = Center leg gap in centimeters (0.0254cm)le = Effective length of core (from manufacturer) in centimeters (4.7)ui = Initial permeability (ur, from manufacturer, 2,000)

Don’t go any higher than where the amplitude permeability decreases by more than 10% on the 100&degC curve. But stay close, it is the deltaflux density that causes losses, not the DC.

Now the inductance and several other parameters can be determined to verify that the design is viable.

4.10 Inductance Flow Factor

The gap changes the inductance factor of the core. The new inductance factor must also take into account fringe flux factor. Solving theequations given below will provide values for these variables:

Ae = Effective cross sectional area of core in centimeters² (0.31)Ve = Effective volume of core in centimeters³ (1.460)G = Length of centerpost in centimeters (1.54)Al = Inductance factor in nHLp = Inductance of primary in Henriesue = Effective permiability

4.11 Flux and Ripple Calculations

Additional calculations must be made to determine that the delta flux and ripple are not excessive.

Pin = Maximum power through the transformer (18W)Duty = Maximum duty cycle(0.42)Vbus = Minimum input voltage (25)Imid = Average current during primary duty cycleSlope = Vbus divided by inductanceIpk = Peak current during primary duty cycleImin = Minimum current during primary duty cyclefsw = Switching frequency

The estimated core losses from the manufactures data = 0.06W and is acceptable.

4.12 Auxiliary Winding

An additional supply typically needs to be provided for the control circuitry and must bein phase with the secondary for regulation. The turns ratio between the secondary andthe auxiliary winding determines the auxiliary voltage. For this transformer, 18 turns of36 AWG was chosen to provide a ratio of 3:1.

4.12 Auxiliary Winding

An additional supply typically needs to be provided for the control circuitry and must bein phase with the secondary for regulation. The turns ratio between the secondary andthe auxiliary winding determines the auxiliary voltage. For this transformer, 18 turns of36 AWG was chosen to provide a ratio of 3:1.

The LM5020’s internal startup regulator produces a Vcc of 7.7V for the controller to use. However, since the startup regulator is powered fromhigh input voltage, its efficiency is low, and the loss will heat up the controller IC. Using a bias winding to produce an elevated Vcc at about 11Vwill block the internal startup regulator, provide an optimal gate drive voltage of about 10V, and improve the efficiency. Higher Vcc is notrecommended as it will increase the power dissipation in the IC and the gate drive, and may even damage the Vcc pin due to excessive voltagestress.

4.13 Other Components

Other power component selections:

Use the formulas given previously to calculate the stresses and select the MOSFET anddiode accordingly. Select the filter capacitor according to the ripple requirements.

Equivalent Series Resistance (ESR) plays a role.Try use at least one ceramic.Avoid excessive capacitance.

Large cap slow down startup.Large cap may appear like an overload condition at startup.

4.14 Filter Capacitors

It is recommended that a combination of ceramic and aluminum electrolytic capacitors be used for both the input and output filters. The combinationwill provide the advantages of both parts: the low ESR of the ceramic capacitor for ripple reduction, and the high capacitance of the aluminumelectrolytic capacitor for hold up time.

5. Controller Selection

5. Controller Selection

5.1 Controller Choices

5.2 Current Mode vs. Voltage Mode

5.3 LM5020 Controller

5.4 Load Compensation

5.5 Right Half Plan (RHP) Zero

5.6 Slope Compensation

5.7 LM5020 Slope Compensation

5.8 Loop Compensation

5.9 Error Amplifier Design

5.10 Loop Gain Results

5.1 Controller Choices

Selection of the power circuit components is only half of the design. The other half is the selection of the control circuitry.

Considerations for the flyback converter controller:

Voltage mode or current modeHighly Integration of common functions is desireable:

input under-voltage lockoutstartup regulatorclockingerror amplifieretc.

5.2 Current Mode vs. Voltage Mode

Due to advantages such as cycle-by-cycle peak current limit, inherent voltage, inherent voltage feed forward and simplified loop compensation,the current mode control is normally selected as the control scheme for flyback regulators.

5.3 LM5020 Controller

The control circuit of a switching regulator might look complex when considering all the functions to fulfill. However, the high integration of theLM5020 provides great convenience in design, and helps to minimize the number of external components to be used.

5.3 LM5020 Controller

The control circuit of a switching regulator might look complex when considering all the functions to fulfill. However, the high integration of theLM5020 provides great convenience in design, and helps to minimize the number of external components to be used.

LM5020 Features:

Internal Start-up Bias RegulatorUnder Voltage Lockout with Adjustable HysteresisCurrent Mode ControlInternal Slope CompensationInternal EA to support non-isolated applications.Cycle-by-Cycle Over-Current Protection1Amp Peak Gate Driver,/li>Maximum Duty Cycle Limiter, 80% or 50%Leading Edge BlankingProgrammable Soft-StartProgrammable Oscillator with Sync CapabilityDirect Optocoupler InterfaceThermal Shutdown (165&degC)Ideal for forward, flyback and buck topologies

The core of LM5020 is employed by the Power Over Eithernet (PoE) IC LM5070/71/72.

5.4 Load Compensation

Proper loop compensation is critical to output regulation accuracy as well as stability and dynamic performance like the step load response.

5.5 Right Half Plan (RHP) Zero

The physical Nature of the RHP zero:

With upward step load, secondary current is supposed to increase, but:

Vo will drop temporarily.Duty cycle will increase in response.Secondary current pulse will be cut short.Secondary current is reduced, instead.

It will eventually catch up, but momentarily the response walks in theopposite direction.

This is in conflict with what is desired, and is represented as a RHP zero.The Right Half Plan (RHP) zero complicates the loop compensation.

When the load decreases, i.e. Ro increases, the RHP Zero movestoward the higher frequency range.

When the duty cycle decreases, i.e. the input voltage increases, the RHPZero moves to a higher frequency.

When the load decreases, i.e. Ro increases, the RHP Zero movestoward the higher frequency range.

When the duty cycle decreases, i.e. the input voltage increases, the RHPZero moves to a higher frequency.

An extremely large inductance results in a lower RHP Zero. → Bereasonable.

Therefore, the worst case to consider is the maximum power at theminimum input voltage.

Vin_min = 30V → RHP_Zero_min = 23 kHz

Vin = 48V → RHP_Zero = 57 kHz

Maximum loop bandwidth: 1/3 of 23 kHz → about 8 kHz; or 1/6 of Fsw, whichever is lower.

5.6 Slope Compensation

Background: Current mode controlled power converters operating at duty cycles>50% are prone to sub-harmonic oscillation. Disturbances in peak rising current(D I) increase at the end of the cycle.

Solution: Slope compensation: adding a slope to the current signal, whichis equivalent to subtracting a slope from the error voltage (Ve). Then thedisturbance decreases at the end of the cycle.

5.7 LM5020 Slope Compensation

The LM5020 and LM507x are available with a duty cycle limit of either 50% or 80%. Aslope compensation circuit is included on the 80% versions (-1 or -80).

5.8 Loop Compensation

Refering to the graph shown below, the green line represents the loop compensation goal. The blue line is the measured gain of the power stage,from the output of the error amplifier (COMP pin) to the output. The red line is the phase of the power stage. The difference between the green andblue lines is the required compensation that must be provided by the error amplifier.

5.9 Error Amplifier Design

The required compensation can be achieved by using a Type 2 error amplifier, as shown in the graphic. A Type 2 error amplifier brings in a pole atthe Origin to boost the dc gain, a zero at mid frequency to compensate the gain at cross-over, and a second pole at a higher frequency to attenuatethe switching noise.

5.10 Loop Gain Results

The graphic below shows the test results for the LM5020 demo board. The blue line is the total loop gain, and red line is the total loop phase. Thecross-over frequency is at 9 kHz, and the phase margin is 52 degrees. This represents an optimal loop design.

6. Flyback Circuit Examples

6.1 Isolated Flyback Design

6.2 Non-isolated Flyback Design

6.3 Sync Rectifier Modification

6.4 LM5020 Demo Board

6.5 Demo Board Efficiency

6.6 Primary Switch Drain Voltage

6.7 Ripple Voltage

6.1 Isolated Flyback Design

The circuit shown below is based on the LM5020 Demo Board.

6.2 Non-isolated Flyback Design

6.3 Sync Rectifier Modification

When high efficiency is required, the synchronous rectifier should be used. In the graphic below, Q2 is the main switch, Q5 is the sync FET. D3 andD4 are two small p-channel MOSFETs used to achieve fast turn-off of Q2 and Q5 respectively. By fast turn-off, the cross conduction of Q2 and Q5is eliminated. Otherwise the cross conduction would cause significant power loss.

Note: Self driving of the sync FET, i.e. driving the FET with an additional transformer winding, is possible and would cost less. However, theperformance would not be as good as that achieved with the circuit shown in the graphic.

6.4 LM5020 Demo Board

Performance:

Input Range: 30 to 75V

Output Voltage: 3.3V

Output Current: 0 to 4.5A

Board Size: 2.3 x 1.0 x 0.55 (Components on single side)

Operating Frequency 250 KHz

UVLO

Current Limit Protection

Common Input and Output Grounding

6.5 Demo Board Efficiency

Note the power loss breakdown. 83% is a decent efficiency in this design, considering there is about a 12% efficiency drop caused by therectifier diode. To further improve the efficiency, the best approach is to replace the diode with a sync FET.

6.6 Primary Switch Drain Voltage

6.6 Primary Switch Drain Voltage

6.7 Ripple Voltage

Note: Ripple is a matter of filtering, not a problem of the controller. Filter components and layout both contribute to filtering performance.

7. Conclusions

7.1 Conclusions

7.1 Conclusions

The Flyback topology is the simplest topology for isolated power supplies. Most applications are in telecommunication and PoE, in which thepower level is below 50W.

Flyback operating principles were discussed, and steady state analysis presented to provide design guidelines.

Key design issue is the flyback power transformer.

The Flyback topology is the simplest topology for isolated power supplies. Most applications are in telecommunication and PoE, in which thepower level is below 50W.

Flyback operating principles were discussed, and steady state analysis presented to provide design guidelines.

Key design issue is the flyback power transformer.

Design was demonstrated using an example.

Loop compensation is straightforward.

The National LM5020, and the LM507x series which is based on the LM5020, provide convenience in design.

BGA

Ball Grid Array

CSP

Chip Scale Packaging - A direct surface mount package with an area no more than 1.2 times the die area.

DIP

Dual In-line Package

FBGA

Fine pitch Ball Grid Array

MEMS

Micro Electro Mechanical Systems - Micrometer size mechanical devices (i.e. pressure sensor) combined with elecrical components on a die.

MSOP

Mini Small Outline Package

PGA

Pin Grid Array

QFP

Quad Flat Pack

SOP

Small Outline Package

SSOP

Shrink Small Outline Package

Substrate

A small glass or epoxy board used in high pin count packages in place of a leadframes. It is similar to a printed circuit board in that it hasconducting traces on one side and contact pads on the other. The traces are connected to the pads with vias. Substrates are used in packagessuch as BGAs, FBGAs and Laminated CSPs.

TQFP

Thin Quad Flat Pack

TSSOP

Thin Shrink Small Outline Package

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Thank you,PowerWise Design University Team Flyback Converter Copyright © 2010 by National Semiconductor All rights reserved