25826602-philips-ch-q549-3e-la
TRANSCRIPT
Published by ER/EL 0968 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18321
2009-Aug-07
©Copyright 2009 Koninklijke Philips Electronics N.V.All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.
Colour Television Chassis
Q549.3ELA
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Contents Page Contents Page1. Revision List 22. Technical Specifications and, Connections 23. Precautions, Notes, and Abbreviation List 54. Mechanical Instructions 95. Service Modes, Error Codes, and Fault Finding 146. Alignments 347. Circuit Descriptions 408. IC Data Sheets 519. Block Diagrams
Wiring Diagram 40" (Elite Premium) 57Wiring Diagram 46" (Elite Premium) 58Wiring Diagram 52" (Elite Premium) 59Block Diagram Video 60Block Diagram Audio 61Block Diagram Control & Clock Signals 62Block Diagram I2C 63Supply Lines Overview 64
10. Circuit Diagrams and PWB Layouts Drawing PWBInterface Ambilight: Interf + Single DC-DC (AB1) 65 68Interface Ambilight: Dual DC-DC (AB2) 66 68Interface Ambilight: Microcontrollerblock (AB3) 67 686 LED Low-Pow: Microcontroller Block (AL1) 69 726 LED Low-Pow: Microcontroller Block (AL2) 70 726 LED Low-Pow: LED Liteon (AL3) 71 728 LED Low-Pow: Microcontroller Block (AL1) 73 778 LED Low-Pow: Microcontroller Block (AL2) 74 778 LED Low-Pow: LED Liteon (AL3) 75 778 LED Low-Pow: LED Drive Liteon (AL4) 76 7710 LED Low-Pow: Microcontroller Block (AL1) 78 8210 LED Low-Pow: Microcontroller Block (AL2) 79 8210 LED Low-Pow: LED Liteon (AL3) 80 8210 LED Low-Pow: LED Drive Liteon (AL4) 81 8212 LED Low-Pow: Microcontroller Liteon (AL1) 83 8712 LED Low-Pow: Microcontroller Liteon (AL2) 84 87
12 LED Low-Pow: LED Liteon (AL3) 85 8712 LED Low-Pow: LED Drive (AL4) 86 87SSB (B01A-B10) 88-136 140-141SSB: SRP List Explanation 137SSB: SRP List Part 1 138SSB: SRP List Part 2 139Wi-Fi Antenna 142 142
Revision ListEN 2 Q549.3E LA1.
2009-Aug-07
1. Revision ListManual xxxx xxx xxxx.0• First release.
Manual xxxx xxx xxxx.1• All Chapters: added the following sets to the manual: see
Table 2-1 Described Model numbers.
2. Technical Specifications and, Connections
Index of this chapter:2.1 Technical Specifications2.2 Directions for Use2.3 Connections2.4 Chassis Overview
Notes:• Figures can deviate due to the different set executions.• Specifications are indicative (subject to change).
2.1 Technical Specifications
For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.
Table 2-1 Described Model numbers
2.2 Directions for Use
You can download this information from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com
CTN Styling Published in:
40PFL9704H/12 Elite Premium 3122 785 18320
40PFL9704H/60 3122 785 18320
46PFL9704H/12 3122 785 18321
46PFL9704H/60 3122 785 18320
52PFL9704H/12 3122 785 18320
Technical Specifications and, Connections EN 3Q549.3E LA 2.
2009-Aug-07
2.3 Connections
Figure 2-1 Connection overview
Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.1 Side Connections
Common Interface68p- See diagram B07A SSB: CI: PCMCIA
Connector ��
HDMI SIDE: Digital Video, Digital Audio - In (see HDMI 1, 2, 3 & 4 - Rear Connections)
USB2.0
Figure 2-2 USB (type A)
1 - +5V �2 - Data (-) ��
3 - Data (+) ��
4 - Ground Gnd �
Head phone (Output)Bk - Head phone 32 - 600 ohm / 10 mW ��
Cinch: Video CVBS - In, Audio - InRd - Audio R 0.5 VRMS / 10 kohm ��
Wh - Audio L 0.5 VRMS / 10 kohm ��
Ye - Video CVBS 1 VPP / 75 ohm ��
S-Video (Hosiden): Video Y/C - In1 - Ground Y Gnd �
2 - Ground C Gnd �3 - Video Y 1 VPP / 75 ohm �
4 - Video C 0.3 VPP / 75 ohm �
2.3.2 Rear Connections
Service Connector (UART)1 - Ground Gnd �
2 - UART_TX Transmit �3 - UART_RX Receive �
VGA: Video RGB - In
Figure 2-3 VGA Connector
1 - Video Red 0.7 VPP / 75 ohm �
2 - Video Green 0.7 VPP / 75 ohm �3 - Video Blue 0.7 VPP / 75 ohm �
4 - n.c. 5 - Ground Gnd �
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Technical Specifications and, ConnectionsEN 4 Q549.3E LA2.
2009-Aug-07
6 - Ground Red Gnd �
7 - Ground Green Gnd �
8 - Ground Blue Gnd �9 - +5VDC +5 V �
10 - Ground Sync Gnd �
11 - n.c. 12 - DDC_SDA DDC data �
13 - H-sync 0 - 5 V �
14 - V-sync 0 - 5 V �15 - DDC_SCL DDC clock �
Cinch: S/PDIF - OutBk - Coaxial 0.4 - 0.6VPP / 75 ohm ��
Cinch: Audio - OutRd - Audio - R 0.5 VRMS / 10 kohm ��
Wh - Audio - L 0.5 VRMS / 10 kohm ��
EXT3: Cinch: Video YPbPr - In, Audio - InGn - Video Y 1 VPP / 75 ohm ��
Bu - Video Pb 0.7 VPP / 75 ohm ��Rd - Video Pr 0.7 VPP / 75 ohm ��
Rd - Audio - R 0.5 VRMS / 10 kohm ��
Wh - Audio - L 0.5 VRMS / 10 kohm ��
EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out
Figure 2-4 SCART connector
1 - Audio R 0.5 VRMS / 1 kohm �
2 - Audio R 0.5 VRMS / 10 kohm �
3 - Audio L 0.5 VRMS / 1 kohm �4 - Ground Audio Gnd �
5 - Ground Blue Gnd �
6 - Audio L 0.5 VRMS / 10 kohm �7 - Video Blue 0.7 VPP / 75 ohm ��
8 - Function Select 0 - 2 V: INT4.5 - 7 V: EXT 16:99.5 - 12 V: EXT 4:3 �
9 - Ground Green Gnd �
10 - n.c. 11 - Video Green 0.7 VPP / 75 ohm �
12 - n.c. 13 - Ground Red Gnd �14 - Ground P50 Gnd �
15 - Video Red 0.7 VPP / 75 ohm �
16 - Status/FBL 0 - 0.4 V: INT1 - 3 V: EXT / 75 ohm �
17 - Ground Video Gnd �
18 - Ground FBL Gnd �19 - Video CVBS/Y 1 VPP / 75 ohm �
20 - Video CVBS 1 VPP / 75 ohm �
21 - Shield Gnd �
RJ45: Ethernet (if present)
Figure 2-5 Ethernet connector
1 - TD+ Transmit signal �2 - TD- Transmit signal �
3 - RD+ Receive signal �
4 - CT Centre Tap: DC level fixation5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal �
7 - GND Gnd �8 - GND Gnd �
Cinch: Audio - In (VGA/DVI)Rd - Audio R 0.5 VRMS / 10 kohm ��Wh - Audio L 0.5 VRMS / 10 kohm ��
HDMI 1, 2, 3 & 4: Digital Video, Digital Audio - In
Figure 2-6 HDMI (type A) connector
1 - D2+ Data channel �
2 - Shield Gnd �3 - D2- Data channel �
4 - D1+ Data channel �
5 - Shield Gnd �6 - D1- Data channel �
7 - D0+ Data channel �
8 - Shield Gnd �9 - D0- Data channel �
10 - CLK+ Data channel �
11 - Shield Gnd �12 - CLK- Data channel �
13 - Easylink/CEC Control channel ��
14 - n.c. 15 - DDC_SCL DDC clock �
16 - DDC_SDA DDC data ��
17 - Ground Gnd �18 - +5V �
19 - HPD Hot Plug Detect �
20 - Ground Gnd �
Aerial - In- - IEC-type (EU) Coax, 75 ohm �
2.4 Chassis Overview
Refer to chapter Block Diagrams for PWB/CBA locations.
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Precautions, Notes, and Abbreviation List EN 5Q549.3E LA 3.
2009-Aug-07
3. Precautions, Notes, and Abbreviation List
Index of this chapter:3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).• Replace safety components, indicated by the symbol ,
only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the
mounted cable clamps.• Check the insulation of the Mains/AC Power lead for
external damage. • Check the strain relief of the Mains/AC Power cord for
proper function.• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any inner parts by the customer.
3.2 Warnings
• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD ). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.
• Be careful during measurements in the high voltage section.
• Never replace modules or other components while the unit is switched “on”.
• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3 Notes
3.3.1 General
• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (�), or hot ground (�), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).
• Where necessary, measure the waveforms and voltages with (�) and without (�) aerial signal. Measure the voltages in the power supply section both in normal operation ( ) and in stand-by (�). These values are indicated by means of the appropriate symbols.
3.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).
• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
• All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.
• The correct component values are listed on the Philips Spare Parts Web Portal.
3.3.3 Spare Parts
For the latest spare part overview, consult your Philips Spare Part web portal.
3.3.4 BGA (Ball Grid Array) ICs
IntroductionFor more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
BGA Temperature ProfilesFor BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
3.3.5 Lead-free Soldering
Due to lead-free technology some rules have to be respected by the workshop during a repair:• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:– To reach a solder-tip temperature of at least 400°C.– To stabilize the adjusted temperature at the solder-tip.– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
Precautions, Notes, and Abbreviation ListEN 6 Q549.3E LA3.
2009-Aug-07
3.3.6 Alternative BOM identification
It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number.By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
Figure 3-1 Serial number (example)
3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)
If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!
3.3.8 Practical Service Precautions
• It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
3.4 Abbreviation List
0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format
AARA Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio
ACI Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page
ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control
signal used to tune to the correct frequency
AGC Automatic Gain Control: algorithm that controls the video input of the feature box
AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black bars without discarding video information
ATSC Advanced Television Systems Committee, the digital TV standard in the USA
ATV See Auto TVAuto TV A hardware and software control
system that measures picture content, and adapts image parameters in a dynamic way
AV External Audio VideoAVC Audio Video ControllerAVIP Audio Video Input ProcessorB/G Monochrome TV system. Sound
carrier distance is 5.5 MHzBLR Board-Level RepairBTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries
B-TXT Blue TeleteXTC Centre channel (audio)CEC Consumer Electronics Control bus:
remote control bus on HDMI connections
CL Constant Level: audio output to connect with an external amplifier
CLR Component Level RepairComPair Computer aided rePairCP Connected Planet / Copy ProtectionCSM Customer Service ModeCTI Color Transient Improvement:
manipulates steepness of chroma transients
CVBS Composite Video Blanking and Synchronization
DAC Digital to Analogue ConverterDBE Dynamic Bass Enhancement: extra
low frequency amplificationDDC See “E-DDC”D/K Monochrome TV system. Sound
carrier distance is 6.5 MHzDFI Dynamic Frame InsertionDFU Directions For Use: owner's manualDMR Digital Media Reader: card readerDMSD Digital Multi Standard DecodingDNM Digital Natural Motion
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Precautions, Notes, and Abbreviation List EN 7Q549.3E LA 3.
2009-Aug-07
DNR Digital Noise Reduction: noise reduction feature of the set
DRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote
control designed for service technicians
DTCP Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394
DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel
(VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display.
EDID Extended Display Identification Data (VESA standard)
EEPROM Electrically Erasable and Programmable Read Only Memory
EMI Electro Magnetic InterferenceEPLD Erasable Programmable Logic DeviceEU EuropeEXT EXTernal (source), entering the set by
SCART or by cinches (jacks)FDS Full Dual Screen (same as FDW)FDW Full Dual Window (same as FDS)FLASH FLASH memoryFM Field Memory or Frequency
ModulationFPGA Field-Programmable Gate ArrayFTV Flat TeleVisionGb/s Giga bits per secondG-TXT Green TeleteXTH H_sync to the module HD High DefinitionHDD Hard Disk DriveHDCP High-bandwidth Digital Content
Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding.
HDMI High Definition Multimedia InterfaceHP HeadPhoneI Monochrome TV system. Sound
carrier distance is 6.0 MHzI2C Inter IC busI2D Inter IC Data busI2S Inter IC Sound busIF Intermediate FrequencyIR Infra RedIRQ Interrupt RequestITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.
ITV Institutional TeleVision; TV sets for hotels, hospitals etc.
LS Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences
LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I
LPL LG.Philips LCD (supplier)LS LoudspeakerLVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound
carrier distance is 4.5 MHzMIPS Microprocessor without Interlocked
Pipeline-Stages; A RISC-based microprocessor
MOP Matrix Output ProcessorMOSFET Metal Oxide Silicon Field Effect
Transistor, switching deviceMPEG Motion Pictures Experts GroupMPIF Multi Platform InterFaceMUTE MUTE LineNC Not ConnectedNICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital sound system, mainly used in Europe.
NTC Negative Temperature Coefficient, non-linear resistor
NTSC National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)
NVM Non-Volatile Memory: IC containing TV related data such as alignments
O/C Open CircuitOSD On Screen DisplayOTC On screen display Teletext and
Control; also called Artistic (SAA5800)P50 Project 50: communication protocol
between TV and peripheralsPAL Phase Alternating Line. Color system
mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz)
PCB Printed Circuit Board (same as “PWB”)PCM Pulse Code ModulationPDP Plasma Display PanelPFC Power Factor Corrector (or Pre-
conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer can give directly the desired frequency
POD Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set)
POR Power On Reset, signal to reset the uPPTC Positive Temperature Coefficient,
non-linear resistorPWB Printed Wiring Board (same as “PCB”)
Precautions, Notes, and Abbreviation ListEN 8 Q549.3E LA3.
2009-Aug-07
PWM Pulse Width ModulationQRC Quasi Resonant ConverterQTNR Quality Temporal Noise ReductionQVCP Quality Video Composition ProcessorRAM Random Access MemoryRGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced.
RC Remote ControlRC5 / RC6 Signal protocol from the remote
control receiver RESET RESET signalROM Read Only MemoryRSDS Reduced Swing Differential Signalling
data interfaceR-TXT Red TeleteXTSAM Service Alignment ModeS/C Short CircuitSCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et Téléviseurs
SCL Serial Clock I2CSCL-F CLock Signal on Fast I2C busSD Standard DefinitionSDA Serial Data I2CSDA-F DAta Signal on Fast I2C busSDI Serial Digital Interface, see “ITU-656”SDRAM Synchronous DRAMSECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate FrequencySMPS Switched Mode Power SupplySoC System on ChipSOG Sync On GreenSOPS Self Oscillating Power SupplySPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link standard
S/PDIF Sony Philips Digital InterFaceSRAM Static RAMSRP Service Reference ProtocolSSB Small Signal BoardSTBY STand-BYSVGA 800 × 600 (4:3)SVHS Super Video Home SystemSW SoftwareSWAN Spatial temporal Weighted Averaging
Noise reductionSXGA 1280 × 1024TFT Thin Film TransistorTHD Total Harmonic DistortionTMDS Transmission Minimized Differential
SignallingTXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP MicroprocessorUXGA 1600 × 1200 (4:3)V V-sync to the module VESA Video Electronics Standards
AssociationVGA 640 × 480 (4:3)VL Variable Level out: processed audio
output toward external amplifierVSB Vestigial Side Band; modulation
methodWYSIWYR What You See Is What You Record:
record selection that follows main picture and sound
WXGA 1280 × 768 (15:9)XTAL Quartz crystalXGA 1024 × 768 (4:3)
Y Luminance signalY/C Luminance (Y) and Chrominance (C)
signalYPbPr Component video. Luminance and
scaled color difference signals (B-Y and R-Y)
YUV Component video
Mechanical Instructions EN 9Q549.3E LA 4.
2009-Aug-07
4. Mechanical Instructions
Index of this chapter:4.1 Cable Dressing4.2 Service Positions4.3 Assy/Panel Removal4.4 Set Re-assembly
Notes: • Figures below can deviate slightly from the actual situation,
due to the different set executions.
4.1 Cable Dressing
Figure 4-1 Cable dressing 40”
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Mechanical InstructionsEN 10 Q549.3E LA4.
2009-Aug-07
Figure 4-2 Cable dressing 46"
Figure 4-3 Cable dressing 52"
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S lave
8153
IO p
late
S S B
1G51
1M95
1M99
1M 59
1G50 41
p51
p
1M 71
7p
1735
1M20
8p12
p11
p
1M 01 3p
1F02
1F01
F an con tro l o r tem p sensor
4pF an supp ly 3p
1F53
Con
ditio
nnal
acc
ess
V GA
USB
HDM
IC
inch
( x3
)SV
HS
P hono
51P 101
12 V D C /D C + µP
1M 59
14p
6P
1M84
1M 90
Led1M 201M 01
RTW R
V LA NV LA N
1M01
LTW L
L P 1 M831 M84
L P 1 M84 1M 83
L P
1M84
1M83
L P
1M84
1M83
L P 1M 831 M84
8587
L P
1M83
1M84
L P
1M83
1M84
1 4p
12p
14p
18320_202_090728.eps090728
S S B
In let
1G 511M 951M 99
1M59
1G 50
81208101
8316
8319
8159
8150
8151
8399
8395
8408
41p51p
41p 51p
1M71
4p
L ed1M 201M 01
1735
1M 20
8p
12 V D C /D C + µP
1M 59
8735
14p
12p14p
6P
L P
L P
1M84
1M83
1M84
1M83
8 585
V LA N
Ticon
8584
868312p
8590
1M84
1M 90
11p
8802 8801L
TW R
RTW L
1 M01
C trl b o ard 3p
1F02
1F01
Display Ctrl 14p
1.25mm
Fan control or tem
p sensor4p
Fan supply 3p
L P L P L P 1 M831 M84 1M 84 1 M83 1 M84 1M83
85898586
8587
1F53
8 153
14p
1M01
Con
trol
M aster
S lave C o n d itio n n a l access
VGA
U S BH D M I C in ch ( x3)S V H S
Phono
51P101
V LA N
L P
L P
1M84
1M83
8 588
1M83
1M84
1M 83
U SB
Con
trol
P S U
CN4
CN5
C N2 C N3
C N1
CN7
5P
CN9
6 P in 24V
3pC N8
4p
CN6
11p
12p
14p 12p
Mechanical Instructions EN 11Q549.3E LA 4.
2009-Aug-07
4.2 Service Positions
For easy servicing of this set, there are a few possibilities created:• The buffers from the packaging.• Foam bars (created for Service).
4.2.1 Foam Bars
Figure 4-4 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-4 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display.Caution: Failure to follow these guidelines can seriously damage the display!By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.
4.3 Assy/Panel Removal
4.3.1 Rear Cover
Warning: Disconnect the mains power cord before you remove the rear cover.Note: Except for the 52" sets, it is not necessary to remove the stand while removing the rear cover.
Removing the Piezo Touch Control Panel PWB requires special attention. Refer to Piezo Touch Control Panel for details.
1. Remove all screws of the rear cover.2. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from the set.
4.3.2 Speakers
Each speaker unit is mounted with two screws. A sticker on the the unit indicates if it is the right (“R”) or left (“L”) box, seen from the front side of the set.When defective, replace the whole unit.
4.3.3 Ambi Light
Each Ambi Light unit is mounted on a subframe. Refer to Figure 4-5 for details.
Figure 4-5 Ambi Light unit
1. Remove the Ambi Light cover [1].2. Unplug the connector(s).3. The PWB can now be taken from the subframe.When defective, replace the whole unit.Note: the screws that secure the AmbiLight units are longer than the other screws.
4.3.4 Main Supply Panel
1. Unplug all connectors.2. Remove the fixation screws.3. Take the board out.When defective, replace the whole unit.
4.3.5 IR & LED Board
Refer to Figure 4-6 for details.
E_06532_018.eps171106
1
Required for sets42"
1
18310_212_090318.eps090319
1
Mechanical InstructionsEN 12 Q549.3E LA4.
2009-Aug-07
Figure 4-6 IR & LED Board
1. Remove the Main Supply Panel as earlier described.2. Remove the stand [1] and its subframe [2].3. Now you gain access the IR & LED board.When defective, replace the whole unit.
4.3.6 Piezo Touch Control Panel
The flexfoil between Piezo Flexfoil Assy (mounted on the plastic rim of the set), and the PWB as described below, is extremely vulnerable. Do not pull hard at the PWB or flexfoil.Once the flexfoil has been damaged, the entire plastic rim of the set (with the touch-control pads) has to be swapped!
The Piezo Touch Control Panel PWB contains ESD sensitive components, implying that necessary industrial ESD precautions must be taken during removing or remounting.Refer to Figure 4-7, Figure 4-8 and Figure 4-9 for details.
Figure 4-7 Piezo Touch Control Panel -1-
1. Gently pull the bottom side of the PWB out of the cabinet until you can unplug the connector [1].
Figure 4-8 Piezo Touch Control Panel -2-
1. Now gently pull the top side of the PWB out of the cabinet without damaging the flexfoil until you can unplug the connector [2].
Figure 4-9 Piezo Touch Control Panel -3-
1. To unplug the flexfoil connector, first the outer part of the connector has to be moved upwards [3], before this part can be turned sidewards [4] as shown in the picture. Now the flexfoil can be removed from the connector and the PWB can be taken out of the set.
When defective, replace the whole unit.
4.3.7 Small Signal Board (SSB)
Caution: It is mandatory to remount screws at their original position during re-assembly. Failure to do so may result in damaging the SSB.1. Remove the Wi-Fi module that is mounted on the SSB.2. Unplug all connectors.3. Remove the screws that secure the board.4. The SSB can now be taken out of the set.
4.3.8 LCD Panel
Refer to Figure 4-10 and Figure 4-11 for details.1. Remove the Piezo Touch Control Panel PWB as earlier
described.2. Remove the AL covers as earlier described.3. Remove both Main Supply Panel and SSB as earlier
described.4. Remove the subframes of Main Power Supply and SSB [1].
18310_213_090318.eps090319
2
1
2
2
18310_214_090318.eps090319
1
18310_216_090318.eps090319
2
18310_215_090318.eps090319
34
Mechanical Instructions EN 13Q549.3E LA 4.
2009-Aug-07
5. Remove both AL subframes (with the AL unit still mounted on it) by unplugging the connector [2] and removing the screws [3].
6. Remove all remaining adhesive tapes and remove all cables from their clamps.
7. Carefully remove the conducting tape [4], it must be re-used during re-assembly!
8. Remove the remaining screws (indicated with an arrow) that hold the plastic rim and remove the rim.
9. Now the LCD Panel can be lifted from the front cabinet. The panel has to be slided downwards once it has been lifted, because the brackets on the top cannot be removed from the cabinet. You will see a conducting foam between metal front and panel, near the location of the Piezo Touch Control Panel.
When mounting a new LCD Panel:1. Check if this conducting foam between panel and metal
front is in place !2. Re-attach the conducting tape between LCD Panel and
metal rim [4] !
Figure 4-10 LCD Panel -1-
Figure 4-11 LCD Panel -2-
4.3.9 Wi-Fi antenna
Follow the instructions for LCD Panel until “remove plastic rim”. After removal of this rim, you gain access to the Wi-Fi antennas.
4.4 Set Re-assembly
To re-assemble the whole set, execute all processes in reverse order.
Notes:• While re-assembling, make sure that all cables are placed
and connected in their original position. • Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
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2
Service Modes, Error Codes, and Fault FindingEN 14 Q549.3E LA5.
2009-Aug-07
5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:5.1 Test Points5.2 Service Modes5.3 Stepwise Start-up5.4 Service Tools5.5 Error Codes5.6 The Blinking LED Procedure5.7 Protections5.8 Fault Finding and Repair Tips5.9 Software Upgrading
5.1 Test Points
As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions:• Service Default Mode.• Video: Colour bar signal.• Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer. This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair”).
Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).
5.2.1 Service Default Mode (SDM)
Purpose• To create a pre-defined setting, to get the same
measurement results as given in this manual.• To override SW protections detected by stand-by
processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3 Stepwise Start-up”.
• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes”).
Specifications
Table 5-1 SDM default settings
• All picture settings at 50% (brightness, colour, contrast).• All sound settings at 50%, except volume at 25%.
• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer.– Child/parental lock.– Picture mute (blue mute or black mute).– Automatic volume levelling (AVL).– Skip/blank of non-favourite pre-sets.
How to Activate SDM
For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according Table 5-1.• Analog SDM: use the standard RC-transmitter and key in
the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU”(or HOME) button again.
• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button.Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.
• Analog SDM can also be activated by grounding for a moment the solder pad on the SSB, with the indication “SDM” (see figure Service mode pad).
Figure 5-1 Service mode pad
After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).
How to NavigateWhen the “MENU” (or HOME) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.
How to Exit SDMUse one of the following methods:• Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”-
sequence.
5.2.2 Service Alignment Mode (SAM)
Purpose• To perform (software) alignments.• To change option settings.• To easily identify the used software version.
Region Freq. (MHz)Default system
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07
DVB-T
18310_219_090318.eps090319
SDM
Service Modes, Error Codes, and Fault Finding EN 15Q549.3E LA 5.
2009-Aug-07
• To view operation hours.• To display (or clear) the error code buffer.
How to Activate SAMVia a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.
Contents of SAM (see also Table 6-4)• Hardware Info.
– A. SW Version. Displays the software version of the main software (example: Q5492-1.2.3.4 = AAAAB_X.Y.W.Z). • AAAA= the chassis name.• B= the SW branch version. This is a sequential
number (this is no longer the region indication, as the software is now multi-region).
• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).
– B. STBY PROC Version. Displays the software version of the stand-by processor.
– C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.
• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.
• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes”).
• Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset.
• Alignments. This will activate the “ALIGNMENTS” sub-menu. See Chapter 6. Alignments.
• Dealer Options. Extra features for the dealers.• Options. Extra features for Service. For more info
regarding option codes, 6. Alignments.Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.
• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment):– Save the content of the NVM via ComPair for
development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).
– Initialize the NVM.
Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct HEX values for the options can be found in Chapter 6. Alignments) or a method via a standard RC (described below).
Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-3). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the
TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.
Figure 5-2 Location of Display Option Code sticker
• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.
• SW Maintenance.– SW Events. Not useful for Service purposes. In case
of specific software problems, the development department can ask for this info.
– HW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info.
• Operation hours display. Displays the accumulated total of display operation hours. So, this one keeps up the lifetime of the display itself, mainly to compensate the degeneration behaviour.
• Test settings. For development purposes only.• Development file versions. Not useful for Service
purposes, this information is only used by the development department.
• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.
• Download to USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this info.
How to Navigate• In SAM, the menu items can be selected with the
“CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.
• With the “CURSOR LEFT/RIGHT” keys, it is possible to:– (De) activate the selected menu item.– (De) activate the selected sub menu.
PHILIPSMODEL:32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001
040
39mm
27m
m
(CTN Sticker)
Display OptionCode
E_06532_038.eps240108
Service Modes, Error Codes, and Fault FindingEN 16 Q549.3E LA5.
2009-Aug-07
• With the “OK” key, it is possible to activate the selected action.
How to Exit SAMUse one of the following methods:• Switch the TV set to STAND-BY via the RC-transmitter.• Via a standard RC-transmitter, key in “00” sequence, or
select the “BACK” key.
5.2.3 Customer Service Mode (CSM)
PurposeWhen a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer.The CSM is a read only mode; therefore, modifications in this mode are not possible.When in this chassis CSM is activated, a testpattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX5120. So if this test pattern is shown, it could be determined that the back end video chain (PNX51251200, LVDS, and display) of the SSB is working. When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (CSM_SETTYPE_PRODUCTIONCODE.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.
Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes).
How to Activate CSMKey in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
How to NavigateBy means of the “CURSOR-DOWN/UP” knob on the RC-transmitter, can be navigated through the menus.
Contents of CSMThe contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.
General• Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.
• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.
• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.
• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).
• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).
• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.
• 12NC display. Shows the 12NC of the display.• 12NC supply. Shows the 12NC of the supply.• 12NC “fan board”. Shows the 12NC of the “fan board”-
module (optional).• 12NC “LED Dimming Panel”. Shows the 12NC of the
LED dimming Panel (optional).
Software versions• Current main SW. Displays the built-in main software
version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet.Example: Q5492_1.2.3.4
• Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9 Software Upgrading).Example: STDBY_88.68.1.2.
• MOP ambient light SW. Displays the MOP ambient light EPLD SW.
• LED Dimming SW. Displays the LED Dimming EPLD SW-version (only for sets with LED backlight).
• Local contrast SW. Displays the MOP local contrast SW-version.
Quality items• Signal quality. Poor / average /good• Child lock. Not active / active. This is a combined item for
locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.
• HDMI HDCP key. Indicates if the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the customer wants to make use of the HDMI functionality, the SSB has to be replaced.
• Ethernet MAC address. Displays the MAC address present in the SSB.
• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.
• BDS key. Indicates if the “BDS level” key is valid or not.• CI slot present. If the common interface module is
detected the result will be “YES” or “NO”.• HDMI input format. The detected input format of the
HDMI.• HDMI audio input stream. The HDMI audio input stream
is displayed: present / not present.• HDMI video input stream. The HDMI video input stream
is displayed: present / not present.
How to Exit CSMPress “MENU” (or HOME) / “Back” key on the RC-transmitter.
Service Modes, Error Codes, and Fault Finding EN 17Q549.3E LA 5.
2009-Aug-07
5.3 Stepwise Start-up
When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus error layer 2 = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this
mode with a faulty FET 7U08 is done, you can destroy all ICs supplied by the +3V3, due to overvoltage (12V on 3V3-line). It is recommended to measure first the FET 7U08 or others FET’s on shortcircuit before activating SDM via the service pads.
The abbreviations “SP” and “MP” in the figures stand for:• SP: protection or error detected by the Stand-by
Processor.• MP: protection or error detected by the MIPS Main
Processor.
Figure 5-3 Transition diagram
ActiveSemiSt by
St by
Mains on
Mainsoff
GoToProtection
- WakeUp requested- Acquisition needed
- No data Acquisitionrequired - tact SW pushed- last status is hibernate after mains ON
- St by requested- tact SW pushed
WakeUprequested
Protection
WakeUp requested
(SDM)
GoToProtectionHibernate
- Tact switch Pushed- last status is hibernate after mains ON
Tact switchpushed
I_17660_124.eps140308
Service Modes, Error Codes, and Fault FindingEN 18 Q549.3E LA5.
2009-Aug-07
Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)
No
EJTAG probe connected ?
No
Yes
Release AVC system resetFeed warm boot script
To I_17660_125b.eps To I_17660_125b.eps
Cold boot?
Yes
No
Set I²C slave address of Standby µP to (A0h)
An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.
This will allow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.
Detect EJTAG debug probe(pulling pin of the probe interface to ground by inserting EJTAG probe)
Release AVC system resetFeed cold boot script
Release AVC system resetFeed initializing boot scriptdisable alive mechanism
Initialise I/O pins of the st-by µP:- Switch reset-AVC LOW (reset state)- Switch WP-NandFlash LOW (protected)- Switch reset-system LOW (reset state)- Switch reset-5100 LOW (reset state)- Switch reset-Ethernet LOW (reset state)- Switch reset-ST7100 LOW (reset state)- keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH
Off
Standby Supply starts running.All standby supply voltages become available .
st-by µP resets
Stand by or Protection
Mains is applied
- Switch Audio-Reset high.It is low in the standby mode if the standby
mode lasted longer than 10s.start keyboard scanning, RC detection. Wake up reasons are
off.
If the protection state was left by short circuiting the SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will
not be entered.
Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization , this is not issue in this setup , the delay is automatically
covered by the architectural setup)
Release Reset-PNX5100. PNX5100 will start booting.
Wait 10ms (minimum) to allow the bootscript of the PNX5100 to configure the PCI arbiter
Before PNX8541 boots, the PNX5100 should have set its PCI arbiter (bootscript command). To allow this, approx. 1ms is needed. This 1ms is extended to 10ms to also give some relaxation to the supplies .
Switch HIGH the WP-NandFlash to allow access to NAND Flash
+12V, +/-12Vs, AL and Bolt-on poweris switched on, followed by the +1V2 DCDC converter
Enable the supply fault detection algorithm
No
Yes
Detect-1 I/O line High?
Switch ON Platform and display supply by switching LOW the Standby line.
This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 become available.
yes
Enable the DCDC converter for +3V3 and +5V. (ENABLE-3V3)
Voltage output error: Layer1: 2Layer2: 18
Important remark; the appearance of the +12V will start the +1V2 DCDC converter automatically
No
Yes
Supply-fault I/O High?
The supply-fault line is a combination of the DCDC converters and the audio protection line.
1V2 DCDC or class D error:Layer1: 2Layer2: 19
Enter protection
NoDetect2 high received within 1 second?
Power-OK error: Layer1: 3Layer2: 16
Enter protectionYes
NoSupply-fault I/O High?
3V3 / 5V DCDC or class D error:Layer1: 2Layer2: 11
Enter protection
Wait 50ms
Enter protection
Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC.
Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.
Yes
NoDetect-2 I/O line High?
Disable 3V3, switch standby line high and wait 4 seconds
Added to make the system more robust to power dips during startup. At this point the regular supply fault detection algorithm which normally detects power dips is not up and running yet.
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Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)
Yes
MIPS reads the wake up reasonfrom standby µP.
Semi-Standby
initialize tuner , Master IF and channel decoder
Initialize video processing IC 's
Initialize source selection
initialize AutoTV
3-th try?
No
Blink Code as error code
Bootscript readyin 1250 ms?
Yes
No
Enable Alive check mechanism
Wait until AVC starts to communicate
SW initialization succeededwithin 20s?
No
Switch Standby I/O line high.
RPC start (comm. protocol)
Set I²C slave address of Standby µP to (60h)
Yes
Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.
switch off the remaining DC/DC converters
Wait 5ms
Switch AVC PNX8541in reset (active low)
Wait 10ms
Switch the NVM reset line HIGH.
Flash to Ram image transfer succeeded
within 30s?No
Yes
Code =Layer1: 2Layer2: 53
Code = Layer1: 2Layer2: 15
Initialize Ambilight with Lights off .
Timing need to be updated if more mature info is available.
Timing needs to be updated if more mature info is available.
Timing needs to be updated if more mature info is available .
Downloaded successfully?
Download firmware into the channel decoder
Third try? No
No
Yes
Log channel decoder error:Layer1: 2Layer2: 37
Yes
Initialize audio
Enter protection
Release reset MPEG4 module:BOLT-ON-IO: High
MPEG4 module will start booting autonomously.
Wait 3000 ms
Start alive IIC polling mechanism
POR polling positive ?
yes
No Log SW event: STi7100PorFailure
Wait 200 ms
POR polling positive ?yes
No
bootSTi7100PorFailure:Log HW error
Layer1: 2Layer2: 38
and generate cold boot
Alive polling
Log SW event STi7100AliveFailedError
and generate fast cold reboot eventually followed by a cold
reboot.
NOK
Reset-system is switched HIGH by the AVC at the end of the bootscript
AVC releases Reset-Ethernet when the end of the AVC boot-script is detectedThis cannot be done through the bootscript,
the I/O is on the standby µP
Reset-system is connected to USB
From I_17660_125a.eps From I_17660_125a.eps
-reset, 4to1HDMI Mux and channel decoder.
Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the
startup process
Reset-system is switched HIGH by the AVC at the end of the bootscript
AVC releases Reset-Ethernet when the end of the AVC boot-script is detected
Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the
startup process
Switch on the display in case of a LED backlight display by sending the TurnOnDisplay(1) (I²C)
command to the PNX5100
In case of a LED backlight display , a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must be closed. The display startup sequence is taken care of by the LED DIM panel.
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Figure 5-6 “Semi Stand-by” to “Active” flowchart
Active
Semi Standby
action holder: AVC
autonomous action
action holder: St-by
Initialize audio and video processing IC's and functions according needed use case.
Assert RGB video blanking and audio mute
Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s) can only happen during ON-> SEMI ->ON. In these states, the AVC is still active and can
provide the 2s delay. If the transition ON-> SEMI->STBY->SEMI -> ON can be made in less than 2s,
the semi -> stby transition has to be delayed until the requirement is met.
Switch Audio-Reset low and wait 5ms
Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.
unblank the video.
Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC.
The higher level requirement is that audio and video should be demuted without transient
effects and that the audio should be demuted maximum 1s before or at the same time as the
unblanking of the video.
Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)
CPipe already generates a valid output clock in the semi -standby state: display
startup can start immediately when leaving the semi-standby state.
wait 250ms (min. = 200ms)
Switch on LCD backlight(Lamp-ON)
Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100
The timings to be used in combination with the PanelON
command for this specific display
Switch on the Ambilight functionality according the last status settings.
The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the
set contains a CE IPB inverter supply.
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Figure 5-7 “Semi Stand-by” to “Active” flowchart LCD with preheat
Active
Semi Standby
action holder: AVC
autonomous action
action holder: St-by
Initialize audio and video processing IC's and functions according needed use case.
Assert RGB video blanking and audio mute
Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In
these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI-
->STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed
until the requirement is met.
Switch Audio-Reset low and wait 5ms
Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first second. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.
Restore dimming backlight feature, PWM and BOOST output and unblank the video.
Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC
AND[the backlight PWM has been on for 1s (internal inverter LPL displays
OR the backlight PWM has been on for 2s (external inverter LPL displays)] .
The higher level requirement is that audio and video should be demuted without transient
effects and that the audio should be demuted maximum 1s before or at the same time as the
unblanking of the video.
Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)
CPipe already generates a valid output clock in the semi -standby state: display
startup can start immediately when leaving the semi-standby state.
wait 250ms (min. = 200ms)
Switch on LCD backlight(Lamp-ON)
Switch off the dimming backlight feature, set the BOOST control to nominal and make sure
PWM output is set to 100%
Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100
Switch on the Ambilight functionality according the last status settings.
The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the
set contains a CE IPB inverter supply.
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Figure 5-8 “Semi Stand-by” to “Active” flowchart (LED backlight)
Active
Semi Standby
action holder: AVC
autonomous action
action holder : St-by
Initialize audio and video processing IC's and functions according needed use case.
Assert RGB video blanking and audio mute
Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s) can only happen during ON -> SEMI -> ON. In
these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI-
>STBY->SEMI->ON can be made in less than 2s, the semi -> stby transition has to be delayed
until the requirement is met.
Switch Audio-Reset low and wait 5ms
Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.
unblank the video.
Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC.
The higher level requirement is that audio and video should be demuted without transient
effects and that the audio should be demuted maximum 1s before or at the same time as the
unblanking of the video.
Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)
CPipe already generates a valid output clock in the semi -standby state: display
startup can start immediately when leaving the semi-standby state.
wait 250ms (min. = 200ms)TBC in def. spec
Switch on LCD backlight(Lamp-ON)
Switch on the display by sending the OUTPUT-ENABLE (I²C) command to the LED DIM panel
Switch on the Ambilight functionality according the last status settings.
The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the
set contains a CE IPB inverter supply.
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Figure 5-9 “Active” to “Semi Stand-by” flowchart (LCD non DFI)
Semi Standby
Active action holder: AVC
autonomous action
action holder: St-by
Wait 250ms (min. = 200ms)
Mute all sound outputs via softmute
Mute all video outputs
switch off LCD backlight
Force ext audio outputs to ground (I/O: audio reset)
And wait 5ms
Switch off the display by sending the TurnOnDisplay(0) (I²C) command to the PNX5100
switch off Ambilight
Set main amplifier mute (I/O: audio-mute)
Wait 100ms
Wait until Ambilight has faded out (fixed wait time of x s)
The higher level requirement is that the backlight may not be switched off before the
ambilight functionality is turned off in case the set contains a CE IPB inverter supply.
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Figure 5-10 “Semi Stand-by” to “Stand-by” flowchart
transfer Wake up reasons to the Stand by µP.
Stand by
Semi Stand byaction holder: MIPS
autonomous action
action holder: St-by
Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3)
Switch OFF all supplies by switching HIGH the Standby I/O line
Switch AVC system in reset stateSwitch reset-PNX5100 LOWSwitch reset-ST7100 LOW
Switch Reset-Ethernet LOW
Important remark:release reset audio 10 sec after entering standby to save power
Wait 5ms
Wait 10ms
Switch the NVM reset line HIGHSwitch het WP-Nandflash LOW
Delay transition until ramping down of ambient light is finished. *)
If ambientlight functionality was used in semi -standby (lampadaire mode), switch off ambient light
*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.
Switch Memories to self-refresh (this creates a more stable condition when switching off the power).
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Figure 5-11 “To Protection State” flowchart
5.4 Service Tools
5.4.1 ComPair
IntroductionComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.
3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
SpecificationsComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.
Protection
action holder: MIPS
autonomous action
action holder: St-by
Redefine wake up reasons for protection state and transfer to stand-by µP.
Log the appropriate error andset stand-by flag in NVM
MP
Ask stand-by µP to enter protection state
Flash the Protection-LED in order to indicate protection state* (*): This can be the standby LED or the ON LED
depending on the availability in the set
SP
Switch off LCD lamp supply
Wait 250ms (min. = 200ms)
Switch off LVDS signal
Switch off 12V LCD supply within a time frame of min. 0.5ms to max. 50ms after LVDS switch off.
If needed to speed up this transition, this block could be omitted . This is depending on the outcome of the
safety investigations .
Disable all supply related protections and switch off the +1V8 and the +3V3 DC/DC converter.
Switch OFF all supplies by switching HIGH theStandby I/O line.
Switch AVC in reset state
Wait 5ms
Wait 10ms
Switch the NVM reset line HIGH.
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How to ConnectThis is described in the chassis fault finding database in ComPair.
Figure 5-12 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!
How to OrderComPair II order codes:• ComPair II interface: 3122 785 91020.• Software is available via the Philips Service web portal.• ComPair UART interface cable for Q54x.x.
(using 3.5 mm Mini Jack connector): 3138 188 75051. Note: While encountering problems, contact the local support desk.
5.4.2 Memory and Audio Test
With this tool you can test the memory of the PNX8543, as well if the PNX51XX is enabled and audio-testing.
What is needed?– An USB-stick.– “TESTSCRIPT Q549”. Downloadable from the Philips
Service website from the section “Software for Service only”
– A ComPair/service cable (3138 188 75051).
ProcedureCreate a directory “JETTFILES” under the root of the USB-stick– Place “MemTestTV543.bin” and “autojett.bin” (available in
“TESTSCRIPT Q549”) under the directory “JETTFILES”– Install the computer program “BOARDTESTLOGGER”
(available in “TESTSCRIPT Q549”) on the PC– Connect a “ComPair/service”-cable from the service-
connector in the set, into the “multi function” jack at the front of the ComPair II box : Required settings in ComPair :- Start up the ComPair application.- Select the correct database (open file “Q549.3E LA”, this will set the ComPair interface in the appropriate mode).- Close ComPair
– Start up the program “BOARDTESTLOGGER” and select “COMx”
– Put the USB stick into the TV and start up the TV while pressing the “i+”-button on a Philips DVD RC6 remote control (it’s also possible to use a TV remote in “DVD”-mode)
– On the PC the memory test is shown now. This is also visible on the TV screen.
– In “BOARDTESTLOGGER” an option “Send extra UART command” can be found where you can select “AUD1”. This command generates hear test tones of 200, 400, 1000, 2000, 3000, 5000, 8000 and 12500Hz.
5.5 Error Codes
5.5.1 Introduction
The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained).To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed: • There is a simple blinking LED procedure for board level
repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2).– LAYER 1 errors are one digit errors.– LAYER 2 errors are 2 digit errors.
• In protection mode.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.
• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.
Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths (SDM) at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
• In CSM mode– When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.• In SDM mode
– When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED.
• In the “ON” state– In “Display error mode”, set with the RC commands
“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.
• Error display on screen.– In CSM no error codes are displayed on screen.– In SAM the complete error list is shown.
Basically there are three kinds of errors:• Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error.(see section “5.6 The Blinking LED Procedure”).
• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).
• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read
E_06532_036.eps150208
TOUART SERVICECONNECTOR
TOUART SERVICECONNECTOR
TOI2C SERVICECONNECTOR
TO TV
PC
HDMII2C only
Optional power5V DC
ComPair II Developed by Philips Brugge
RC outRC in
OptionalSwitch
Power ModeLink/Activity I2C
ComPair IIMulti
function
RS232 /UART
Service Modes, Error Codes, and Fault Finding EN 27Q549.3E LA 5.
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out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.
5.5.2 How to Read the Error Buffer
Use one of the following methods:• On screen via the SAM (only when a picture is visible).
E.g.:– 00 00 00 00 00: No errors detected– 23 00 00 00 00: Error code 23 is the last and only
detected error.– 37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.– Note that no protection errors can be logged in the
error buffer.• Via the blinking LED procedure. See section 5.5.3 How to
Clear the Error Buffer.• Via ComPair.
5.5.3 How to Clear the Error Buffer
Use one of the following methods:• By activation of the “RESET ERROR BUFFER” command
in the SAM menu.• With a normal RC, key in sequence “MUTE” followed by
“062599” and “OK”.• If the content of the error buffer has not changed for 50+
hours, it resets automatically.
5.5.4 Error Buffer
In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:• Via error bits in the status registers of ICs.• Via polling on I/O pins going to the stand-by processor.• Via sensing of analog values on the stand-by processor or
the PNX8543.• Via a “not acknowledge” of an I2C communication.
Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.
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Table 5-2 Error code overview
Extra Info• Rebooting. When a TV is constantly rebooting due to
internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.
• Error 13 (I2C bus 3 blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.
• Error 15 (PNX8543,PNX51XX doesn’t boot). Indicates that the main processor/PNX51XX was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8543 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C1 bus is blocked (NVM). I2C1 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-1, SDA-1, SCL-2 or SDA-2.Other root causes for this error can be due to hardware problems from the NVM PNX51XX, DDR’s and the bootscript reading from the PNX51XX.
• Error 16 (12V). This voltage is made in the power supplyand results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.
• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. Error LAYER 1 = 3 in CSM, in SDM this gives LAYER 2 error = 17.
• Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = 2 will be displayed automatically. In SDM this gives LAYER 2 error = 18.
• Error 21 (PNX 51XX). When there is no I2C communication towards the PNX51XX, the TV set will start rebooting and display LAYER 1 error = 2. Disconnect the mains cord now and start up the TV set with the solder path (SDM) short to ground during start-up to activate the LAYER 2 error blinking. Error “21” will be logged and displayed via the blinking LED procedure after a few moments from start-up. Remark : the rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”). It is shown that the loggings which are generated by the main software keep continuing. Check in the logging for keywords like e.g. “Device error 21”.
• Error 23 (HDMI). When there is no I2C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.
• Error 24 (I2C switch). When there is no I2C communication towards the I2C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark : this only works for TV sets with an I2C controlled screen included.
• Error 25 (Boot-NVM PNX51XX). Same behaviour as described in “Error 21 (PNX51XX)”.
• Error 27 (Micronas IF). When there is no I2C communication towards the multi standard demodulator, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on.
• Error 28 (ARM ambilight). When there is no I2C communication towards the ARM processor, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.
• Error 29 (FPGA local contrast). When there is no I2C communication towards this FPGA, LAYER 2 error = 29 will be logged and displayed via the blinking LED procedure if SDM is activated.
Description Layer 1 Layer 2Monitoredby
Error/Prot
Error Buffer/Blinking LED Device Defective Board
I2C3 2 13 MIPS E BL / EB SSB SSB
I2C2 2 14 MIPS E BL / EB SSB/Display SSB/display
PNX doesn’t boot (HW cause) PNX 51XX doesn’t boot
2 15 Stby µP P BL PNX8543/PNX51XX I2C blocked
SSB
12V 3 16 Stby µP P BL / Supply
Inverter or display supply 3 17 MIPS E EB / IPB
1V2, 3V3, 5V to low 2 18 Stby µP P BL / SSB
Temp protection 3 12 MIPS E EB / Display
PNX 51XX 2 21 MIPS E EB PNX51XX SSB
HDMI mux 2 23 MIPS E EB TDA9996 SSB
I2C switch 2 24 MIPS E EB PCA9540 SSB
Boot-NVM PNX51XX 2 25 MIPS E EB STM24C08 SSB
Multi Standard demodulator (Micronas IF)
2 27 MIPS E EB DRX3616K DRX3626K
SSB
ARM (ambilight) 8 28 MIPS E EB NXP LPC2103 AL module or DC/DC
FPGA (Local contrast) 2 29 MIPS E EB Altera SSB
Tuner 2 34 MIPS E EB UV1783S/HD1816 SSB
Fan I2C expander 7 41 MIPS E EB PCA9533 FAN module
T° sensor 7 42 MIPS E EB LM 75 T° sensor
FAN 1 7 43 MIPS E EB FAN
FAN 2 7 44 MIPS E EB FAN
Main NVM 2 / MIPS E X STM24C128 SSB
PNX doesn’t boot (SW cause) 2 53 Stby µP E BL PNX8543 SSB
Display 5 64 MIPS E BL / EB Altera Display
FPGA LED dimming 2D 2 65 MIPS E EB Altera SSB
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• Error 34 (Tuner). When there is no I2C communication towards the tuner after start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on.
• Error 42 (Temp sensor). Only applicable for TV sets with an I2C controlled screen.
• Main NVM. When there is no I2C communication towards the main NVM, LAYER 1 error = 2 will be displayed via the blinking LED procedure. In SDM, LAYER 2 error will be blinked as “15”. Errors here can not be logged due to inaccessibility of the NVM device.
• Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.
• Error 64. Only applicable for TV sets with an I2C controlled screen.
• Error 65. When there is no I2C communication towards the FPGA LED dimming device.
5.6 The Blinking LED Procedure
5.6.1 Introduction
The blinking LED procedure can be split up into two situations:• Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code overview”) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.
• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview”) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.
Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit2. A pause of 1.5 s3. “n” short blinks (where “n”= 1 to 9)4. A pause of approximately 3 s,5. When all the error codes are displayed, the sequence
finishes with a LED blink of 3 s6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s2. Two short blinks of 250 ms followed by a pause of 3 s3. Eight short blinks followed by a pause of 3 s4. Six short blinks followed by a pause of 3 s5. One long blink of 3 s to finish the sequence6. The sequence starts again.
5.6.2 How to Activate
Use one of the following methods:• Activate the CSM. The blinking front LED will show only
the latest LAYER 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the standby processor.In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”).
• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
• Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.
• Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.
5.7 Protections
5.7.1 Software Protections
Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections.There are several types of software related protections, solving a variety of fault conditions:• Protections related to supplies: check of the 12V, +5V,
+3V3 and 1V2.• Protections related to breakdown of the safety check
mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.
Remark on the Supply ErrorsThe detection of a supply dip or supply loss during the normal playing of the TV set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.
Protections during Start-upDuring TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Stepwise Start-up”).
5.7.2 Hardware Protections
The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D (7D10) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).
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Repair Tip• There will be still picture available but no sound. While the
Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again.
5.7.3 Important remark regarding the blinking LED indication
As for the blinking LED indication, the blinking led of LAYER 1 error displaying can be switched off by pushing the power button on the keyboard.This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched off by unplugging the mains connection.This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and doesn’t recognizes the keyboard commands at this time.
5.8 Fault Finding and Repair Tips
Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”.
5.8.1 Ambilight
Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair the light output can be adjusted.
5.8.2 Audio Amplifier
The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class D-IC could break down in short time.
5.8.3 CSM
When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)
5.8.4 DC/DC Converter
Description The onboard supply consists of 5 DC/DC converters and 4 linear stabilizers. All DC/DC converters have +12V input voltage and deliver :
• +1V2-PNX85XX supply voltage (1.24V nominal), stabilized close to PNX8543 chip.
• +1V2-PNX5120 supply voltage (1.26V nominal), stabilized close to PNX5120 chip.
• +3V3 (3.34V nominal, overall 3.3 V for onboard ICs).• +5V (5.15V nominal) for USB and Conditional Access
Interface and +5V5-TUN for +5V-TUN tuner stabilizer.• +33VTUN (34V nominal) for analog-only tuners. The linear stabilizers are providing:
• +1V2-STANDBY (out of +3V3-STANDBY), 1.24V nominal.• +1V8-PNX85XX and +1V8PNX5120 (connected via
CFH1), 1.84V nominal.• +2V5 (WOW FPGA diversity only), 2.5V nominal.• +5V-TUN (out of +5V5-TUN), 5V nominal.
+3V3-STANDY and +1V2-STANDBY are permanent voltages. Supply voltages +1V2-PNX85XX and +1V2-PNX5120 are started immediately when +12V incoming voltage is available (+12V is enabled by STANDBY signal, active low). Supply voltages +3V3, 2V5, +1V8-PNX5120, +1V8-PNX85XX, +5V and +5V-TUN are switched-on directly by signal ENABLE-3V3 (active low), provided that +12V (detected via 7U40 &7U41) is available. +12V is considered OK (=> DETECT -12V signal becomes high and 12V/3V3 and 12V/5V DC-DC converter can be started up) if it rises above 10V5 (typical) and doesn’t drop below 10V (typical).
DebuggingThe best way to find a failure in the DC/DC converters is to check their start-up sequence at power-on via the mains cord, presuming that the standby microprocessor and the external supply are operational. Take STANDBY signal high-to-low transition as time reference.When +12V becomes available (maximum 1 second after STANDBY signal goes low) then +1V2-PNX85XX and +1V2-PNX51XX are started immediately. Then, after ENABLE-3V3 goes low, all the other supply voltages should rise within 2ms.
Tips• When an output supply voltage is short-circuited to GND
the corresponding DC-DC converter is not making any audible noise, the converter switches-off immediately and will attempt a re-start only after +12V drops and rises again.
• Check the integrity (at least no short-circuit between drain and source) of power MOS-FETs, especially the high-side ones: 7U05, 7U08, 7U0D-1 and 7U0H-1 before starting the platform in SDM mode, otherwise it can be easily damaged.
• Switching frequency of DC-DC converters should be around 290KHz for 12V to 1V2 DC-DC converters and around 370KHz for 12V to 3V3 and 12V to 5V DC-DC converters.
5.8.5 Exit “Factory Mode”
When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normallyhappens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode).Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.
5.8.6 Logging
When something is wrong with the TV set (f.i.the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box.Required settings in ComPair before starting to log :- Start up the ComPair application.- Select the correct database (open file “Q549.3E LA”, this will set the ComPair interface in the appropriate mode).- Close ComPairAfter start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COMx2. Bits per second = 1152003. Data bits = 84. Parity = none5. Stop bits = 16. Flow control = none
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During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.
5.8.7 Loudspeakers
Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!
5.8.8 IPB
In case of no picture when CSM-test pattern from PNX51XX is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the IPB + wiring (LAYER 2 error = 17 is displayed in SDM).
5.8.9 Tuner
Attention: In case the tuner is replaced, always check the tuner options!
5.8.10 PCI bus.
The splash screen image is not distributed via the regular YUV signal path from the PNX8543 to the PNX51XX, but loaded one time via the PCI bus.Once the splash screen image is loaded into the PNX51XX, it will be continuously generated by the PNX51XX until the first incoming video disables the splash screen.So when teletext and/or general UI is available, but no splash screen (option “ON”) is visible during start-up, check the PCI bus as possible root cause.
5.8.11 Display option code
Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.
5.8.12 Upgrade HDMI EDID NVM
The EDID MUX device (including all HDMI NVM except the 4th) is upgradeable via USB, see ComPair for further instructions. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.
5.8.13 Upgrade VGA/4th HDMI EDID NVM
The EDID for VGA connector or the 4th HDMI can only be upgraded via external I2C. To upgrade the EDID for the VGA connector or 4th HDMI, pin 7 of the EDID NVM has to be short circuited to ground. Therefore a test point is foreseen (see Figure 5-13). For the VGA EDID NVM it’s most suitable to connect pin 7 to ground on the NVM device itself. See ComPair for further instructions.
Figure 5-13 4th HDMI EDID NVM pin
5.8.14 Wi-Fi module
To prevent damage on the coax wires, especially the female core of the coax wires (can be bend over during dis- and reconnecting), this should be carried out by use of pliers.
18310_220_090318.eps090319
EDID4
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5.8.15 SSB Replacement
Follow the instructions in section 6.5 Reset of Repaired SSB and 6.6 Service SSB delivered without main software loaded in case a SSB has to be exchanged.
5.9 Software Upgrading
5.9.1 Introduction
The set software and security keys are stored in a NAND-Flash, which is connected to the PNX8543 via the PCI bus.
It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.
Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...).Perform the following actions after SSB replacement:1. Set the correct option codes (see sticker inside the TV).2. Update the TV software => see the eUM (electronic User
Manual) for instructions.3. Perform the alignments as described in chapter 6 (section
6.5 Reset of Repaired SSB).4. Check in CSM if the HDMI key, MAC address.. are valid.For the correct order number of a new SSB, always refer to the Spare Parts list!
5.9.2 Main Software Upgrade
• The “UpgradeAll.upg” file is only used in the factory.• The “FlashUtils.upg” file is only used by service centra
which are allowed to do component level repair on the SSB.
Automatic Software UpgradeIn “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q5492_ 1.26.15.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick.How to upgrade:1. Copy “AUTORUN.UPG” to the root of the USB stick.2. Insert USB stick in the set while the set is in ON MODE.
The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.
Manual Software UpgradeIn case that the software upgrade application does not start automatically, it can also be started manually.How to start the software upgrade application manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “OK” button on a Philips TV remote control or a
Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
Attention!In case the download application has been started manually, the “autorun.upg” will maybe not be recognized.What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.2. Rename the “autorun.upg” to something else, e.g. to
“software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.4. Insert USB stick into the TV.5. The renamed “upg” file will be visible and selectable in the
upgrade application.
Back-up Software Upgrade ApplicationIf the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”.How to start the “back-up software upgrade application” manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “INFO”-button on a Philips remote control or
“CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
5.9.3 Stand-by Software Upgrade via USB
In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB.Use the following steps:1. Create a directory “UPGRADES” on the USB stick.2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbySW_CFT72_88.0.0.0.upg) into this directory.3. Insert the USB stick into the TV.4. Start the download application manually (see section “
Manual Software Upgrade”.5. Select the appropriate file and press the “OK” button to
upgrade.
5.9.4 Content and Usage of the One-Zip Software File
Below the content of the One-Zip file is explained, and instructions on how and when to use it.
• BootProm_PNX51XX_NON_PREMIUM_Q5492_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization. Reserved for all TV sets Q5492 except the PREMIUM range : XXPFL9704X/XX.
• BootProm_PNX51XX_PREMIUM_Q5492_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization. Only to be used for the PREMIUM range : XXPFL9704X/XX.
• Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by Service technicians. For ComPair development only.
• DDC_Q5492_x.x.x.x.zip. Contains the content of the VGA NVM. See ComPair for further instruction.
• EDID_Q5492_x.x.x.x.zip. Contains the EDID content of the different EDID NVM’s. See ComPair for further instructions.
• EJTAGDownload_Q5492_x.x.x.x.zip. Only used by service centra which are allowed to do component level repair.
• FUS_Q5492_x.x.x.x_commercial.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.
• Factory_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.
• FlashUtils_Q5492_x.x.x.x_commercial.zip. Not to be used by Service technicians.
• MOP_RAC3_x.x.x.x.zip. Contains the MOP local contrast software and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg!
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• MOP_RXS3_x.x.x.x.zip. Contains the MOP LED dimming software and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg!Important remark : there is no fall back LED dimming software available in case mains interruption occurs while upgrade process is running. The TV set will get stucked and reboots endlessly; the only way to recover is to use EJTAG.
• OAD_Q5492_x.x.x.x.zip. Not to be used by Service Technicians.
• OpenSourceFile_Q5492_x.x.x.x.zip. Not to be used by Service technicians.
• PQPrivate_Q5492_x.x.x.x.zip. Not to be used by Service technicians.
• StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains the Stand-by software in “upg” and “hex” format.– The “StandbySW_xxxxx_prod.upg” file can be used to
upgrade the Stand-by software via USB.– The “StandbySW_xxxxx.hex” file can be used to
upgrade the Stand-by software via ComPair.– The files “StandbySW_xxxxx_exhex.hex” and
“StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).
• UpgradeAll_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.Caution: Never try to use this file, because it will overwrite the HDCP keys ! ! !
• UpgradeExe_Q5492X_x.x.x.x.zip. Not to be used by Service Technicians.
• Ambilight_Q5492_x.x.x.x.zip. Not to be used by Service technicians.
• Cabinet_Q5492_x.x.x.x.zip. Not to be used by Service technicians.
• Display_Q5492_x.x.x.x.zip. Not to be used by Service technicians.
• LightGuide_TV522_x.x.x.x_.zip. Not to be used by Service Technicians.
• LedProfile_LEDPRF_x.x.x.x_.zip. Not to be used by Service Technicians.
• ProcessNVM_Q5492_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.
5.9.5 Content of the MOP Ambilight ARM SW File
• MOP_AMBILIGHT_V1-X_UPG_jettsigned.zip. Contains the MOP ambientlight software (ARM processor on the DC-DC AL interface board) and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg! and is not available in the One-Zip software file but provided separately via the commercial Philips website (software for servicers only).The way of work on how to upgrade is included in the zip file.
Important remark : the upgrade process of the ARM processor is not completely done when the message “Operation Successful” is shown on the display. To be sure the upgrade has totally been finished, wait until the ambilight flashes the colour “green” a few times.
5.9.6 UART logging 2K9 (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”)
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6. Alignments
Index of this chapter:6.1 General Alignment Conditions6.2 Hardware Alignments6.3 Software Alignments6.4 Option Settings6.5 Reset of Repaired SSB6.6 Service SSB delivered without main software loaded6.7 Total Overview SAM modes
6.1 General Alignment Conditions
Perform all electrical adjustments under the following conditions:• Power supply voltage (depends on region):
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).– EU: 230 VAC / 50 Hz (± 10%).– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).– US: 120 VAC / 60 Hz (± 10%).
• Connect the set to the mains via an isolation transformer with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.
• Test probe: Ri > 10 MΩ, Ci < 20 pF.• Use an isolated trimmer/screwdriver to perform
alignments.
6.1.1 Alignment Sequence
• First, set the correct options:– In SAM, select “Options”, and then “Option numbers”.– Fill in the option settings for “Group 1” and “Group 2”
according to the set sticker (see also paragraph 6.4 Option Settings).
– Press “OK” on the remote control before the cursor is moved to the left.
– In submenu “Option numbers” select “Store” and press “OK” on the RC.
• OR:– In main menu, select “Store” again and press “OK” on
the RC.– Switch the set to Stand-by.
• Warming up (>15 minutes).
6.2 Hardware Alignments
Not applicable.
6.3 Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below.The following items can be aligned:• Tuner AGC.• White point. To store the data:• Press “OK” on the RC before the cursor is moved to the
left.• In main menu select “Store” and press “OK” on the RC.• Press “HOME” on the RC to switch back to the main menu.• Switch the set to stand-by mode.
For the next alignments, supply the following test signals via a video generator to the RF input:• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz• US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)
Purpose: To keep the tuner output signal constant as the input signal amplitude varies.No alignment is necessary, for the AGC alignment you can use the default value : “80”. Store settings and exit SAM.
6.3.2 White Point
• Set “Active control” to “Off”.• Choose “HOME”, “Setup” and then “Picture” and set
picture settings as follows:
• Go to the SAM and select “Alignments”-> “White point”.
White point alignment LCD screens:• Use a 100% white screen as input signal and set the
following values:– “Colour temperature”: “Normal”.– All “White point” values to: “127”.– “Red BL offset” values to “8”.– “Green BL offset” values to “8”.
In case you have a colour analyser:• Measure with a calibrated contactless colour analyser in
the centre of the screen. Consequently, the measurement needs to be done in a dark environment.
• Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1 White D alignment values). Tolerance: dx: ± 0.004, dy: ± 0.004.
• Repeat this step for the other colour temperatures that need to be aligned.
• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.
• Restore the initial picture settings after the alignments.
Table 6-1 White D alignment values
If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.
Picture Setting
Dynamic backlight Off
Dynamic Contrast Off
Colour Enhancement Off
Picture Format Auto format
Light Sensor Off
Brightness 50
Colour 0
Contrast 100
Value Cool (11000K ) Normal (9000K) Warm (6500K)
x 0.276 0.287 0.318
y 0.287 0.294 0.336
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• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).
• Set the RED, GREEN and BLUE default values according to the values in Table 6-2.
• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.
• Restore the initial picture settings after the alignments.
Table 6-2 White tone default setting
6.4 Option Settings
6.4.1 Introduction
The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX51XX ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM plus integrated Ambilight control) is made known by the option codes. Notes:• After changing the option(s), save them by pressing the
“OK” button on the RC before the cursor is moved to the left, select ”STORE” in the SAM root menu and press “OK” on the RC.
• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).
6.4.2 Dealer Options
For dealer options, in SAM select “Dealer options”.See Table 6-4 SAM mode overview.
6.4.3 (Service) Options
Select the sub menu's to set the initialisation codes (options) of the model number via text menus.See Table 6-4 SAM mode overview.
6.4.4 Opt. No. (Option numbers)
Select this sub menu to set all options at once (expressed in two long strings of numbers).An option number (or “option byte”) represents a number of different options. When you change these numbers directly,you can set all options very quickly. All options are controlled via eight option numbers.When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-3 Option and display code overview.Example: The options sticker gives the following option numbers:• 08192 00133 01387 45160• 12232 04256 00164 00000The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8.Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set).
When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.See Table 6-3 Option and display code overviewfor the options.
DiversityNot all sets with the same Commercial Type Number (CTN) necessarily have the same option code!Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 2. Technical Specifications and, Connections.
6.4.5 Option Code Overview
Table 6-3 Option and display code overview
Important: after having edited the option numbers as described above, you must press “OK” on the remote control before the cursor is moved to the left!
6.5 Reset of Repaired SSB
A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB.A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”.Also the virgin bit is to be set. To set all this, you can use the ComPair tool.In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.
New here in this chassis is the “Net TV” functionality. Therefore the CTN (“set type” item in CSM1) must be filled into the spare SSB to ensure access to the Net TV portals.The loading of the CTN can be done via ComPair (Model number programming). The reset item (Clear NET TV memory) can be selected via MENU (or HOME) => Setup => Installation => Clear NET TV memory (customer preferences stored at provider side will be reset now).
White Tone Black level offset
Colour Temp R G B R G
Normal 127 114 114 8 8
Cool 123 122 126 8 8
Warm 127 110 67 8 8
CTN Options Group 1 Options Group 2 Disp.code
40PFL9704H/xx 12355 35974 18431 45288 30658 47282 07328 00000 194
46PFL9704H/xx 12355 35974 18431 45288 30659 47282 05280 00000 195
52PFL9704H/xx 12355 35974 18431 45288 30655 47282 03240 00000 191
AlignmentsEN 36 Q549.3E LA6.
2009-Aug-07
6.5.1 SSB identification
Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.
Figure 6-1 SSB identification
6.6 Service SSB delivered without main software loaded
Due to a changed manufacturing process, new Service SSB’s can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such an SSB is received.
6.6.1 When a picture is available
1. Mount the Service SSB into the TV set. After start-up, normally the download application will appear on the screen.
2. Download the latest main software (FUS) from the www.p4c.philips.com website.
3. Create a folder "upgrades" in the root of a USB stick (size > 50 MB) and save the "autorun.upg" file in this "upgrades" folder. Note: it is possible to rename this file, e.g. "Q549_SW_version.upg", this in case there are more than one "autorun.upg" files on your USB stick
4. Plug the prepared USB stick into the TV set, and select the "autorun" file in the displayed browser on the screen
5. Now the main TV software will be loaded automatically, supported by a progress bar
6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).
6.6.2 When no picture is available
Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback). 1. Start-up the TV set, equipped with the Service SSB, and
enable the UART logging on the PC (see for settings 5.8 Fault Finding and Repair Tips 5.8.6 Logging)
2. The TV set will start-up automatically in the download application if main TV software is not loaded
3. Plug the prepared USB stick into the TV set, press cursor "Right" to enter the list, and navigate to the "autorun" file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press "OK"
4. Press cursor "Down" and "OK" to start the flashing of the main TV software. Printouts like: "L: 1-100% , V: 1-100% and P: 1-100%" should be visible now in the UART logging
5. Wait until the message "Operation successful!” is displayed and remove all inserted media. Restart the TV set
6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).
6.6.3 Use of repaired SSBs instead of new
Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a “repaired” SSB for board swap instead of a “new” SSB.
6.7 Total Overview SAM modes
Table 6-4 SAM mode overview
18310_221_090318.eps090319
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Hardware Info A. SW VERSION e.g. “Q5492_1.26.15.0” Display TV & Standby SW version and CTN serialnumber. B. Standby processor version e.g. “STDBY_88.68.0.0”
C. Production code e.g. “See type plate”
Operation hours Displays the accumulated total of operation hours.TVswitched “on/off” & every 0.5 hours is increase one
Error Displayed the most recent errors.
Reset error buffer Clears all content in the error buffer.
Alignment Tuner AGC RF-AGC Take over point adjustment (AGC defaultvalue is 80)
Whitepoint Colour temperature Normal 3 different modes of colour temperature can be se-lectedWarn
Cool
White point red LCD White Point Alignment. For values, seeTable 6-1 White D alignment values.White point green
White point blue
Red black level offset
Green black level offset
Alignments EN 37Q549.3E LA 6.
2009-Aug-07
Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / notmuted in case no input signal is detected at inputconnectors.
Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)
E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)
Auto store mode None
PDC/VPS
TXT page
PDC/VPS/TXT
Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features USB Off/On Select USB On/Off
Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
Online service Off Online service is Off
PTP (Picture Transfer Protocol) Off/On Select PTP On/Off
Update assistant Off/On Select Update assistant On/Off
Internet software update Off Internet software update is Off
Display Screen 180 / LCD Sharp Z3LA13 56" Displayed the panel code & type model.
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present.
Temperature sensor Sensor present in display (only for21:9)
N.A.
Temperature LUT 0 N.A
E-box & monitor Off/On Select E-box & monitor On/Off
Video reproduction Picture processing None/PNX5120 Select Picture processing None/PNX51205120(Q549.xE chassis).
MOP local contrast Off/On Select MOP local contrast On/Off
Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for differencestyling).
Pixel Plus type Pixel Plus HD Select type of picture improvement.
Perfect Pixel HD
Pixel Precise HD
Ambilight None, Select type of Ambilight modules use.
2 sided 2/2 For 8400 series only
2 sided 4/4
3 sided 2/3/2
3 sided 4/3/4
3 sided 4/5/4
4 sided 4/3/4/3
Ambilight technology LED/Future use Ambilight technology LED is in use.
MOP ambilight Off/On Select MOP ambilight On/Off
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
AlignmentsEN 38 Q549.3E LA6.
2009-Aug-07
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-rameters.
Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with externalequipment.
CVBS Y/C YPbPr LR
CVBS Y/C YPbPr HV LR
(CVBS) YPbPr LR
EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with externalequipment.
CVBS Y/C LR
(CVBS) YPbPr LR
CVBS Y/C LR
EXT3/AV3 type None Select input source when connected with externalequipment.
CVBS
CVBS LR
YPbPr
YPbPr LR
YPbPr HV LR
VGA Off/On Select VGA On/Off
SIDE I/O Off/On Select SIDE I/O On/Off
HDMI 1 Off/On Select HDMI 1 On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI 4 Off/On Select HDMI 4 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Off/On Select HDMI CEC On/Off
HDMI CEC RC passthrough Off/On Select HDMI CEC RC passthrough On/Off
HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off
Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.
Tuner type HD1816-MK1/TD1716-MK4/TD1716-MK3/HD1816-MK2
Select type of Tuner used.
System RC support Off/On Select System RC support On/Off.
Embedded user manual Off/On Select Embedded user manual On/Off.
Start-up screen Off/On Select Start-up screen On/Off.
Wallpaper Off/On Select Wallpaper On/Off.
Hotel mode Off Hotel mode is Off.
Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1to 4.
Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options5 to 8.
Store Store after changing.
Initialise NVM N.A
Store Select Store in the SAM root menu after making any changes.
Software maintenance Software events Display Display information is for development purposes.
Clear
Test reboot
Hardware events Display Display information is for development purposes.
Clear
Operation hours display 0003 In case the display must be swapped for repair, youcan reset the ""Display operation hours"" to ""0"". So,this one does keeps up the lifetime of the display it-self (mainly to compensate the degeneration behav-iour).
Test setting Digital info QAM modulation: 64-QAM Display information is for development purposes.
Symbol rate: 23:29
Original network ID: 12817
Network ID:12817
Transportstream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: -1
Install start frequency 000 Install start frequency from "0" MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before instal-lation.Digital + Analogue
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Alignments EN 39Q549.3E LA 6.
2009-Aug-07
Development file ver-sions
Development 1 file version Display parameters DISPT 3.26.8.7 Display information is for development purposes.
Acoustics parameters ACSTS 3.6.6.5
PQ - PRFPP 1.26.10.4
Ambilight parameters PRFAM 2.6.1.3
Development 2 file version 12NC one zip software Display information is for development purposes.
Initial main software
NVM version Q5492_0.4.0.0
Flash units SW Q5492_0.26.15.0
Upload to USB Channel list To upload several settings from the TV to an USBstickPersonal settings
Option codes
Display-related alignment
History list
Download from USB Channel list To download several settings from the USB stick tothe TV. Personal settings
Option codes
Display-related alignment
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Circuit DescriptionsEN 40 Q549.3E LA7.
2009-Aug-07
7. Circuit Descriptions
Index of this chapter:7.1 Introduction7.2 Power Architecture7.3 Front-End7.4 HDMI7.5 Video and Audio Processing - PNX85437.6 Common Interface CI+7.7 Net TV7.8 Ambi Light7.9 “White LED” Backlight
Notes: • Only new circuits (circuits that are not published recently)
are described. • Figures can deviate slightly from the actual situation, due
to different set executions.• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.
7.1 Introduction
The Q549.3E LA chassis (platform TV543/92 Elite Premium) is a derivative from the Q549.2E LA chassis (platform TV543/92 Elite Core).
Main delta’s with the previous chassis are the introduction of “White LED backlight” and the implementation of the LAN9420 ethernet controller (item no.7N04, diagram B07G).
7.1.1 Implementation
Key components of this chassis are:• PNX8543 Digital Colour Decoder• EP3C25F324C7N FPGA (“Local Contrast”)• HD1816AF Hybrid Tuner• DRX3926K Demodulator• TDA9996 HDMI Switch• TPA3123D2PWP Class D Power Amplifier• LAN9420 ethernet controller.
7.1.2 TV543 Architecture Overview
• For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1.
Figure 7-1 Architecture of TV543/92 Elite Premium platform
18310_200_090317.eps090317
MatrixFHD@120pFHD@100p
MatrixFHD@120pFHD@100p
PNX5120Halo ReducedHD-NMFHD 120Hz
Ambient Light
32
DDR-II
Hybrid TunerSaw
NXPPNX8543
H264USB 2 0
32
DDR-II CY3
LocalContrast
16
DDR
MICRONASDRX39xyK
Spartan XC3S250ELed Dimming
FLASH
8
Ambient LightLed Dimming
PCI
2 channelAudio Amp.
Ethernet
USB 2.0
hdmi hdmi hdmi
CA
TDA9996MUX hd
mi
MiniPCI (Wifi)
hdmi
SPI
LVDS
Pixelated Ambi
Circuit Descriptions EN 41Q549.3E LA 7.
2009-Aug-07
7.1.3 SSB Cell Layout
Figure 7-2 SSB layout cells (top view)
18310_201_090317.eps090317
RL
HDMI
HDMI
HDMI
CA
1P00
HDMI1.3
USB2.0
Y/C
Left
Right
CVBS
Head
Scart / Y
PbP
r
SPO
R
serv VGA
DD
R2
DD
R2
Tuner
DC
/DC
1M99
1M71 1F02 1M59
1M20
1M01
1R12
1M36
TD
A98
XX
Class-D
1R08
1R07
1HP
0
1CJ0
Xilinx
Pr
Pb
L
Lo
Y
Ro
Scart / Y
PbP
r
TD
A1
0048
TD
A10
023
1 7 3 5 H D M I
1M95
1H01
DDR2
DDR2
PNX8542/3
Vid
eo
InV
ideo
O
ut
DV
in
TS
in
HD
MI B
HD
MI A
PCICA
DDR
LVD
S 2
LVD
S 1
US
B
Aud
io I
n
Aud
io
Out E
JTAG
ST
BY
GPIO
DDR
Ethernet
FLASH
HDMIMUX
1E51
1E501G50
1G51
Wifi
L/R
1HE
0CY3C40
HDMI
RJ45
5100
40x4
01.
27
DDR2GPIO
lvds
-rx
ambi
pci/xio
PCI/XIO
uart
I²C
vdi
lvds
-tx
Circuit DescriptionsEN 42 Q549.3E LA7.
2009-Aug-07
7.2 Power Architecture
Refer to figure Figure 7-3 for the power architecture of this platform.
Figure 7-3 Power Architecture TV543/92 platform
7.2.1 Power Supply Unit
All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.Consult the Service website for the order codes of the boards.
In the TV543 Elite Premium platform, a conventional PSU (with additional inverters) is used.
In this manual, no detailed information is available because of design protection issues.
The output voltages to the chassis are:• +3V3-STANDBY (standby-mode only)• +12V (on-mode)• +Vsnd (+24V) (audio power) (on-mode)• +24V (bolt-on power) (on-mode).
7.2.2 Diversity
Below find an overview of the different PSUs that are used:
Table 7-1 Supply diversity
18310_202_090317.eps090317
Fu
se
Fuse
Fuse
PSU
Display
Am b ilight
V display
LCDPower-on
24V
S tandby
V backlight 24 V**
Audio proc + C lass D
24 Vs(+/-12 Vs opt)
+12VDua l
DC/DC+3V3
+1V2
+1V2
P la tform P ow er
Dua lDC/DC
2.5V 1% voltage ref
+2V5 +2V5
+1V8 +1V8+3V3F
+5V
+5Vtuner +5V-Tun
PNX5100
+1V2-PNX85XX
+5V
+3V3
+1V8-PNX5100
+1V8-PNX85XX
+2V5 (loc.Contr.FPGA)
+1V2-PN X5100
+5V-TU N
SSB
Bolt-on
V inverter 4kV*
Inverter*
Lamp On *BL D IM*
Lamp OnBL D IM Inverter**
S tby P
Enable-3V3
12V U ndervoltage
detectSw itches off +3V3 and
+5V
*: present in inverterless displays**: present in displays w ith interna l inverter
D etect 2(12V sense)
AN D
D etect1
+1V2 +1V2-STAN D BY
+3V3 s tby
24V** Power-OK
12VD isp
3V3stby
Boost control (Opt)
+3V3 (SSB)
+1V8
Boos t conv. (opt)
+33V-TUN(analog)+33V
Supplier PSU Model Input Voltage Range
Sanken TFF32590-501A 40" High Mains (198- 265 Vac)
Sanken TFF42590-501A 46" High Mains (198- 265 Vac)
Sanken TFF42590-503 52" High Mains (198- 265 Vac)
Circuit Descriptions EN 43Q549.3E LA 7.
2009-Aug-07
7.3 Front-End
The Front-End consist of the following key components:
• Tuner HD1816AF• SAW filter 36M125• IF demodulator DRX3926K• AGC amplifier UPC3221GV.
Below find a block diagram of the front-end application.
Figure 7-4 Front-End block diagram
The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.
7.4 HDMI
In this platform, the TDA9996 HDMI multiplexer is implemented. Only for one HDMI input, a separate EEPROM is implemented to store the EDID values. For the other HDMI inputs, the EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical subaddress: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.
Figure 7-5 HDMI input configuration
Figure 7-6 EDID control (embedded EDID)
The delta’s with respect to the use of the TDA9996 as HDMI multiplexer compared with earlier chassis/platforms are:• +5V detection mechanism• Stable clock detection mechanism• Integrated EDID• RT control• HPD control• TMDS output control• CEC control• New hotplug control for PNX8543 for 5th HDMI input• New EDID structure: EDID stored in TDA9996, therefore
there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms.
After replacement of the TDA9996 HDMI mux, the default I2C address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.
7.5 Video and Audio Processing - PNX8543
The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.
Some more delta’s compared to the previous PNX85xx are:• 2 HDMI inputs (A & B)• HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.
The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.
• For a functional diagram of the PNX8543, refer to Figure 7-7.
18440_211_090227.eps090227
I2C-TUNERIF-AGC
NXP HybridTuner
SAWFilter
IF Amplifier DRX3926K PNX8543
I2C-SSB
CVBS
2nd SIF
TS
18440_213_090227.eps090720
TDA9996
1P06
1P04
1P03
1P02
1P05
H D M IA-R X
AR X
BR X
C R X
D R XH D M IB-R X
PNX8543
D
C
A
B
Out
1M 96
A B
H D M I 2
H D M I Side (optional)
H D M I 3(optional ) H D M I 1
H D M I 4 (optional )
E d id
18440_214_090227.eps090720
TDA9996CPUIIC
Platform w ith em bedded EDID
4 × HDM I inpu ts
253 common B ytes+ 1B sub addres o f
S ou rce P hys ica l A ddress+3B for inpu t A+3B for inpu t B+3B for inpu t C+3B for inpu t D
E D ID : 253B
3B 3B 3B 3B
Circuit DescriptionsEN 44 Q549.3E LA7.
2009-Aug-07
Figure 7-7 PNX8543 functional diagram
7.5.1 Video Subsystem
Refer to Figure 7-8 for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.
18440_202_090226.eps090226
TS out/in for
TS in from
CVBS, Y/C,
LVDS for
analog CVBS
analog audio
I2SDual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CAMPEG
PRIMARYLVDS
VIDEOSECONDARY
MEMORY
VIDEO3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I2C PWM GPIO IR ADC UART I2C GPIO Flash
SYSTEM
USB 2.0 CA
PNX8543x
DV INPUTDV-ITU-656
AV-PIP
SPI
MPEG/H.264
I2S
RECEIVER
(8051)CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSORSYSTEM
CONTROLLER
DECODERVIDEO
CPUMIPS32 4KEc
01 x22 x
AV-DSP
REDUCTIONAND NOISE
DE-INTERLACE
OUTPUTVIDEO
SUB-PICTURE
ENCODER
OUTPUTVIDEO
channel)(single or dualflat panel display
DRAWINGENGINE
DMA BLOCK
PCI 2.2
Circuit Descriptions EN 45Q549.3E LA 7.
2009-Aug-07
Figure 7-8 PNX8543 video flow diagram
The Video Subsystem consist of the following blocks:• Analogue Front-End (AFE) block• Video and PC Capture (VPC/PC) pipe• HDMI Receiver interface• Memory-Based Video Processor MBVP)• Video Composition Pipe (CPIPE)• Memory Based Video Processor (MBVP) VO-1• Memory Based Video Processor (MBVP) VO-2• Video Composition Pipe (CPIPE)• Dual Flat Panel Display-LVDS (FPD-LVDS)• Digital Encoder (DENC)• Digital Video VIP• 2D graphics block.
7.5.2 Audio Subsystem
Refer to Figure 7-9 for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.
18440_203_090226.eps090226
VMSP
HDMI_UIP
PC_RX
AFE(ADC)
DAC
LVDS_BUFLVDS_TX
CPIPE_L2QTV
CPIPE_L2VO
MCU-DDR
DM
A B
US
DDR2-SDRAM
PNX8543x
VCP_UIP
DENCDAC
VCP_WIFD
HDMI_RX
MBVP_L2VO2
MBVP_L2QTV
MBVP_L2VO1
A
A
GFX2
PIP
CVBS1/Ymonitor
main
CVBS2/Cmonitor
HDMI
VCP/PC
LOW IF
CVBS
RGB
Dual HDMI
FPD-LVDS1LCD panel
MUX
VCP_RX
2D_DE
VIP(ITU-656)
PC_UIP
GFX1
FPD-LVDS2LCD panel
CVBS/Y
C
CAI
TS
TSDOTSDICMD
PCMCIA
TSI
MSVD
DV (includingITU-656)
YPbPr
VGA
Circuit DescriptionsEN 46 Q549.3E LA7.
2009-Aug-07
Figure 7-9 PNX8543 audio flow diagram
The Audio Subsystem consist of the following blocks:• Analogue Audio Front End (AAFE) used to capture
Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input
• HDMI Receiver interface block• SPDIF input block• Audio Input (AI) block• Audio Output (AO) block• Demodulation & Decoding (ASDEC) DSP for decoding all
analogue terrestrial TV sound standards• Audio Post-Processing (APP) block• Digital Audio decoder.
7.5.3 Connectivity and Compute Subsystem
Refer to Figure 7-10 for the connectivity and compute subsystem.
18440_204_090226.eps090226
VMSP
ADC
MCU
DDR2-SDRAM
PNX8543x
HDMI_RX
CAI
SPDIF-IN
I2S
SPDIF
DigIFASDEC
(DEMODULATIONAND DECODING)
TM2270(MPEG, AC-3, MP3
DECODER)
SPDIF-OUT
AOAI
APP - AUDIO DSP(POST PROCESSING)
2DAC
2DAC
2DAC
2DAC
DM
A B
US
I2S-OUT-SD3I2S-OUT-SD4
I2S-OUT-WSI2S-OUT-SCKI2S-OUT-OSC
Main L, R
HP L, R
SCART2 L, R
SCART1 L, R
HDMI
SPDIF-IN1
IFSSIF
L, R
TS-IN
SPDIF-OutSPDIF-IN2
I2S-OUT-SD1I2S-OUT-SD2
I2S-IN-SD3I2S-IN-SD4
I2S-IN-WSI2S-IN-SCKI2S-IN-OSC
I2S-IN-SD1I2S-IN-SD2
SPDIF
ADC
4
4 × I2S
4
4 × I2S
XB3
XB4
fromXB4
fast SPDIF
XB1
XB2
4 × I2S
Circuit Descriptions EN 47Q549.3E LA 7.
2009-Aug-07
Figure 7-10 PNX8543 connectivity and compute subsystem
The Connectivity Subsystem consists of:• PCI/XIO interface• USB2.0 interface• Three 2-wire UARTs• Four Master/Slave I2C interfaces• Common Interface/Conditional Access Interface.
The Computing Subsystem consists of:• 32-bit MIPS RISC core• Enhanced JTAG (EJTAG) block inside the MIPS• JTAG_MMIO blocks• TV controller• Audio/Video DSP (AV_DSP)• Memory Control Unit (MCU).
7.5.4 Service Notice - FLASH RAM / PNX8543 exchange
The FLASH RAM (item 7P10) and/or PNX8543 (item 7H00) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+)
keys in the components, unauthorised exchange of these components will always result in a defective board.
18440_205_090226.eps090226
JTAG_MMIO
UART2
UART1
IIC2_DMA
IIC3_DMA
MIPS4KEc
SYSTEMCONTROLLER
80C51
PCI_XIO
CAI
MCU_DDR
DM
A B
US
DC
S-N
ET
WO
RK
DDR2-SDRAM
I2C-2
I2C-3
EJTAG
PNX8543x
UART-1
UART-2
I2C-MC
UART-3
PWMs
GPIOs
CI/CA
PCI/XIO
EJTAG
USB2.0USB
AVDSP
IIC4_DMAI2C-1
Circuit DescriptionsEN 48 Q549.3E LA7.
2009-Aug-07
7.6 Common Interface CI+
Together with this platform, an extension to the Common Interface (CI) Conditional Access system is added, called CI+.
CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.
The weakness of the conventional CI module as Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional
Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.
The CI+ standard is downwards compatible with the existing CI standard.
The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.
Figure 7-11 CI+ Conditional Access implementation
7.7 Net TV
In this chassis, a feature that enables access to dedicated internet pages from a limited group of information suppliers,
called “Net TV”, is introduced. A separate Wi-Fi module enables wireless communication with a local network.
7.8 Ambi Light
The Ambi Light architecture in this platform has been entirely renewed. The characteristics are:• Additional DC/DC board generating 12/16/24 V (optional)• ARM processor (on DC/DC panel or AL board)• Low-power LEDs• SPI interface from ARM to LED drivers• I2C upgradeable via USB• Each AL module has a temperature sensor.
The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards.
Refer to Figure 7-12 for the Ambi Light architecture.
C A M
P N X 8543
TS -IN P U T
Transport S tream s
C A-C ontro l
CA-
MD
I
CA-
MD
O
CA-
CTR
L
PCI/X
IO
P roprietary C A scram bling
C I + S tandard ised C C S scram bling
D E S /AE Sdescram bler
MH
EG M
MI
appl
icat
ion
M atrixM atrixtuner channe ldecoder
DES
/AES
scra
mbl
er
CA
clie
nt
M H E G C I+
decoderdem ux
(S C )
C om m andin te rface
Transport s treamin te rface
18440_221_090227.eps090227
Circuit Descriptions EN 49Q549.3E LA 7.
2009-Aug-07
Figure 7-12 Interface between Ambi Light and SSB
7.8.1 ARM controller
Refer to Figure 7-13 below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).
Figure 7-13 ARM controller interface
Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.
The SPI bus is a synchronous serial data link standard that operates in full duplex mode.
For debugging purposes, the working principle is given below:• At startup the controller will read-out matrix data from the
EEPROM devices (via SPI DATA RETURN)• Before operation, the driver current is set via SPI, with
driver in DC mode• During normal operation the controller receives RGB-,
configuration-, operation mode- and topology data via I2C• The controller converts the I2C RGB data via the matrixes
to SPI LED data• Via data return the controller receives error data (if
applicable).Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I2C (via USB). The controller can receive matrix values via I2C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.
7.8.2 LED driver communication (via SPI bus)
Refer to Figure 7-14 below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.
Figure 7-14 SPI communication between ARM controller and LED drivers
18310_203_090317.eps090317
18310_204_090318.eps090318
ARM
SD A
SC L
SEL1
SEL2
SPI C LOC K
SPI LATC H
SPI D ATA OU T
SPI D ATA R ETU R N
PW M C LOC K
BLAN K
PR OG
SPI LATC H 2 (only on dc/dc for aurea)
C S EEPR OM
TEM P
Sc l1
Sda1
tbd
tbd
Sc k
P0.7
M OS I
M ISO
P0.8
Tx D
R x DR x d0
Tx d0
M AT0.0
M AT1.0
tbd
tbd
P0.10
18310_205_090318.eps090318
Am b i l igh t m odu le 1 Am b i l igh t m odu le 2 Am b i l igh t m odu le N
ARM
LEDDRIVER
1
LEDDRIVER
2
LEDDRIVER
N
SP
I da
ta in
S o ut S in S o ut S o utS in
SPI c lo ck (SCLK)SPI la tch (XLAT)PRO G (VPRG )BLANKPW M CLO CK ( G SCLK)
ou
t16
ou
t16
ou
t16
SPI d a ta return
Circuit DescriptionsEN 50 Q549.3E LA7.
2009-Aug-07
The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below:• Data from the ARM controller is linked through the drivers,
which are connected in cascade• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK
are going directly from the controller to each driver• SPI DATA RETURN is linked from the last driver to the
controller: controller decides which driver returns data.
7.8.3 Temperature Control
Refer to Figure 7-15 for signal interfacing between the ARM controller and the temperature sensor on the AL boards.
Figure 7-15 Communication between ARM controller and temperature sensor
Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.
7.9 “White LED” Backlight
In this chassis, the backlighting of the LCD is done by LEDs. This enables controlled backlighting of the LCD. The LEDs are regulated by monitoring the LVDS signal with the PNX51xx. The PNX51xx then controls the power supply to the “matrix connected” LEDs via the I2C bus.
18310_206_090318.eps090318
Am b ilight m odu le 1 Am b ilight m odu le 2
ARM
TEMPSENSOR
Vcc
Pull-up Pull-up Pull-upTEMP
SENSOR
VccAm b ilight m odu le N
TEMPSENSOR
Vcc
IC Data Sheets EN 51Q549.3E LA 8.
2009-Aug-07
8. IC Data Sheets
This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic” ICs).
8.1 Diagram SSB: DC/DC B01A, TPS53124PW (IC 7U03)
Figure 8-1 Internal block diagram and pin configuration
Pin Configuration
Block Diagram
18250_300_090319.eps090319
VBST1
NC
EN1
VO1
VFB1
NC
GND
TEST1
NC
VFB2
VO2
EN2
NC
VBST2
DRVH1
LL1
DRVL1
PGND1
TRIP1
VIN
VREG5
V5FILT
TEST2
TRIP2
PGND2
DRVL2
LL2
DRVH2
28
27
26
25
24
23
22
21
20
19
18
17
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TP
S5
31
24
15
IC Data SheetsEN 52 Q549.3E LA8.
2009-Aug-07
8.2 Diagram SSB: Demodulator B02B, DRX3926K (IC 7T50)
Figure 8-2 Pin configuration
Block Diagram
Pin Configuration
18440_300_090303.eps090303
DVB-T/QAM/ATVDemodulator
Stereo Decoder
System Controller
SAW
MainTuner
PresawSense
DVB-T/QAMFEC
DAC
DAC
MPEG-2TS
CVBS
SIF
I2S Audio
I2C
GPIO
IF AGC
RF AGC
Integrated Tuner
I2C
ADCIF AMP
49XI
50XO
51VSSAH_OSC
52VDDAH_OSC
53VDDH
54VSSH
55VSSL
56VDDL
57TDO
58TMS
59TCK
60TDI
61I2C_SDA2
62I2C_SCL2
63I2S_CL
64I2S_DA
RSTN32
SAW_SW31
GPIO230
VSYNC29
VSSL28
VDDL27
VDDH26
VSSH25
I2C_SDA124
I2C_SCL123
MD722
MD621
MD520
MD419
VDDH18
VSSH17
PDP
VDDAL_AFE2
VSSAL_AFE2
SIF
CVBS
VDDAH_CVBS
VSSAH_CVBS
PDN
INP
INN
VSSAH_AFE1
VDDAH_AFE1
VDDAL_AFE1
VSSAL_AFE1
IF_AGC
RF_AGC
VDDL
VSSL
GPIO1
MSTRT
MERR
VSSH
VDDH
I2S_WS
MCLK
MVAL
MD0
MD1
MD2
MD3
VSSL
VDDL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
DRXK
IC Data Sheets EN 53Q549.3E LA 8.
2009-Aug-07
8.3 Diagram SSB: PNX8543 - Stand-by Controller B04A, PNX8543 (IC7H00)
Figure 8-3 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
18440_301_090303.eps090303
TS out/in for
TS in from
CVBS, Y/C,
LVDS for
analog CVBS
analog audio
I2SDual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CAMPEG
PRIMARYLVDS
VIDEOSECONDARY
MEMORY
VIDEO3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I2C PWM GPIO IR ADC UART I2C GPIO Flash
SYSTEM
USB 2.0 CA
PNX8543x
DV INPUTDV-ITU-656
AV-PIP
SPI
MPEG/H.264
I2S
RECEIVER
(8051)CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSORSYSTEM
CONTROLLER
DECODERVIDEO
CPUMIPS32 4KEc
01 x22 x
AV-DSP
REDUCTIONAND NOISE
DE-INTERLACE
OUTPUTVIDEO
SUB-PICTURE
ENCODER
OUTPUTVIDEO
channel)(single or dualflat panel display
DRAWINGENGINE
DMA BLOCK
PCI 2.2
PNX8543xEH
Transparent top view
1 9 17 253 11 19 277 15 235 13 21 2942612 10 18 264 12 22 308 20 286 14
T
AD
H
AK
P
AB
F
AH
M
Y
D
AF
K
V
BA
J
R
AC
G
AJ
N
AA
E
AG
L
W
C
AE
U
ball A1index area
3132
3334
ALAM
ANAP
IC Data SheetsEN 54 Q549.3E LA8.
2009-Aug-07
8.4 Diagram SSB: Ethernet B05A, PNX5120 (IC7C00)
Figure 8-4 Internal block diagram and pin configuration
18560_300_090403.eps090403
Pin Configuration
Block Diagram
PNX51xx
Transparent top view
2 4 6 8 10 1213
1415 17
1619
18 2021 23
22 2425
261 3 5 7 9 11
ball A1index area
AB
AD
AA
AC
YW
VU
R
N
T
P
ML
KJ
H
F
D
G
E
CB
A
AFAE
LVDS RX 1
UIP L3K7
TM327x 1
CONTROLLER
PCI/XIO
I2C-DMA
UART
CPIPE L3K7
LVDS TX 2
UART
PNX51xx
I2C
I2C
TM327x 2
TM327x 3
LVDS TX 3
LVDS TX 1
LVDS TX 4
GFX
16 X GPIO
GIC 3
EJTAG
CLOCK CAB
Video
LVDS RX 2
AUDIO IN
AUDIO OUT
GIC 1
GIC 2
MEMORY
Video
IC Data Sheets EN 55Q549.3E LA 8.
2009-Aug-07
8.5 Diagram SSB: Ethernet B07G, LAN9420 (IC7N04)
Figure 8-5 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
18561_300_090717.eps090717
External25MHz Crystal
GPIOs/LEDs(optional)
EEPROM(optional)
LAN9420/LAN9420i
PCI Host
PCI Device
PCI Device
MagneticsTo Ethernet
PCI Bus
IC Data SheetsEN 56 Q549.3E LA8.
2009-Aug-07
8.6 Diagram SSB: Audio B10A, TPA3123D (IC 7D10)
Figure 8-6 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
18440_302_090303.eps090303
1 F
SD
PVCCL
PVCCR
VCLAMP
GAIN1
BYPASS
1 F
1 F
0.22 F
AGND
} Control
ShutdownControl
LIN
RIN
BSR
BSL
PGNDR
PGNDL
0.22 F
22 H
22 H
0.68 F
470 F
0.68 F
1 F
470 F
GAIN0
AVCC
MUTE
ROUT
LOUT
123456789101112
242322212019181716151413
PVCCLSD
PVCCLMUTE
LINRIN
BYPASSAGNDAGND
PVCCRVCLAMP
PVCCR
PGNDLPGNDLLOUTBSLAVCCAVCCGAIN0GAIN1BSRROUTPGNDRPGNDR
TERMINALI/O/P DESCRIPTION24-PINNAME (PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance toSD 2 I AVCCRIN 6 I Audio input for right channelLIN 5 I Audio input for left channelGAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCCGAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =MUTE 4 I outputs enabled). TTL logic levels with compliance to AVCCBSL 21 I/O Bootstrap I/O for left channelPVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCCLOUT 22 O Class-D 1/2-H-bridge positive output for left channelPGNDL 23, 24 P Power ground for left-channel H-bridgeVCLAMP 11 P Internally generated voltage supply for bootstrap capacitorsBSR 16 I/O Bootstrap I/O for right channelROUT 15 O Class-D 1/2-H-bridge negative output for right channelPGNDR 13, 14 P Power ground for right-channel H-bridge.PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCCAGND 9 P Analog ground for digital/analog cells in coreAGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time viaBYPASS 7 O external capacitor sizing.AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properlyThermal pad Die pad P secure device to printed wiring board.
Block Diagrams EN 57Q549.3E LA 9.
2009-Aug-07
9. Block Diagrams
Wiring Diagram 40" (Elite Premium)
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN1 1. N 2.
L
1M20 (B01B)8. +5V7. KEYBOARD6. LED15. +3V3-STANDBY4. LED23. RC2. GND1. LIGHT-SENSOR
8408
WIRING DIAGRAM 40" (ELITE PREMIUM)
1M59
(B06
A)
1. S
CL-
AM
BI-
3V3
2. G
ND
3. S
DA
-AM
BI-
3V3
4. G
ND
5. G
ND
6. +
3V3
7. G
ND
SSB(1011)B
INLET
MAIN POWER SUPPLYMOD 230V TFF32590-501A B(1050)
IR LED PANEL (1112)
LCD DISPLAY (1004)
1M013P
1M208P
LEFT SPEAKER(5213)
TWEETER(5215)
CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN512. NC11. NC10. NC9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V
1M99 (B01B)12. GND11. SDA-SET10. SCL-SET9. POWER-OK8. BACKLIGHT-PWM...7. BACKLIGHT-BOOST6. BACKLIGHT-OUT5. LAMP-ON-OUT4. GND3. GND2. +12VD1. +12VD 17
35 (B
10A
)4.
RIG
HT-
SP
EA
KE
R3.
GN
D-A
UD
IO2.
GN
D-A
UD
IO1.
LE
FT-
SP
EA
KE
R
1G50 (B05C)41. N.C40. TXDAT-39.TXDAT.........3. TX2E+2. SCL-DISP1. SDA-DISP
1G51 (B05C)51. N.C.50. SDA-DISP49. SCL-DISP.........3. +VDISP12. +VDISP11. +VDISP1
1M95 (B01B)11. N.C10. GND9. +AUDIO-POWER8. +12V7. +12V6. +12V5. GND4. GND3. GND2. STANDBY1. +3V3-STANDBY
CN76. GND5. +24V4. GND3. +24V2. GND1. +24V
(CN
3)12
P(1
F53
)14
P(C
N2)
14P
- + - +
RIGHT SPEAKER(5214)
TWEETER(5216)
- + - +
WIFIMODULEON 1A01
(1042)
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
8395
8399
8735
8802
8150
8151
8735
8120
Board Level Repair
Component Level RepairOnly For Authorized Workshop
KE
YB
OA
RD
CO
NT
RO
L(1
127)
1M01
3P
1A01
124P
1M90
(AB
1)6.
GN
D5.
+24
V4.
GN
D3.
+24
V2.
GN
D1.
+24
V
1M59
(AB
1)7.
GN
D
6. +
3V3
5. C
ON
TR
OL2
4. C
ON
TR
OL1
3. S
DA
2. G
ND
1. S
CL
DC/DC INTERFACEAMBILIGHT(1028)
AB
8159
8590
1M84 (AB1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BUF6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH1CONN3. SPI-DATA-RETURN2. SPI-CLOCK-BUF1. SPI-LATCH2CONN
8584
8683
8101
8585
8801
18320_400_090728.eps090730
AM
BIL
IGH
T M
OD
UL
E8 L
ED
(1074)
AL
AM
BIL
IGH
T M
OD
UL
E6 L
ED
(1
073)
AL
AM
BIL
IGH
T M
OD
UL
E8 L
ED
(1075)
AL
AM
BIL
IGH
T M
OD
UL
E6 L
ED
(1076)
AL
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
8586
AMBILIGHT MODULE12 LED (1070)ALAMBILIGHT MODULE
12 LED (1072)AL
MASTER
SLAVE
85888589
CN
214
. PD
IM_S
elec
t13
. PW
M12
. On/
Off
11. V
bri
10. G
ND
39.
GN
D3
8. G
ND
37.
GN
D3
6. G
ND
35.
24V
inv
4. 2
4Vin
v3.
24V
inv
2. 2
4Vin
v1.
24V
inv
CN
312
. N.C
.11
. N.C
.10
. GN
D3
9. G
ND
38.
GN
D3
7. G
ND
36.
GN
D3
5. 2
4Vin
v4.
24V
inv
3. 2
4Vin
v2.
24V
inv
1. 2
4Vin
v
1F53
(B06
A)
1. G
ND
2. S
DA
-SE
T3.
SC
L-S
ET
4. G
ND
5. B
L-C
LK6.
GN
D7.
BL-
MO
SI
8. G
ND
9. B
L-M
ISO
10. G
ND
11. B
L-C
S12
. GN
D13
. BL-
VC
14. B
L-H
S
8319
8316
8153
WIFI ANTENNA(1044)W WIFI ANTENNA
(1043)W
EN 58Q549.3E LA 9.Block Diagrams
2009-Aug-07
Wiring Diagram 46" (Elite Premium)
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN1 1. N 2.
L
1M20 (B01B)8. +5V7. KEYBOARD6. LED15. +3V3-STANDBY4. LED23. RC2. GND1. LIGHT-SENSOR
8408
WIRING DIAGRAM 46" (ELITE PREMIUM)
1M59
(B06
A)
1. S
CL-
AM
BI-
3V3
2. G
ND
3. S
DA
-AM
BI-
3V3
4. G
ND
5. G
ND
6. +
3V3
7. G
ND
SSB(1011)B
INLET
MAIN POWER SUPPLYMOD 230V TFF42590-501A B (1050)
IR LED PANEL (1112)
LCD DISPLAY (1004)
1M013P
1M208P
LEFT SPEAKER(5213)
TWEETER(5215)
CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN512. NC11. NC10. NC9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V
1M99 (B01B)12. GND11. SDA-SET10. SCL-SET9. POWER-OK8. BACKLIGHT-PWM...7. BACKLIGHT-BOOST6. BACKLIGHT-OUT5. LAMP-ON-OUT4. GND3. GND2. +12VD1. +12VD 17
35 (B
10A
)4.
RIG
HT-
SP
EA
KE
R3.
GN
D-A
UD
IO2.
GN
D-A
UD
IO1.
LE
FT-
SP
EA
KE
R
1G50 (B05C)41. N.C40. TXDAT-39.TXDAT.........3. TX2E+2. SCL-DISP1. SDA-DISP
1G51 (B05C)51. N.C.50. SDA-DISP49. SCL-DISP.........3. +VDISP12. +VDISP11. +VDISP1
1M95 (B01B)11. N.C10. GND9. +AUDIO-POWER8. +12V7. +12V6. +12V5. GND4. GND3. GND2. STANDBY1. +3V3-STANDBY
CN76. GND5. +24V4. GND3. +24V2. GND1. +24V
(CN
3)12
P(C
N2)
14P
(1F
53)
14P
- + - +
RIGHT SPEAKER(5214)
TWEETER(5216)
- + - +
WIFIMODULEON 1A01
(1042)
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
8395
8399
8735
8802
8150
8151
8735
8120
Board Level Repair
Component Level RepairOnly For Authorized Workshop
KE
YB
OA
RD
CO
NT
RO
L(1
127)
1M01
3P
1A01
124P
1M90
(AB
1)6.
GN
D5.
+24
V4.
GN
D3.
+24
V2.
GN
D1.
+24
V
1M59
(AB
1)7.
GN
D
6. +
3V3
5. C
ON
TR
OL2
4. C
ON
TR
OL1
3. S
DA
2. G
ND
1. S
CL
DC/DC INTERFACEAMBILIGHT(1028)
AB
8159
8590
1M84 (AB1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BUF6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH1CONN3. SPI-DATA-RETURN2. SPI-CLOCK-BUF1. SPI-LATCH2CONN
8584
8683
8101
8585
8801
18320_401_090728.eps090730
AM
BIL
IGH
T M
OD
UL
E8
LE
D (
10
73)
AL
AM
BIL
IGH
T M
OD
UL
E6
LE
D (
10
74
)A
L
AM
BIL
IGH
T M
OD
UL
E8
LE
D (
10
75
)A
LA
MB
ILIG
HT
MO
DU
LE
6 L
ED
(1
07
6)
AL
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
8586 8587
AMBILIGHT MODULE8 LED (1070)ALAMBILIGHT MODULE
8 LED (1072)AL AMBILIGHT MODULE10 LED (1071)AL
MASTER
SLAVE
85888589
CN
214
. PD
IM_S
elec
t13
. PW
M12
. On/
Off
11. V
bri
10. G
ND
39.
GN
D3
8. G
ND
37.
GN
D3
6. G
ND
35.
24V
inv
4. 2
4Vin
v3.
24V
inv
2. 2
4Vin
v1.
24V
inv
CN
312
. N.C
.11
. N.C
.10
. GN
D3
9. G
ND
38.
GN
D3
7. G
ND
36.
GN
D3
5. 2
4Vin
v4.
24V
inv
3. 2
4Vin
v2.
24V
inv
1. 2
4Vin
v
1F53
(B06
A)
1. G
ND
2. S
DA
-SE
T3.
SC
L-S
ET
4. G
ND
5. B
L-C
LK6.
GN
D7.
BL-
MO
SI
8. G
ND
9. B
L-M
ISO
10. G
ND
11. B
L-C
S12
. GN
D13
. BL-
VC
14. B
L-H
S
8319
8316
8153
WIFI ANTENNA(1044)W WIFI ANTENNA
(1043)W
Block Diagrams EN 59Q549.3E LA 9.
2009-Aug-07
Wiring Diagram 52" (Elite Premium)
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN1 1. N 2.
L
1M20
(B01
B)
1. L
IGH
T-S
EN
SO
R2.
GN
D3.
RC
4. L
ED
25.
+3V
3-S
TAN
DB
Y6.
LE
D1
7. K
EY
BO
AR
D8.
+5V
8408
WIRING DIAGRAM 52" (ELITE PREMIUM)
1M59 (B06A) 1. SCL-AMBI-3V32. GND3. SDA-AMBI-3V34. GND5. GND6. +3V37. GND
SSB(1011)B
INLET
MAIN POWER SUPPLYMOD 230V TFF42590-503 B (1050)
IR LED PANEL (1112)
LCD DISPLAY (1004)
1M013P
1M208P
LEFT SPEAKER(5213)
TWEETER(5215)
CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST
1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
CN512. NC11. NC10. NC9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V
1M99
(B01
B)
1. +
12V
D2.
+12
VD
3. G
ND
4. G
ND
5. L
AM
P-O
N-O
UT
6. B
AC
KLI
GH
T-O
UT
7. B
AC
KLI
GH
T-B
OO
ST
8. B
AC
KLI
GH
T-P
WM
...9.
PO
WE
R-O
K10
. SC
L-S
ET
11. S
DA
-SE
T12
. GN
D
1735 (B10A)4. RIGHT-SPEAKER3. GND-AUDIO2. GND-AUDIO1. LEFT-SPEAKER
1G50
(B05
C)
1. S
DA
-DIS
P2.
SC
L-D
ISP
3. T
X2E
+... ... ... 39
.TX
DAT
40. T
XD
AT-
41. N
.C
1G51
(B05
C)
1. +
VD
ISP
12.
+V
DIS
P1
3. +
VD
ISP
1... ... ... 49
. SC
L-D
ISP
50. S
DA
-DIS
P51
. N.C
.
1M95
(B01
B)
1. +
3V3-
STA
ND
BY
2. S
TAN
DB
Y3.
GN
D4.
GN
D5.
GN
D6.
+12
V7.
+12
V8.
+12
V9.
+A
UD
IO-P
OW
ER
10. G
ND
11. N
.C
CN76. GND5. +24V4. GND3. +24V2. GND1. +24V
(CN
3)12
P(C
N2)
14P
(1F
53)
14P
- + - +
RIGHT SPEAKER(5214)
TWEETER(5216)
- + - +
WIF
IM
OD
UL
EO
N 1A
01(1042)
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL
1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND
8150
8151
Board Level Repair
Component Level RepairOnly For Authorized Workshop
KE
YB
OA
RD
CO
NT
RO
L(1
127)
1M01
3P
1A01124P
1M90
(AB
1)6.
GN
D5.
+24
V4.
GN
D3.
+24
V2.
GN
D1.
+24
V
1M59
(AB
1)7.
GN
D
6. +
3V3
5. C
ON
TR
OL2
4. C
ON
TR
OL1
3. S
DA
2. G
ND
1. S
CL
DC/DC INTERFACEAMBILIGHT(1028)
AB
1M84 (AB1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BUF6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH1CONN3. SPI-DATA-RETURN2. SPI-CLOCK-BUF1. SPI-LATCH2CONN
8584
8683
8101 18320_402_090728.eps090730
AM
BIL
IGH
T M
OD
UL
E8
LE
D (
10
74
)A
LA
MB
ILIG
HT
MO
DU
LE
8 L
ED
(1
07
3)
AL
AM
BIL
IGH
T M
OD
UL
E8
LE
D (
10
75
)A
LA
MB
ILIG
HT
MO
DU
LE
8 L
ED
(1
07
6)
AL
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M84
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. B
LAN
K-B
U6.
+3V
35.
PW
M-C
LOC
K-B
UF
4. S
PI-
LAT
CH
3. S
PI-
DAT
A-R
ET
UR
N2.
SP
I-D
ATA
-OU
T1.
SP
I-C
LOC
K-B
UF
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
1M83
(AL1
)14
. GN
D13
. VLE
D2
12. G
ND
11. V
LED
110
. PR
OG
9. T
EM
P-S
EN
SO
R8.
EE
PR
OM
-CS
7. G
ND
6. +
3V3
5. C
ON
TR
OL-
24.
CO
NT
RO
L-1
3. S
DA
2. G
ND
1. S
CL
8586 8587
AMBILIGHT MODULE10 LED (1070)ALAMBILIGHT MODULE
10 LED (1072)AL AMBILIGHT MODULE10 LED (1072)AL
MASTER
SLAVE
85888589
CN
214
. PD
IM_S
elec
t13
. PW
M12
. On/
Off
11. V
bri
10. G
ND
39.
GN
D3
8. G
ND
37.
GN
D3
6. G
ND
35.
24V
inv
4. 2
4Vin
v3.
24V
inv
2. 2
4Vin
v1.
24V
inv
CN
312
. N.C
.11
. N.C
.10
. GN
D3
9. G
ND
38.
GN
D3
7. G
ND
36.
GN
D3
5. 2
4Vin
v4.
24V
inv
3. 2
4Vin
v2.
24V
inv
1. 2
4Vin
v
1F53 (B06A) 1. GND2. SDA-SET3. SCL-SET4. GND5. BL-CLK6. GND7. BL-MOSI8. GND9. BL-MISO10. GND11. BL-CS12. GND13. BL-VC14. BL-HS
8319
8316
8153
8735
8735
8802
8399
8395
8801
8159
8120
8590
1P10 (B07C)5. GND4. GND3. USB20-DP2. USB20-DM1. +5V
USB
8307
8585
WIFI ANTENNA(1044)W WIFI ANTENNA
(1043)W
EN 60Q549.3E LA 9.Block Diagrams
2009-Aug-07
Block Diagram Video
B02A FRONT-END
B02B DEMODULATOR
B07A CI: PCMCIA CONNECTOR B04 PNX8543: B06G FPGA WOW - IO BANKS B05B PNX5100: VIDEO-IN B05E PNX5100: LVDS
B06D FPGA LOCAL CONTRAST - LVDS IN/OUT
B08A ANALOGUE EXTERNALS A
B07E HDMI SWITCH
B08B ANALOGUE EXTERNALS B
B08B ANALOGUE EXTERNALS B
B08D ANALOGUE EXTERNALS D
B08C ANALOGUE EXTERNALS C
B07E HDMI SWITCH
B05A PNX5100: SDRAM
B04G PNX8543: SDRAM
B07F PNX8543: FLASH
B07C USB CONNECTOR
B06F FPGA WOW - DDR
VIDEO
DDR2SDRAM
7HG0EDE1116AEBG
DDR2SDRAM
7HG1EDE1116AEBG
TUN-P11
IF-AGC
RF-AGC
TUN-P10
9T23
9T18
9T11
9T21
5
4
1T25
SAW 36M125
2T15
2T19
2T20
3T98
3T53
3T55
3000
3T50
5T12
1T11HD1816AF/BHXP
IF-OUT2
XTAL_OUT
RF-AGC
DC_POWER
+5V-TUN-PIN
+5V-TUN
9
IF-OUT1
MAIN HYBRIDTUNER
10
11
2
3
4
7
6
34
50
39
40
49
47
48
B-IF-_N-IF- PDP
IF-
44 IF-P
IF+
PDNB-IF+_N-IF+
TUN-P9
3 TUN-P3
ANTENNA-SUPPLYTUN-P1
1
2
7T50DRX3926K
DEMODULATOR
+5V-TUN
+5V-TUN
7T10UPC3221GV
AGC AMPLIFIER
1
IN
VCC
OUT
AGC CONTROL
1
3T70
43 CVBS4
CVBS-TER-OUT
3T70
9T63
9T617T52
9T20
3T22
33
1T5027M
7H00PNX85439EH/M2 7FN0
EP3C25F324C7N7C00PNX5120EH/M2
VIDEO STREAMSB04N
DDR2B05A
LVDSRX
B05B
SUPPLY
B05E
LVDSTX
B05E
DIGITAL VIDEO INB04H
SDRAMB04G
CONTROLB04E
CONTROLB04F
F2
H3
1
5SVHS IN
24
3
1E14
1E11
CVBSFRONT-Y_CVBS
FRONT-C
1E03
AV4-Y
AV4-PB
AV4-PR
PB
PR
Y
EXT 3
SIDEI/O
EXT 1
AV2-Y_CVBSEXT 2
1E01
7
1E02
20
2021
1
7
11
1516
2021
1
7
11
1516
SCART1
SCART2
AV1_STATUS8
AV3_PB
AV3-PR15
11 AV3-Y
14
5
1 Y_CVBS-MON-OUT-SC
CVBS-TER-OUT
197E05
197E04
REGIMBEAU_CVBS-SWITCH9,10,11
1
1E05
2
3
14
13
R-VGA
G-VGA
B-VGA
H-SYNC-VGA
V-SYNC-VGA
1 610
11
5
15
VGACONNECTOR
1E04
H2
P1
M1
K1
G1
B18
A18
A19
T2
T1
M4
P4
K4
H1
N3
J3
L3
B04AAV1_BLK16
7E09
AV2-STATUS8
16 AV2-BLK7E14
B04ACONTROL
B04ACONTROL
B04ACONTROL
B04ACONTROL
3 HDMIB-RXC-
HDMIB-RX0+
HDMIB-RX0-HDMIB-RX1+
HDMIB-RX1-
HDMIB-RX2+
HDMIB-RX2-
2
100
99
97
96
94
93
HDMIB-RXC+
7E16-7E06Y-CVBS-MON-OUT
15
7
11
20
AV1-G
AV1-B
AV1-R
AV1-CVBS
9EA3
9EA1
9EA2
9EA7
J2
A3
L2
N2
G4
AV1-PB
AV1-PR
AV1-Y
AV1-Y_CVBS
B17
A17
B16
B15
A16
A13
B11
B12
A12
B14
A15
A14
B13
7P02TDA9996
HDMISWITCH
C_-C_+
D0_-
D0_+
D1_-D1_+
D2_-
D2_+
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
3223
22
20
19
17
16
14
13
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
90
89
87
86
84
83
81
80
191
182
1
1P05
3
4
7
910
12
6
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-HDMI SIDECONNECTOR
191
182
1
1P02
3
4
7
910
12
6
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-HDMI 1CONNECTOR
1
1P03
3
4
7
910
12
6
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
1
1P04
3
4
7
910
12
6
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
191
182
HDMI 2CONNECTOR
191
182
HDMI 3CONNECTOR
1
1P06
3
4
7
910
12
6
HDMIA-RX2+
HDMIA-RX2-
HDMIA-RX1+
HDMIA-RX1-
HDMIA-RX0+
HDMIA-RX0-
HDMIA-RXC+
HDMIA-RXC-
191
182
HDMI 4CONNECTOR
TX851A+ L14AP18TX851A- L15AN18TX851B+ K17AL18TX851B- K18AK18
TX851C+ L17AP19TX851C- M17AN19TX851D+ L13AP20TX851D- M14AN20TX851E+ P17AM20TX851E- P18AL20
TX851CLK+ N17AM19TX851CLK- N18AL19
TX852A+ U17AP22
TXF1A+ RX51001A+ AE20K5TXF1A- RX51001A- AF20L5TXF1B+ RX51001B+ AC20K2TXF1B- RX51001B- AD20K1
TXF1CLK+ RX51001CLK+ AC19M2TXF1CLK- RX51001CLK- AD19M1
TXF1C+ RX51001C+ AE19L2TXF1C- RX51001C- AF19L1TXF1D+ RX51001D+ AE18P2TXF1D- RX51001D- AF18P1TXF1E+ RX51001E+ AC18T3TXF1E- RX51001E- AD18R3
TXF2A+ RX51002A+ AE17U2TXF2A- RX51002A- AF17V3TXF2B+ RX51002B+ AC17U4TXF2B- RX51002B- AD17V4
TXF2CLK+ RX51002CLK+ AC16U6TXF2CLK- RX5100CCLK- AD16V6
TXF2C+ RX51002C+ AE16U5TXF2C- RX51002C- AF16V5TXF2D+ RX51002D+ AE15U7TXF2D- RX51002D- AF15V7TXF2E+ RX51002E+ AC15U8TXF2E- RX51002E- AD15
D
A
V8
1G50
TX2
TX1
TX3
TX4
QUAD LVDS1920x1080100/120HZ
1G51
+VDISP1
TO DISPLAY1080p 50/60Hz
TO DISPLAY1080p 100/120Hz
I2C
I2C
N.C.
TX852A- V17AN22TX852B+ U15AL22TX852B- V15AK22
TX852C+ U14AP23TX852C- V14AN23TX852D+ U13AP24TX852D- V14AN24TX852E+ U11AM24TX852E- V11AL24
TX852CLK+ U10AM23TX852CLK- V10AL23
PNX8543
H264USB 2.0
FPGAWOW
LOCALCONTRAST
9FG29FG39FG49FG59FG69FG7
9FG89FG99FGA9FGB9FGC9FGD
*JUMPERS IN CASE OF NO FPGA
DDRSDRAM8Mx16
7FL0EDD1216AJTA
7P10NAND01GW3B2BN6F
NANDFLASH
1G
18310_402_090305.eps090514
PCI-AD24<->NAND-AD
FE-DATA(0-7)
(0-12)
DDR2-D(0-15)
(16-31)
DDR2-A(0-12)
(0-12)DDR2
SDRAM
7C01EDE5116AJBG-8E-E
DDR2SDRAM
7C02EDE5116AJBG-8E-E
PNX5100-DDR2-D(0-15)
(16-31)
PNX5100-DDR2-A(0-12)
MM1-D(0-15)
MM1-A(0-12)
43
21
USB20-DMUSB20-DP
USB 2.0CONNECTORSW UPLOAD
JPEGMP3
TO USB 2.0CONNECTOR
SIDESW UPLOADJPEG, MP3
ONLY FOR N&T
1P07
1P10
3
1
4
5
2
AL16
AN16
AP16
USB-OC
PD_P
PD_N
XI
XO
IF_AGC
RF_AGC
CVBS
SIF
MD
PCMCIA
CONDITIONALACCESS
CA-MDO(0-7)MDO(0-7)
CA-MDI(0-7)
20+3V3
CA_MD0
CA_MDI
7P15-7P1674LVC245APW
BUFFER
3351
52
18
17
1P00
68P
PCMCIA-VCC-VPP
8,18,26,53+3V3VDDH
2,16,27,56+1V2VDDL
37+3V3AVDDAH_AFE1
42+3V3EVDDAH_CVBS
52+3V3DVDDAH_OSC
36,46+1V2AVDDAL_AFE
HDMI_RX1_B_P
HDMI_RX2_B_N
HDMI_RX2_B_P
HDMI_RREF
HDMI_RX1_B_N
HDMI_RX0_B_P
HDMI_RXC_B_P
HDMI_RXC_B_N
HDMI_RX0_B_N
HDMI_RX0_A_P
HDMI_RXC_A_N
HDMI_RXC_A_P
HDMI_RX0_A_N
HDMI_RX1_A_P
HDMI_RX2_A_P
HDMI_RX2_A_N
HDMI_RX1_A_N
AI51
AI44
CVBS1Y_P
AI23
AI33
AI13
AI42
AI43
AI54
PC3_AI3
VSYNCIN
PC1_AI3
PC2_AI3
PC3_AI1
PC1_AI1
PC2_AI1
AI32
AI22
AI12
AI41
TNR_TSDI
HSYNCIN
C16RREF-PNX85XX
3HK0
7E0274HC4053PW
16+5VMDX
VDDx_1V8
8,45,91,24,75,95
+1V8-PNX85XXVDDO_3V3
4+3V3
VDDx_3V346,55
+3V3
VDDH_3V3
15,21,34,40,64,70,85,88
REF-3V3
J2DDR2-VREF-DDRVREF
VREFJ2
DDR2-VREF-DDR
J1+1V8-PNX85XXVDDL
VDDLJ1
+1V8-PNX85XX
AB32DDR2-VREF-CTRL
AA31+1V8-PNX85XX
M_VREF
DQ
A
M_IREF3HJ5
12,37+3V3-NANDVCC
PCI_AD
USB_FAULT
USB_DPUSB_DM
AM17+3V3-PERUSB_RPU
3H37
AN17+3V3-PERUSB_VBUS
3H45
AK19
A_PA_NB_PB_NC_PC_ND_PD_NE_PE_N
CLK_PCLK_N
LOUT2_A_PLOUT2_A_NLOUT2_B_PLOUT2_B_NLOUT2_C_PLOUT2_C_NLOUT2_D_PLOUT2_D_NLOUT2_E_PLOUT2_E_N
LOUT2_CLK_PLOUT2_CLK_N
IREF_LVDS VDDA-LVDS
ANALOGUE AVB04K
VREFJ2
PNX5100-DDR2-VREF-DDR
VREFP24
PNX5100-DDR2-VREF-CTRL
AA5+1V2-PNX5100
L16+1V8-PNX5100
P22+1V2-PNX5100-DDR-PLL1
AB20+3V3
AB18+3V3-PNX5100-LVDS-IN
J5+1V2-PNX-TRI-PLL1
L5+1V2-PNX-TRI-PLL2
T5+1V2-PNX-TRI-PLL3
M22+1V2-PNX5100-DLL
AE25+3V3-PNX5100-DDR-PLL0
E15+1V2-PNX5100-LVDS-PLL
B15+3V3-PNX5100-LVDS-PLL
AE14+1V2-PNX5100-CLOCK
VDDLJ1
+1V8-PNX5100
VREFJ2
PNX5100-DDR2-VREF-DDR
VDDLJ1
+1V8-PNX5100
49VREF-DDR1
1+2V5-DDR1
AD14 +3V3-PNX5100-CLOCK
AJ21+3V3-PERVDD_3V3_PER
AG301V8-PMNX85XXVDD_1V8_DDR
AJ12+1V2-PNX85XXVDD_1V2_CORE
AC6+3V3-STANDBYVDD_3V3_SBPER
F16RREF-PNX85XXVDDA_HDMI_3V3_BIAS
AK20VDDA-LVDS
AK12VDDA-ADC
AJ6VDDA-DAC
VDD_3V3_LVDS
VDDA_3V3_ADAC
VDDA_3V3_AADC
AF51V2-STANDBYVDD_1V2_SBCORE
VDDB04P
LVDSB04O
PNX5120
HD-NMFHD 100Hz
+5V
3P59
+T
1
2
3
37
38
40
39
41
50
51
49
40
11
5
3
4
2
1
1
23
4
Block Diagrams EN 61Q549.3E LA 9.
2009-Aug-07
Block Diagram Audio
B02A FRONT-END
B02B DEMODULATOR
B07A CI: PCMCIA CONNECTOR B04 PNX8543:
B07D HDMI
B07E HDMI SWITCH
B04G PNX8543: SDRAM
B07F PNX8543: FLASH
B07C USB CONNECTOR
B04I PNX8543: AUDIO
B04I PNX8543: AUDIO B10A AUDIO
B04M PNX8543: AUDIO B08C ANALOGUE EXTERNALS C
B08C ANALOGUE EXTERNALS C
B08B ANALOGUE EXTERNALS B
B08A ANALOGUE EXTERNALS A
B07B AUDIO IN HDMI
1E07
1E10
DDR2SDRAM
7HG0EDE1116AEBG
DDR2SDRAM
7HG1EDE1116AEBG
TUN-P11
IF-AGC
RF-AGC
TUN-P10
9T23
9T18
9T11
9T21
5
4
1T25
SAW 36M125
2T15
2T17
2T19
2T20
3T98
3T53
3T55
3052
3T50
5T12
1T11HD1816AF/BHXP
IF-OUT2
+5V
RF-AGC
DC_POWER
+5V-TUN-PIN
+5V-TUN
9
IF-OUT1
MAIN HYBRIDTUNER
10
11
2
3
4
7
6
34
50
39
40
49
47
48
B-IF-_N-IF- PDP
IF-
44 IF-P
IF+
PDNB-IF+_N-IF+
TUN-P9
3 TUN-P3
ANTENNA-SUPPLYTUN-P1
1
2
7T50DRX3926K
DEMODULATOR
+5V-TUN
+5V-TUN
7T10UPC3221GV
AGC AMPLIFIER
1
IN
VCC
OUT
AGC CONTROL
1
3T70
43 CVBS43T707T52
9T20
3T22
33
1T5027M
7H00PNX85439EH/M2
VIDEO STREAMSB04N AUDIOB04L
STANDBYCONTROLLER
B04A
DIGITAL VIDEO INB04H
SDRAMB04G
CONTROLB04E
CONTROLB04F
F2
H3
B18
A18
A19
3 HDMIB-RXC-
HDMIB-RX0+
HDMIB-RX0-HDMIB-RX1+
HDMIB-RX1-
HDMIB-RX2+
HDMIB-RX2-
2
100
99
97
96
94
93
HDMIB-RXC+
B17
A17
B16
B15
A16
A13
B11
B12
A12
B14
A15
A14
B13
7P02TDA9996
HDMISWITCH
C_-C_+
D0_-
D0_+
D1_-D1_+
D2_-
D2_+
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
3223
22
20
19
17
16
14
13
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
90
89
87
86
84
83
81
80
191
182
1
1P05
3
4
7
910
12
6
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-HDMI SIDECONNECTOR
191
182
1
1P02
3
4
7
910
12
6
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-HDMI 1CONNECTOR
1
1P03
3
4
7
910
12
6
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
1
1P04
3
4
7
910
12
6
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
191
182
HDMI 2CONNECTOR
191
182
HDMI 3CONNECTOR
1
1P06
3
4
7
910
12
6
HDMIA-RX2+
HDMIA-RX2-
HDMIA-RX1+
HDMIA-RX1-
HDMIA-RX0+
HDMIA-RX0-
HDMIA-RXC+
HDMIA-RXC-
191
182
HDMI 4CONNECTOR
PNX8543
H264USB 2.0
7P10NAND01GW3B2BN6F
NANDFLASH
1G
18310_403_090305.eps090514
PCI-AD<->NAND-AD
FE-DATA(0-7)
(0-12)
DDR2-D(0-15)
(16-31)
DDR2-A(0-12)
USB20-DMUSB20-DP
AL16
AN16
AP16
USB-OC
AN14
AP13
17351
2
SPEAKER-L3
4
SPEAKER-R
+AUDIO-L
-AUDIO-R
ADAC(1)
ADAC(2)
RESET-AUDIOAD1
AC5
ADAC(4)
AUDIO-HDPH-L-AP
AUDIO-HDPH-R-APADAC(3)
HeadphoneOut 3.5mm
AM12
AM11
7HV0TPA6111A2DGN
HEADPHONEAMPLIFIER
1
7
2
6
5RESET-AUDIO
A-PLOP B08A
7D10TPA3123D2PWP
CLASS DPOWER
AMPLIFIER
OUT-L
OUT-R
5
6
22
15
IN-R
IN-L
MUTE
SD
AUDIO-MUTE 4
2A-STBY
A-STBY
B08B
STANDBY &PROTECTION
7D03
LEFT-SPEAKER
RIGHT-SPEAKER
AUDIO-IN5-L
AUDIO-IN5-R
AL9
AL8
AN7
AP7
AK6
AL6
AP6
AM5
AN5
AP5
1E11
AUDIO INL+R
1E04
AUDIO-OUT-R
AUDIO-OUT-L AN11
AP10
AUDIO OUTL+R
V1DIGITALAUDIO
OUT
ADAC(5)
ADAC(6)
SPDIF-OUT
8
14
10
12
7E10A-PLOP
B04M
EXT 3
SIDEI/O
AUDIO-CL-L
A-PLOP
1
7
3
5
8
6
6
4
5
ADAC(7)
ADAC(8)
AUDIO-IN3-L
AUDIO-IN3-R
AM6
AN6
AUDIO INL+R
1E03
EF7HM2-1
EF7HM2-2
ADAC2
ADAC1
1E15
2
3
1
7HVA-1 7HVA-2
EF7E03
1
1E013
6
AP-SCART-OUT-L
AP-SCART-OUT-R
2 AV1-AUDIO-R
AV1-AUDIO-LEXT 1
EXT 2
1
1E02
3
2
6
AP-SCART-OUT-L
AP-SCART-OUT-R
AUDIO-IN2-R
AUDIO-IN2-L
2021
1
7
11
1516
SCART1
SCART2
A-PLOP
7E01A-PLOP B04M
2021
1
7
11
1516
1P0A
1P0B
AUDIO-IN4-L
AUDIO-IN4-R
AUDIO INVGA
DVI -> HDMI
7HM1
7HM1
AUDIO-CL-R3EA8
3EA7
2
2
2
2
AUDIO
9EA4
9EA4
AUDIO-IN1-L
AUDIO-IN1-R
PCMCIA
CONDITIONALACCESS
CA-MDO(0-7)MDO(0-7)
CA-MDI(0-7)
20+3V3
CA_MD0
CA_MDI
7P15-7P1674LVC245APW
BUFFER
335152
18
17
1P00
68P
PCMCIA-VCC-VPP
PD_P
PD_N
XI
XO
IF_AGC
RF_AGC
CVBS
SIF
MD
3T56
ANALOGUE AVB04K
HDMI_RX1_B_P
HDMI_RX2_B_N
HDMI_RX2_B_P
HDMI_RREF
HDMI_RX1_B_N
HDMI_RX0_B_P
HDMI_RXC_B_P
HDMI_RXC_B_N
HDMI_RX0_B_N
HDMI_RX0_A_P
HDMI_RXC_A_N
HDMI_RXC_A_P
HDMI_RX0_A_N
HDMI_RX1_A_P
HDMI_RX2_A_P
HDMI_RX2_A_N
HDMI_RX1_A_N
C16RREF-PNX85XX
3HK0
VDDx_1V8
8,45,91,24,75,95
+1V8-PNX85XXVDDO_3V3
4+3V3
VDDx_3V346,55
+3V3
VDDH_3V3
15,21,34,40,64,70,85,88
REF-3V3
8,18,26,53+3V3VDDH
2,16,27,56+1V2VDDL
37+3V3AVDDAH_AFE1
42+3V3EVDDAH_CVBS
52+3V3DVDDAH_OSC
36,46+1V2AVDDAL_AFE
AJ21+3V3-PERVDD_3V3_PER
AG301V8-PMNX85XXVDD_1V8_DDR
AJ12+1V2-PNX85XXVDD_1V2_CORE
AC6+3V3-STANDBYVDD_3V3_SBPER
F16RREF-PNX85XXVDDA_HDMI_3V3_BIAS
AK20VDDA-LVDS
AK12VDDA-ADC
AJ6VDDA-DAC
VDD_3V3_LVDS
VDDA_3V3_ADAC
VDDA_3V3_AADC
AF51V2-STANDBYVDD_1V2_SBCORE
VDDB04P
J2DDR2-VREF-DDRVREF
VREFJ2
DDR2-VREF-DDR
J1+1V8-PNX85XXVDDL
VDDLJ1
+1V8-PNX85XX
12,37+3V3-NANDVCC
AM17+3V3-PERUSB_RPU
3H37
AN17+3V3-PERUSB_VBUS
3H45
USB_FAULT
USB_DPUSB_DM
AI51
AI44
+5V
3P59
+T
IN-1
SHUTDOWN
IN-28
+3V3VDD
VO_1
VO_2
AIN_4_L
AIN_4_R
ADAC7
ADAC8
AIN_1_R
AIN_2_L
AIN_2_R
AIN_3_L
AIN_5_L
AIN_5_R
AIN_3_R
SPDIF_OUT
ADAC5
ADAC6
AIN_1_L
PO_7
PO_6
ADAC3
ADAC4
AADC
VREF_POS
AN8
AM9VDDA-AUDIO
VDDA_3V3_DACAK9
VDDA-DAC
5HRW
5HRZ
PVCC_L
PVCC_R
1,3
10,12+AUDIO-POWER
5D07
5D08
AB32DDR2-VREF-CTRL
AA31+1V8-PNX85XX
M_VREF
DQ
PCI_AD
A
M_IREF3HJ5
43
21
USB20-DMUSB20-DP
USB 2.0CONNECTORSW UPLOAD
JPEGMP3
TO USB 2.0CONNECTOR
SIDESW UPLOADJPEG, MP3
ONLY FOR N&T
1P07
1P10
3
1
4
4
2
1
23
4
EN 62Q549.3E LA 9.Block Diagrams
2009-Aug-07
Block Diagram Control & Clock SignalsCONTROL + CLOCK SIGNALS
B07F PNX8543: FLASH
B07C USB CONNECTORB05A PNX5100: SDRAM
B06F FPGA WOW - DDR
B06E FPGA WOW - POWER & COTROL
B01B DC / DC
B02A FRONT END
B04G PNX8543: SDRAM
B03G PNX8543: CONTROL B05F PNX5100: CONTROL
B04B PNX8543: DEBUG
B04A PNX8543: STANDBY CONTROLLER
B07A CI: PCMCIA CONNECTOR
B07H BUFFERING
B07G ETHERNET
B09A MINI PCI CONNECTOR
B05 PNX5100:
B07D HDMI
B04 PNX8543:
B04A PNX8543: STANDBY CONTROLLER
B08D ANALOGUE EXTERNAL D
B06G FPGA WOW - IO-BANKS:
1M99
7
6
5
1M952
LED1AJ3
AN2
AD3DETECT2
AF3
AG4
RESET-STBY
4x HDMICONNECTOR
AH3RESET-SYSTEM
AE4 ENABLE-3V3
PNX8543
7H00PNX85439EH/M2
43
21
USB20-DMUSB20-DP
USB 2.0CONNECTOR
TO USB 2.0CONNECTOR
ONLY FOR N&T
TOIR/LED PANEL
ANDKEYBOARD CONTROL
AC1 RESET-NVM
AJ2 LED2
B04F PCI
1HF
0
27M
W2
W1
1P07
CONTROLB04E
STANDBY B04A
HDMI_DVB04H
AH1AV1-BLK
AD5 STANDBY
1P10
3
1
4
5
2
AF2
AN3 KEYBOARD
RC
LIGHT-SENSOR
AF1 REGIMBEAU_CVBS-SWITCH
AD1 RESET-AUDIO
AC5 AUDIO-MUTE
AP2AV1-STATUS
6SPI-CLK 512KFLASH
STANDBYSW
7H02M25P05-AVMN6P
AJ1
3SPI-WPAK4
1SPI-CSBAK35SPI-SDOAJ4
2SPI-SDIAK1
AL16
AN16AP16
BACKLIGHT-OUT
BACKLIGHT-BOOST
7303DRX3926K-XK-A3
DEMODULATOR
FE-CLK 9
PCI-CLK-OUTAP28
A30
RESET-SYSTEMAN28
U3
B02BB02B B04A B04B
WC-EEPROM-PNX5100
7HC4
EEPROM(8Kx8)
7HC3M24C64-WDW6P
WP-NANDFLASH NANDFLASH
(1G)
7P10NAND01GW3B2BN6F
19
8
EEPROM(2Kx8)
7CD0M24C08-WDW6P
7
B08A
B01A
AE5 POWER-OK
B10A
B07A
B05H7HD0 NCP303LSN30G
2INP
1OUTP
+3V3-STANDBY+3V3-STANDBY
3 GND
B04E
B04G MEMORY
B04O LVDS
B04N TUN_CA
7P02 TDA9996
HDMISWITCH
FE-VALID 10FE-SOP 5
B08A
1P001
68
RESET-SYSTEM B03G
PCMCIA
CONDITIONALACCESS
7HG0EDE1116AEBG
7HG1EDE1116AEBG
SDRAMDDR2-CLK_P
DDR2-CLK_N
AB34
B10TNR_MICLK
M_DQ
M_A
M_CLK_P
M_CLK_N
PLL_OUT
CLK
RESET_SYS
GPIO_1
GPIO_6
GPIO_4
GPIO_5
P0_1
P2_2
P2_7
P1_1
P2_6
P0_6
P0_7
P2_3
XTAL_I
XTAL_O
SPI_CLK
SPI_CSBSPI_SDOSPI_SDI
P6_5
TNR_MIVALTNR_MISTRT
CA_MICLK
CA_MDI
CA_VSN_0
CA_MOCLK
CA_MDO
CA_DATA_DIRCA_DATA_EN
CA_ADD_EN
CA_RDY
PCI_AD
XIO_ACK
XIO_SEL_0
GPIO_3
USB_FAULT
USB_DMUSB_DP
P0_5
CADC_1
CADC_0
P2_5
P2_4
P3_3
P3_5
P3_4
CADC_2
CADC_3
RESET_IN
P1_2
HDMI_RX
P1_0
PWM_1
PWM_0
TNR_TSDI
C10B9
AB33
J8
K8
7N13
7N117N12
CA-DATADIR
CA-ADDEN
CA-DATAEN
CA-MICLK H32
D31A31
B31
TOPOWER SUPPLY
B08A
AH2AV2-BLKB08A
32
CO
MM
ON
INT
ER
FAC
E
1A011
68
MIN
I PC
I CO
NN
EC
TOR
7P15-7P16
USB-OC
TOPOWERSUPPLY
+3V3-STANDBY
+5VB04M
B01B B01C
AD4DETECT1
DETECT2
B04A
B01B
9H25
9H13
3HFG
7 XIO-ACK
9 XIO-SEL-NAND
18310_404_090305.eps090728
A20
B20
L32
L31UART
SERVICECONNECTOR
UPSTANDBY
RESRES
RXD-UP
TXD-UP
FE-DATA(0-7)
DDR2-D(0-31)
DDR2-A(0-12)
LCD-PWR-ON
BACKLIGHT-PWM-ANA-DISP
AF24
B26
A26
E18
F18
7C01EDE5116AJBG
7C02EDE5116AJBG
SDRAMPNX5100-DDR2-CLK_P
PNX5100-DDR2-CLK_N
P26
P25
J8
K8
PNX5100-DDR2-D(0-31)
DDR2-A(0-12)
1
2
3
4
5
6
7
8
1M20
AG1UA_RX_0
3
AH5UA_TX_1
3
1E50
7U11
RC_UP
ARX-DDC-SCL
PCI-CLK-ETHERNET
PCI-CLK-PNX5100
PCI-CLK-MINI
1E06
3
2
1
PCMCIA-A(0-14)
PCI-AD(0-31) PCI-AD(0-31)PCI-AD(0-31)
PCMCIA-D(0-7) PCI-AD(24-31)
PCI-AD(0-31)
PCI-AD(24-31)
CA-MDI(0-7)
MDO(0-7) CA-MDO(0-7)
CA-MOCLK_VS2 H31
A34MOCLKA
DETECT-12V
HOT_PLUG_AD19HOTPLUG-AB07E
AP1AV2-STATUS B08A
J34
GNT_BE29
L34
AD2
IRQ-CA
IRQ-CA
GPIO_2U4IRQ-PCI
AE1 LAMP-ON
B01B
B05H
CLK-OUT-PNX5100
BOOST-CTRLA24B23
B01BBACKLIGHT-BOOST
AB3 RESET-PNX5100P0_2 B05F
AB2 RESET-ETHERNETP0_3 B07G
V2 B07BPNX8543-LCD-PWR-ON_SPI-DI
P1_7
P6_4
SDM2H07
SDM
SPI-PROG AK2
AG2
2H06
SPI-PROG
BACKLIGHT-PWM-ANA-DISPB05H
9
8
HDMIB-RX12BRX-DDC-SCL
CRX-DDC-SCL 61
DRX-DDC-SCL 79
31
PCEC-HDMI
CEC-HDMI
57
1 2
19
18
CONTROL
1304
27M
50
49
1P05-151P02-15
1P03-151P04-15
1P05-131P02-131P03-131P04-13TO PIN:
7P32
3HD
4
PCI-CLK-PNX8535
3HFH
3HF4
3HF2
B07G
B05G
B09A
LOUT2_CLK_N
LOUT2_CLK_P
CLK_PCLK_N
TX852CLK-AL23
TX852CLK+AM23TX851CLK-AL19
TX851CLK+AM19
B06GB06G
B06G
B06G
NAND-AD(0-7) <-- PCI-AD(24-31)
7C00PNX5120EH/M2/F4
PNX5120
1CD
0
27M
AE13
AF13
61
IRQ-PCIRESET-mPCI
PC1-GNT-MINI
MINI PCI CONNECTOR FOR WIFI PANEL
PCI-GNT-B
9A02
DDR2B05A
PCI_XIOB05G
CONTROLB05F
7FL0EDD1216AJTA
DDDRSDRAM8Mx16MM1-CLK+
MM1-CLK-
A2
A1
45
ASDOD1 5
DCLKH4 6
nCSOE2 1DATA0H3 2
MM1-D(0-15)-->DQ1(0-15)
MM1-A(0-11)
7FN0EP3C25F324C7N
I/O BANKB06G
GPIOB05H
RESET-PNX5100B04A
L3 PCI-CLK-PNX5100B04A
BACKLIGHT-CTRL
BACKLIGHT-CONTROL-FPGA-IN
CLK-OUT-PNX5100
9CG8
FPGAWOW
7CG8
46
AF14
NANDFLASH
(1G)
7P10NAND01GW3B2BN6F
PCI-AD(0-14)
9E05
9E03
9E41
9E40
1
23
4
7N04DP83816AVNGNOPB
ETHERNETCONTROLLER
1N02
25M
17
18
1N00
ETHERNETCONNECTOR
PCI-CLK-ETHERNET 60B04F
RESET-ETHERNET 62B04A
IRQ-PCI61
PCI-AD(0-31)
7N04LAN9420
ETHERNETCONTROLLER 1N
02
25M
120
119
1N00
ETHERNETCONNECTOR
PCI-CLK-ETHERNET 16B04F
RESET-ETHERNET 15B04A
IRQ-PCI14
SSB_31043136343.2
SSB_31043136357.1
Block Diagrams EN 63Q549.3E LA 9.
2009-Aug-07
Block Diagram I2C
I²CPNX8543: CONTROLB04E
PNX8543: SDRAMB04G
FPGA BACKLIGHT - LVDS & I2C - MUXB06A
FPGA BACKLIGHT - LVDS & I2C - MUXB06A
FPGA LOCAL CONTRASTLVDS IN/OUT
B06D
PNX8543: FLASHB07FPNX8543: VIDEO STREAMSB04N
ANALOGUE EXTERNALS D-B08DHDMIB07D
HDMI SWITCHB07E
PNX5100: LVDSB05E
TEMPERATURE & FAN CONTROLB06C
LED PANEL CONTROLB06B
FPGA WOW - IO BANKSB06GFPGA WOWPOWER & CONTROL
B06E
FPGA WOW - DDRB06F
PNX5100: CONTROLB05FDEMODULATORB02B
ANALOGUE EXTERNALS BB08B
FRONT-ENDB02A
PNX8543: STANDBY CONTROLLERB04A
DC/DCB01B
ANALOGUE EXTERNAL DB08D
PNX5100: SDRAMB05A
PNX5100: SDRAMB07F
FLASH1G
7P10NAND01GW3B2BN
7HG0EDE1116AEBG
SDRAM
7HG1EDE1116AEBG
7C01EDE5116AJBG
SDRAM
7C02EDE5116AJBG
DDRSDRAM8Mx16
7FL0EDD1216AJTA
7FH0M25P16
16MFLASH
7F01M25P20
2MFLASH
7H02M25P05
512KFLASH
1M99
1R08
5
6
1M71
4
2
1
3
1 610
11
5
15
VGACONNECTOR
DATA-SDA
CLK-SCL
5
6
1E05
12
15
EEPROM
256x8
7E18M24C02
7H00PNX85439EH
PNX8543
B33
D32SDA 2
SCL 2
3HPU
3HPS
2 1
7F08PCA9540BDP
I2CMULTIPLEXER
AK5
AL5
AC1
MC_SDA
MC_SCL
PO_1
3H66
3H55
5 6
7HC3M24C64
EEPROM(NVM)
3H53
3H52
83HC
2-2
+3V3-PER
RESET-NVM 3HC2-1
SDA-UP-MIPS
SCL-UP-MIPS
3H53
3H53
+3V3-STANDBY
RES
SDA2
SCL2
SDA-SET
SCL-SET
SDA-BOLT-ON
SCL-BOLT-ON
SDA-SET0
SCL-SET0
SDA-DISP
SCL-DISP
3HP
V
3HP
T
+3V3-PER
G32
D33
SDA 3
SCL 3
3HPJ
3HPH
54 53
7F00XC3S250E
SPARTAN-3FPGA
3F23
3F22
49 50
7P02TDA9996
HDMIMUX
3P77
3P76
G17 G18
7FN0EP3C25F324C7N
FPGALOCAL
CONTRAST
3FN
F
3FN
G
24 23
7T50DRX3926K
DEMODULATORMICRONAS
3T58
3T57
SDA3
SCL3
SDA-SSB
SCL-SSB
3HP
M
3HP
K
+3V3-PER
L32
L31
9
10
12
11
GPIO_4
GPIO_5
AG1
AH5
UA_RX_0
UA_TX_1
RXD-UP
TXD-UP
3HP
C
3HP
L
+3V3-PER
3H58
3H60
+3V3-STANDBY
AL27
AK27
UA2_RX
UA2_TX
RXD-MIPS2
TXD-MIPS2
E19
C18
DDC_SDA_A
DDC_SCL_A
DDCA-SDA
DDCA-SCL
3HP
R
3HP
P
+3V3-PER
H33
F33
SDA 1
SCL 1
3HPE
3HPD
SDA1
SCL1
SDA-UP-MIPS
SCL-UP-MIPS
3H50
3H49
+3V3-PER
STANDBY
HDMI_DV
PCI
MEMORY
4
5
SDA-SET1
SCL-SET1
7
8
TOTEMP SENSORONLY FOR N&T
UARTSERVICE
CONNECTOR
3U67
3U66
+3V3
3FA6
3FA5
3CDA
3CD9 TOAMBI-LIGHT
MODULEOR
IPB POWERSUPPLY
FOR N&T
9F22
9F21
+3V3
3FA
A
3FA
B
+3V3
3F37
3F36
+3V3
1M59
3
4
5
7
1
3
EF7HC4
I2C-SDA
I2C-SCL
61
62
TUN-P7
TUN-P6
3T61
3T59
+3V3
TUN-SDA
TUN-SCL
RXD-UP
TXD-UP
RXD
TXD
13
14
2
9
1
4
11
8
RXD-MIPS
TXD-MIPS
RXD-UP
TXD-UP
D15
C15
DDC_SDA_B
M_DQ
M_A
DDC_SCL_B
DDC-SDA
DDC-SCL
9FA
2
9FA
1
9F20
9F19
9F15
9F13
5F05
SDA-AMBI-3V3
SCL-AMBI-3V3
3F39
3F38
+3V3
9F18
9F17
9F16
9F141 2
7F50LM75ADP
IC TEMPSENSOR
3F61
3F62
5 6
7CD0M24C08
BOOTEEPROM
3CD
D
3CD
C
K1 K2
7C00PNX5120EH
PNX5120FHD 120Hz
3CD
8
3CD
7
7 6
7F51PCA9533DP
I2C LEDDIMMER
3F67
3F66
3FH4
3FH5
D18
C18
L1
L2
3CA4
3CA5
3CA3
3CA2
TODISPLAY
TODISPLAY
TODISPLAY
RESERVED
9FNA
9FN9
7 6
1T11HD1816AF
MAINTUNER
1 2
7F50LM75ADP
IC TEMPSENSOR
3T16
3T15
9T71
9T70
9T16
9T15RES
3E70
3E47
+5VDCOUT
SCL
SDA
TO BOLT-ONMODULE
1M97
14
15
10
11
1F51
1
2
1G51
50
49
1G50
2
1
HDMICONNECTOR 3
1P04
16
15
RES
TO POWERSUPPLY
1R20
1
3
RES
1HP03U67
3U66
3E83
3E84
1
3
3P61
3P58
+5V-DDC
11
12
HDMICONNECTOR 2
1P03
16
15
3P64
3P63
+5V-DDC
30
31
HDMICONNECTOR 1
1P02
16
15
3P68
3P67
+5V-DDC
60
61
HDMICONNECTOR
SIDE
1P05
16
15
HDMICONNECTOR 4
1P06
16
15
1M96
5
6
3P66
3P65
+5V-DDC
3P29
3P28
+5V-DDC
78
79
6
5
ARX-DDC-SDA
ARX-DDC-SCL
BRX-DDC-SDA
BRX-DDC-SCL
CRX-DDC-SDA
CRX-DDC-SCL
DRX-DDC-SDA
DRX-DDC-SCL
ERX-DDC-SDA
ERX-DDC-SCL
9P19
9P20
9P29-4
5 6
7P07M24C02
EEPROM256x8
3P30
3P31
9P29-3
RES
3F41
3F40
1F53
3
23F17
3F18
5FC7
5FC5
R1-OUT
T1-IN
T1-OUT
R1-IN
7E17ST3232C
R2-OUT
T2-IN
RS232INTERFACE
3
21R08
9E35
9E36
1E50
1
3
UP
8
7T2-OUT
R2-IN
1E51
1
3
MIPS
FORMHP BOLT-ON
LEVEL SHIFTER FOR DEBUG ONLY
3E41
3E91
3HB1
3HB2
RESERVED
7E1974HC4066PW
3
10
13
6
5
12
UART-SWITCH
UART-SWITCHn
3ECK
3ECP
RXD-UP
TXD-UP3
21R12
3E08
9E41
9E40
STANDBY BUS400 kHz
SET BUS100 kHz
SSB BUS400 kHz
TUNER BUS400 kHz
AMBILIGHT BUS 30 kHz
DISPLAY BUS100 kHz
1E06
3
2
1
18310_405_090305.eps090514
7E20
B04A
QUADBILATERALSWITCHES
RESERVED
9E05
9E03
ERR53
ERR23
ERR27
ERR34
ERR25
ERR29
ERR21
ERR15
ERR13
ERR14
B04F
B04A
B04H
B04G
RESERVED
PNX5100-DDR2-D(0-31)(0-31)
PNX5100-DDR2-A(0-12)
MM1-D
MM1-A
DDR2-D
DDR2-A
PCI-AD
EN 64Q549.3E LA 9.Block Diagrams
2009-Aug-07
Supply Lines Overview
SUPPLY LINES OVERVIEW
MAINPOWER SUPPLY
B01A DC/DC
B01B DC / DC
B02B DEMODULATOR
B04A PNX8543: STANDBY CONTROLLER
B04B PNX8543: DEBUG
B04E PNX8543: CONTROL
B04F PNX8543: CONTROL
B04G PNX8543: SDRAM
B04H PNX8543: DIGITAL VIDEO IN
B04I PNX8543: AUDIO
B01C DC/DC
B02A FRONT-END
A SUPPLY
B04M PNX8543: AUDIO
B04N PNX8543: VIDEO STREAMS
B04O PNX8543: DIGITAL VIDEO OUT / LVDS
B04P PNX8543: POWER
B05A PNX5100: SDRAM
B05B PNX5100: VIDEO-IN
B05C PNX5100: POWER
B05E PNX5100: LVDS
B04L PNX8543: AUDIO
B05F PNX5100: CONTROL
B05G PNX5100: PCI
B05I PNX5100: DEBUG
B05H PNX5100: DISPLAY-INTERFACING
B06A FPGA BACKLIGHT-LVDS & I2C-MUX
B06B U-WAND
B06G FPGA WOW - IO BANKS
B07A CI: PCMCIA CONNECTOR
B07B AUDIO IN HDMI
B07C USB CONNECTOR
B06C TEMPERATURE & FAN CONTROL
B06D FPGA WOW - LVDS IN / OUT
B06E FPGA WOW - POWER & CONTROL
B06F FPGA WOW - DDR
B09A MINI PCI CONNECTOR
B07D HDMI
B08A ANALOGUE EXTERNALS A
B08B ANALOGUE EXTERNALS B
B08D ANALOGUE EXTERNALS D
B07E HDMI SWITCH
B07F PNX8543: FLASH
B07G ETHERNET
B07H BUFFERING
B09B DDR SUPPLY
B10A AUDIO
AB1 INTERFACE + SINGLE DC-DC
AB2 DUAL DC-DC
AB3 MICROCONTROLLER BLOCK
CN4
1 1
6 6
7 7
8 8
1M95+3V3-STANDBY
7U03TPS53124PW
+12VF
+12VF1
+3V3
23
15
17
+1V2-PNX85XX5U00
28
26
+12VF
12V/1V2COVERSION
12V/3V3COVERSION
5U33
5U03 +3V3F
1V2-STANDBY 1V2-STANDBY
+1V2-STANDBY
7U0M7U0NVOLT.REG.
+3V3+3V3
+3V3-STANDBY+3V3-STANDBY
+3V3-PER+3V3-PER
+5V+5V
+3V3-PER+3V3-PER
+1V8-PNX85XX+1V8-PNX85XX
3HJ3 DDR2-VREF-DDR
DDR2-VREF-CTRL
RREF-PNX85XXRREF-PNX85XX
+AUDIO-POWER+AUDIO-POWER
AUDIO-VDD
TO INTERFACEAMBILIGHT(OPTIONAL)
18310_406_090305.eps090728
CN7
1
2
3
4
5
6
24Vb
GND1
24Vb
GND1
24Vb
GND1
3.3V_ST
+12V
5U01
7U01TPS53124PW
+12V
+12VF2
+5V5-TUN
23
15
17
+1V2-PNX51005U04
28
26
+12VB05h
B04a,pB07d,B08d
B01a,B04p
B01c,B02b,B06c,B07b,h,B08b,B09b
B02a
B01a
B04i,m,B10a
12V/1V2CONVERSION
12V/5VCONVERSION
5U05
+1V2-PNX5100+1V2-PNX5100
+1V2-PNX85XX+1V2-PNX85XX
+3V3-PER+3V3-PER
CN5
1 1
6 6
7 7
2 2
3 3
4 4
5 5
8 8
LAMP-ON-OUT
1M99
BACKLIGHT-BOOST
+12VD
BACKLIGHT-OUT B05H
B04A
12V
12V
GND1
GND1
BL-ON_OFF
A/P_DIM
DIM
BOOST
+12V1U01
T3A
9 9 +AUDIO-POWER
10 10
RESERVED
+5V +5V
+33VTUN3U42 6U0B
VSW
7U0P
RESERVED
+3V3B01a
B01c
B01b
B01b
+3V3
+33VTUN+33VTUN
+VTUN
+5V-TUN+5V-TUN
+5V-TUN-PIN5T11
+3V3-PER+3V3-PER
+1V2A
+5V-TUN+5V-TUN
+12V+12V
+5V-TUN-CVBS
ANTENNA-SUPPLY
5T55
+3V3E5T52
+3V3D5T53
+3V3+3V3
+3V3A+3V3A
ANTENNA-SUPPLYANTENNA-SUPPLY
+12VF1U03
T3A
+12V
+12V
+VSND
GND_SND
N.C.
DualSynchronousStep-DownController
BACKLIGHT-PWM-ANA-DISP
5U31
+5V
B05H
B05H
CONTROL
CONTROL
CONTROL
CONTROLB05H
CONTROL
9 9INV_OK
POWER-OK
2 2
3 3
4 4
5 5
STANDBYB04ASTANDBY
GND1
GND1
GND1
CONTROL
7HM53HMF
CONTROL
7U50
IN OUTCOM
5U08
5U20
5U21
11 11 5U06
5U17
2K9 SUPPLIES
2K8 SUPPLIES
1M20
8
5+3V3-STANDBY TOIR/LEDPANEL
SS36
3T12
3T10
3T11
+1V2-PNX85XX+1V2-PNX85XX
+1V2
+3V3A5T54
9T64
9T62
7T54
IN OUTCOM
RES
7T56 3T69
+12V RES
3HJ1
9HM0
7HM6
RES
RES
DualSynchronousStep-DownController
7U06
7U05
7U02
7U08
7U0H-1
7U0H-2
7U0D-1
7U0D-2
+5V+5V
7HP0
IN OUTCOM
VDDA-AUDIO
+3V3+3V3
+3V3-PER+3V3-PER
VDDA-LVDSVDDA-LVDS
5HVD VDDA-LVDS
VDDA-AUDIOVDDA-AUDIO
5HY7 AUDIO-ADC
5HY4 VDDA-DAC
+1V2-PNX85XX+1V2-PNX85XX
+3V3-STANDBY+3V3-STANDBY
+1V2-STANDBY+1V2-STANDBY
+3V3+3V3
5HVH +3V3-PER
RREF-PNX85xx5HV8
+1V8-PNX5100+1V8-PNX5100
PNX5100-DDR2-VREF-CTRL
PNX5100-DDR2-VREF-DDR
+3V3+3V3
+3V3+3V3
+3V3-PNX5100-LVDS-PLL5C70
+VDISP2+VDISP2
+3V3+3V3
+3V3+3V3
VDDA-DACVDDA-DAC
3C20
3C22
1G5041
+1V8-PNX5100+1V8-PNX5100
+3V3+3V3
+3V3+3V3
+AUDIO-POWER+AUDIO-POWER
ADIO-VDDAUDIO-VDD
+1V8-PNX85XX+1V8-PNX85XX
+3V3-PNX5100-LVDS-IN5C67
+3V3-PNX5100-CLOCK5C68
+3V3-PNX5100-DDR-PLL05C69
+1V2-PNX5100+1V2-PNX5100
+1V2-PNX5100-DLL5C66
+1V2-PNX5100-CLOCK5C60
+1V2-PNX5100-TRI-PLL15C61
+1V2-PNX5100-TRI-PLL25C62
+1V2-PNX5100-TRI-PLL35C63
+1V2-PNX5100-DDR-PLL15C64
+1V2-PNX5100-LVDS-PLL5C65
1G511
+VDISP1+VDISP1
+3V3+3V3
5F04 +3V3M
7F06
IN OUTCOM
+2V5M
7F07
IN OUTCOM
+1V2M
+VDISP2
+VDISP1
+VDISP
+3V3+3V3
+12V+12V
+5V+5V
+5V+5V
PCMCIA-VCC-VPP3P09
+T
+3V3+3V3
+12V+12V
+1V2-PLL+1V2-PLL
+1V2-FPGA+1V2-FPGA
+2V5-PLL+2V5-PLL
+2V5out-FPGA+2V5out-FPGA
+2V5in-FPFA+2V5in-FPFA
+2V5-DDR1+2V5-DDR1
3V3-FPGA3V3-FPGA
VREF-FPGA1VREF-FPGA1
+2V5+2V5
+1V2-PNX85XX+1V2-PNX85XX
+3V3+3V3
+12VD+12VD
+3V3+3V3
+3V3F+3V3F
7CG2LCD-PWR-ON
+12V
+3V3+3V3
+12V
+VDISP+VDISP
1C02
T3A
1C01
T3A
1F50
T1A
5CG0
5CG2
RES
+5V+5V
1F51415FG1
5FG2
5FH4 +2V5-PLL
+1V2-PNX85XX+1V2-PNX85XX
+1V2-PLL
+1V2-FPGA
+3V3+3V3
CFH0
CFH1
+3V3-FPGA
+1V8-PNX85XX+1V8-PNX85XX
+1V8-PNX5100
+2V5+2V5
5FH2 +2V5out-FPGA
+2V5in-FPGA5FH3
5FH0
+2V5+2V5
VREF-FPGA1
+2V5-DDR15FL0
3FLM
VREF-DDR13FLK
5FH1
5FH4
7CG1
CIN-5V
1P0318HDMI 2
CONNECTORBIN-5V
1P0518HDMI SIDE
CONNECTOR
AIN-5V
1P0218HDMI 1
CONNECTOR
+3V3-STANDBY+3V3-STANDBY
+5V+5V
+3V3+3V3
1V8-HDMI
DIN-5V
1P0418HDMI 3
CONNECTOR
+5V-EDID
REF-3V3
3P47
5P11
+3V3+3V3
+5V+5V
+3V3+3V3
+5V+5V
+12V+12V
+3V3+3V3
+5V+5V
+3V3-STANDBY+3V3-STANDBY
+5V-DDC
5N07 +3V3-ET-ANA
+3V3+3V3
5N06 +3V3-ET-DIG
+3V3+3V3
+12V+12V
+5V-TUN
+5V5-TUN+5V5-TUN
+3V3+3V3
+3V3-NAND5P09
+3V3+3V3
+3V3-mPCI5A00
+5V+5V
+5V-mPCI5A01
1M963
EIN-5V1P0618HDMI SIDE
CONNECTOR
RES
7P13VOLT.REG.
+12V+12V
VLED1
+16V+16V
VLED2
RES
7P11
+3V3F+3V3F
+AUDIO-POWER+AUDIO-POWER
+2V5
+12V+12V
+2V5-REF
+V-LM833
7A00-1LCD-PWR-ON
+1V8-PNX85XX
7A00-2LCD-PWR-ON
7A07VOLT.REG.
3A26
3A07
7A01
7A02
7P01
IN OUTCOM
RES
5T51
B02b,B04a,pB06a,e
B05h,B09b
B01b,B02b,B04a,l,m,n,p,B05b,c,e,h,f,g,i,B06a,b,c,e,B07a,c,d,f,g,h, B08a,b,d,B09a
B04p
B04p
B09b
B04p
B04p
B01c
B04p
B01a
B01a
B01a
B01b
B02b
B01b
B01b
B07h
B07h
B02b
B01b
B01c
B01a
B01b
B01a
B01c
B04p
B01a
+3V3+3V3B01a
B01b
B04i
B04p
B01a
B01a
B04l
B02a
B02a
B06e
B01c
B01a
B01a
B05h
B05h
B06e
B01a
B01b
B01b
B09b
B04p
B01b,B04a,lB06a,B07a,c,d,B08a,b,d,B09a,d
B07h
B04aB05c
B02a
B04m
B04p
B04a,b,e,f,n
B04l
B04o
B04h
B01a
B01a
B01a
B01a
B01a
B01a
B01a
B09b
B01c
B01a
B01b
B01a
B01b
B05h
B01a
B09b
B01a
B09b
B06e
B06e
B06e
B06e
B06e
B06f
B06e
B06f
B09b
B01b
B01a
B01c
B01b
B01c
+3V3+3V3B01a
B01a
B01b
+5V-EDID+5V-EDIDB07d
+1V8-PNX85XX+1V8-PNX85XXB09b
B01c
B01a
B01a
B01a
B01c
B01a
B01a
B01c
B01b
B01c
B01a
B01b
B01c
B01b
B06d
B05e
B05e
B06g
B06g
B06g
B06g
B06g
B06g
B06g
B06g
B05a,c
B01a
B01c
B01a
B01b
B01b
AB2
AB2
B07e
B06a,e,f
B04g,p,B06e,B07d
B02a,b
AB1
AB1
AB2
AB3TO 1M59
SSBB06A
+24V
+3V3
1M90
1
1M59
6
TO CN7SUPPLY
TO AMBI-LIGHT
MODULE
OPTIONAL
OPTIONAL
OPTIONAL
6P06
1101
T3A
+24VF5102
c001
c002
+3V3+3V3
+1V8
7200TPS54283PWP
+24VF
+12V
14
12
+24VF
5201
+16V3 5200
AB1
B01b
NONSYNCHRONOUS
CONVERTER
(VLED1)
(VLED2)
7301
IN OUTCOM
1M846
11
13
1M596 TO 1M59
DC-DCOR
AMBI-LIGHTMODULE
AB1
5F05
Circuit Diagrams and PWB Layouts EN 65Q549.3E LA 10.
2009-Aug-07
10. Circuit Diagrams and PWB Layouts
Interface Ambilight: Interf + Single DC-DC
C
VCC
GND GND_HS
SWI_EMIT
SWI_COL
VFB
LVI_OUT
VIA
LPK_SENSE
DRV_COL
BOOT_IN
21
TIM_CAP
NC
out
9
in
E
in
F
out
1M85
2 9
I
3104 328 58351
1
A
outout
13
in
3104 328 58371
out
3109 D2
out
G
13
3110 D3
7
C
D
out
5103/5104
3104 328 58341
12V
2107 E92108 D32109 E33100 B5
owne
r.
7
E
3105 D53106 D53107 D53108 E9
12V
12
16V
116
c002 E2
85
3 4
STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9
F122 E2
F123 E2F124 E2F125 B3F126 A2I100 A6I101 C6I102 C6I103 C6
B
I109 A8c001 E2
1101
H
INTERFACE + SINGLE DC-DC
out
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2
24V
10
outout
2102 C62103 D6
out
F121 E2
F114 B5F115 C2
3101 C53102 D63103 D93104 D6
F120 D2
I
3
8
1 2 3 4 5 6 7 8 9
1 2
5106 B85107 A6
5 6 7
in
6
12
J
VLED2
I104 D9I105 D5I106 D7I108 D6
C
D
E
A
B
C
D
E
1100 A61101 A71M59 C21M84 A21M85 A21M90 D22100 A62101 B5
F109 B3F110 B3
2104 D52105 D92106 D9
431
16V
3104 328 58361
F116 D2F117 D2F118 D2F119 D2
16V
63V
C
RES
See the stuffing diversities table in the case of components marked with one star (*)
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
H
G
3111 E83112 B65100 A85101 A85102 A75103 B85104 B85105 B8
16V
5108 A66100 C87100 B7
5105/5106
in
B
DC/DC INTERFACE
8
D
9
A
B
10
J
11
9101 C39102 C39103 C39104 C3F101 B3F102 B3F103 B3F104 B3F105 B3F106 B3F107 A7F108 B3
F111 B3F112 B3F113 B3
A
5
4
F
VLED1
12V
RE
S
+16V
F118
5101
30R
VSW
I108
F103
+3V3
+24VF
F112
I100
+12V
RES100R3109
4567
1735446-7
1M59
123
+24V
F107
(RES)9103
I106
3K3
3108
1%
3102
15K
2102
F101
2n2
F104
5106
30R*
+16V
+16V
F122
9104
1
SUPERS.
1
NAME
DATEMGr CHECK
3104 313 6325AMBI 2K9
DC-DC INTERFACE
A3
08-08-06
08-06-19
08-12-06
08-10-23
08-09-18
08-08-06
5
4
3
2
***031**
3
2
08-10-23
Peter Van Hove
08-06-19
CT ROYAL PHILIPS ELECTRONICS N.V. 200808-06-06********
13
SETNAMECHN
CLASS_NO
100n
2105
1M0
3105
F115
I101
F123
F111
3101
47R
123456
1735446-6
1M90
9102
F117
(RES)
3104
330R
F121
F120
+24V
220p
2103
12K
3107
F102
VLED2
*
F124
30R
5105
F126 +24V
c001
F108
F105
F109
3031
2122232425262728
10111213
1
3
1716
20
29
5
18 19
514
2
6789
NCP3163BMNR2G7100
Φ
14
VLED1
+3V3
100n
2107
T2.0A
1101 I109*
30R
5107 RES
30R
5108 RES
F110
1%33
K
3106
30R
5100
RE
S
56789
15 16
1
1011121314
234
F113
502382-1470
1M84
100K
3111
2100
220n
2101
10n
3100
0R1
F114
RE
S
VLED2
2108
100p
100R
3112
VLED1
c002
2106
100n
1100
3.0A 32VT 10u
5102
100p
2109
RE
S
9101
F116
+12V
3110100R
RES
F106
+24V
F125
I103
I105
9
15 16
I104
1314
2345678
1M85
502382-1470
*1
101112
100n
2104
+16V
SS
24
6100
30R
5104
*
5103
30R*
3103
3K3
F119
SPI-LATCH2CONN
SPI-LATCH1CONN
SPI-LATCH2CONN
SPI-LATCH1CONN
SPI-LATCH2
SPI-LATCH1
I102
CONTROL1CONTROL2
SDA
SPI-CLOCK-BUF
SPI-DATA-RETURNSPI-DATA-OUT
PWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
SCL
18310_600_090305.eps090305
EN 66Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Interface Ambilight: Dual DC-DC
C
PVDD1 PVDD2
EN1SW1BOOT1
SW2
FB2EN2
BOOT2
FB1
ILIM2SEQBP
GND GND_HS
VIA2
9202 C4F200 B2F201 C7
F203 B5
F207 C4
3
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
I212 C3
I213 D5
I205 B6I206 B6I208 B3I209 B6I210 C6
3204 B33205 B63206 D3
I211 C3
3208 D7
I214 D4
3210 D3
I215 D3I216 B5I217 B4
4
B
C
DF
The components marked with two stars (**) belong to the 16V versions
12
B
13
A
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
6
G
7200 B49201 B5
1
(VLED1)(VLED2)
F202 D3
2217 C7
F204 B4
2219 D2
I200 A3
75
117
2212 C42213 C62214 C3
H
6
9
8
D
DUAL DC-DC
10
I201 A6I204 B2
3202 B33203 B6
(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).
I
1
3207 D2
8
3209 D5
2
3211 D3
8
G
6 7 8
A
J
E
Aow
ner.
6200 B26201 B7
F
3
I
D
2216 C2
C
2218 D1
E
2220 D7
2208 B72209 B72210 B82211 C3
2207 B2
2215 C6
1
C
2 13
J
3200 A33201 A6
109
2 3
1
4 5 6 7
3 4 5
2
B
C
D
7200 : TPS54383 in case of 16V or dual dc-dc converter
A
B
12
5
H
3212 D63213 D65200 B25201 B7
4
E
11
22u
2209
RES
2200 A42201 A42202 A52203 A52204 B32205 B62206 B1
E
The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).
2221 D32222 D52223 D82224 D8
3204
**
10R
*33
K
3213
I201
3207
68K**
**
9202
1%
I217
100u22
06
**
F202
35V
3208
47K1%
*
4u7
2207
** RES
+12V
2208
22u
F200
I214
F207
I209
2200
100u
35V
+12V
4u7
I213
RE
S
2212
I200
3209 3K
3
*
*
SS
24
6201
1n0
2215
**
+16V
2214
1n0
1n0
2213*
22n
2222
RE
S
*
2202
220n
10u
2224
3202
6R8
**
*
**
2223
10u
I205
10u
5200
220n
2201
**
+24VF
6200
SS
24
I215
9201*
F203
I210
2210
220u
25V*
3212
3K3
1%
*
47n
2205 *F204
2218
4u7
RE
S
4u7
2219
RE
S
I206
100u22
03
3203
6R8*
35V
*
3205
10R
47n**
33K**
2204
RE
S
3211
RES
2221
22n
22n
2216 2217
22n
RES
6R8
3201RES
**
RE
S
2211
1n0
VLED1
3K332
06
6R8
3200RES
F201
*
I212
5201
10u
+16V
2526
1718192021222324
87
4 15
9
1 14
10
213
16
7200TPS54283PWP
Φ 312
11
65
I204
I208
DATE
NAME
1
SUPERS.
1
CLASS_NO
EMANTESNHC
3 2
08-06-09 ROYAL PHILIPS ELECTRONICS N.V. 2008
08-06-19
Peter Van Hove
08-10-23
2
3
I211
130
2
3
4
5
08-08-06
08-09-18
08-10-23
08-12-06
08-06-19
08-08-06
A3
DC-DC INTERFACE
AMBI 2K9 3104 313 6325
CHECK
I216
1%** *
3210
3K9
VSW
2220
10u
18310_601_090305.eps090305
Circuit Diagrams and PWB Layouts EN 67Q549.3E LA 10.
2009-Aug-07
Interface Ambilight: Microcontrollerblock
OUTIN
INH BP
COM
NC
GNDRST
IN
CD
C
-T
X2
RTXC1RTXC2
RTCK
VBAT
DBGSEL
RST
VSS VSSA
VDDAVDD_3V3VDD_1V8
X1
2313 F7
3
4
19
6
14
20
15
2320 H52321 H42322 H42323 H42324 H4
G
H
3301-3 E6
O
7 11
A
1300 E21301 H5
2303 A42304 B82305 B102306 B92307 B10
E
E
F
1302 C42300 A32301 A42302 A5
3303-1 E63303-2 D63303-3 E63304-1 D63304-2 D7
2308 D42309 D52310 F62311 F72312 F7
3305-4 G8
2314 F72315 F7
F
G
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
9 103 4 5
6
2
81 2
17
2316 F82318 G22319 G6
3308-2 F83308-4 F83309-1 F83309-4 F83310 A10
3300-2 D53300-3 D73300-4 D73301-1 D63301-2 E5
3316 B10
3301-4 D73302-1 D7
O
B
C
D
J
L
RES
B
C
D
J
3302-2 D63302-3 E63302-4 D6
3330 E83331 E83332 E33333 F23334 G5
3304-3 D73304-4 D73305-1 E73305-2 G83305-3 G9
7300-1 B9
3306-1 E83306-2 E8
10
1 2 3
1
9 10 11
13
3307-1 E83307-2 F83307-4 F83308-1 F8
125 6
3311 A83312 A103313 B83314 B83315 B10
9303 F3
3317 B83318 C10
11
E
F
G
H
A
14
H
3326 D63327 D63328 E53329 E5
F308 F3F309 G6F310 G6F311 G8F312 G8
3335 G53336 G63337 G63338 E83339 F1
F320 E9
7300-2 A107301 A4
M
98
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
4 5 6 7 8
7
3306-3 E83306-4 E8
7
N
M
I310 D5I311 E7I312 E7I313 E7I314 F7
7302 E37303 F29300 E39301 F39302 F3
I320 F8
9305 G19307 H4
C
5
G
I
C
11 15
3324 D73325 D6
F304 C4F305 C4F306 D4F307 F3
P
F313 G8F314 G5F315 H4F316 C9F317 F1
I305 E6
I300 E9I302 F9
E
4
owne
r.
18
F
I
B
K
H
I306 E7I307 G6I308 G2I309 G5
16
I315 F7I316 F8I317 F6I318 F7I319 F5
16
N
20
C300 B8
13
1
P
12
A
19
3321 C53322 D53323 D5
F300 A5F301 A8F302 A10F303 B11
18
17
L
K
I303 A4I304 C10
2
B
A
98
D
I321 F6I322 G5
10
D
3
MICROCONTROLLER
3319 C83320 C5
100R3307-4 4 5
3307-1100R
1 8
I303
100n
2320
100K
3310
I321
RES
10K
3304
-227
9303RES
+3V3
F317
F320
27
2302
4u7
RES
10K
3302
-2
9302
5
3
2
4
1
7303NCP303LSN10T1
1%1K
8 RE
S
3319
4
2
1
3
5
I317
LD2985BM18R7301
I314
3322
100R
100R3307-2 2 7
2308
2309
100p
100p
10K
3300
-227
3306-3100R
3 6
1300
3337
16M
9
10K
10K
3336
3335
4 5
F306
100R
6
3305-4 10K
3300
-310
K3
3327
10K
+1V8+3V3
10K
RE
S33
26
10K
3302
-445
1 8
F310
2 7
100R3308-1
34 5
3308-2100R
1302
B3B-PH-SM4-TBT(LF)
12
+3V3
RES
3313 10
K
8
2303
10n
3301
-110
K1
I308
I304
I319
I313
1%1K
53311
5 4
3104 313 6325AMBI 2K9
DC-DC INTERFACE
A2
08-08-06
08-06-19
08-12-06
08-10-23
08-09-18
08-08-06
5
4
3
2
130
3309-4100R
3
2
08-10-23
Peter Van Hove
08-06-19
ROYAL PHILIPS ELECTRONICS N.V. 200808-06-09
33
SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATECHECK
10K
3321
18
I318
10K
3305
-1
2311
100n
F315
+3V3
1K0
3339
7
9305
RE
S
100R3306-2 2
I300
+1V8
F312
2307
10n
4
2319
100p
3
21
8
LM393PT7300-1
2322
100n
3323
100R
10K RES
3332
100R3331
F303
RES 9300
10n
F316
2304
3318
10K RES
1%
3317
RE
S1K
5
3 610K3305-3
3328
3329
10K
10K
+3V3
F309
F311
3308-4100R
4 5
100p
2316
17 40
7 19 43 31
11
12
9307
28
P0.8|TXD1|MAT2.129
P0.9|RXD1|MAT2.230
6
26
2025
4
425
P0.2|SCL0|CAP0.018
P0.30|TDI|MAT3.315
P0.31|TDO16
P0.3|SDA0|MAT0.021
P0.4|SCK0|CAP0.122
P0.5|MISO0|MAT0.123
P0.6|MOSI0|CAP0.224
P0.7|SSEL0|MAT2.0
P0.22|AD0.032
P0.23|AD0.133
P0.24|AD0.234
P0.25|AD0.638
P0.26|AD0.739
P0.27|TRST|CAP2.08
P0.28|TMS|CAP2.19
P0.29|TCK|CAP2.210
P0.15|RI1|EINT245
P0.16|EINT0|MAT0.246
P0.17|CAP1.2|SCL147
P0.18|CAP1.3|SDA148
P0.19|MAT1.2|MISO11
P0.1|RXD0|MAT3.214
P0.20|MAT1.3|MOSI12
P0.21|SSEL1|MAT3.03
27
P0.0|TXD0|MAT3.113
P0.10|RTS1|CAP1.0|AD0.335
P0.11|CTS1|CAP1.1|AD0.436
P0.12|DSR1|MAT1.0|AD0.537
P0.13|DTR1|MAT1.141
P0.14|DCD1|SCK1|EINT144
5
7302LPC2103FBD48
Φ
CTRLMICRO-
10K
3301
-44
I307
I320
I309
I316
3301
-310
K3
6
100n
2323
F305
I322
I315
F308
F307
C30
0
47K
3315
RES
18
+3V3
27
3302
-110
K
36
10K
3303
-2+3V3
3303
-310
K
9301
F302
2306
100n
10K
F301
3333
27
2 7
10K
3301
-23305-2 10K
100p
2313
633
04-3
10K
3
10K
3304
-445
3309-1100R
8 1
+3V3
22R
3334
2314
100p
10K
3300
-445
RE
S
+3V3
2312
100p
100n
2301
+3V3
2300
1u0
10K
F314
RE
S
3314
I306
F304
I305
18
I310
3304
-110
K
10n
2305
RES
100n
2321
+3V3
10K
RE
S33
25
10K
3324
100R3338
I311
10K
3320
F300
36
18
3302
-310
K
RES
3303
-110
K
100R3330
I312
4
100p
2315
LM393PT7300-2
5
67
8
3316
1%1K
5
I302
+3V3
3312
1K5
1%
2310
+3V3
+3V3
100p
4 5
2318
100n
8
100R3306-43306-1
100R1
F313
2324
100n
SK
HU
BH
E01
013
01
1 23 4
PWM-CLOCK-BUF
RE
S
SPI-DATA-RETURNSPI-DATA-OUT
SPI-LATCH1SPI-LATCH2
TEMP-SENSOREEPROM-CSBLANK-BUF
PROG
CONTROL2
SDASCL
UD-MD
CONTROL1PWM-CLOCK-BUF
SPI-CLOCK-BUF
TEMP-SENSOR
18310_602_090305.eps090410
EN 68Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Layout DC/DC Interface Ambilight
3104 313 6325.5 18310_550_090309.eps090729
1100
1101
1301
13021M59
1M84
1M851M
90
2200
2201
22022203
2206
2207
2208
2209
22102218
2219
2220
2223
2224
2300
2301
2302
2303
2310
2311
2312
2315
2316
2319
2321
2322
2323
3306
3307
3308
3309
3324
3326
3331
3338
5102 5200
5201
6200
6201
7200
7301
9101
9102
91039104
9201
9202
1300
2100
2101
2102
2103
2104
21052106
2107
2108
2109
2204
2205
2211
22122213
2214
2215
2216
2217
2221
2222
2304
2305
2306
2307
2308 2309
2313
2314
2318
2320
2324
31003101
3102
3103
3104
310531063107
3108
3109
3110
3111
3112
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3300
33013302
3303
3304 3305
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322 3323
3325
33273328
3329
3330
3332
3333
3334
3335
33363337
3339
5100
5101
5103
51045105
5106
5107
5108
6100
71007300
73027303
9300
9301
9302
9303
9305
9307
C300
F101
F102
F103
F104
F105
F106
F107
F108
F109
F110 F111
F112
F113
F11
4
F115
F116
F117
F118
F119
F120
F121
F122
F123
F124
F12
5
F12
6
F200
F201
F20
2
F203
F204
F20
7
F30
0
F30
1
F302F303
F304
F305
F306
F307
F30
8
F30
9
F310
F31
1
F312
F313
F314
F315
F316
F317
F32
0
I100
I101
I102
I103
I104
I105
I106
I108
I109
I200
I201
I204
I205
I206
I208
I209
I210
I211
I212
I213
I214
I215
I216
I217
I300
I302
I303
I304
I305
I306
I307
I308
I309
I310
I311
I312
I313
I314
I315
I316
I317
I318
I319
I320
I321
I322
c001
c002
Personal Notes:
10000_012_090121.eps090121
Circuit Diagrams and PWB Layouts EN 69Q549.3E LA 10.
2009-Aug-07
6 LED Low-Pow: Microcontroller Block
OUTIN
INH BP
COM
X2
RTXC1RTXC2
RTCK
VBAT
DBGSEL
RST
VSS VSSA
VDDAVDD_3V3VDD_1V8
X1
-TC
NC
GNDRST
IN
CD
A
C
D
E
F
G
H
1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11
17
F
J
M
A
2
C
4
E
6
G
8 9 10 11 12 13
1 2 3 4 5 6 7 8 9 10 11 12 13
14
D
OUT
B
7
D
6
F
H
B
2108 B122109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3
11
M
2
1
20
3
19
75
4
2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D83105-3 E83105-4 D83106-1 E83106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B103112 D93113 D83114 E83115 E8
19
I
H
15
O
P
I3116 E83117 E73118 E53119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F113126-2 F113126-4 F113127-1 F113127-4 F11
owne
r.
17
C
1
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
5
C
1
3128 E113129 E113130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C113141 C133142 F117101 A77102 E6
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
H
103
4
N
MICROCONTROLLER BLOCK LITEON
5
7110 F47116-1 B11
7116-2 A129101 E59102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B39114 B29119 H69121 G4C140 B10
8 9
12
F
12
16
A
13
F101 A8F102 F5F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11F120 A1F121 A1F122 A1F123 A1
8
IN
6
3
O
D
E
15
F124 B1F125 B1F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1F137 F1F138 F1F139 F1I110 G8
L
K
2
B
16
I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
2109
100p
F135 E1
3129100R
3456789
15 16
VLED1-F
1
1011121314
23 6
1M84
3124-3100R
F124
+3V3
VLED1
F134
100n
2120
36
VLED2
I124
10K
3101
-3
F107
9112
10K3103-3
36
9109
+3V3
F139
F129
100p
2118
VLED2
F106
RE
S
RE
S10
K31
13
1%
45
1K531
35
10K3103-4
3136
1%1K
5
F109
91089107
9101
F130
+3V3
+3V3
RES9104
RES 9103
RES10K
3141
100R1 83124-1
10K
3112
RES9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
1314
23456789
1M2A
1
101112
3107
10K
RES
2106
10n
11
12
+3V3
+3V3
2025
4
425 17 40
7 19 43 31
22P0.4|SCK0|CAP0.1
23P0.5|MISO0|MAT0.1
24P0.6|MOSI0|CAP0.2
28P0.7|SSEL0|MAT2.0
29P0.8|TXD1|MAT2.1
30P0.9|RXD1|MAT2.2
6
26
39P0.26|AD0.7
8P0.27|TRST|CAP2.0
9P0.28|TMS|CAP2.1
10P0.29|TCK|CAP2.2
18P0.2|SCL0|CAP0.0
15P0.30|TDI|MAT3.3
16P0.31|TDO
21P0.3|SDA0|MAT0.0
1P0.19|MAT1.2|MISO1
14P0.1|RXD0|MAT3.2
2P0.20|MAT1.3|MOSI1
3P0.21|SSEL1|MAT3.0
32P0.22|AD0.0
33P0.23|AD0.1
34P0.24|AD0.2
38P0.25|AD0.6
37P0.12|DSR1|MAT1.0|AD0.5
41P0.13|DTR1|MAT1.1
44P0.14|DCD1|SCK1|EINT1
45P0.15|RI1|EINT2
46P0.16|EINT0|MAT0.2
47P0.17|CAP1.2|SCL1
48P0.18|CAP1.3|SDA1
27
13P0.0|TXD0|MAT3.1
35P0.10|RTS1|CAP1.0|AD0.3
36P0.11|CTS1|CAP1.1|AD0.4
27
MICRO-CTRL
ΦLPC2103FBD48
7102
36
3104
-210
K
16
10K
3104
-3
14
23456789
15
1
10111213
4
2
1
3
5
1M1A
7101LD2985BM18R
100R
3110
3116
10K
I110
10K
3133
9106
RE
S
36
F103
10K
3106
-3
+1V8
+3V3
10K
3111
I126
VLED2
10K
3103
-11
8
F122
10K
3105
-33
6
45
84
10K
3102
-4
7116-1LM393PT
3
21
F104
+3V3
+3V3
I111
F133
9114
3125-4100R
4 5
F112
3105
-110
K1
8
2117
100p
+3V3
VLED1
35V
10u21
28
I113
RE
S
100p
2124
10K
F116
3119
100n
2107T1.5A
1105
9110
33p
2125
F135
1 8
2
130
3126-1100R
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
2008-10-27
2008-08-08
3
10K
72
3
2
2008-10-27
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
3101
-2
100K RES
3134
+1V8
I125
+3V3
F101
9119
1u0
2130
22R
3130
10n
2108
100R
3109
100p
2110
3117
10K
10K
3106
-11
8
100n
2111
VLED2
3108
10K
RE
S31
1410
K
RES
3118
10K
89
15 16
F127
11121314
234567
1M83
1
10
F138
45
F102
3 4 5
10K
3105
-4
1X03REF EMC HOLE
1 2
F123
F121
100n
2113
3103-210K2
7
10K
36
3102
-3
10K
RE
S
3137
F126
F131
9102
100R3124-2 2 7
10K
18
3102
-1
18
1
3104
-110
K
NCP303LSN10T17110
5
3
2
4
F128
C14
0
3101
-44
5
+3V3
10K
F105 7
100p
2116
10K
3106
-22
3120
10K
2121
100n
1101 16
M9
1 8
F137100R
3125-1
F108
100p
2115
+3V3
F118
I114
2123
100p
2101
1u0
2105
10n
100R3128
VLED1
1u0
2127
3125-2100R
2 7
RES47K
3138
RE
S
100p
2122
100R3126-4 4 5
3142100R
100R
3131
F117
RE
S91
21
4 5
I115 +3V3
3124-4100R
F136
RE
S
F132
1%1K
53140
2102
100n
RE
S21
14
100p
2 7
3115
10K
3126-2100R
+3V3
5
67
84
VLED1
7116-2LM393PT
45
F125
10K
3104
-4
2129
10u
35V
10K
3132
100R1 8
3123
3127-1
1K5
1%
RE
S1K
81%
7
3139
10K
3102
-22
100n
2119
2112
100n
7
9111RES
3105
-210
K2
2126
100p
+3V3
4u7
2103
10n
2104
100p
2131
+3V3
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
SCL
PROG
SDACONTROL-1CONTROL-2
EEPROM-CSTEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCKSDA
CONTROL-2
EEPROM-CSTEMP-SENSOR
CONTROL-2CONTROL-1
SPI-DATA-RETURNSCL
PROG
BLANK
CONTROL-1SDA
SPI-DATA-INSCL
SPI-DATA-RETURN
SPI-LATCHSPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCKSPI-LATCH
BLANK-BUFPROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CSTEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURNSPI-LATCH
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
CONTROL-1
UD-MD
SDA
18310_610_090305.eps090730
EN 70Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
6 LED Low-Pow: Microcontroller Block
EN
C
EN
MODE
SIN
XHALF
XLAT
SCLK
VCC
SOUT
6
2
0
11
VIA
9
1312
10
4
IREF
GND GND_HS
OUT
GSCLK
7
14
5
3
1
8
15
XERR
BLANK
EN
EN
S
GND
Q
HOLDW
VCC
C
D
19
5
I
17
MICROCONTROLLER BLOCK LITEON
M
10
B
E
owne
r.
5
H
14
G
H
I
2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7
9
D
6 15
13
194
15
K
G
1 2 3 4 5 6 7 8
13
C
14
3
G
E
4
Ais
pro
hibi
ted
with
out t
he w
ritte
n co
nsen
t of t
he c
opyr
ight
F
9 10 11 12 13
1 2 3 4 5 6
D
32 8
1 2
169
B
20
6
J
18
P
20
7 8 9 10 11 12 13
A
B
C
L
J
7 8
3219 B113220 C11
17 18
3223 C113224 H11
N
D
E
F
G
H
I
A
B
C
D
E
F
O
P
O
N
L
M
K
9214 D10F202 B3
C
F205 B10F206 C10
2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6
7
16
F
3216 H63217 H63218 H6
1
H
3221 H113222 I8
11
F215 H9
6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3
12
12
10
11
7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D9
F203 C5F204 H6
F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9
INPUT BUFFER
AA
ll rig
hts
rese
rved
. Rep
rodu
ctio
n in
who
le o
r in
par
ts
I
9210 RES
9211
F214
5
7
4
14
6
RE
S10
K
3205
7201-274HCT125PW
F205
RES
F206
+3V3
1K0
3211
F215
+3V3
9208 RES
+3V3
+3V3
221033p
100R
2
7
1
14
3
3216
74HCT125PW7201-1
2214
100n
3213
10K
100p
2219
+3V3
RE
S
CHECK
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
2008-10-27
2008-08-08
3
2
130
2220
100p
3
2
2008-10-27
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
23
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATE
RES
F203
2
32181K2
7210PDTC144EU
1
3
2203
33p
3209
1K0 RES
+3V3
+3V3
F208
9214 RES
9209
+3V3
26
3
1516
4524
28
30 31 32 33
23
19202122
91011121314
2
1 29
25
27
6
78
1718
+3V3
LED DRIVERPWM CONTROL
ΦTLC5946PWP
7215
+3V3
PDTC144EU7212
1
3
2
3222
470R
PDTC144EU7209
F210
+3V3
3203
10K +3V3
3212
100R
3K3
3224
F207
F213
+3V3
100p
2217
2218
100p
3K3
3221
F209
F204
10K
3204
2202
33p
+3V3
100n
2215
F211
F212
2201
33p
7
10
14
8
+3V3
7201-374HCT125PW
9
10K
3214
1K23215
1
8
3
9213
6
5
4
7
2
12
7
13
14
11M95010-WDW6
7214
Φ(64K) 7201-4
74HCT125PW
1K0
3207
RES
F202
2216
1u0
3210
10K
33p
2209
+3V3
33p
2211
RES
SM
L-31
0
6216
+3V3
9212
3121
100R
100R
3223
3220
27R
3217100R
100R
3219 PWM-CLOCK-BUF
BLANK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-CLOCK-BUF
EEPROM-CS
PWM-CLOCK
SPI-CLOCK
BLANK
DATA-RETURN-SWITCH
SPI-DATA-OUT-FIL
SPI-DATA-OUT-FIL
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL
SPI-CS
SPI-LATCH
EEPROM-CS-LOCALDATA-RETURN-SWITCH
SPI-DATA-INSPI-DATA-OUT
PWM-CLOCK-BUF
EEPROM-CS-LOCALDATA-RETURN-SWITCH
PROG
PWM-R1
SPI-CS
SPI-DATA-RETURN
SPI-CLOCK-BUF
SPI-DATA-IN
BLANK-BUF
18310_610_090305.eps090730
Circuit Diagrams and PWB Layouts EN 71Q549.3E LA 10.
2009-Aug-07
6 LED Low-Pow: LED Liteon
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
H
I
3301 F93302 F93303 F93304 G9
3
3308 H9
7
D
9
Place jumper 9314, 9316, 9317
P
R
3
3314 E12
4 5 6
C
4
10
3322 G12
12
H
G
11
3309 I9
G
9 14
9
10
if VLED < 17V
E
1 2 3
M
3337 D2
F
G
H
4 5 6
C
3345 D12
E
17
10 11
19
3305 G93306 H93307 H9
D
R
P
5
E
O
2
17
3315 E123316 E123317 F12
7 8 9
3321 G12
3353 E1
3323 G12
N
3356 E1
B
LED LITEON
8
Kif VLED < 17V
1514
3328 G4
13
G
B
D
D
3372 F1
3338 D13339 D23340 D1
I
A
B
3344 D1
3389 F1
3346 E1
16
7000 C2
F F
8
H
3347 D1
13 20
12
F
G
3313 E12
L
3348 E12
3318 F123319 F123320 F12
3352 E1
9303-3 C10
3354 D133355 E1
9304-2 E10
N
J
18
I
O
3364 F13
15
3327 H4
3330 I43331 F43332 F4
A
J
3336 D2
9310-4 B8
3373 F13374 G13384 E1
3341 D13342 E23343 D1
3388 F1
9313-2 B12
3390 G13391 G1
9318-4 C8
5
1
K
7307 F4
M
12
I
L
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3310 D12
13
1
Place jumper 9325, 9326, 9327
F307 F5
7315 G97316 H10
3349 E13350 E13351 E12
9303-1 C10
F347 G12F348 G13F349 G13
9309-4 B6
3357 D13
C
11
E
4
9307 A6
16
3325 G43326 H4
63
3365 F133366 F133367 G13
3333 H4
B
C
3371 F1
9318-3 C8
9311-1 H139311-3 H139311-4 H12
3385 F13386 F13387 F1
7
F305 H5
F340 D1
9303-4 C10
7001 C3
6
8
B R G
9319-1 D9
owne
r.
12 132
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
B
A
10 18
3311 D123312 E12
A
9310-1 B8
9313-4 B129314 G5
7317 F99301 C19302 C1
9316 H59317 F59318-1 C8
9320-1 D79320-2 D7
9312-1 B10
3358 E133359 E13
2
3361 E133362 E133363 F13
F341 D1
11
9320-4 D7
1
9308 A69309-1 B6
3368 G13
3334 F43335 D12
9310-2 B8
F304 H5
197
F308 F4F325 F10F326 F9
9319-4 D9
9313-1 B12
F302 G5F303 G4
7004 C8
F327 G10F328 G9
7002 C47003 C6
7005 C117305 G47306 H5
F329 H10F330 H10
B
G
9319-3 D9
20
F343
9304-1 E10
F343 D2F344 D12F345 D12F346 D13
F342 D1
9304-4 E109305-1 C69305-2 C69305-4 C6
9315-1 C129315-2 C129315-4 C12
9312-3 B109312-4 B10
3360 E13
9306-1 D59306-3 D59306-4 D5
9325 F109326 G109327 H10
9309-2 B6
3369 F13370 F1
560R
3333
1K0
3368
5
3374
560R
1 8
9304-443359
9304-1
560R
F349
VLED1-F
9316
3332
10K
560R
3365
9312
-11
8
F305
BC847BW7305
9302
3386
1K5
F304
1K5
3310
F347
390R
3351
1K5
3319
10K
3307
560R
3343
3372
560R3
6
F345
9306
-3
F341F340
1K5
F344
3318
45
1K5
3350
9313
-4
560R
3361
10K
560R
3367
3330
45
3347
1K5
36
9309
-4
9319
-3
560R
3352
3355
560R
560R
3371
1K5
3314
9309
-11
8
16
4 3
7
25
LTW-E500T-PH17005
1 8
9307
9315-1
1K0
3328
390R
3337
1 8
VLED1-F
9303-1
1K5
3356
560R
3338
10K
3327
9308
9314
9317
1K0
3302
1K5
3313
5
F346
27
9319
-44
9313
-2
7307
F327
BC847BW
6
7306BC847BW
9318-3 3
560R
3373
1K0
3305
36
VLED1-F
9318-1 18
9311
-3
SUPERS.
1
NAME
DATECHECK
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
2008-10-27
2008-08-08
3
2
130
3
2
2008-10-27
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
33
SETNAMECHN
CLASS_NO
3384
1K5
1K5
3385
3306
10K
390R
3345
3369
390R
3348
560R
1K5
3317
VLED1-F
F302
9312
-33
6
F307
1K5
3323
560R
3360
4 3
7
25
LTW-E500T-PH17000
16
F330
3326
10K
560R
3364
1 8
F348
9305-1
3303
10K
3370
560R
VLED2
1K5
3389
7
25
3390
1K5
LTW-E500T-PH1
16
4 3
7003
F342
9325
BC847BW7317
VLED1-F
3309
10K
9311
-11
8
3339
390R
5
3 6
9303-44
1K5
9303-3
3322
560R
3363
3353
1K5
1K5
3344
4 5
9326
9315-425
9320
-27
2
16
4 3
7
LTW-E500T-PH17002
10K
3301
27
9301
45
9310
-2
F308
9318-4
BC847BW
3391
7316
9306
-44
5
1K5
VLED1-F
9327
3349
560R
45
F326
25
9310
-4
LTW-E500T-PH1
16
4 3
7
3335
7001
9320
-18
1
390R
F303
VLED1-F
560R
3358
VLED2
1K5
3316
1K59304-22 7
3311
18
9309
-22
7
9310
-1
18
10K
3304
9313
-1
9319
-11
8
3340
560R
560R
3366
3388
1K5
9311
-44
5
1K0
3334
3346
560R
560R
3357
3336
390R
4
9305-44 5
F325
9320
-45
10K
3331
390R
3342
1K5
3315
3341
1K5
560R
3362
BC847BW7315
1K0
1K5
3321
3308
1K5
3387
560R
9312
-44
5
3354
7
VLED1-F
F328
9305-22
1K5
3312
1K5
3320
16
4 3
7
25
9315-22 7
LTW-E500T-PH17004
10K
3325
F329
18
9306
-1
GREEN6GREEN6
PWM-G1
PWM-B1
BLUE6BLUE6
RED6RED6
RED-2
GREEN-2
RED-1
GREEN-1
BLUE-1
PWM-R1
RED-2
BLUE-2
GREEN-2
BLUE-2
PWM-R2
PWM-G2
PWM-B2
18310_612_090305.eps090730
EN 72Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Layout 6 LED Low-Pow
3104 313 6313.3 18310_551_090309090309
1101
1105
1M83 1M842101
2102
2103
2104 21
052106
2107
2108
2109
2110
2111
2112
2113
2114
2115
21162117
2118
2119
2120
2121
2122
21232124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
22152216
2217
2218
22192220 3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
31193120
3121
3123
3124
3125
3126
3127
31283129
3130
3131
31323133
3134
3135
3136
3137
31383139
3140
3141
3142
3203
3204
32053207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326 33
27
3328 33
30
3331
3332
3333
3334
3335
33363337
3338
3339
3340
3341
3342
3343
3344
3345
33463347
3348
33493350
3351
33523353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370337133723373
337433843385
338633873388
338933903391
6216
7000
7001
7002
7003
7004
7005
7101
7102
7110
7116
7201
7209
7210
7212
7214
7215
7305
7306
7307 73
15
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
9209
9210
9211
9212
9213
9214
9301
9302
9303
9304
9305
9306
93079308
9309
9310 93
11
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115
1M1A1M2A F10
1
F102
F103
F104
F105F
106
F107 F108
F109
F112
F11
6
F117
F118
F120
F121
F122
F123
F12
4
F125
F126
F127
F128
F12
9
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204F205
F206F207
F208
F209
F210
F211
F212F213
F214
F215
F302
F303
F304
F305
F307
F30
8
F325
F326
F327
F328
F329
F330
F340
F34
1
F342
F343
F344F345
F346
F347F348 F349
I124
I125
I126
Circuit Diagrams and PWB Layouts EN 73Q549.3E LA 10.
2009-Aug-07
8 LED Low-Pow: Microcontroller Block
-T
OUTIN
INH BP
COM
X2
RTXC1RTXC2
RTCK
VBAT
DBGSEL
RST
VSS VSSA
VDDAVDD_3V3VDD_1V8
X1
C
NC
GNDRST
IN
CD
C
E
F
G
H
1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11
17
F
J
M
A
2
C
4
E
6
G
8
A
10 11 12 13
1 2 3 4 5 6 7 8 9 10 11 12 13
14
D
OUT
B
7
D
6
F
H
B
D
2109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3
11
M
2
1
20
3
19
975
2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D8
2108 B12
3105-4 D83106-1 E83106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B10
4
3113 D83114 E83115 E8
19
I
H
15
O
P
I3116 E83117 E73118 E53119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F11
3105-3 E8
3126-4 F113127-1 F113127-4 F11
17
C
1 5
C
1
3128 E113129 E113130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C11
3112 D9
3142 F117101 A77102 E6
H
103
4
N
MICROCONTROLLER BLOCK LITEON
5
7110 F47116-1 B11
7116-2 A129101 E59102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B3
3126-2 F11
9119 H69121 G4C140 B10
8 9
12
F
12
16
A
13
F101 A8F102 F5F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11
3141 C13
F121 A1F122 A1F123 A1
8
IN
6
3
O
D
E
15
F124 B1F125 B1F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1
9114 B2
F138 F1F139 F1I110 G8
L
K
2
B
16
I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
F120 A1
F135 E1
F124
F137 F1
VLED1
F134
100n
2120
I124
36
VLED2
10K
3101
-3
F107
9112
10K3103-3
36
9109
+3V3
F139
1K531
35
1%
10K3103-4
45
3136
1%1K
5
F109
9108
9101
9107
F130
+3V3
9104
+3V3
2109
100p
RES
3129100R
56789
15 16
VLED1-F
1
1011121314
234
3 6
1M84
3124-3100R
RES10K
3141
+3V3
1 83124-1100R
10K
3112
RES9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
1314
23456789
1M2A
1
101112
3107
10K
RES
2106
10n
F129
+3V3
F106
100p
2118
VLED2
10K
3113
RE
S
3
5
RE
S
7101LD2985BM18R
4
2
1
3110
100R
3116
10K
3133
I110
RE
S 10K
F103
9106
10K
3106
-33
6
+1V8
+3V3
10K
3111
VLED2
3103
-11
8
I126
10K
RES 9103
F104
+3V3
+3V3
I111
F133
5
9114
3125-4100R
4
F112
100p
3105
-110
K1
8
2117
12
+3V3
4
425 17 40
7 19 43 31
11
23P0.5|MISO0|MAT0.1
24P0.6|MOSI0|CAP0.2
28P0.7|SSEL0|MAT2.0
29P0.8|TXD1|MAT2.1
30P0.9|RXD1|MAT2.2
6
26
2025
8P0.27|TRST|CAP2.0
9P0.28|TMS|CAP2.1
10P0.29|TCK|CAP2.2
18P0.2|SCL0|CAP0.0
15P0.30|TDI|MAT3.3
16P0.31|TDO
21P0.3|SDA0|MAT0.0
22P0.4|SCK0|CAP0.1
14P0.1|RXD0|MAT3.2
2P0.20|MAT1.3|MOSI1
3P0.21|SSEL1|MAT3.0
32P0.22|AD0.0
33P0.23|AD0.1
34P0.24|AD0.2
38P0.25|AD0.6
39P0.26|AD0.7
41P0.13|DTR1|MAT1.1
44P0.14|DCD1|SCK1|EINT1
45P0.15|RI1|EINT2
46P0.16|EINT0|MAT0.2
47P0.17|CAP1.2|SCL1
48P0.18|CAP1.3|SDA1
1P0.19|MAT1.2|MISO1
27
13P0.0|TXD0|MAT3.1
35P0.10|RTS1|CAP1.0|AD0.3
36P0.11|CTS1|CAP1.1|AD0.4
37P0.12|DSR1|MAT1.0|AD0.5
27
MICRO-CTRL
ΦLPC2103FBD48
7102
36
3104
-210
K
10K
3104
-3
23456789
15 16
1
1011121314
1M1A
35V
10u21
28
2124
I113
RE
S
100p
10K
F116
3119
100n
2107T1.5A
1105
F135
9110
33p
2125
1 8
3
2
130
3126-1100R
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8857
3104 313 6314.3
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
10K
72
3
2
Peter Van Hove
2008-06-10
3101
-2
100K RES
3134
+1V8
36
F122
10K
3105
-3
10K
3102
-44
5
7116-1LM393PT
3
21
84
10n
2108
100R
3109
10K
100p
2110
18
3117
10K
3106
-1
100n
2111
VLED2
3108
10K
3114
10K
RE
S
RES
3118
10K
F127
+3V3
VLED1
F121
100n
2113
3103-210K2
7
10K
36
3102
-3
RE
S
3137
10K
F126
F131
9102
3124-2 2 7
18
100R
+3V3
3102
-1
10K
I125
1u0
2130
F101
9119
3130
22R
C14
0
10K
3101
-44
5
+3V3
F105
27
100p
2116
10K
3106
-2
3120
10K
2121
100n
F137
1101 16
M9
3125-1 1 8100R
F108
89
15 16
100p
2115
121314
234567
1M83
1
1011
F138
45
F102
3 4 5
10K
3105
-4
1X03REF EMC HOLE
1 2F123
2123
100p
1u0
2101
2105
10n
100R3128
1u0
2127
2 7
VLED1
3125-2100R
3138
RES
100p
2122
47K
4 5
RE
S
100R3126-4
3142100R
18
4
1
3104
-110
K
NCP303LSN10T17110
5
3
2
F128
F136
RE
S
F132
1%1K
53140
2102
100n
RE
S21
14
100p
2 7
3115
10K
3126-2100R
4
VLED1
+3V3
7116-2LM393PT
5
67
8
F125
10K
3104
-44
5
+3V3
I114
F118
35V
2129
10u
1 8
10K
3132
3127-1100R
RE
S1K
81%
3123
1K5
1%
27
3139
10K
3102
-2
2119
100n
9111RES
2112
100n
27
3105
-210
K
2126
100p
4u7
2103
+3V3
+3V3
10n
2104
100p
2131
100R
3131
F117
9121
I115
RE
S
3124-4100R
4 5
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
+3V3
SCL
PROG
SDACONTROL-1CONTROL-2
EEPROM-CSTEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCKSDA
CONTROL-2
EEPROM-CSTEMP-SENSOR
CONTROL-2CONTROL-1
SPI-DATA-RETURNSCL
PROG
BLANK
CONTROL-1SDA
SPI-DATA-INSCL
SPI-DATA-RETURN
SPI-LATCHSPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCKSPI-LATCH
BLANK-BUFPROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CSTEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURNSPI-LATCH
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
CONTROL-1
UD-MD
SDA
18310_650_090508.eps090507
EN 74Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
8 LED Low-Pow: Microcontroller Block
EN
C
EN
MODE
SIN
XHALF
XLAT
SCLK
VCC
SOUT
6
2
0
11
VIA
9
1312
10
4
IREF
GND GND_HS
OUT
GSCLK
7
14
5
3
1
8
15
XERR
BLANK
EN
S
GND
Q
HOLDW
VCC
C
D
EN
5
I
17
MICROCONTROLLER BLOCK LITEON
M
10
B
5
H
14
G
H
I
2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7
9
D
6 15
13 19
194
15
K
G
1 2 3 4 5 6 7 8
13
C
14
3
G
E E
A
F
9 10 11 12 13
1 2 3 4 5 6
D
32 8
1 2
169
B
20
6
J
18
P
20
7 8 9 10 11 12 13
A
B
C
L
J
7 8
4
17 18
3223 C113224 H11
N
D
E
F
G
H
I
A
B
C
D
E
F
O
P
O
N
L
M
K
C
F205 B10F206 C10
2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6
7
16
F
3216 H63217 H63218 H63219 B113220 C113221 H113222 I8
11
F215 H9
6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3
12
12
10
11
7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3F203 C5F204 H6
F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9
INPUT BUFFER
A
I
1
H
7
4
14
6
RE
S10
K
3205
7201-274HCT125PW
5
F205
RES
F206
+3V3
1K0
3211
F215
+3V3
9208 RES+3V3
221033p
2214
100n
10K
3213
100p
2219
+3V3
RE
S
8204 000 88573104 313 6314.3
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
2220
100p
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
23
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
RES
F203
32181K2
7210PDTC144EU
1
3
2
2203
33p
9210 RES
F214
9211
RES
+3V3
9214
9209
28
30 31 32 33
2326
3
111213141516
4524
6
78
171819202122
910
2
1 2925
27
+3V3
LED DRIVERPWM CONTROL
ΦTLC5946PWP
7215
PDTC144EU7212
3222
470R
+3V3
1
3
2
+3V3
PDTC144EU7209
F210
3203
10K
100R
+3V3
+3V3
14
3
3216
2
7
1
74HCT125PW7201-1
3K3
3224
F207
F213
+3V3
100p
2217
2218
100p
3K3
3221
F209
F204
10K
3204
RES
+3V3
3209
1K0
F208
+3V3
F212
F211
2201
33p
+3V3
7201-374HCT125PW
9
7
10
14
8
3214
10K
1K23215
9213
6
5
4
7
2
1
8
3 11M95010-WDW6
7214
Φ(64K) 7201-4
74HCT125PW
12
7
13
14
3212
100R
1K0
3207
RES
1u0
F202
2216
3210
10K
33p
2209
+3V3
2211
33p
RES
SM
L-31
0
6216
+3V3
9212
3121
100R
100R
3223
3220
27R
3217100R
100R
3219
33p
2202
+3V3
100n
2215
PWM-CLOCK-BUF
BLANK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-CLOCK-BUF
EEPROM-CS
PWM-CLOCK
SPI-CLOCK
BLANK
DATA-RETURN-SWITCH
SPI-DATA-OUT-FIL
SPI-DATA-OUT-FIL
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL
SPI-CS
SPI-LATCH
EEPROM-CS-LOCALDATA-RETURN-SWITCH
SPI-DATA-INSPI-DATA-OUT
PWM-CLOCK-BUF
EEPROM-CS-LOCALDATA-RETURN-SWITCH
PROG
PWM-R1
SPI-CS
SPI-DATA-RETURN
SPI-CLOCK-BUF
SPI-DATA-IN
BLANK-BUF
18310_651_090508.eps090508
Circuit Diagrams and PWB Layouts EN 75Q549.3E LA 10.
2009-Aug-07
8 LED Low-Pow: LED Liteon
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
if VLED < 17V
E
1 2 3
H
I
3301 F93302 F93303 F93304 G9
3
3308 H9
7
D
9
Place jumper 9314, 9316, 9317
P
R
R
P
5
E
O
3
3314 E12
4 5 6
C
4
10
3322 G12
12
H
G
11
3309 I9
G
9 14
9
10
13
G
B
D
M
3337 D2
F
G
H
4 5 6
C
3345 D12
E
17
10 11
19
3305 G93306 H93307 H9
D
20
12
F
G
2
17
3315 E123316 E123317 F12
7 8 9
3321 G12
3353 E1
3323 G12
N
3356 E1
B
LED LITEON
8
Kif VLED < 17V
1514
3328 G43330 I43331 F43332 F4
A
J
D
3372 F1
3338 D13339 D23340 D1
I
A
B
3344 D1
3389 F1
3346 E1
16
7000 C2
F F
8
H
3347 D1
13
I
L
3310 D12
13
1
3313 E12
L
3348 E12
3318 F123319 F123320 F12
3352 E1
9303-3 C10
3354 D133355 E1
9304-2 E10
N
J
18
I
O
3364 F13
15
3327 H4
3365 F133366 F133367 G13
3333 H4
B
C3336 D2
9310-4 B8
3373 F13374 G13384 E1
3341 D13342 E23343 D1
3388 F1
9313-2 B12
3390 G13391 G1
9318-4 C8
5
1
K
7307 F4
M
12
B
A
10 18
3311 D123312 E12
Place jumper 9325, 9326, 9327
F307 F5
7315 G97316 H10
3349 E13350 E13351 E12
9303-1 C10
F347 G12F348 G13F349 G13
9309-4 B6
3357 D13
C
11
E
4
9307 A6
16
3325 G43326 H4
63
1
9308 A69309-1 B6
3368 G13
3334 F43335 D12
3371 F1
9318-3 C8
9311-1 H139311-3 H139311-4 H12
3385 F13386 F13387 F1
7
F305 H5
F340 D1
9303-4 C10
7001 C3
6
8
B R G
9319-1 D9
12 132
G
9319-3 D9
20
A
9310-1 B8
9313-4 B129314 G5
7317 F99301 C19302 C1
9316 H59317 F59318-1 C8
9320-1 D79320-2 D7
9312-1 B10
3358 E133359 E13
2
3361 E133362 E133363 F13
F341 D1
11
9320-4 D79325 F109326 G109327 H10
9309-2 B6
3369 F13370 F1
9310-2 B8
F304 H5
197
F308 F4F325 F10F326 F9
9319-4 D9
9313-1 B12
F302 G5F303 G4
7004 C8
F327 G10F328 G9
7002 C47003 C6
7005 C117305 G47306 H5
F329 H10F330 H10
B
9304-1 E10
F343 D2F344 D12F345 D12F346 D13
F342 D1
9304-4 E109305-1 C69305-2 C69305-4 C6
9315-1 C129315-2 C129315-4 C12
9312-3 B109312-4 B10
3360 E13
9306-1 D59306-3 D59306-4 D5
560R
3359
F349
VLED1-F
9316
3332
10K
9312
-11
8
560R
3365
F305
BC847BW7305
9302
3386
1K5
F304
1K5
3310
F347
390R
3351
3319
1K5
10K
3307
F341F340
1K5
F344
3318
45
1K5
3350
9313
-4
560R
3361
3330
10K
560R
3367
3347
1K5
45
36
9309
-4
3352
9319
-3
3355
560R
560R
560R
3371
1K5
3314
2
9309
-11
8
16
4 3
7
5
F343
LTW-E500T-PH17005
3333
1K0
560R
3368
4 5
3374
560R
9304-11 8
9304-4
9303-11 8
VLED1-F
3356
1K5
3327
560R
3338
10K
9308
9314
1K0
3302
9317
1K5
3313
9319
-44
5
F346
27
F327
9313
-2
BC847BW7307
36
7306BC847BW
560R
3373
9318-3
VLED1-F
1K0
3305
560R
3343
3372
560R
F345
9306
-33
6
3306
10K
390R
3345
390R
3348
560R
3369
3317
VLED1-F
F302
36
1K5F307
9312
-3
3323
560R
3360
1K5
3
7
25
16
4
F330
LTW-E500T-PH17000
3326
10K
560R
3364
1 89305-1
3303
10K
F348
3370
560R
VLED2
1K5
3389
2
3390
1K5
LTW-E500T-PH1
16
4 3
7
5
7003
9325
9307
F342
1 8
1K0
3328
9315-1
390R
3337
9303-44 5
3 6
1K5
9303-3
3363
3322
560R
3353
1K5
5
1K5
3344
9315-44
9320
-27
2
9326
3
7
25
LTW-E500T-PH17002
16
4
10K
3301
9301
9310
-22
7
9318-4 45
F308
7316BC847BW
1K5
3391
9306
-44
5
9327
VLED1-F
36
9318-1 18
9311
-3
8204 000 88573104 313 6314.3
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
33
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
3384
1K5
1K5
3385
390R
3335
9320
-18
1
560R
3358
F303
VLED1-F
3316
VLED2
1K5
7
3311
1K5
27
9304-22
18
9309
-2
9310
-1
18
10K
3304
18
9313
-1
9319
-13340
560R
560R
3366
3388
1K5
9311
-44
5
1K0
3334
560R
3346
560R
3357
BC847BW7317
3309
10K
VLED1-F
3339
390R
9311
-11
8
3336
390R
9305-44 5
54
F325
9320
-4
10K
3331
390R
3342
3341
1K5
1K5
3315
560R
3362
BC847BW7315
3308
1K0
1K5
3321
1K5
3387
560R
9312
-44
5
3354
F328
9305-22 7
VLED1-F
3320
1K5
3312
3
7
25
1K5
7004
16
4 9315-22 7
LTW-E500T-PH1
F329
10K
3325
9306
-11
8
3349
560R
45
F326
7
25
9310
-4
7001LTW-E500T-PH1
16
4 3
GREEN6GREEN6
PWM-G1
PWM-B1
BLUE6BLUE6
RED6RED6
RED-2
GREEN-2
RED-1
GREEN-1
BLUE-1
PWM-R1
RED-2
BLUE-2
GREEN-2
BLUE-2
PWM-R2
PWM-G2
PWM-B2
18310_652_090508.eps090508
EN 76Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
8 LED Low-Pow: LED Drive Liteon
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
3571 G7
4121
I
NN
98
6 7
A
3539 E9
3550 E83552 F7
3543 E73544 E83546 E73547 E83549 F7
8 9 10
1 2 3M
L
3555 F73556 F8
3572 G73573 G73574 G73584 F8
3569 F73570 F7
3587 G83588 G8
15
P
O
E
F
G
1M3A E21M85 D23536 E9
8
B
F
O
P
11 12
G
C
D
I
3540 E73541 E8
18
5 6 7
E
4
3589 G8
G
H
2
8 201954
1413
3585 F8
13
LED DRIVE
B
C
D
3
3537 E9
9
11
A
L
10
K
H
18 19
B
F
4 20
3542 E9
3 4
J
K
3590 G83591 G8
17
6
D
5
17
10
1
9 103
E
15 16
3586 F8
16
3553 F8
G
A
C
D
E
F
A
3538 E7
C
B
76
M
1 2
7006 A57007 A7
75
J
1 2
1K5
3
2
130
3550
ROYAL PHILIPS ELECTRONICS N.V. 20082008-04-20
11
SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATECHECK
8204 000 88743104 313 6314.3 2K9
2LED + CONNECTOR
A2
2008-08-08
2008-05-23 0
2008-08-08
3
2
2008-10-31
Peter Van Hove
2008-05-23
560R
3572
3571
560R
1K5
3586
3537
VLED1
390R
1K5
3547
+3V3
16
4 3
7
5 2
3589
1K5
LTW-E500T-PH17006
3544
1K5
3553
560R
3555
1K5
VLED2
7
52
+3V3
7007LTW-E500T-PH1
16
4 3
390R
3539
560R
3573
3585
1K5
3543
560R
VLED2
1X04REF EMC HOLE
3569
560R
1K5
3584
VLED1
560R
3570
560R
3546
15 16
121314
23456789
1
1011
1M3A
15 16
121314
23456789
1M85
1
1011
3591
1K5
560R
3549
3552
560R
1K5
3588
3542
390R
3536
390R
3587
1K5
3556
1K5
560R
3574
3540
3538
560R
560R
3541
1K5
1K5
3590
SPI-DATA-RETURNSPI-LATCH
PWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
GREEN-2
RED-2
BLUE-2
SPI-CLOCK-BUF
PROG
SPI-DATA-OUT
RED-1
SPI-CLOCK-BUFSPI-DATA-OUT
SPI-DATA-RETURNSPI-LATCH
PWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
GREEN-1
BLUE-1
18310_653_090508.eps090508
Circuit Diagrams and PWB Layouts EN 77Q549.3E LA 10.
2009-Aug-07
Layout 8 LED Low-Pow
3104 313 6314.3 18490_550_090326.eps090729
1101
1105
1M83 1M84 1M851X03
2101
2102
2103
2104 21
052106
2107
2108
2109
2110
2111
2112
2113
2114
2115
21162117
2118
2119
2120
2121 2122
21232124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
22152216
2217
2218
22192220
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
31193120
3121
3123
3124
3125
3126
3127
31283129
3130
3131
31323133
3134
3135
3136
3137
31383139
3140
3141
3142
3203
3204
32053207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326 33
27
3328 33
30
3331
3332
3333
3334
3335
33363337
3338
3339
3340
3341
3342
3343
3344
3345
33463347
3348
33493350
3351
33523353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370337133723373
337433843385
338633873388
338933903391
3536
3537
3538
3539
3540
3541
3542
3543
3544
3546
3547
3549
3550
3552
3553
3555
3556
3569
3570
3571
3572
3573
3574
3584
3585
3586
3587
3588
3589
3590
3591
6216
7000
7001
7002
7003
7004
7005
7006
7007
7101
7102
7110
7116
7201
7209
7210
7212
72147215
7305
7306
7307 73
15
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
9209
9210
9211
9212
9213
9214
9301
9302
9303
9304
9305
9306
93079308
9309
9310 93
11
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115 1X04
1M1A1M2A1M3A F10
1
F102
F103
F104
F105
F10
6
F107 F108
F109
F112
F11
6
F117
F118
F120
F121
F122
F123
F12
4
F125
F126
F127
F128
F12
9
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204F205
F206F207
F208
F209
F210
F211
F212F213
F214
F215
F302
F303
F304
F305
F307
F30
8
F325
F326
F327
F328
F329
F330
F340
F34
1
F342
F343
F344F345
F346
F347F348 F349
I124
I125
I126
EN 78Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
10 LED Low-Pow: Microcontroller Block
-T
OUTIN
INH BP
COM
X2
RTXC1RTXC2
RTCK
VBAT
DBGSEL
RST
VSS VSSA
VDDAVDD_3V3VDD_1V8
X1
C
NC
GNDRST
IN
CD
C
E
F
G
H
1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11
17
F
J
M
A
2
C
4
E
6
G
8
A
10 11 12 13
1 2 3 4 5 6 7 8 9 10 11 12 13
14
D
OUT
B
7
D
6
F
H
B
D
2109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3
11
M
2
1
20
3
19
975
2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D8
2108 B12
3105-4 D83106-1 E83106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B10
4
3113 D83114 E83115 E8
19
I
H
15
O
P
I3116 E83117 E73118 E53119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F11
3105-3 E8
3126-4 F113127-1 F113127-4 F11
owne
r.
17
C
1
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
5
C
1
3128 E113129 E113130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C11
3112 D9
3142 F117101 A77102 E6
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
H
103
4
N
MICROCONTROLLER BLOCK LITEON
5
7110 F47116-1 B11
7116-2 A129101 E59102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B3
3126-2 F11
9119 H69121 G4C140 B10
8 9
12
F
12
16
A
13
F101 A8F102 F5F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11
3141 C13
F121 A1F122 A1F123 A1
8
IN
6
3
O
D
E
15
F124 B1F125 B1F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1
9114 B2
F138 F1F139 F1I110 G8
L
K
2
B
16
I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
F120 A1
F135 E1
F124
F137 F1
VLED1
F134
100n
2120
I124
36
VLED2
10K
3101
-3
F107
9112
10K3103-3
36
9109
+3V3
F139
1K531
35
1%
10K3103-4
45
3136
1%1K
5
F109
9108
9101
9107
F130
+3V3
9104
+3V3
2109
100p
RES
3129100R
56789
15 16
VLED1-F
1
1011121314
234
3 6
1M84
3124-3100R
RES10K
3141
+3V3
1 83124-1100R
10K
3112
RES9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
1314
23456789
1M2A
1
101112
3107
10K
RES
2106
10n
F129
+3V3
F106
100p
2118
VLED2
10K
3113
RE
S
3
5
RE
S
7101LD2985BM18R
4
2
1
3110
100R
3116
10K
3133
I110
RE
S 10K
F103
9106
10K
3106
-33
6
+1V8
+3V3
10K
3111
VLED2
3103
-11
8
I126
10K
RES 9103
F104
+3V3
+3V3
I111
F133
5
9114
3125-4100R
4
F112
100p
3105
-110
K1
8
2117
12
+3V3
4
425 17 40
7 19 43 31
11
23P0.5|MISO0|MAT0.1
24P0.6|MOSI0|CAP0.2
28P0.7|SSEL0|MAT2.0
29P0.8|TXD1|MAT2.1
30P0.9|RXD1|MAT2.2
6
26
2025
8P0.27|TRST|CAP2.0
9P0.28|TMS|CAP2.1
10P0.29|TCK|CAP2.2
18P0.2|SCL0|CAP0.0
15P0.30|TDI|MAT3.3
16P0.31|TDO
21P0.3|SDA0|MAT0.0
22P0.4|SCK0|CAP0.1
14P0.1|RXD0|MAT3.2
2P0.20|MAT1.3|MOSI1
3P0.21|SSEL1|MAT3.0
32P0.22|AD0.0
33P0.23|AD0.1
34P0.24|AD0.2
38P0.25|AD0.6
39P0.26|AD0.7
41P0.13|DTR1|MAT1.1
44P0.14|DCD1|SCK1|EINT1
45P0.15|RI1|EINT2
46P0.16|EINT0|MAT0.2
47P0.17|CAP1.2|SCL1
48P0.18|CAP1.3|SDA1
1P0.19|MAT1.2|MISO1
27
13P0.0|TXD0|MAT3.1
35P0.10|RTS1|CAP1.0|AD0.3
36P0.11|CTS1|CAP1.1|AD0.4
37P0.12|DSR1|MAT1.0|AD0.5
27
MICRO-CTRL
ΦLPC2103FBD48
7102
36
3104
-210
K
10K
3104
-3
23456789
15 16
1
1011121314
1M1A
35V
10u21
28
2124
I113
RE
S
100p
10K
F116
3119
100n
2107T1.5A
1105
F135
9110
33p
2125
1 8
3
2
130
3126-1100R
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
10K
72
3
2
Peter Van Hove
2008-06-10
3101
-2
100K RES
3134
+1V8
36
F122
10K
3105
-3
10K
3102
-44
5
7116-1LM393PT
3
21
84
10n
2108
100R
3109
10K
100p
2110
18
3117
10K
3106
-1
100n
2111
VLED2
3108
10K
3114
10K
RE
S
RES
3118
10K
F127
+3V3
VLED1
F121
100n
2113
3103-210K2
7
10K
36
3102
-3
RE
S
3137
10K
F126
F131
9102
3124-2 2 7
18
100R
+3V3
3102
-1
10K
I125
1u0
2130
F101
9119
3130
22R
C14
0
10K
3101
-44
5
+3V3
F105
27
100p
2116
10K
3106
-2
3120
10K
2121
100n
F137
1101 16
M9
3125-1 1 8100R
F108
89
15 16
100p
2115
121314
234567
1M83
1
1011
F138
45
F102
3 4 5
10K
3105
-4
1X03REF EMC HOLE
1 2
F123
2123
100p
1u0
2101
2105
10n
100R3128
1u0
2127
2 7
VLED1
3125-2100R
3138
RES
100p
2122
47K
4 5
RE
S
100R3126-4
3142100R
18
4
1
3104
-110
K
NCP303LSN10T17110
5
3
2
F128
F136
RE
S
F132
1%1K
53140
2102
100n
RE
S21
14
100p
2 7
3115
10K
3126-2100R
4
VLED1
+3V3
7116-2LM393PT
5
67
8
F125
10K
3104
-44
5
+3V3
I114
F118
35V
2129
10u
1 8
10K
3132
3127-1100R
RE
S1K
81%
3123
1K5
1%
27
3139
10K
3102
-2
2119
100n
9111RES
2112
100n
27
3105
-210
K
2126
100p
4u7
2103
+3V3
+3V3
10n
2104
100p
2131
100R
3131
F117
9121
I115
RE
S
3124-4100R
4 5
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
+3V3
SCL
PROG
SDACONTROL-1CONTROL-2
EEPROM-CSTEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCKSDA
CONTROL-2
EEPROM-CSTEMP-SENSOR
CONTROL-2CONTROL-1
SPI-DATA-RETURNSCL
PROG
BLANK
CONTROL-1SDA
SPI-DATA-INSCL
SPI-DATA-RETURN
SPI-LATCHSPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCKSPI-LATCH
BLANK-BUFPROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CSTEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURNSPI-LATCH
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
CONTROL-1
UD-MD
SDA
18310_630_090306.eps090306
Circuit Diagrams and PWB Layouts EN 79Q549.3E LA 10.
2009-Aug-07
10 LED Low-Pow: Microcontroller Block
EN
C
EN
MODE
SIN
XHALF
XLAT
SCLK
VCC
SOUT
6
2
0
11
VIA
9
1312
10
4
IREF
GND GND_HS
OUT
GSCLK
7
14
5
3
1
8
15
XERR
BLANK
EN
S
GND
Q
HOLDW
VCC
C
D
EN
5
I
17
MICROCONTROLLER BLOCK LITEON
M
10
B
owne
r.
5
H
14
G
H
I
2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7
9
D
6 15
13 19
194
15
K
G
1 2 3 4 5 6 7 8
13
C
14
3
G
E E
Ais
pro
hibi
ted
with
out t
he w
ritte
n co
nsen
t of t
he c
opyr
ight
F
9 10 11 12 13
1 2 3 4 5 6
D
32 8
1 2
169
B
20
6
J
18
P
20
7 8 9 10 11 12 13
A
B
C
L
J
7 8
4
17 18
3223 C113224 H11
N
D
E
F
G
H
I
A
B
C
D
E
F
O
P
O
N
L
M
K
C
F205 B10F206 C10
2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6
7
16
F
3216 H63217 H63218 H63219 B113220 C113221 H113222 I8
11
F215 H9
6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3
12
12
10
11
7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3F203 C5F204 H6
F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9
INPUT BUFFER
A
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
I
1
H
7
4
14
6
RE
S10
K
3205
7201-274HCT125PW
5
F205
RES
F206
+3V3
1K0
3211
F215
+3V3
9208 RES+3V3
221033p
2214
100n
10K
3213
100p
2219
+3V3
RE
S
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
2220
100p
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
23
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
RES
F203
32181K2
7210PDTC144EU
1
3
2
2203
33p
9210 RES
F214
9211
RES
+3V3
9214
9209
28
30 31 32 332326
3
111213141516
4524
6
78
171819202122
910
2
1 29
25
27
+3V3
LED DRIVERPWM CONTROL
ΦTLC5946PWP
7215
PDTC144EU7212
3222
470R
+3V3
1
3
2
+3V3
PDTC144EU7209
F210
3203
10K
100R
+3V3
+3V3
14
3
3216
2
7
1
74HCT125PW7201-1
3K3
3224
F207
F213
+3V3
100p
2217
2218
100p
3K3
3221
F209
F204
10K
3204
RES
+3V3
3209
1K0
F208
+3V3
F212
F211
2201
33p
+3V3
7201-374HCT125PW
9
7
10
14
8
3214
10K
1K23215
9213
6
5
4
7
2
1
8
3 11M95010-WDW6
7214
Φ(64K) 7201-4
74HCT125PW
12
7
13
14
3212
100R
1K0
3207
RES
1u0
F202
2216
3210
10K
33p
2209
+3V3
2211
33p
RES
SM
L-31
0
6216
+3V3
9212
3121
100R
100R
3223
3220
27R
3217100R
100R
3219
33p
2202
+3V3
100n
2215
PWM-CLOCK-BUF
BLANK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-CLOCK-BUF
EEPROM-CS
PWM-CLOCK
SPI-CLOCK
BLANK
DATA-RETURN-SWITCH
SPI-DATA-OUT-FIL
SPI-DATA-OUT-FIL
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL
SPI-CS
SPI-LATCH
EEPROM-CS-LOCALDATA-RETURN-SWITCH
SPI-DATA-INSPI-DATA-OUT
PWM-CLOCK-BUF
EEPROM-CS-LOCALDATA-RETURN-SWITCH
PROG
PWM-R1
SPI-CS
SPI-DATA-RETURN
SPI-CLOCK-BUF
SPI-DATA-IN
BLANK-BUF
18310_631_090306.eps090306
EN 80Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
10 LED Low-Pow: LED Liteon
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
if VLED < 17V
E
1 2 3
H
I
3301 F93302 F93303 F93304 G9
3
3308 H9
7
D
9
Place jumper 9314, 9316, 9317
P
R
R
P
5
E
O
3
3314 E12
4 5 6
C
4
10
3322 G12
12
H
G
11
3309 I9
G
9 14
9
10
13
G
B
D
M
3337 D2
F
G
H
4 5 6
C
3345 D12
E
17
10 11
19
3305 G93306 H93307 H9
D
20
12
F
G
2
17
3315 E123316 E123317 F12
7 8 9
3321 G12
3353 E1
3323 G12
N
3356 E1
B
LED LITEON
8
Kif VLED < 17V
1514
3328 G43330 I43331 F43332 F4
A
J
D
3372 F1
3338 D13339 D23340 D1
I
A
B
3344 D1
3389 F1
3346 E1
16
7000 C2
F F
8
H
3347 D1
13
I
L
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3310 D12
13
1
3313 E12
L
3348 E12
3318 F123319 F123320 F12
3352 E1
9303-3 C10
3354 D133355 E1
9304-2 E10
N
J
18
I
O
3364 F13
15
3327 H4
3365 F133366 F133367 G13
3333 H4
B
C3336 D2
9310-4 B8
3373 F13374 G13384 E1
3341 D13342 E23343 D1
3388 F1
9313-2 B12
3390 G13391 G1
9318-4 C8
5
1
K
7307 F4
M
12
B
A
10 18
3311 D123312 E12
Place jumper 9325, 9326, 9327
F307 F5
7315 G97316 H10
3349 E13350 E13351 E12
9303-1 C10
F347 G12F348 G13F349 G13
9309-4 B6
3357 D13
C
11
E
4
9307 A6
16
3325 G43326 H4
63
1
9308 A69309-1 B6
3368 G13
3334 F43335 D12
3371 F1
9318-3 C8
9311-1 H139311-3 H139311-4 H12
3385 F13386 F13387 F1
7
F305 H5
F340 D1
9303-4 C10
7001 C3
6
8
B R G
9319-1 D9
owne
r.
12 132
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
G
9319-3 D9
20
A
9310-1 B8
9313-4 B129314 G5
7317 F99301 C19302 C1
9316 H59317 F59318-1 C8
9320-1 D79320-2 D7
9312-1 B10
3358 E133359 E13
2
3361 E133362 E133363 F13
F341 D1
11
9320-4 D79325 F109326 G109327 H10
9309-2 B6
3369 F13370 F1
9310-2 B8
F304 H5
197
F308 F4F325 F10F326 F9
9319-4 D9
9313-1 B12
F302 G5F303 G4
7004 C8
F327 G10F328 G9
7002 C47003 C6
7005 C117305 G47306 H5
F329 H10F330 H10
B
9304-1 E10
F343 D2F344 D12F345 D12F346 D13
F342 D1
9304-4 E109305-1 C69305-2 C69305-4 C6
9315-1 C129315-2 C129315-4 C12
9312-3 B109312-4 B10
3360 E13
9306-1 D59306-3 D59306-4 D5
560R
3359
F349
VLED1-F
9316
3332
10K
9312
-11
8
560R
3365
F305
BC847BW7305
9302
3386
1K5
F304
1K5
3310
F347
390R
3351
3319
1K5
10K
3307
F341F340
1K5
F344
3318
45
1K5
3350
9313
-4
560R
3361
3330
10K
560R
3367
3347
1K5
45
36
9309
-4
3352
9319
-3
3355
560R
560R
560R
3371
1K5
3314
2
9309
-11
8
16
4 3
7
5
F343
LTW-E500T-PH17005
3333
1K0
560R
3368
4 5
3374
560R
9304-11 8
9304-4
9303-11 8
VLED1-F
3356
1K5
3327
560R
3338
10K
9308
9314
1K0
3302
9317
1K5
3313
9319
-44
5
F346
27
F327
9313
-2
BC847BW7307
36
7306BC847BW
560R
3373
9318-3
VLED1-F
1K0
3305
560R
3343
3372
560R
F345
9306
-33
6
3306
10K
390R
3345
390R
3348
560R
3369
3317
VLED1-F
F302
36
1K5F307
9312
-3
3323
560R
3360
1K5
3
725
16
4
F330
LTW-E500T-PH17000
3326
10K
560R
3364
1 89305-1
3303
10K
F348
3370
560R
VLED2
1K5
3389
2
3390
1K5
LTW-E500T-PH1
16
4 3
7
5
7003
9325
9307
F342
1 8
1K0
3328
9315-1
390R
3337
9303-44 5
3 6
1K5
9303-3
3363
3322
560R
3353
1K5
5
1K5
3344
9315-44
9320
-27
2
9326
3
7
25
LTW-E500T-PH17002
16
4
10K
3301
9301
9310
-22
7
9318-4 45
F308
7316BC847BW
1K5
3391
9306
-44
5
9327
VLED1-F
36
9318-1 18
9311
-3
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
33
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
3384
1K5
1K5
3385
390R
3335
9320
-18
1
560R
3358
F303
VLED1-F
3316
VLED2
1K5
7
3311
1K5
27
9304-22
18
9309
-2
9310
-1
18
10K
3304
18
9313
-1
9319
-13340
560R
560R
3366
3388
1K5
9311
-44
5
1K0
3334
560R
3346
560R
3357
BC847BW7317
3309
10K
VLED1-F
3339
390R
9311
-11
8
3336
390R
9305-44 5
54
F325
9320
-4
10K
3331
390R
3342
3341
1K5
1K5
3315
560R
3362
BC847BW7315
3308
1K0
1K5
3321
1K5
3387
560R
9312
-44
5
3354
F328
9305-22 7
VLED1-F
3320
1K5
3312
3
7
25
1K5
7004
16
4 9315-22 7
LTW-E500T-PH1
F329
10K
3325
9306
-11
8
3349
560R
45
F326
7
25
9310
-4
7001LTW-E500T-PH1
16
4 3
GREEN6GREEN6
PWM-G1
PWM-B1
BLUE6BLUE6
RED6RED6
RED-2
GREEN-2
RED-1
GREEN-1
BLUE-1
PWM-R1
RED-2
BLUE-2
GREEN-2
BLUE-2
PWM-R2
PWM-G2
PWM-B2
18310_632_090306.eps090306
Circuit Diagrams and PWB Layouts EN 81Q549.3E LA 10.
2009-Aug-07
10 LED Low-Pow: LED Drive Liteon
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
1 2 14
C
owne
r.
17
3573 G7
20
I
8 1211
NN
9
3536 E9
4
P
B
17
I
1
F
G
3589 G8
6 7
7009 A67008 A5
D
18 1916
K
4 5
18
10
M
L
3
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3555 F7
E
D
5
3572 G7
G
LED DRIVE
15
P
G
1M3A E21M85 D2
3540 E7
3537 E93538 E73539 E9
F
13
A
142 3
J
3587 G83588 G8
D
3590 G83591 G87006 A27007 A4
C
4
E
16
15
13 19
10
1 2
H
M
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
J
3552 F73553 F8
A
3556 F83569 F73570 F73571 G7
F
11
O
E
O
7
A
L
10
K
3541 E83542 E9
12
3544 E83546 E7
1
3574 G73584 F83585 F83586 F8
C
8
B
A
B
3
2 3 4 5 6
3543 E7
9
9
G
H
7
8 20
3547 E83549 F73550 E8
F
B
C
D
E
5 6 7 8 9 10
6
3590
1K5
1K5
3589
3539
390R
3536
390R
3585
1K5
3553
1K5
3588
1K5
CHECK DATE
NAME
1
SUPERS.
CLASS_NO
EMANTESNHC
1 1
2008-07-29 ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-08-14
Peter Van Hove
2008-10-31
2
3
390R
130
2
3
2008-10-24
2008-10-31
2008-08-14
A2
4 LED + CONNECTOR
LITEON 2K9 8204 000 8897
3537
560R
3543
1K5
3541
+3V3
VLED2
1X04REF EMC HOLE
4 3
7
5
2
VLED1
7008LTW-E500T-PH1
1616
4 3
7
5
2
7
5
2
7006LTW-E500T-PH1
16
4 3
LTW-E500T-PH17007
3547
1K5
1K5
3550
560R
3538
3540
560R
3584
1K5
3570
560R
560R
3569
560R
3571
3572
560R
3555
560R
456789
15 16
VLED2
1M3A
1
1011121314
23
560R
3573
390R
3542
9
15 16
+3V3
11121314
2345678
1
10
3587
1M85
3556
1K5
560R
1K5
3574
VLED1
5
2
3546
560R
16
4 3
7
LTW-E500T-PH17009
1K5
3591
3549
560R
560R
3552
3586
1K5
1K5
3544
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
RED-1
GREEN-1
BLUE-1
SPI-CLOCK-BUF
PROG
SPI-CLOCK-BUFSPI-DATA-OUT
SPI-DATA-RETURNSPI-LATCH
PWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
GREEN-2
RED-2
BLUE-2
18310_633_090306.eps090306
EN 82Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Layout 10 LED Low-Pow
3104 313 6315.2 18310_553_090309090309
1101
1105
1M83 1M84 1M851X03
2101
2102
2103
2104 21
052106
2107
2108
2109
2110
2111
2112
2113
2114
2115
21162117
2118
2119
2120
2121
2122
21232124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
22152216
2217
2218
22192220 3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
31193120
3121
3123
3124
3125
3126
3127
31283129
3130
3131
31323133
3134
3135
3136
3137
31383139
3140
3141
3142
3203
3204
32053207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326 33
27
3328 33
30
3331
3332
3333
3334
3335
33363337
3338
3339
3340
3341
3342
3343
3344
3345
33463347
3348
33493350
3351
33523353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370337133723373
337433843385
338633873388
338933903391
3536
3537
3538
3539
3540
3541
3542
3543
3544
3546
3547
3549
3550
3552
3553
3555
3556
3569
3570
3571
3572
3573
3574
3584
3585
3586
3587
3588
3589
3590
3591
6216
7000
7001
7002
7003
7004
7005
7006
7007
7008
7009
7101
7102
7110
7116
7201
7209
7210
7212
72147215
7305
7306
7307 73
15
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
920992
1092
11
9212
9213
9214
9301
9302
9303
9304
9305
9306
93079308
9309
9310 93
11
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115 1X04
1M1A1M2A1M3A F10
1
F102
F103
F104
F105
F10
6
F107 F108
F109
F112
F11
6
F117
F118
F120
F121
F122
F123
F12
4
F125
F126
F127
F128
F12
9
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204F205
F206F207
F208
F209
F210
F211
F212F213
F214
F215
F302
F303
F304
F305
F307
F30
8
F325
F326
F327
F328
F329
F330
F340
F34
1
F342
F343
F344F345
F346
F347F348 F349
I124
I125
I126
Circuit Diagrams and PWB Layouts EN 83Q549.3E LA 10.
2009-Aug-07
12 LED Low-Pow: Microcontroller Liteon
-T
OUTIN
INH BP
COM
X2
RTXC1RTXC2
RTCK
VBAT
DBGSEL
RST
VSS VSSA
VDDAVDD_3V3VDD_1V8
X1
C
NC
GNDRST
IN
CD
C
E
F
G
H
1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11
17
F
J
M
A
2
C
4
E
6
G
8
A
10 11 12 13
1 2 3 4 5 6 7 8 9 10 11 12 13
14
D
OUT
B
7
D
6
F
H
B
D
2109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3
11
M
2
1
20
3
19
975
2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D8
2108 B12
3105-4 D83106-1 E83106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B10
4
3113 D83114 E83115 E8
19
I
H
15
O
P
I3116 E83117 E73118 E53119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F11
3105-3 E8
3126-4 F113127-1 F113127-4 F11
ow
ne
r.
17
C
1
is p
rohib
ited w
ithou
t th
e w
ritten c
on
sent of th
e c
opyr
ight
5
C
1
3128 E113129 E113130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C11
3112 D9
3142 F117101 A77102 E6
All
rights
re
serv
ed. R
epro
duct
ion in
whole
or
in p
art
s
H
103
4
N
MICROCONTROLLER LITEON
5
7110 F47116-1 B11
7116-2 A129101 E59102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B3
3126-2 F11
9119 H69121 G4C140 B10
8 9
12
F
12
16
A
13
F101 A8F102 F5F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11
3141 C13
F121 A1F122 A1F123 A1
8
IN
6
3
O
D
E
15
F124 B1F125 B1F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1
9114 B2
F138 F1F139 F1I110 G8
L
K
2
B
16
I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
F120 A1
F135 E1
F124
F137 F1
VLED1
F134
10
0n
21
20
I124
36
VLED2
10
K3
10
1-3
F107
91
12
10K3103-3
36
9109
+3V3
F139
1K
531
35 1
%
10K3103-4
45
31
36
1%
1K
5
F109
9108
9101
9107
F130
+3V3
9104
+3V3
21
09
10
0p
RES
3129100R
56789
15 16
VLED1-F
1
1011121314
234
3 6
1M84
3124-3100R
RES10K
3141
+3V3
1 83124-1100R
10
K3
11
2
RES9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
1314
23456789
1M2A
1
101112
31
07
10
K
RES
2106
10n
F129
+3V3
F106
10
0p
21
18
VLED2
10
K3
11
3
RE
S
3
5
RE
S
7101LD2985BM18R
4
2
1
31
10
10
0R
31
16
10
K
31
33
I110
RE
S 10
K
F1039
10
6
10
K3
10
6-3
36
+1V8
+3V3
10
K
31
11
VLED2
31
03
-11
8
I126
10
K
RES 9103
F104
+3V3
+3V3
I111
F133
5
91
14
3125-4100R
4
F112
10
0p
31
05
-11
0K
18
21
17
12
+3V3
4
425
17
40
7 19
43
31
11
23P0.5|MISO0|MAT0.1
24P0.6|MOSI0|CAP0.2
28P0.7|SSEL0|MAT2.0
29P0.8|TXD1|MAT2.1
30P0.9|RXD1|MAT2.2
6
26
2025
8P0.27|TRST|CAP2.0
9P0.28|TMS|CAP2.1
10P0.29|TCK|CAP2.2
18P0.2|SCL0|CAP0.0
15P0.30|TDI|MAT3.3
16P0.31|TDO
21P0.3|SDA0|MAT0.0
22P0.4|SCK0|CAP0.1
14P0.1|RXD0|MAT3.2
2P0.20|MAT1.3|MOSI1
3P0.21|SSEL1|MAT3.0
32P0.22|AD0.0
33P0.23|AD0.1
34P0.24|AD0.2
38P0.25|AD0.6
39P0.26|AD0.7
41P0.13|DTR1|MAT1.1
44P0.14|DCD1|SCK1|EINT1
45P0.15|RI1|EINT2
46P0.16|EINT0|MAT0.2
47P0.17|CAP1.2|SCL1
48P0.18|CAP1.3|SDA1
1P0.19|MAT1.2|MISO1
27
13P0.0|TXD0|MAT3.1
35P0.10|RTS1|CAP1.0|AD0.3
36P0.11|CTS1|CAP1.1|AD0.4
37P0.12|DSR1|MAT1.0|AD0.5
27
MICRO-CTRL
ΦLPC2103FBD48
7102
36
31
04
-21
0K
10
K3
10
4-3
23456789
15 16
1
1011121314
1M1A
35
V1
0u21
28
21
24
I113
RE
S
10
0p
10
K
F116
31
19
10
0n
21
07
T1.5A
1105
F135
9110
33
p
21
25
1 8
3
2
130
3126-1100R
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
10
K7
2
3
2
Peter Van Hove
2008-06-10
31
01
-2
100K RES
3134
+1V8
36
F122
10
K3
10
5-3
10
K3
10
2-4
45
7116-1LM393PT
3
21
84
10
n
21
08
10
0R
31
09
10
K
10
0p
21
10
18
31
17
10
K3
10
6-1
10
0n
21
11
VLED2
31
08
10
K
31
14
10
KR
ES
RES
3118
10K
F127
+3V3
VLED1
F121
10
0n
21
13
3103-210K2
7
10
K3
63
10
2-3
RE
S
31
37
10
K
F126
F131
9102
3124-2 2 7
18
100R
+3V3
31
02
-1
10
K
I125
1u
0
21
30
F101
9119
3130
22R
C1
40
10
K3
10
1-4
45
+3V3
F105
27
10
0p
21
16
10
K3
10
6-2
31
20
10
K
21
21
10
0n
F137
11
01 16
M9
3125-1 1 8100R
F108
89
15 16
10
0p
21
15
121314
234567
1M83
1
1011
F138
45
F102
3 4 5
10
K3
10
5-4
1X03REF EMC HOLE
1 2
F123
21
23
10
0p
1u
0
21
01
21
05
10
n
100R3128
1u
0
21
27
2 7
VLED1
3125-2100R
3138
RES
10
0p
21
22
47K
4 5
RE
S
100R3126-4
3142100R
18
4
1
31
04
-11
0K
NCP303LSN10T17110
5
3
2
F128
F136
RE
S
F132
1%
1K
5
31
40
21
02
10
0n
RE
S2
11
4
10
0p
2 7
31
15
10
K
3126-2100R
4
VLED1
+3V3
7116-2LM393PT
5
67
8
F125
10
K3
10
4-4
45
+3V3
I114
F118
35
V
21
29
10
u
1 8
10
K
31
32
3127-1100R
RE
S1
K8
1%
31
23
1K
51
%
27
31
39
10
K3
10
2-2
21
19
10
0n
9111RES
21
12
10
0n
27
31
05
-21
0K
21
26
10
0p
4u
7
21
03
+3V3
+3V3
10
n
21
04
10
0p
21
31
100R
3131
F117
91
21
I115
RE
S
3124-4100R
4 5
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
+3V3
SCL
PROG
SDACONTROL-1CONTROL-2
EEPROM-CSTEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCKSDA
CONTROL-2
EEPROM-CSTEMP-SENSOR
CONTROL-2CONTROL-1
SPI-DATA-RETURNSCL
PROG
BLANK
CONTROL-1SDA
SPI-DATA-INSCL
SPI-DATA-RETURN
SPI-LATCHSPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCKSPI-LATCH
BLANK-BUFPROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CSTEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURNSPI-LATCH
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
CONTROL-1
UD-MD
SDA
18560_510_090403.eps090410
EN 84Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
12 LED Low-Pow: Microcontroller Liteon
EN
C
EN
MODE
SIN
XHALF
XLAT
SCLK
VCC
SOUT
6
2
0
11
VIA
9
1312
10
4
IREF
GND GND_HS
OUT
GSCLK
7
14
5
3
1
8
15
XERR
BLANK
EN
S
GND
Q
HOLDW
VCC
C
D
EN
5
I
17
MICROCONTROLLER LITEON
M
10
B
ow
ner.
5
H
14
G
H
I
2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7
9
D
6 15
13 19
194
15
K
G
1 2 3 4 5 6 7 8
13
C
14
3
G
E E
Ais
pro
hib
ited w
ithout th
e w
ritten c
onse
nt of th
e c
opyr
ight
F
9 10 11 12 13
1 2 3 4 5 6
D
32 8
1 2
169
B
20
6
J
18
P
20
7 8 9 10 11 12 13
A
B
C
L
J
7 8
4
17 18
3223 C113224 H11
N
D
E
F
G
H
I
A
B
C
D
E
F
O
P
O
N
L
M
K
C
F205 B10F206 C10
2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6
7
16
F
3216 H63217 H63218 H63219 B113220 C113221 H113222 I8
11
F215 H9
6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3
12
12
10
11
7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3F203 C5F204 H6
F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9
INPUT BUFFER
AA
ll rights
rese
rved. R
epro
duct
ion in
whole
or
in p
art
s
I
1
H
7
4
14
6
RE
S1
0K
32
05
7201-274HCT125PW
5
F205
RES
F206
+3V3
1K0
3211
F215
+3V3
9208 RES+3V3
221033p
22
14
10
0n
10
K
32
13
10
0p
22
19
+3V3
RE
S
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
22
20
10
0p
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
23
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
RES
F203
32181K2
7210PDTC144EU
1
3
2
22
03
33
p
9210 RES
F214
9211
RES
+3V3
9214
9209
28
30
31
32
33
2326
3
111213141516
4524
6
78
171819202122
910
21
29
25
27
+3V3
LED DRIVERPWM CONTROL
ΦTLC5946PWP
7215
PDTC144EU7212
32
22
47
0R
+3V3
1
3
2
+3V3
PDTC144EU7209
F210
32
03
10
K
100R
+3V3
+3V3
14
3
3216
2
7
1
74HCT125PW7201-1
3K
3
32
24
F207
F213
+3V3
10
0p
22
17
22
18
10
0p
3K
3
32
21
F209
F204
10K
3204
RES
+3V3
3209
1K0
F208
+3V3
F212
F211
22
01
33
p
+3V3
7201-374HCT125PW
9
7
10
14
8
3214
10K
1K23215
9213
6
5
4
7
2
1
8
3 11M95010-WDW6
7214
Φ(64K) 7201-4
74HCT125PW
12
7
13
14
3212
100R
1K0
3207
RES
1u0
F202
2216
32
10
10
K
33
p
22
09
+3V3
22
11
33
p
RES
SM
L-3
10
62
16
+3V3
9212
3121
100R
100R
3223
3220
27R
3217100R
100R
3219
33
p
22
02 +3V3
100n
2215
PWM-CLOCK-BUF
BLANK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-CLOCK-BUF
EEPROM-CS
PWM-CLOCK
SPI-CLOCK
BLANK
DATA-RETURN-SWITCH
SPI-DATA-OUT-FIL
SPI-DATA-OUT-FIL
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL
SPI-CS
SPI-LATCH
EEPROM-CS-LOCALDATA-RETURN-SWITCH
SPI-DATA-INSPI-DATA-OUT
PWM-CLOCK-BUF
EEPROM-CS-LOCALDATA-RETURN-SWITCH
PROG
PWM-R1
SPI-CS
SPI-DATA-RETURN
SPI-CLOCK-BUF
SPI-DATA-IN
BLANK-BUF
18560_511_090403.eps090410
Circuit Diagrams and PWB Layouts EN 85Q549.3E LA 10.
2009-Aug-07
12 LED Low-Pow: LED Liteon
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
if VLED < 17V
E
1 2 3
H
I
3301 F93302 F93303 F93304 G9
3
3308 H9
7
D
9
Place jumper 9314, 9316, 9317
P
R
R
P
5
E
O
3
3314 E12
4 5 6
C
4
10
3322 G12
12
H
G
11
3309 I9
G
9 14
9
10
13
G
B
D
M
3337 D2
F
G
H
4 5 6
C
3345 D12
E
17
10 11
19
3305 G93306 H93307 H9
D
20
12
F
G
2
17
3315 E123316 E123317 F12
7 8 9
3321 G12
3353 E1
3323 G12
N
3356 E1
B
LED LITEON
8
Kif VLED < 17V
1514
3328 G43330 I43331 F43332 F4
A
J
D
3372 F1
3338 D13339 D23340 D1
I
A
B
3344 D1
3389 F1
3346 E1
16
7000 C2
F F
8
H
3347 D1
13
I
L
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3310 D12
13
1
3313 E12
L
3348 E12
3318 F123319 F123320 F12
3352 E1
9303-3 C10
3354 D133355 E1
9304-2 E10
N
J
18
I
O
3364 F13
15
3327 H4
3365 F133366 F133367 G13
3333 H4
B
C3336 D2
9310-4 B8
3373 F13374 G13384 E1
3341 D13342 E23343 D1
3388 F1
9313-2 B12
3390 G13391 G1
9318-4 C8
5
1
K
7307 F4
M
12
B
A
10 18
3311 D123312 E12
Place jumper 9325, 9326, 9327
F307 F5
7315 G97316 H10
3349 E13350 E13351 E12
9303-1 C10
F347 G12F348 G13F349 G13
9309-4 B6
3357 D13
C
11
E
4
9307 A6
16
3325 G43326 H4
63
1
9308 A69309-1 B6
3368 G13
3334 F43335 D12
3371 F1
9318-3 C8
9311-1 H139311-3 H139311-4 H12
3385 F13386 F13387 F1
7
F305 H5
F340 D1
9303-4 C10
7001 C3
6
8
B R G
9319-1 D9
owne
r.
12 132
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
G
9319-3 D9
20
A
9310-1 B8
9313-4 B129314 G5
7317 F99301 C19302 C1
9316 H59317 F59318-1 C8
9320-1 D79320-2 D7
9312-1 B10
3358 E133359 E13
2
3361 E133362 E133363 F13
F341 D1
11
9320-4 D79325 F109326 G109327 H10
9309-2 B6
3369 F13370 F1
9310-2 B8
F304 H5
197
F308 F4F325 F10F326 F9
9319-4 D9
9313-1 B12
F302 G5F303 G4
7004 C8
F327 G10F328 G9
7002 C47003 C6
7005 C117305 G47306 H5
F329 H10F330 H10
B
9304-1 E10
F343 D2F344 D12F345 D12F346 D13
F342 D1
9304-4 E109305-1 C69305-2 C69305-4 C6
9315-1 C129315-2 C129315-4 C12
9312-3 B109312-4 B10
3360 E13
9306-1 D59306-3 D59306-4 D5
560R
3359
F349
VLED1-F
9316
3332
10K
9312
-11
8
560R
3365
F305
BC847BW7305
9302
3386
1K5
F304
1K5
3310
F347
390R
3351
3319
1K5
10K
3307
F341F340
1K5
F344
3318
45
1K5
3350
9313
-4
560R
3361
3330
10K
560R
3367
3347
1K5
45
36
9309
-4
3352
9319
-3
3355
560R
560R
560R
3371
1K5
3314
2
9309
-11
8
16
4 3
7
5
F343
LTW-E500T-PH17005
3333
1K0
560R
3368
4 5
3374
560R
9304-11 8
9304-4
9303-11 8
VLED1-F
3356
1K5
3327
560R
3338
10K
9308
9314
1K0
3302
9317
1K5
3313
9319
-44
5
F346
27
F327
9313
-2
BC847BW7307
36
7306BC847BW
560R
3373
9318-3
VLED1-F
1K0
3305
560R
3343
3372
560R
F345
9306
-33
6
3306
10K
390R
3345
390R
3348
560R
3369
3317
VLED1-F
F302
36
1K5F307
9312
-3
3323
560R
3360
1K5
3
7
25
16
4
F330
LTW-E500T-PH17000
3326
10K
560R
3364
1 89305-1
3303
10K
F348
3370
560R
VLED2
1K5
3389
2
3390
1K5
LTW-E500T-PH1
16
4 3
7
5
7003
9325
9307
F342
1 8
1K0
3328
9315-1
390R
3337
9303-44 5
3 6
1K5
9303-3
3363
3322
560R
3353
1K5
5
1K5
3344
9315-44
9320
-27
2
9326
3
7
25
LTW-E500T-PH17002
16
4
10K
3301
9301
9310
-22
7
9318-4 45
F308
7316BC847BW
1K5
3391
9306
-44
5
9327
VLED1-F
36
9318-1 18
9311
-3
8204 000 88572K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02
33
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
3384
1K5
1K5
3385
390R
3335
9320
-18
1
560R
3358
F303
VLED1-F
3316
VLED2
1K5
7
3311
1K5
27
9304-22
18
9309
-2
9310
-1
18
10K
3304
18
9313
-1
9319
-13340
560R
560R
3366
3388
1K5
9311
-44
5
1K0
3334
560R
3346
560R
3357
BC847BW7317
3309
10K
VLED1-F
3339
390R
9311
-11
8
3336
390R
9305-44 5
54
F325
9320
-4
10K
3331
390R
3342
3341
1K5
1K5
3315
560R
3362
BC847BW7315
3308
1K0
1K5
3321
1K5
3387
560R
9312
-44
5
3354
F328
9305-22 7
VLED1-F
3320
1K5
3312
3
7
25
1K5
7004
16
4 9315-22 7
LTW-E500T-PH1
F329
10K
3325
9306
-11
8
3349
560R
45
F326
7
25
9310
-4
7001LTW-E500T-PH1
16
4 3
GREEN6GREEN6
PWM-G1
PWM-B1
BLUE6BLUE6
RED6RED6
RED-2
GREEN-2
RED-1
GREEN-1
BLUE-1
PWM-R1
RED-2
BLUE-2
GREEN-2
BLUE-2
PWM-R2
PWM-G2
PWM-B2
18560_512_090403.eps090403
EN 86Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
12 LED Low-Pow: LED Drive
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
3549 F93550 F10
10 11
7
7
3552 F93553 F10
B
C
5
3587 G10
D
3573 H9
G
H
A
3 4
17
6
9
G
H
C
H
F
1312
7006 B2
3556 F10
3547 F10
3589 H103590 H103591 H10
7011 B8
3555 G10
3546 F9
7 8 9
5 6
F
8
206
1918
10
4
12
A
E
3574 H93584 G103585 G10
M
3586 G10
3571 G93572 G9
F
12
1 2
3
1
11
O
16
13
K
10
L
A
1211
14
3538 E9
7007 B3
3588 G10
7008 B57009 B67010 B7
3543 F93544 F10
J
2 3 4
H
1M3A F2
G
E
16
15
P
O
4 5
owne
r.
M
L
8
3569 G93570 G9
D
E
3537 E11
18 19
14
G
1 2
3539 F113540 F93541 E103542 F11
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
J
3
1M85 D23536 E11
LED DRIVE
15
B
D
NN
98
K
I
P
B
A
9 10 11A
ll rig
hts
rese
rved
. Rep
rodu
ctio
n in
who
le o
r in
par
ts
B
C
20
I
F
E
D
5
17
6 7
1 2
C
3543
560R
1K5
3584
3569
560R
3456789
15 16
1M85
1
1011121314
2
3587
1K5
560R
3549
3552
560R
560R
3555
1K5
3586
VLED2
1K5
3544
+3V3
1X04REF EMC HOLE
3570
560R
560R
3572
3571
560R
16
+3V3
3542
390R
14
23456789
15
1
10111213
1M3A
NAME
DATECHECK
8204 000 8898 2K9 LITEON
6 LED + CONNECTOR
A2
2008-08-14
130
3
2
2008-10-29
Peter Van Hove
2008-10-29
ROYAL PHILIPS ELECTRONICS N.V. 20082008-07-30
11
SETNAMECHN
CLASS_NO
SUPERS.
2
3573
560R
VLED1
560R
3546
560R
3574
390R
3539
3589
1K5
390R
3536
1K5
3553
3585
16
4 3
7
52 2
1K5
7011LTW-E500T-PH1
390R
3537
7006
16
4 3
7
5
2
3
7
52
LTW-E500T-PH17007
LTW-E500T-PH1
16
4 3
7
52
LTW-E500T-PH17010
16
4
3591
1K5
1K5
3588
16
4 3
7
5252
7009LTW-E500T-PH1
16
4 3
7
LTW-E500T-PH17008
1K5
1K5
3590
3541
VLED1
VLED2
3556
1K5
3538
560R
560R
3540
1K5
3547
3550
1K5
SPI-DATA-OUTSPI-DATA-RETURN
SPI-LATCHPWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSOR
RED-1
GREEN-1
BLUE-1
SPI-CLOCK-BUF
PROG
SPI-CLOCK-BUFSPI-DATA-OUT
SPI-DATA-RETURNSPI-LATCH
PWM-CLOCK-BUF
BLANK-BUFEEPROM-CS
TEMP-SENSORPROG
GREEN-2
RED-2
BLUE-2
18560_513_090403.eps090729
Circuit Diagrams and PWB Layouts EN 87Q549.3E LA 10.
2009-Aug-07
Layout 12 LED Low-Power
3104 313 6335.2 18490_551_090326.eps090729
1101
1105
1M83 1M84 1M851X03
2101
2102
2103
2104 21
052106
2107
2108
2109
2110
2111
2112
2113
2114
2115
21162117
2118
2119
2120
2121
2122
21232124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
22152216
2217
2218
22192220 3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
31193120
3121
3123
3124
3125
3126
3127
31283129
3130
3131
31323133
3134
3135
3136
3137
31383139
3140
3141
3142
3203
3204
32053207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326 33
27
3328 33
30
3331
3332
3333
3334
3335
33363337
3338
3339
3340
3341
3342
3343
3344
3345
33463347
3348
33493350
3351
33523353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370337133723373
337433843385
338633873388
338933903391
3536
3537
3538
3539
3540
3541
3542
3543
3544
3546
3547
3549
3550
3552
3553
3555
3556
3569
3570
3571
3572
3573
3574
3584
3585
3586
3587
3588
3589
3590
3591
6216
7000
7001
7002
7003
7004
7005
7006
7007
7008
7009
7010
7011
7101
7102
7110
7116
7201
7209
7210
7212
72147215
7305
7306
7307 73
15
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
9209
9210
9211
9212
9213
9214
9301
9302
9303
9304
9305
9306
93079308
9309
9310 93
11
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115 1X04
1M1A1M2A1M3A F10
1
F102
F103
F104
F105
F10
6
F107 F108
F109
F112
F11
6
F117
F118
F120
F121
F122
F123
F12
4
F125
F126
F127
F128
F12
9
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204F205
F206F207
F208
F209
F210
F211
F212F213
F214
F215
F302
F303
F304
F305
F307
F30
8
F325
F326
F327
F328
F329
F330
F340
F34
1
F342
F343
F344F345
F346
F347F348 F349
I124
I125
I126
EN 88Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: DC/DC
VBST2
VIN
PGND
TEST
VREG5VFB2VO2
VFB1VO1
LL2LL1
DRVL2DRVH2
DRVL1DRVH1
GN
D
21
V5FILT
TRIP2
EN2
NC
TRIP1
EN1
VBST1
C
IU61 D5IU62 F6
FU0B E14FU0C B14FU0E C14IU06 G9
IU07 E9IU08 B9IU0K D7IU0N C7
3U18 D53U19 D5
FU07 B9IU0P B6
E
8 17
1 2
L
9
E
M
IU19 H9IU1B C9
IU1D G10IU1E F9IU1P B6IU1R F1
IU1T A133U24 F73U25 F8 IU30 E6
5U33 B133U74 E93U75 G103U76 E115U00 E9
5U01 B95U02 A135U03 C135U32 A13
2U61 E42U62 F2
6U03 D5
K
10 20
IU31 G9IU55 C4
7U03 D37U05 C86U02 E2
IU56 D3IU57 D3IU58 E3IU59 E3
IU60 E3
2U65 G83U06 B6 IU63 D5
FU06 F5
3U0F H53U0G H6
3U0J B93U0K E93U13 C73U15 C5
3U16 C53U17 D3
2U14 A12
2U15 B13 3U1D F6
F
18
15
JJ
11
3U1J G14
1
owne
r.
IU0S G5IU0T G9IU0U E1
IU11 B6
2U17 E132U19 A13
12V/3V3 CONVERSION
IU12 D72U50 D72U54 C2
2U55 D42U56 D42U57 D22U58 D3
2U59 E22U60 E6
A
B
2U63 F6
M
B
6141
H
7U02 B67U06 D87U08 A6
7U09 E1CU77 G2FU04 E2FU05 A8
L
FU08 G14FU0A E82U0U E12
2U0V E122U0W A52U0Y A122U0Z B10
2U10 C142U11 C142U12 C9
14 15
2U16 E13
N
I
12V/1V2 CONVERSION
15
K
4
10
P
3U1M B93U1V F1
3U20 D53U21 E23U22 E33U23 F2
4 5
3U30 E63U31 G8
8 9 10 11 12 13 14 15
G
C
18
H
G
2012
19
3
2U64 G93U09 H93U0A H10
13
O
10 11 12 13
G
H
1
16
C
6
D
9
12
A
DC / DC
P
17
D
2U1B E142U39 B6
11
F
75
O
1 2 3 4 5 6 7 8
N
8
2U0S F12U0T E11
2
E
F
G
H
A
B
C
D
E
2U06 B102U07 E112U0B H92U0D H6
2U0F A52U0H C92U0J E92U0K F9
F
2U0R G10
B
2 3 6 7
144
C
7
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
19
133
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
I
9
A
5
6
D
IU19
22u
2U0V
5U01
10u
2U0K
1n0
3U0K
6.3V
RE
S
22R
6.3V
2U1B
100u
1n0
2U0J
RE
S33
0u
2U17
+12VF1
10K
3U25
5U33
30R
FU0A
+1V2-PNX85XX
RE
S10
0p
2U0D
IU58
+3V3F
IU1D
CU77
3U17
3R3
6 7 84
1 2 3
SI4800BDY
7U05
5
10u
5U03
GND-SIG
FU07
3U22
20K
5 6 7 8
41 2 3
7U02
SI4800BDY
RE
S
100p
2U0B
3R3
3U20
GND-SIG GND-SIG
2U0R
1u0
GND-SIG
22u
2U14
RE
S
IU55
FU04
IU63
IU61
3U75
470R
1%
IU1B
3U74
IU0S
22R
IU0P
IU30
4K7
3U30
2U07
22u
IU31
3U31
4K7
RE
S2U
59
1n0
GND-SIG
2U63
3n3
GND-SIG
GND-SIG
+1V2-STANDBY
IU1E
2U61 4u7
5U02
10u
RES
GND-SIG
GND-SIG
RE
S
3U1V
3K3
FU0C
IU0K
+3V3
22u
2U06
REF EMC HOLE1X08
21
1
14
5
10
23
4
11
22
269
13
25 18
820
24
19
28
15
26
173
12
7
2716
GND-SIG
7U03TPS53124PW
Φ
IU62
GND-SIG
RES
BC847BW
1
3
2
7U09
1n0
2U12
3U19
10R
IU57
+1V2-PNX85XX
2U57
100n 7 8
41 2 3
RE
S
7U06
SI4800BDY
5 6
BAT54 COL
6U02
1%
RES
1K0
3U0F
IU59
IU0U
100n
2U58
10R
3U18
DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
3 1
2007-11-20 ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A2
DC/DC
TV543 R2 LDIPNX 8204 000 8932
CHECK
FU0E
FU0B
1u0
2U19
22u
2U0U
RE
S
RES
25V
220u2U
15
1%
5U32
30R
3U1D
3K3
2U55
100n
3U16
10R
22u
2U0W
GND-SIG 3U1J
120R 1%
IU08
1n0
2U60
IU06
IU1R
RE
SBA
T54
CO
L
6U03
10R
3U23
GND-SIG
RE
S
+12VF
RE
S
100n
2U56
IU60
20K
3U21
2u2
2U54
1K0
3U0A
1%22K3U
09
2U64
3n3
2U65
1n0
2U0H
1n0
22R
3U1M
IU1T
2U16
GND-SIG
5U00
10u
RE
S6.
3V33
0u
22u
2U0Z
+3V3
4V
IU0N
RE
S
2U10
100u
3U0J
22R
4V10
0u
2U0T
RE
S
2U11
FU08
RE
S22
u
IU1P
GND-SIG
+3V3
IU07
33K
3U24
2U62
1u0
RES
IU0T
2U0S
100n
IU56
47K
3U0G
10R
3U15
RE
S2U0F 22
u
7 84
1 2 3SI4800BDY
7U08
5 6
FU05
IU12
22u
2U0Y
1n0
2U503U13
3R3
2U39
1n0IU11
3R3
3U06
+1V2-PNX85XX
3U76
10R
FU06
VSW
RE
SENABLE-3V3-5V
SENSE+1V2-PNX85XX
18320_500_090728.eps090728
Circuit Diagrams and PWB Layouts EN 89Q549.3E LA 10.
2009-Aug-07
SSB: DC/DC
OUTIN
INH BP
COM
NC
NC
A
RE
F
KC
A
F
1M20 A11M95 E11M99 C11U01 E21U03 E22U21 B12U22 D2
2U2B E82U2C B1
2U32 E1
C
6
7
F
TO
B
2
2K8 supplies
2K9 supplies
C
7 8 9
1 2 3
*
8
1
6 7
A
H
9
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
B
C
D
E
F
A
B
2U23 D22U24 A72U25 B82U26 B92U27 F72U28 F8
E
B
J
2U33 F1
2U29 E82U2A E8
2U36 F12U37 C1
2U30 D22U31 D3
2U42 A22U43 A22U44 A22U45 B22U46 B22U47 D82U48 D82U49 D72U51 D12U52 D12U53 C13U35 B63U37 A63U3V B8
1 2 3 4 5 6
10
I
*
* IN CASE OF ONLY-ANALOG TUNER
DC / DC
4 5
3U41 B53U42 E9
8 9
3U45 E93U46 A83U47 E83U4A B83U4B B43U55 C33U56 C33U57 C33U58 C33U59 B63U60 E53U61 E53U62 F53U63 F5
C
D
E
6
4
owne
r.
5
2
2U34 F12U35 F1
3U67 D23U80 E3
2U40 F32U41 A2
3U83 E43U84 F23U85 F43U86 F43U88 F33U89 F33U90 A33U91 A33U92 A33U93 B23U94 B33U95 B33U96 A43U97 A4
3U3W A83U3Y E63U3Z F6
D
G
13
F
1
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
7
3U40 E8
5U08 E75U10 A1
3U43 E83U44 E9
5U13 A15U14 A15U15 B15U16 B15U17 F25U20 F25U21 F26U0B E86U0C E86U40 E37U0M A97U0N B77U0P E77U0Q E9
3U64 C23U65 C23U66 D1
13
LED PANEL
*
11
D
8
5
7U40-2 E4
3U81 E33U82 E4
7U50 C79U06 A29U07 B39U08 B5CU70 D1CU71 D1FU10 F1FU11 F1FU12 F1FU13 C1FU14 C1FU15 C2FU16 C1FU17 C2
3U98 C35U06 F25U07 A1
124
2101
FU1B E1FU1C E1
5U11 A15U12 A1
FU1G E9FU1H C4FU20 E1FU21 E1FU22 E1FU23 E1FU24 C1FU25 D1FU26 D1FU30 A1FU31 A1FU32 A1FU33 A1FU34 A1
7U10 B47U11 B37U40-1 E3
9
I
A
RESERVED
G
J
IU34 A8IU35 B8
7U41-1 F47U41-2 F5
IU38 E7IU39 F9IU3B E8IU3C B8IU3T C8IU40 E3IU41 E3IU42 E4IU43 E3IU44 F3IU45 F4IU47 F3
E
IU48 A4
FU18 C2FU19 C1FU1A E1
3
IU49 A4IU50 A5IU51 A3IU52 B3IU53 B4IU54 F5
*
11
FU35 A1FU36 B1
FU1D F1FU1F B9
2
6
1
FU38 B1
3
H
FU39 E5FU40 F4IU20 B4IU21 B4
IU36 F7IU37 F8
BC847BPN(COL)7U40-1 10
0K
3U43FU22
FU36
IU48
FU17
2U2C
FU1C
100n
FU33
23456789
1
101112
1-1735446-2
1M99
3U93
100R
30R
FU1G
5U21
IU49
5U20
30R
RE
S2U
34
FU1A
100p
30R5U16
3U4B
10K
3U98
10R
FU12
+33VTUN
1U03
3.0A 32VT
10K
3U97
2U42
100p
RES
IU38
2U28
220p
3U35
10K
1u0
2U2A
3U40
IU37
68R
3U58100R
10n
2U32
IU40
78
1M20
123456
5U1230R
RES
30R
5U17
3U66
100R
+AUDIO-POWER
BC847BW7U11
RE
S2U2B
3U47
68R
220n
IU54
FU34
+1V2-STANDBY
100p
2U43
IU51
4
2U26
1u0
7U41-2 5
3
FU38
BC847BS(COL)
1
3
5
FU35
7U50LD3985M122
4
2
FU16
3U56100R
9U06
FU25
RES7U10
BC847BW
IU47
3U46
68K
FU15
+5V
RE
S10
K3U83
9U07RES
IU34
2U27
33p
30R
5U07
IU43
FU19
3U37
100K
7U0M1
3
2
6U0C
BZ
X38
4-C
27
BC847BW
+3V3
5U10
30R
RES
100p
2U51
2U29
220n
IU35
FU31
IU45
FU10
100R
3U92
2U31
10n
33K
RE
S3U45
2U49 1u0
+12V
2U48 1u0
3U89
22K
5
3 1
2
4
FU13
7U0NTS431AILT
FU1H
100p
2U21 RES
5U1430R
+3V3
CU70
IU20
+3V3
IU21
FU30
IU50
+3V3-STANDBY
3U84
1K0
4K7
3U3W
1u0
2U24
1n0
2U30
BC847BW7U0Q
IU44
3U88
10K
220u
5U08
5U1130R
3U61
10K
10K
3U41
RE
S
RES
100p
2U44
IU42
3U80
10K
+12VD
RE
S
1K0
3U4A
3U65
1K0
1K0
3U64
3U3Z
10K
+1V2-STANDBY
2U35
10n
+1V2-STANDBY
3U90
FU11
1K0
100R
3U3Y
FU1F
100p
2U41
1K0
3U3V
+3V3-STANDBY
BAS316
+3V3-STANDBY
+12V
6U0B
IU36
BZ
X38
4-C
8V2
6U40
30R5U15
2U45
100p
1u02U
40 RE
S
30R5U13
FU14
FU18
RE
S33
K
3U44
FU21
2U23
10n
RES
3U95
10K
10K
3U81
+3V3-STANDBY
+5V
100R 3U55
FU20FU23
2U36
10n
+12VF
3U60
22K
100n
2U47
2U25
22n
IU41
IU39
1u0
2U37
22K
3U625U06
30R
FU1B
3U94
FU26
10K
RES
2K2
3U42
1
2U52
100p
BC847BS(COL)7U41-1
2
6
3U86
3K3
3U82
6K8
3
1
2
+3V3-STANDBY
7U0P2N7002
3U91
100R
130
FU40
ROYAL PHILIPS ELECTRONICS N.V. 20082007-11-20
23
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8932TV543 R2 LDIPNX
DC/DC
A3
32008-10-10
Maelegheer Ingrid
2008-11-21
IU3T
RE
S3U
63
10K
IU53
1U01
3.0A 32VTFU1D
BC847BPN(COL)7U40-2
53
4
RE
S
FU39
100p
2U33
RES
CU71
100R
3U67
2U46
100p
3U59
10K
RES
10n
2U22
3U85
10K
+3V3-STANDBY
GND-AUDIO
FU24
IU3B
100p
2U53
3U96
10K
IU52
RES
100R 3U57
56789
IU3C
1M95
1
1011
234
9U08
1-1735446-1
FU32
SDA-SET
ENABLE-3V3-5V
ENABLE-3V3
POWER-OK
SCL-SET
LED2
LED1
LED2
LED1
LIGHT-SENSOR
STANDBY
RC
LIGHT-SENSOR
KEYBOARD
BACKLIGHT-OUT
BACKLIGHT-BOOST
VSW
DETECT-12V
BACKLIGHT-PWM-ANA-DISP
LAMP-ON-OUT
18320_501_090728.eps090728
EN 90Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: DC/DC
VBST2
VIN
PGND
TEST
VREG5VFB2VO2
VFB1VO1
LL2LL1
DRVL2DRVH2
DRVL1DRVH1
GN
D
21
V5FILT
TRIP2
EN2
NC
TRIP1
EN1
VBST1
C
2U09 E4
2U13 E32U18 E6
14
11
N
4 10 14
DC / DC
14 15
1 2 3 4 5
B
12
C
1
D
E
F
G
H
A
B
C
D
E
F
G
H
G
9 10 11 12 13
2U00 A122U01 A42U02 C42U03 D2
2U04 D32U05 D22U08 E6
J
1 2 3 4 5 6 7 8 9 10 11 12 13
2U81 C2
2U83 G72U8A A52U8C B102U8D B10
2U8E A102U8F B12
6 7 8
18
G
I
19
1
2
O
P
E
D
K
6
4
owne
r.
2U90 A123U00 C53U01 C53U02 C6
3U03 C53U04 C33U05 C5
14 15
A
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
5
H
3
7
12V/1V2 CONVERSION
I
118
P
95
O
2U20 F82U38 F8
2U66 B62U67 C72U80 C4 3U33 F8
3U3A B12
3U3F E113U3G F113U3J B93U3N D9
5U04 D9
2U8G D102U8H D10
2U8K D10
13
A
3 15
2U8M D102U8Q E92U8R E9
2U8T H62U8U C82U8V C82U8Y F9
9
5U31 A116U00 C5
6U01 D26U09 B117U01 C37U0D-1 B73U07 D2
3U08 D33U10 E2
13
D
FU85 D14
12V/5V CONVERSION
FU8B A14
B
FU8D B14
6
3U11 E73U12 E8
3U14 B63U26 G93U27 G103U28 C6
3U2C H63U2D H63U2F F103U2G B8
3U2H D93U32 E6
2101
J
5U05 B95U09 A115U18 B11
F
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
L
IU05 D3
IU10 D35U19 C115U30 A11
C C
17
L
M
208
F
7U0D-2 C77U0H-1 A67U0H-2 B6CU25 G2
FU00 E2FU0D F13
H
FU87 D8
15
FU8C B8
IU2A B6FU90 E5IU00 C4IU01 C3IU02 C5
IU03 C3IU04 D5
7 20
1716
2
M
IU29 B6
IU2C E5IU2D D5IU2T G7
IU2V C9
E
IU2Y F9IU2Z E9IU32 D6
18
IU33 F8IU82 C9
IU09 E8IU85 E9
IU13 D3IU14 B6IU15 E6
IU16 C7IU25 D6IU28 C7
B
N
A
9161
K
FU80 B14
3R3
3U04
3U11
22K
FU0D
3n3
2U18
GND-SIG1
+1V2-PNX5100
+12V
FU87
3U3G
120R 1%
IU2V10R
3U01
22R
3U3J
30R RES
5U19
6K8
3U26
30R
5U31
RES
30R
5U30
IU16
CU25
1n0
2U67
4u7
2U09
22R
3U2H
IU25
GND-SIG1
IU2C
2U02
3U05
3R3
100n
2U8V
1n0
100n
2U03
2U8H
22u
RE
S
IU01
100p
3n3
2U20
RE
S
2U8T
30R
RES5U18
22u
2U8M
RE
S
IU2D
3U2F
470R
IU29
GND-SIG1
1%
2U83
100p
FU8C
1%
RE
S
470R
3U2C
FU80
25V
220u2U
01
+5V5-TUN
IU09
RE
S
IU82
GND-SIG1
RES6U01
BAT54 COL
82
1
SI4936BDY
7U0H-1
7
2U00
220u
25V
10u
RE
S
5U04
IU10
FU8B
IU05
1u0
2U90
2U04
100n
3U02
10R
7U0D-2
SI4936BDY
5 6
43
2U81
2u2
RES5U09
10u
1u0
2U8Y
22u
2U8E
RE
S6U
00
BA
T54
CO
L
2U8F
220u
25V
3 3
2007-11-20 ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
GND-SIG1
RE
S
130 A2
DC/DC
TV543 R2 LDIPNX 8204 000 8932
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
IU2T
FU90
+1V2-PNX5100
3U28
3R3
IU14
3U14
2U66
1n0
10
23
4
11
22
3R3
25 18
820
24
19
21
1
14
5
26
173
12
7
2716
269
13
ΦTPS53124PW
7U01
28
15
7U0H-2
SI4936BDY5 6
4
3
1%
2K7
3U3A
1n0
2U8U
1n0
2U8Q
1K0
3U27
1%
GND-SIG1
22u
2U8A
22R
3U3N
7U0D-1
SI4936BDY
7 8
21
2U8R
1n0
+5V
RE
S
1n0
2U05
GND-SIG1
1n0
2U38
3U12
10K
3U2G
22R
3U03
GND-SIG1
10R
10R
RE
S3U
10
IU15
IU13
FU852U
80
100n
1n0
+5V5-TUN
RE
S
2U08
10u
FU8D
IU02
5U05
IU2Y
3U07
20K
22u
2U8D
GND-SIG1
IU28
+12VF2
IU33
1u0
2U13
IU32
100K
3U2D
FU00
6U09
SS36
GND-SIG1
IU2Z
3U32
4K7
3U33
4K7
3U00
10R
3U3F
10R
RE
S
2U8G
22u
IU2A
IU85
22u
2U8C
2U8K
22u
RE
S
IU03
IU00
IU04
GND-SIG1
GND-SIG1GND-SIG1
GND-SIG1
3U08
+5V5-TUN
GND-SIG1
18K
ENABLE-3V3-5V
SENSE+1V2-PNX5100
18320_502_090728.eps090728
Circuit Diagrams and PWB Layouts EN 91Q549.3E LA 10.
2009-Aug-07
SSB: Front End
RF-IN
MTMT
AGC CONTROL
RF-IN
MTMT
RF-IN
MTMT
C
IO2IGNDO1
GND
D
E
F
G
H
I
A
E
F
G
2T14 C22T15 C102T16 C13
B
C
D
2T20 G102T21 E112T22 B7
H
I
2 3 4
14
8 9 10
17
6 7 8 9 10 11 12 13 14
1
K
5 6 7
3T15 E53T16 E53T17 E11
11 12
D
19
M
7
14
A
B
C
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
F
1T11 C51T21 E51T25 C102T10 B32T11 B32T12 C22T13 C12
I
IF 1T21 IS USED THEN 2T23,2T25,3T14, 3T15, 9T13, 9T11 AND 9T21 ARE ALSO STUFFED
2
2T17 C102T18 C132T19 F10
4
14
2T23 D52T25 B7
1T01 A5
15
1 2 3 4 5
2T39 H93T10 B23T11 B23T12 B23T13 B5
P
E
31017
5
3T14 B5
1211
G
3T18 E113T19 E11
13
N
E
6
4
J
13
O
9T13 B79T14 C109T18 D59T20 D59T21 D7
1
L
D
20
F
6
2
P
3 18
2T26 E5
B
2T27 D72T28 E52T29 E72T35 B52T36 B52T37 C7
9T34 G119T40 B79T41 E79T43 C109T44 D10
10 18
IT25 C13IT26 D10IT28 D7
3T22 G93T98 E115T10 B75T11 C25T12 F116T10 B26T11 B27T10 C119T10 B59T11 B79T12 B5
IT05 B1IT08 C1IT09 B5IT0D B7IT10 B5
C
K
A
9
20
8
I
1
9T22 D109T23 D79T24 E99T25 F59T27 G59T29 G79T30 G59T31 C139T32 D139T33 F11
IT17 B11IT19 C10IT20 C11IT21 C12IT22 C13
16
16
N
M
B
IF 1T11 IS USED THEN 2T25 AND 9T11 ARE ALSO STUFFED
17
IT23 C11IT24 C12
IT30 D9IT32 D11
19
9T45 G7AT10 B7AT11 D7FT17 C2FT18 G5FT21 H9FT22 B3FT23 B2IT03 B5IT04 B5
9 15
O
A
H
owne
r.
8
J
RESERVED
5
11
G
IT11 B7IT12 B7IT13 B7IT14 E5IT15 F5IT16 B9
IT34 F11IT36 G11
H
12
L
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3
C
10n
2T18
9T29
220K
3T19
3T18
9T20
22K
IT30
IT15
2T19
10n
IT10
+VTUN
3T14
47R
22u
2T12
18p
2T26
IT26
IT14
ANTENNA-SUPPLY
FT22
220n
2T10
10K
3T98
IT23
9T18
2T29
4n7
IT12
4n7
2T22
3T11
100R
9T12IT09
IT32
+3V3A
IT25
AT109T11
1
IT05
IT0D
GN
D1
8
GN
D2
5
INPUT12
INPUT23
OUTPUT1 7
OUTPUT2 6
VAGC4
VC
C
RE
S
UPC3221GV-E17T10
9T32
TU
FT17
14
15
16 17
18 19
NC
6
SC
L4
SD
A52 9
+5V
7 8A
DC
AG
C1
AS
3
IF1
11IF
210
12
13
TUNERUV1316E
1T01
+33
V_T
UN
6T10
BZ
X38
4-C
33
9T31
RE
S
FT1810n
2T20
22n
2T21
9T22
RES
9T45
+5V-TUN
100R
3T12
30R
5T11
+5V-TUN
IT24
10n
2T13
+5V-TUN-PIN
2T17
10n
IT08
9T23
10n
2T15
3T15
47R
FT2347R
3T13
3R
F_A
GC
6S
CL
7S
DA
XT
AL_
OU
T81
DC
_PW
R
10IF
_OU
T1
11IF
_OU
T2
12
1314
15
NC
12 4
NC
2
1T11HD1816AF/BHXP
TUNER
9+
5V
5A
S
RE
S
2T11
220n
6K8
9T44
RES3T17
9T27
+5V-TUN
9T14
RES
2T35
18p
9T41
9T33
RE
S
+5V-TUN-PIN
IT36
9T43
RE
S
IT13
IT19
FT21
47R
3T16
3T22
6K8
IT34
IT11
ANTENNA-SUPPLY
2008-11-21
Randal De Keyzer
2008-10-10 3
IT16
A2
FRONT-END
TV543 R2 LDIPNX 8204 000 8929
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
2 1
2008-06-03 ROYAL PHILIPS ELECTRONICS N.V. 2008
220n
2T25
130
+5V-TUN
2T16
10n
9T21
3T10
100R
4n7
2T27
IT22
IT04
AT11IT28
9T34
RE
S
SD
A7 8
XT
AL_
OU
T
IF_O
UT
211
12
1314
15
2N
C1
NC
24
RF
_AG
C3
SC
L6
TUNERHD1816AF/BHXP
1T21
+5V
9
AS
5
DC
_PW
R1
IF_O
UT
110
4n7
2T23
9T40
30R
5T10
IT17
BZ
X38
4-C
33
6T11
IT20
+33VTUN
9T30
3
12
54
36M125
1T25
OFWX6966M
9T25
22n
2T37
4n7
2T39
9T24
RE
S
100n
2T14 IT21
18p
2T36
9T10
2T28
18p
9T13
+VTUN
IT03
+5V-TUN-PIN
5T12
820n
TUN-P9
TUN-P7
PDNPDN
RF-AGC
TUN-P9
TUN-P7TUN-P8
TUN-P1
TUN-P3
TUN-P11TUN-P10
TUN-P6
TUN-P4TUN-P5
TUN-P2
IF-AGC
TUN-P3RF-AGC
TUN-P1
TUN-P3TUN-P4
TUN-P2TUN-P1
TUN-P5
TUN-P5
TUN-P2
TUN-P4
TUN-P9
TUN-P10B-IF+_N-IF+
TUN-P6TUN-P7TUN-P8TUN-P9
TUN-P10TUN-P11
IF+
PDP
B-IF+_N-IF+
TUN-P10
TUN-P8
TUN-P5
TUN-SDA
TUN-SCL
TUN-P3
TUN-P1
TUN-P4
TUN-P6
TUN-P7
TUN-SDA
TUN-P6
TUN-SCL
TUN-P9TUN-P8TUN-P7TUN-P6
RF-AGCTUN-P2
TUN-P3
IF-AGCTUN-P9
TUN-P8
IF-
B-IF+_N-IF+
B-IF-_N-IF-
B-IF-_N-IF-
RF-AGCTUN-P11
B-IF-_N-IF-
TUN-P1TUN-P2TUN-P3TUN-P4TUN-P5
TUN-P11TUN-P10
18320_503_090728.eps090728
EN 92Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Demodulator
C
COM
OUTIN
TCKTDITDOTMS
GPIO1GPIO2
VIA
MSTRTMERRMCLKMVAL
01234567
RF_AGCIF_AGC
SIF
CVBS
DACL
WS
VSYNC
VIA
MD
I2S
I2C
I2C
PD
VDDH VDDL
VSSH VSSLVS
SA
H_A
FE
1
VS
SA
H_C
VB
S
VS
SA
H_O
SC
VS
SA
L_A
FE
1V
SS
AL_
AF
E2
GN
D_H
S
VD
DA
H_A
FE
1
VD
DA
H_C
VB
S
VD
DA
H_O
SC
VD
DA
L_A
FE
1V
DD
AL_
AF
E2
XI
XO
PN
SCL2
SDA1
RSTN
SAW_SW
SCL1
SDA2
13
H
2
83
20
L
16
E
H
L
7T54 F77T55-1 F47T55-2 G47T56 E3
17
19
O
FT58 H7FT59 I7FT60 C10FT61 D11FT62 E11FT63 I6IT50 A5IT51 A5
P
C
14
G
17
18
10
1
IT55 B4IT56 B3
10
11
J
2 11
A
1 9
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
2T66 G62T67 G72T68 G7
E
B
18
9T15 C19T16 C19T62 F6
9T64 F6
K
20
3
9
D
IT90 F3IT91 F4
P
I
8 9 10 A
4
3T55 B23T56 D11
owne
r.
3T93 G3
IT53 B5
3T95 E9
IT57 B4IT58 B10
M
N
M
I
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
DEMODULATOR
19
IT73 C9IT75 D9
13
2T64 F62T65 G6
B
C
D
2T69 G72T70 G72T71 G82T72 G82T73 H62T74 H7
3T73 E113T74 E12
9T63 E11
3T76 E9
9T70 C29T71 C2
12
J
RESERVED
RESERVED
4
8
F
C
FT56 G8FT57 G6
K
6 7
6
14
7
11 12 13
1 2 3
3T57 C33T58 C4
3T94 H3
3T60 C9
5T50 B35T51 G7
15
IT93 G2IT94 G3IT95 G3IT96 E11IT97 E11IT98 E5
16
7T53-1 E117T53-2 E11
2T62 D122T63 D9
H
I
A
7
F
E
F
G
H
I
1T50 A5
2T75 H62T76 H7
3T75 E9
B
3T77 E93T78 E11
IT76 D8IT77 D9IT79 D3IT80 E9IT81 E10IT83 E9IT84 E2IT85 E3IT86 F6IT88 F6IT89 F3
3T91 F53T92 G3
3T54 B3
4 5
RESERVED
2T52 A4
8 9 10 11 12 134 5
3T59 C4
15
3T61 C43T62 C9
IT59 B9IT60 B4IT61 B3IT62 B9IT63 B9IT65 C3IT66 C4IT67 C4IT68 C3IT69 C8IT70 C9
3T70 D93T71 D93T72 E9
3
7
2T78 I62T79 I62T80 I72T81 I7
G
N
2T24 G52T50 A4
2T77 I6
12
AT50 A4AT51 B4FT20 E6FT24 C5FT25 C3FT50 B8FT51 C3FT52 C3FT53 C3FT54 C3FT55 F7
3T90 F3
2T61 E10
G
E
F
3T63 C93T64 C93T65 C93T66-1 D4
2T53 B32T54 B42T55 B32T56 B42T57 B32T58 B4A
B
6
D
D
5T52 G65T53 H65T54 I75T55 I66T50 E36T51 F27T50 A67T51-1 C97T51-2 C107T52-1 E97T52-2 E10
3T66-4 D43T67 D43T68 E23T69 E3
2T59 B32T60 C8
C
3T52 B23T53 B2
2T82 I72T83 E42T84 E32T85 E23T50 A23T51 A10
O
5
2T51 A4
1 2
5 6
3T79 E123T80 A93T81 A93T82 A93T83 E33T84 F33T86 F33T87 F33T88 F53T89 F3
3T66-2 D43T66-3 D3
100n
2T76
+5V-TUN-CVBS
IT95
AT50
100n
2T66
IT75
+5V-TUN-CVBS
BAS316
6T51
2T56
100n
RES
+1V2
3T72
470R
+3V3
2u2
2T70
9T71
ANTENNA-SUPPLY
9T70
IT67
FT60
3
21
84
7T55-1LM393PT
5T55
30R
+12V
9T64
+3V3
IT93
IT84
3T73
100R
560R
3T55
IT98
IT65
10K
3T51
AT51
100n
2T60
+3V3
9T63
IT68
+12V
IT94
IT56
+3V3A
2T57
10n
CHECK
8204 000 8929TV543 R2 LDIPNX
FRONT-END
A2130
32008-10-10
Randal De Keyzer
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-03
22
SETNAME
CLASS_NO
SUPERS.
2
NAME
DATE
2u2
2T75
IT58
2T59
2p2
5T52
30R
100R
3T58
FT61
+5V-TUN
FT50
2R2
3T69
IT55
45
IT80
RE
S10
K
3T66
-4
22n
2T85
2T52
100p
3T91
6K8
2T71
100n
100n
2T84
3T87
220R
1
RES
7T51-1BC847BPN(COL)
RESBC857BS(COL)
7T53-12
6
FT62
IT86
3T81
10K
10K
3T80
RE
S
IT76
RE
S
3T93
2K7
2T80
IT61
2T81
2u2
100n
+3V3
RE
S10
K
3T82
100n
2T68
FT20
3T71
18K
BC847BPN(COL)7T51-2
5
3
4
RES
3T90
27K
+5V-TUN-CVBS
3T79
150R
4V
9T62
2T65
100u
100n
2T64
18K
RE
S
9T15
+3V3
3T60RES
3T50
220R
FT52
4K7
3T94
+3V3
FT57
470R
3T54
7T52-1BC847BPN(COL)
2
6
1
1T50 27
M
3T84
2R2
IT70
27K
3T89
36
IT81
RE
S3T66
-3
10K
4K7
+3V3E
+3V3A
IT91
3T61
+3V3
+1V2-PNX85XX
IT90
10K
18
RE
S3T66
-1
2T78
2u2
3T95
2K2
220R
3T86
IT53
+3V3D
22u
2T63
2T67
100n
2T83
100n
100n
2T74
IT85
IT60
+3V3D
+5V-TUN-CVBS
10K
3T66
-22
7
2T53
22p
RE
S
4K7
3T67
FT24
IT77
FT54
+3V3
+1V2
3T63
10K
3T77
2
RES9T16
180R
7T54LD1117DT12
1
3
IT96
RES
600R
5T51
3p3
2T62
2T51
12p
5T54
600R
IT59
100p
2T54
FT59
560R
3T53
+1V2A
3T76
150RIT97
100n
2T79
1
2 43
FT53
7T56BCP56
220R
3T52
FT56
IT73
IT83
30R
5T53
+12V
FT55
+1V2A
IT51
100R
3T78
+3V3
IT57
+5V-TUN
+3V3
IT50
10K
3T88
IT62
100n
2T72
+3V3E
470R
3T62
BC857BS(COL)
7T53-25
3
4
RES
2T24
2u2
5
3
4
IT63
7T52-2BC847BPN(COL)
IT79
FT58
2T55
100R
3T57 IT66
10n
2u2
2T77
+3V3
BZ
X38
4-C
6V8
6T50
68R
3T56
IT89
3T83
100K
3T65
150R
3T92
67
84
10K
7T55-2LM393PT5
17 25 54 3 15 28 55
29
49
50
7071727374
38 41 51 35 45 7
9394
68
9596979899
100101
69
8467 85
86878889909192
56
66
757677787980818283
42 52 36 46 8 18 26 53 2 16 27
47
33
32
31
44
59605758
37
12131419202122
65
10
48
62
24
61
6364
1
34
3940
9
11
7T50DRX3926K-XK-A2
DEMODULATORΦ
43
65
430
23
+3V3 +1V2
FT51
IT88
150R
3T74
+5V-TUN-CVBS
150R
3T64
+5V-TUN
+3V3
IT69
100nRES2T58
5T50
680n
2T73
2u2
4K7
3T68
FT63
2T50
FT25
12p
22u
2T61
2T82
100n
3T70
100R
3T75
10K
+3V34K7
3T59
RF-AGCSCL-SSB
TUN-SCL
SDA-SSB
TUN-SDA
2T69
100n
ANTENNA-CTRL
FE-CLK
IF-AGC
TUN-SDATUN-SCL
ANTENNA-CTRL
JTAG-TMS-DRXKJTAG-TDO-DRXKJTAG-TDI-DRXK
JTAG-TCK-DRXK
RESET-SYSTEM
FE-VALID
FE-SOP
FE-DATA7
FE-DATA4FE-DATA3
FE-DATA0
FE-DATA2FE-DATA1
FE-DATA6FE-DATA5
SDA-SSBSCL-SSB
PDP
PDN
IF-P
CVBS-TER-OUT
CVBS4
IF-
IF+
18320_504_090728.eps090728
Circuit Diagrams and PWB Layouts EN 93Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Stand-by Controller
OXTAL
ALE
EA
67
01237
012345
P6
P0
P1
P2
P3
PWM
67
01234
VSS_XTAL
UA_RXUA_TX
5
PSEN
MC
SPI
012345
01
RESET_IN
SCLSDA
CLKCSBSDI
SDO
0123
45
CADC
I
D
C
S
W
HOLD
VSS
Q
VCC
C
SCLADR
012 SDA
WC
3H07 C11
M24C64
1
3
N
F
C
8
11
6
1HF0 A42H00 C3
3H30 D2
5121
3 4
5
8
A11
P
N
2H11 H72H12 H6
4 5
A
B
3H01 E2
9 10
G
H
10
3H02 B113H03 B11
4
2H03 F62H10 D11
3H58 D2
3H08 C113H10 B2
D
E
I
3H68 B7
1
E
16
M
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
PNX 8543 : STANDBY CONTROLLER
3H15 B13H16 B2
5 9 10
3H21 C23H22 C133H23 C1
19
18
31 2
3H92-3 G3
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
16
7
7 8
3HD4 E13
3H24 C23H25 C13
15
13 14
7H11 H8
3H31 D13H32 B11
A
B
C
3H42 C13H43 H73H44 I4D
E
F
3H52 I133H53 I133H54 C7
G
H
I
2HF1 B33H00 E2
MAIN NVM
C
11
F
3H05 B113H06 C11
9H27 E3
3H60 D13H64 D2
2H01 E3
3H13 B13H14 B2
FHC6 H11
3H69 C73H70 E2
9
1 2
3H78-3 H43H78-4 H43H86-1 F4
6 7 8
3H87-1 I23H87-2 I33H87-3 I3
12 13 14
*
6
B
3H92-4 H33HC2-1 H12
6
10
5
IH16 F5
6H10 H76HW2 F5
12
3H27 C23H28 C1
IH26 H4
7H14 F67H16-1 F5
I
20
L7HC3 H127HC4 H127HD0 E12
7 1413
9H15 F119H25 E39H26 E3
2HC0 H132HD0 F122HF0 A3
E
RES
L
A
O
3H04 B11
*
3H56 C7
IHW5 B5
9H28 H13FH09 H12
3H12 C12
3H66 B73H67 B7
IHWA C5
FHC7 I13FHD0 E13
20
HOTEL TV
19
IH01 D11IH02 D3IH03 D10
3H17 B13H19 B23H20 C1
IH08 H5IH09 C13IH14 F5
B
4 18
3H92-1 G43H92-2 G4
IH15 C10
I
1413
3HC2-3 H123HC2-4 H13
IH35 H7
IH17 G5IH18 I4
3H26 C1
7H02 D107H03 C13
O
IH32 C10IH33 H7
3H36 D23H39 C23H41 H6
IH37 C10IH91 H4IH92 F9
3H46 C23H48 C13H51 C2
IHW1 B4IHW2 B4IHW3 B4
17
G
owne
r.
C
G
IHC1 H12
IHW6 B4IHW9 B4
J J
P
3
IHWB C4IHWC C4
3H65 B7
FHC2 I14FHC3 C5
IH00 D10
IHWD C4IHWF C5
3H72 G73H78-1 E63H78-2 E5
IH06 D10IH07 D10
IHWH C4
3H86-2 F43H86-3 F33H86-4 F2
F
D
*
K
2
3H87-4 I4
H
9
W2
FHC1 H13
11
3HC2-2 G12
IH21 I12
IH34 G8
FHD1 F11FHD2 D13
7H00-6 A5
IHC2 G12IHD0 F12
IHWG C4
IH04 G4
7H16-2 G57H93-1 H57H93-2 I5
IHWM D4IHWN D5
9H05 D139H13 G89H14 E11
H
12
M
K
2
IH19 F4IH20 F7
17
IHW4 B4
DIH36 H7AJ2
AF3
AL5AK5
AJ1AK3AK1AJ4
W3
W1
AG1AH5AH4AH3AH2AH1
AK2AK4
AE2
AJ3
AG4AG3AG2
AC4AC3AE1AD5AD4AD3AE5AE4
AF4
AC2AC1AB3AB2AB1AD2AD1AC5
AF23EA1FA
AN3AN2AP2AP1
10K
3H08
7H00-6PNX85439EH/M2/24182
STANDBY
10K
3H44
3HD
4
10K
3H3110K
10K
3H58
3H92
-1
10K
18
3HC
2-3
36
10K
6H10
BAS3164
3H65 100R
3H92-4
10K
5
3H51
10K
IHW2
10K
3H01
IH03
IHC1
IHWH
IHC2
FHC3
3H42 RES
4 5
10K
10K
3H86-4
IH35
IH19
10K3H23
6HW
2
BA
S31
6
3H32
10K
IH02
IH36
IH14
3H70
100K
3H02 RES
4K7
3H52
100R3H53
100R
100R
3H56
RES
+3V3-STANDBY
3H03
4K7
10K3H48
4K7
3H72
3H6010K
+3V3-STANDBY
+3V3-PER
IH91
3
INP2
NC
4
OUTP1
7H11
CD5
GND
NCP303LSN30
10K
3H86
-11
8
6
1
7H93-1BC847BS(COL)
2
3H54
100R
1
IH17
NCP303LSN307HD0
5CD
3
GND
INP2
4
NC
OUTP
RES
10K
3H36
IHW5
22p
2HF
0
10K
3H87-4 45
9H28 RES
RES2HC0
100n
IHW3
+3V3-STANDBY
2H11
100n
RES3H1510K
EMC HOLE1X03
9H14
IH21
9H27
+3V3-STANDBY
IHW6
9H26
3H87-2
10K
27
1FHD1
RES3H64
10K1H
F0
27M
10K
3H04RES
IHW4
3H194K7
3K3
3H43
3
4
IH34
BC847BS(COL)7H93-2
5
10K
3H05
BC847BW
1
3 2
+1V2-PNX5100
7H03
3
2PDTC114EU
7H141
IHD0
+3V3-STANDBY
IHWA3H69
100R
RE
S
9H15
FHC6
10K
3H41
8
+1V2-PNX85XX
IH15
3H87-1
10K
1
2
1
84
3
Φ512K
FLASH
M25P05-AVMN67H02
6
5
77
23H
92-2
10K
+3V3-STANDBY
RES
6 3
3H21
10K
3H86-3
10K
100R3H66
45
10K
3HC
2-4
3H39
10K
FHC2
+3V3-STANDBY
7HC4BC857BW
10K3H20
RES9H05
FHC1
FHD0
IHW1
RE
S
2H10
100n
IH00
IH37
2H01
100n
PNX8543 TV543 R2 LDIPNX
STANDBY CONTROLLER
A2130
FHD2
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
116
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927
8 1
+5V +3V3-PER
10K
3HC2-1
IH18
IHWB
IH07
3H1310K
6 3
+5V
10K
3H92-3
3HC
2-2
10K
27
IH09
100n
2H12
2
6
1
RES
BC847BS(COL)7H16-1
IH26
3H2810K
36
10K
3H78
-3
4
7
RES10K
3H17
123
6
5
8
(8Kx8)Φ
EEPROM
7HC3
IH92
FHC7
100R3H68
2HF
1
22p
IH01
RES3H2410K
+3V3-STANDBY
IH06
3H1610K
+3V3
+3V3-STANDBY
3H22
4K7
+3V3-STANDBY
IH33
3H67 100R10K3H14 RES
7H16-2BC847BS(COL)
5
3
4
2HD
0
100n
IH32
IH16
IHWN
3H00
10K
FH09
3H2710K
10K3H30
RESIHWF
IHWDIHWC
9H25
IHWG
+3V3-PER
3H25
10K
10K
3H78
-27
2
IHWM
+3V3-PER
10K3H26
10K
63
54
3H87-3
10K
3H78
-4
3H06
10K
IH04
3H4627K
IH08
2H03
1u0
10K
3H07
+3V3-STANDBY
9H13
IH20
2H001n0
3H78
-1
10K
81
2 7
4K7 3H
12
10K
3H86-2
RE
S
10K3H10
IHW9
RES
SDA-UP-MIPS
SCL-UP-MIPS
RESET-STBY
SPI-CLKSPI-CSBSPI-SDI
SPI-SDO
DETECT-12V
SPI-WPSPI-PROG
BOLT-ON-TS-ENn
UART-SWITCH
RC-UPRC
RC-OUT
RC-INRC-UP
RC
UART-SWITCHRESET-ETHERNETRESET-PNX5100RESET-NVMBOLT-ON-TS-ENn
WP-NANDFLASH
POWER-OKENABLE-3V3
LED1
RESET-NVM
RESET-STBY
AUDIO-MUTERESET-AUDIO
SDA-UP-MIPS
LED1LED2
TXD-UP
AV2-STATUS
DETECT2DETECT1
LAMP-ON-OUT
LAMP-ON
SPI-PROGSPI-WP
BOLT-ON-IOBOLT-ON-IO
EJTAG-DETECTLAMP-ONSTANDBYDETECT1DETECT2
POWER-OKENABLE-3V3
AV1-STATUS
SCL-UP-MIPSSDA-UP-MIPS
SPI-CLK
SPI-SDO SPI-SDI
SPI-CSB
SPI-WP
RXD-UPTXD-UP
RESET-SYSTEM
KEYBOARD
SCL-UP-MIPS
PSEN
ALE
EA
LED2
PSEN
ALE
EA
SPI-SDI
RESET-NVMRESET-PNX5100
RESET-ETHERNET
WP-NANDFLASHRESET-AUDIOAUDIO-MUTE
MHP-SWITCH
SUPPLY-FAULTSDM
RXD-UP
RESET-SYSTEMAV2-BLKAV1-BLKKEYBOARDLIGHT-SENSOR
RC-UPREGIMBEAU_CVBS-SWITCH
CEC-HDMISUPPLY-FAULT
SDM
MHP-SWITCHEJTAG-DETECTLAMP-ONSTANDBYDETECT1DETECT2
RC-UPREGIMBEAU_CVBS-SWITCHCEC-HDMI
18320_505_090728.eps090728
EN 94Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Debug
C
FOR DEBUG
4
J
I
D
1
A
1H11 C2
4
B
A
FH08 D3B
IH95 D2
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
FOR DEBUG
I
A
B
4
1 2
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
SPI-PROG
G
2H07 D3
3
F
J
FTSTPOINT
2H06 C3
owne
r.
1
3HF3 A3 6HF0 B3 7HF2 B3 FH01 D2
PNX8543 : DEBUG
64
C
TSTPOINT
E
53
B
C
5
D
2
G
6
IH94 C3
H
2
1
GND
TSTPOINT
3
FH00 C2
A
3
D
D
2
FOR DEBUG
E
C
C
SDM FH08
IH93 C2
H
ROYAL PHILIPS ELECTRONICS N.V. 2005
2009-01-29
De Pauw B
2008-10-10 3
A4
DEBUG STBY CTRL
PNX8543 TV543 R2 LDIPNX 8204 000 8927
CHECK DATE
NAME
3
SUPERS.
CLASS_NO
EMANTESNHC
16 2
2007-11-29
130
+3V3-PER
PDTC114EU7HF2
330R
3HF
3
SM
L-31
0
6HF
0
IH95
IH93
IH94
12
34
1H11
SK
HU
BH
E01
0
FH01 RES
FH00
2H07
100p
100p
2H06 RESSPI-PROG
SDM
RESET-SYSTEM
18320_506_090728.eps090728
Personal Notes:
10000_012_090121.eps090121
Circuit Diagrams and PWB Layouts EN 95Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Control
USB_RPU
RREF
SCLSDA
SCLSDA
UA2_TXUA2_RX
EJTAG
USB_VBUS
2
1SCL1
2
3
SDA
USB
TRSTN
CLK_27_OUT
RESET_SYS
TCKTDITDO
3SMT
BL_PWM
FAULTDPDM
USB_ID
PWR_EN
C
4
G
9
8
F
A
B
C
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
F
1
2
3HPE E23HPF E23HPG E23HPH E2
3H11 C13H33 C63H37 D43H38 D5
3HFY C13HP2 C43HP3 B1
3H45 D43H49 E43H50 E43HF9 A3
3
13
J
D
3HP6 B1
7
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
A
3HP4 B1
H
1 2 3 8 9
1
9H17 D3FH03 C5FH04 E4FH05 F4
2
E
G
7
7 8 9
A
B
C
D
E
A
FH11 F4FH12 F4IH12 C1
D
B
E
1210
C
I
3HP8 C1
11
6
H
D
IHF9 C3IHFA C3IHFB B3IHS8 C1
owne
r.
E
F
3H09 C6
9
C
3
1
10
PNX8543 : CONTROL
4
F
I
3HPJ F23HPK E43HPL C13HPM F4
3HPU F23HPV F43HPW B3
3HPP D13HPR D13HPS F23HPT F4
4 5 6 7
7H00-8 B3
J
13
12
3 4 5 6
B
8
5
2
IHF4 B3IHF6 C3IHF7 C3IHF8 C3
3HPA C13HPB C13HPC C13HPD E2
11
5 6
10K 3HPC
10K 3HPA
3HF
9
10K
100R
3HPS
IHF7
3H38 10K
10K 3HP8
+3V3-PER
33R3HPW
IHF8
3H1110K
9H17RES
3HPL10K
3HPV
4K7
4K7
3HPT
3H37
IHF4
1K5
AM16
AN17
H33
B33
G32
AL27AK27
AN16AP16AL16
AP17
AK16
AM17
L31GPIO_5
V2GPIO_6
V3GPIO_7
V4GPIO_8
V5GPIO_9
AN28
F33
D32
D33
AP3AP4AM4AL4
U2GPIO_0
U3GPIO_1
U4GPIO_2
L34GPIO_3
L32GPIO_4
PNX85439EH/M2/24182
CONTROLAP27
AP29
AN4
3H50
7H00-8
+3V3-PER
4K7
1K5
3HPM
+3V3-PER
+3V3-PER
+3V3-PER
+3V3-PER
3HPB10K
3H49
IHS8
4K7
100R
FH03
3HPJ FH05
3HP610K
3HPF
100R
IHF6
RES
3HPK
1K5
10K 3HFY
3HPD
100R
100R
3HPU
IH12
10K 3HPR
3HP2
12K 1%IHFA
3HP310K
2009-01-29
De Pauw B
2008-10-10 3
10K3H45
A3
MIPS , I2C & EJTAG
PNX8543 TV543 R2 LDIPNX 8204 000 8927
CHECK DATE
NAME
3
SUPERS.
CLASS_NO
EMANTESNHC
16 5
2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005
130
100R
3HPE
100R
3HPH
FH11
FH04
3HP4
+3V3-PER
10K
IHF9
+3V3-PER
3H09
15K
15K
3H33
3HPP10K
FH12
IHFB
100R
+3V3-PER
RES 3HPG
SCL3
SDA1
SDA2
SDA3
USB20-DMUSB20-DP
USB-OC
SCL-SET
SDA-SET
SCL2 SCL-SET
SDA2 SDA-SET
USB20-DM
USB20-DP
SCL1
SCL2EJTAG-TCKEJTAG-TDI
EJTAG-TDOEJTAG-TMS
EJTAG-TRSTN
RXD-MIPSTXD-MIPS
TXD-MIPS2RXD-MIPS2
PCI-CLK-OUT
SCL-SSB
IRQ-PCI
TXD-MIPS2RXD-MIPS2
RESET-SYSTEM
SDA-UP-MIPS
SCL-UP-MIPS
SDA-UP-MIPS
SCL2 SCL-UP-MIPS
SDA2 SDA-UP-MIPS
SCL3 SCL-SSB
SDA3 SDA-SSB
BOOTMODE
IRQ-CA
SDA-SSB
IRQ-CA
EJTAG-TCKEJTAG-TDIEJTAG-TDOEJTAG-TMSEJTAG-TRSTN
TXD-MIPSRXD-MIPS
IRQ-PCIWC-EEPROM-PNX5100BOOTMODE
SCL1 SCL-UP-MIPS
SDA1
18320_507_090728.eps090728
EN 96Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Control
C
TRDY
XIO_SEL293031
012345678910111213141516171819202122
IDSELINTA_OUT
IRDYPAR
PERR
REQ
REQ_B
SERRSTOPTRDY
PLL_OUT
XIO_ACKXIO_AD25
0123
0123
CLKDEVSELFRAME
GNT
GNT_B
232425262728
PCI_AD
PCI_CBE
2
1
CLKOUT
3CLK
VDD
4
GND
REF
IHF3 D3IHF5 E2
C
9HF5 C6
IHS7 C3
4
8
J
8
2
6
F
owne
r.
4
2
9
A
3HFE-2 A63HFE-3 A63HFG D23HFH E23HFK E73HFM E73HFN E7
1
B
3HFD-4 A5
7H00-3 A2
G
C
7 8
J
A
3HFE-1 A6
7HF1 D6
3HFR E5
C
6
I
1
3HEU B33HF2 E23HF4 E23HF5 C33HFD-1 A6
3HES-2 B53HES-3 C53HES-4 C5
9HG3 C3IH30 B4IHF0 E2IHF1 C3IHF2 C3
9HF4 C6
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
12
F
D
3HES-1 C5
H
9
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
13
H
E
G
13
3
1210 11
5 6 7 8
A
53
I
3HFP E7
3HFD-3 A6
3 4 5 6
11
B
2
D
E
A
B
C
D
E
2HF5 D72HF6 D7
3HFD-2 A5
2HF7 D7
4 71
5
B
1
PNX 8543 : CONTROL
E
7
D
9HF6 B69HF7 B6
RESERVED
2 3 10
3HES-44K7
4 5
IH30
+3V3-PER
4K72 7 3HES-2
4K73HFE-1 8 1
33R
3HFM
4K73HFD-2 27
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
CONTROL
A3130
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
616
SETNAMECHN
4K73HES-33 6
IHF0
10R
3HF2
IHS7
4K73HFD-3 36
IHF5
3HFD-1 184K7
10R
3HFG
9HF7
3627
4K73HFE-33HFE-2
4K7
3HF4
10R
*
9HF4
3HFH
10R
+3V3-PER
3HFK
33R
IHF1
33R
3HFN
3HFR
33R
3HEU100R
IHF3
3HFD-44K7
45
1 84K7
3HES-1
10n
2HF5
10p
2HF7
3HFP
33R
9HF6
6
3
2
5
7
8
4
1
DELAYZERO
Φ
BUFFER
CY2305S7HF1
E26
AP28
A20B19
B20C20D20E20
+3V3-PER
E30
E29
B30C30D26E25C25
D30
E31
D25B25
D28E28A27
D21C21B21A21
A30A25C26
A23E22D22C22B22
D29
A22E21
A28B28C28
B26E24D24C24B24
C29
A24E23D23C23B23
A29B29
B27C27D27E27A26
PCIPNX85439EH/M2/241827H00-3
100n
2HF6
+3V3-PER
+3V3-PER
IHF2
9HG3
+3V3-PER
9HF5
3HF5
XIO-ACK
100R
PCI-FRAME
PCI-GNT
PCI-GNT-B
PCI-IRDYPCI-PAR
PCI-PERR
PCI-REQ
PCI-REQ-B
PCI-SERRPCI-STOPPCI-TRDY
PCI-CLK-OUT
PCI-CLK-PNX5100
PCI-CLK-PNX8535
PCI-CLK-MINI
PCI-CBE0PCI-CBE1PCI-CBE2PCI-CBE3
PCI-CLK-PNX8535PCI-DEVSEL
PCI-CLK-PNX8535
PCI-CLK-PNX5100
PCI-CLK-MINI
PCI-CLK-ETHERNETPCI-CLK-OUT
PCI-CLK-ETHERNET
XIO-SEL-NAND
PCI-CLK-OUT
PCI-GNT
PCI-GNT-B
PCI-REQ-B
PCI-AD13PCI-AD12PCI-AD11PCI-AD10
PCI-AD1PCI-AD0
PCI-SERRPCI-PERR
PCI-TRDYPCI-IRDY
PCI-FRAMEPCI-DEVSEL
PCI-STOP
PCI-REQ
PCI-AD23PCI-AD22PCI-AD21PCI-AD20
PCI-AD2
PCI-AD19PCI-AD18PCI-AD17PCI-AD16PCI-AD15PCI-AD14
PCI-AD5PCI-AD4
PCI-AD31PCI-AD30
PCI-AD3
PCI-AD29PCI-AD28PCI-AD27PCI-AD26PCI-AD25PCI-AD24
PCI-REQ-MINI
PCI-GNT-MINI
PCI-REQ-ETH
PCI-GNT-ETH
PCI-AD24PCI-AD9PCI-AD8PCI-AD7PCI-AD6
18320_508_090728.eps090728
Circuit Diagrams and PWB Layouts EN 97Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - SDRAM
1
VSS
VDDQ
14
VS
SD
L
VREF
VD
DL
CK
1211
LDMUDM
15
13
78910
3456
VSSQ
BA
A
LDQS
UDQS
NC
DQ
CKEWE
ODT
RAS
2
CS
CAS
0012
VDD
12111098765430
12
1
VSS
VDDQ
14
VS
SD
L
VREF
VD
DL
CK
1211
LDMUDM
15
13
78910
3456
VSSQ
BA
A
LDQS
UDQS
NC
DQ
CKEWE
ODT
RAS
2
CS
CAS
0012
VDD
121110
98765430
12
C
M_DQ
M
M_A
M_BA
M_CLK
M_DQM
M_DQS0
NP
M_DQS1
NP
M_DQS2
NP
M_DQS3
P
0123456789101112
012
M_CASB
M_CKE
NP
M_CSB
0123
N
RASB
ODT
IREF
3130
89
1011121314151617181920212223242526272829
VREF
WEB
01234567
3HH3 G83HH4 G7
12
8
3111
12
3HH6 G7
3HH9 H33HHA H4
3HHD G143HHE F13
3HHH G143HHJ G13
3HHN G14
2HH5 C82HHA H7
3HHP G13
3HHT G14
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
16
3HHU G13
C
E
O
17
D
4
PNX 8543 : SDRAM
G
3HHY H9
2HHK E62HHM E6
3HHZ H10
3HJ2 B11
3HGP F73HGR F7
3HJ3 A133HJ4 B13
3HGU G83HGV G7
3HJ5 C83HJY C8
3HGZ G83HH0 G7
3HKM G33HKN G10
B
C
7H00-2 A77HG0 F5
A
13
7HG1 F11FH06 A12
9
2HGD E7
FH07 A11IHG0 C7
2HGG E82HGH E9
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
P
2HGM E92HGN E10
3HHB F133HHC F13
2HGS E102HGT E10
3HHF G133HHG G13
2HGW E132HGY E13
3HHK G143HHM G13
2HH1 E142HH2 E14
3HHR G143HHS G13
11 12
3HHV H10
B
N
1
5
20
I
5
7
3HHW H10
L
N
3HJ0 C13HJ1 A11
K
10
2HHN E112HHP E12
M
14
3HGS F83HGT G7
C
D3HGW G83HGY G7
G
H
3HH1 G83HH2 G7
2HGA E72HGB E7
3HH5 G8
1814
8
B
10
1 2
15
D
5 6
3HH7 H33HH8 H4
9 10
2HGP E102HGR E10
13 14
2HGU E122HGV E13
3 4
2HGZ E132HH0 E13
7 8
2HH3 H132HH4 C8
3
17
2HHB A11
3
P
16
F
E
20
HH
11
1 2
owne
r.
J
19
E
7
G
H
I
A
B
2HG2 E32HG3 E3
E
F
2HG6 E42HG7 E4
I
A
2HG5 E4
2HG8 E4
D
K
2HG9 E6
2HGC E7
O
6
F
18
2HGE E72HGF E8
I
3
2HGJ E92HGK E9
4 7 11 128
C
1 2
199
5 6
A
L
9 10 13
2
4
15
J
6
M
14
F
G
2HG0 E32HG1 E3
2HG4 E3
33R3HH5
3HH333R
FH06
33R3HHK
5K6
3HJ5
3HJ0
220R
2HG
3
100n
33R3HH9
3HHC33R
100n
2HG
F
100n
2HG
P
6.3V
330u2H
HK
RE
S
33R3HGS
3HHA
33R
3HHT33R
100n
2HG
D
DDR2-VREF-CTRL
2HG
U
100n
2HG
S
100n
2HG
C
100n
2HH
1
100n
33R
3HHU
2HG
H
100n
3HGR33R
100n
2HG
8
3HHE33R
100n
2HG
K
100n
2HH4
F2
F8
H2
K3
J7 A7
H8
B2
B8
D2
D8
E7
G3
G7
J2
A3
E3 J3 N1
P9
A9
G9
C1
C3
C7
C9
E9
G1
B7A8
A1
E1
J9 M9
R1
J1A2E2R3R7R8
K9
K7
B3
H9F1F9C8C2
F3
F7E8
D3D1D9B1B9
H7H3H1
L7
J8
K2
K8
L8
G8G2
D7
N3N7P2P8P3
L2L3L1
M8M3
M2P7R2
M7N2N8
7HG0
EDE1116AEBG-8E
ΦSDRAM
2HG
R
100n
100n
2HG
1
3HJ1
1K0
1%
DDR2-VREF-DDR
+1V8-PNX85XX
33R3HHH
33R3HHP
3HGW33R
3HKN220R
RES
IHG0
2HH
B
330u
6.3V
100n
2HH
0
3HGP
33R
3HGZ33R
33R3HHN
2HG
E
100n
33R3HH8
3HHB
33R
33R3HHG
3HH733R
B2
B8
D2
D8
E7
F2
F8
H2
K3
G7
J2
A3
E3 J3 N1
P9 J7 A7
H8
R1
J1 A9
G9
C1
C3
C7
C9
E9
G1
G3
K9
K7
B3
B7A8
A1
E1
J9 M9
F9C8C2
F3
F7E8
A2E2R3R7R8
D7D3D1D9B1B9
H7H3H1H9F1
L2L3L1
L7
J8
K2
K8
L8
G8G2
M2P7R2
M7N2N8N3N7P2P8P3
SDRAMΦ
EDE1116AEBG-8E
7HG1
M8M3
3HH033R
2HG
A
100n
1u0
2HH
P
33R3HGY 3HHJ
33R
3HJY
820R
3HHW33R
100n
2HG
B33R
3HHR
+1V8-PNX85XX
3HHF 33R
2HH5100n
100n2HH3
100n
2HG
M
100n
2HG
V
DDR2-VREF-DDR
2HG
0
100n
2HG
5
100n
33R3HHV
100n
2HG
Y
3HHY33R
2HG
N
100n
3HGT33R
2HH
2
22u
33R
3HHZ
2HG
2
100n
2HG
J
100n
100n
2HG
9
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
DDR2 INTERFACE
A2130
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
716
SETNAMECHN
CLASS_NO
2HG
T
100n
33R 3HHD
22u
2HG
G
2HH
N
330u
6.3V
RE
S
2HG
Z
100n
DDR2-VREF-CTRL
DDR2-VREF-DDR
3HHS33R
2HG
W
100n
+1V8-PNX85XX
3HH233R
3HHM33R3HH1
33R
N32
AA31
V31
V32
AB32
AE32
+1V8-PNX85XX +1V8-PNX85XX
AJ31R34R31
AG33AG34
AH31AH32
N34N33
N31
M31
AL34
R32M32
AL33AE34AK34AF34AG32AK31
AJ34
U34
AH33
V34M33T33M34P31T32P32U31U32
AK33
AJ32AL32AL31AF31AK32AF32
P34T34R33
W34Y31
AC34AD33AA32
W32
AE31
AB33AB34
W31
AH34AA34AE33
AD34V33Y32
AA33AD31Y34AD32W33AC32
7H00-2PNX85439EH/M2/24182
MEMORY
2HH
M
1u0
FH07
3HJ2
RES
1%1K
0
220R3HKM
100n
2HG
4
100n
2HG
6
33R3HGU
3HGV33R
1%1K
0
3HJ3
3HJ4
1K0
1%
2HHA100n
2HG
7
100n
3HH6
33R
3HH4
DDR2-RAS
DDR2-WE
33R
DDR2-D31
DDR2-D2
DDR2-D27DDR2-D29
DDR2-D6DDR2-D5DDR2-D4DDR2-D7DDR2-D8DDR2-D9
DDR2-ODT
DDR2-D17DDR2-D19DDR2-D18
DDR2-D3
DDR2-D22DDR2-D23DDR2-D20DDR2-D21DDR2-D24DDR2-D30DDR2-D26DDR2-D25DDR2-D28
DDR2-D1DDR2-D0
DDR2-BA2
DDR2-CLK_P
DDR2-D0DDR2-D1
DDR2-D10DDR2-D11DDR2-D12DDR2-D13DDR2-D14DDR2-D15DDR2-D16
DDR2-D11DDR2-D10DDR2-D9DDR2-D8DDR2-D7DDR2-D6DDR2-D5DDR2-D4DDR2-D2DDR2-D3
DDR2-DQS3_P
DDR2-BA2
DDR2-WE
DDR2-RAS
DDR2-ODT
DDR2-CS
DDR2-CKE
DDR2-CAS
DDR2-BA1DDR2-BA0
DDR2-D15DDR2-D14DDR2-D13DDR2-D12
DDR2-A10DDR2-A11DDR2-A12
DDR2-CLK_N
DDR2-D18DDR2-D19
DDR2-DQS3_N
DDR2-BA0
DDR2-A0DDR2-A1DDR2-A2DDR2-A3DDR2-A4DDR2-A5DDR2-A6DDR2-A7DDR2-A8DDR2-A9
DDR2-DQS0_NDDR2-DQS0_P
DDR2-DQS3_NDDR2-DQS3_P
DDR2-DQS2_NDDR2-DQS2_P
DDR2-DQM3
DDR2-DQM0DDR2-DQM1
DDR2-CKE
DDR2-CS
DDR2-CAS
DDR2-BA1
DDR2-DQM1DDR2-DQM2DDR2-DQM3
DDR2-BA2
DDR2-DQM2
DDR2-DQS1_NDDR2-DQS1_P
DDR2-CLK_NDDR2-CLK_P
DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2
DDR2-A12DDR2-A11DDR2-A10
DDR2-A1DDR2-A0
DDR2-DQM0 DDR2-CLK_NDDR2-CLK_P
DDR2-DQS2_N
DDR2-ODT
DDR2-RAS
DDR2-WE
DDR2-CLK_PDDR2-CLK_N
DDR2-D21DDR2-D22DDR2-D23DDR2-D24DDR2-D30
DDR2-DQS2_P
DDR2-D28DDR2-D29DDR2-D27DDR2-D31
DDR2-D20
DDR2-CKE
DDR2-CS
DDR2-D16DDR2-D17
DDR2-D26DDR2-D25
DDR2-A6DDR2-A7DDR2-A8DDR2-A9
DDR2-BA0DDR2-BA1
DDR2-CAS
DDR2-A11DDR2-A12
DDR2-A2DDR2-A3DDR2-A4DDR2-A5
DDR2-DQS0_PDDR2-DQS0_N
DDR2-DQS1_PDDR2-DQS1_N
DDR2-A0DDR2-A1
DDR2-A10
18320_509_090728.eps090728
EN 98Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Digital Video In
C
N
PN
PN
PN
PN
PN
3
4
2
PDV
0
HDMI_RX0_BDV_VALID
9
HDMI_RX1_B
8
FID
HDMI_RX2_B
7
DDC_SDA_B
HDMI_RXC_B
DDC_SDA_A
DV_VS
DDC_SCL_A
HDMI_RX0_A
HDMI_RX1_A
HDMI_RX2_A
HDMI_RXC_A
HDMI_RREF
DDC_SCL_B
5
0
CLK
HOT_PLUG_A
1
2
N
1
65
DV_YIN
HOT_PLUG_B
HS
3
78
4DV_UVIN
9
6
PN
P
PNX 8543 : DIGITAL VIDEO IN
4 9
TH10 B2TH11 B2TH12 B2TH13 B2TH14 C2
B
C
6
12
135
5 61 2 3 4
owne
r.
8
E
I
5 6
TH08 D2TH09 B2
1 9
F
D
I
D
10
E
4
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
11
11
E
3HK0 B2
BB
IHSM B2TH01 C2TH02 C2TH03 C2TH04 C2TH05 C2TH06 C2TH07 D2
4 5 6 7A
ll rig
hts
rese
rved
. Rep
rodu
ctio
n in
who
le o
r in
par
ts
1
TH15 C2TH16 C2
2 3
J
8
F
12
J
3 13
C
7
A
3
1
H
7
A A
10
2
C
G
7H00-4 A39HK0 D2
7
G
H
2
D
E
A
B
C
D
3HK0
12K
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
VIDEO IN
A3130
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
816
SETNAMECHN
TH15
TH02
TH10
TH04
TH12TH11
TH05
TH08
TH03
RREF-PNX85XX
TH14
TH07
IHSM
TH09
TH13
TH16
9HK0
B12
A18
A14
A19
A15
D19E15
TH01
B17
B13
B18
B14
A16
A12
A17
A13
B15
B11
B16
B4A4E5D5C5B5A5E6D6C6
C16
E7D7C7B7A7E8D8C8
A8E9
C18
C15
E19
D15
B8C9D9
B6A6
TH06
HDMI_DVPNX85439EH/M2/241827H00-4
HDMIB-RX2-
HDMIB-RXC-HDMIB-RXC+
HDMIB-RX0-
HDMIB-RX2+
HDMIA-RX2+
HDMIA-RX1+
HDMIA-RX0+HDMIA-RX0-
HDMIA-RX1-
HDMIA-RX2-
HDMIA-RXC-
HDMIB-RX0+
HDMIB-RX1-HDMIB-RX1+
DDCA-SDA
HOT-PLUG-AHOT-PLUG
DDC-SCLDDC-SDA
DDCA-SCL
HDMIA-RXC+
18320_510_090728.eps090728
Circuit Diagrams and PWB Layouts EN 99Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Audio
C
G
H
IHM7 C5
11
I
9HM0 B5
2 3
4
9 10 11
IHM8 C5
A
8
N
IHMG H7
3HMM-2 I93HMM-3 G93HMM-4 G10
IHNB F9
4 5 6
4 12
3HME-3 E9
7 20
IHMV B9
IHND H9
12 13
A
7HM5 B5
2HM5 H52HM8 H4
IHMW B9
3HM1 D4
1
K
L
7HM6 C5
3HMA G63HMB H6
IHNE H10
F
FHR3 A10IH22 F4IH23 H4
IHM6 B3
M
20
IHNF H6
6
F
IHM0 B3
G
IHM1 F7
3HM0-3 C4
8
IHNG F6
1
2HN1 F9
3HMC G5
C
PNX 8543 : AUDIO
17
M
E
I
3HMD I53HME-1 B103HME-2 B9
is p
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bite
d w
ithou
t the
writ
ten
cons
ent o
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cop
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ht
F
9
2
J
F
G
IHNA F10
2
10
B
12 13
C
IHN8 F6
P
3HMV H5
5
H
2HMG B3
2HM4 G5
3HMU H6
7HM1-3 F10
IHNJ G5
6HM0 B4
D
10
3HMM-1 I10
3
7HM1-1 B107HM1-2 D10
7HM4 H7
2HM2 H5
3HM0-4 D5
P
3HM0-1 C5
D
9
N
7
B
5 16
E
3HM0-2 B4
1
FHM2 F11
2HMW G10
J
5 6 7
18
IHM2 C4IHM4 C4
2HMY H9
15
14
19
A
6
O
IHM5 D5
2HMZ I10
I
L
FHM3 H11
E
8
H
IHN3 D9
E
IHN4 H5
B
3
2HM3 G4
7
IHN6 D10
2
2HMJ A10
8 9 10
2HMP C10
IHN0 F5
3HMW H53HMY F5
19
7HM1-4 H10
H
3
K
2HMT E10
7HM2-1 F57HM2-2 H5
I
IHNK I5
4 11 15
13
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
7HM3 F7
2HM1 G5
FHM0 B11
IHNH H6
3HMZ F5
11
16
FHM1 D11
O
C
D
G
A
B
C
D
17
14
owne
r.
12
3HME-4 E103HMF B33HML G6
18
13
1
5 4
IHN0
3HMM-4
10K
3HM
1
10K
IHM5
54
3n3
2HN
1
22K
3HM
0-4
IH22
BC807-25W7HM5
1
32
IHMW
7HM2-1BC847BS(COL)
2
6
1
1
3
2
2 7
BC857BW7HM4
3HMM-2
10K
FHR3
3HM
W
3n3
2HM
8
2K2
2K2
3HMUIHNH
AUDIO-VDD
IHNE
AUDIO-VDD
IHMV
3
4
33p
2HMT
BC847BS(COL)7HM2-25
10K
3HME-45 4
2HM2
1u0
2HM
3
3n3
2HM
Y
3n3
IHNA
3HMV
22K
3HM
B
470R
IHN4
FHM0
3 63HME-3
10K
81
IHM6
3HM
0-1
22K
3HM
0-2
22K
27
IHNK
IHM4
2HMP
33p
IHND
IHNJ
+AUDIO-POWER
10
98
4
11
7HM1-3LM324
2
IHM0
AUDIO-VDD
7HM3BC857BW
1
3
2HMW
33p
9
2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005
2009-01-29
De Pauw B
2008-10-10 3
AUDIO-VDD
A2
AUDIO
PNX8543 TV543 R2 LDIPNX 8204 000 8927
CHECK DATE
NAME
3
SUPERS.
CLASS_NO
EMANTESNHC
16
FHM2
130
100n
2HM
4
AUDIO-VDD
22K
3HM
C
IH23
IHM1
33p
2HMZ
3HM
Y
2K2
IHN6
22K
3HMZ
8 1
2HM1
3HME-1
10KBZ
X38
4-C
6V8
1u0
6HM
0
12
1314
4
11
IHN3
7HM1-4LM324
2K2
3HML
IHNB
10K
3HMM-18 1
4
11
IHN8
7HM1-1LM324
3
21
10K
3HME-22 7
IHM8
2HMJ
100n
FHM3
AUDIO-VDD
22K
6 3
AUDIO-VDD
3HM0-3
4R7
3HMF
470R
3HM
A
IHNG
2HM
G
1u0
IHMG
3HM
D
22K
IHM2
FHM1
IHNF
9HM0
10K
3HMM-33 6
7HM6BC847BW
2HM
5
100n
LM3245
67
4
11
7HM1-2
ADAC(2)
ADAC(1)
IHM7
-AUDIO-R
+AUDIO-L
ADAC(7)
ADAC(8)
ADAC(5)
ADAC(6)
AUDIO-OUT-L
AUDIO-OUT-R
AUDIO-CL-L
AUDIO-CL-R
18320_511_090728.eps090728
EN 100Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Analogue AV
DAC
AI11
SYNC_IN_2
CVBS1Y
PC3_AI3PC3_AI2PC3_AI1
N
PC2_AI3
AI54AI53AI52
AI2P_IFAI2N_IF
HSYNCIN
VSYN
AGC
AI33REF 3
REF 5
AI43AI42AI41
SYNC_IN_1
AI4N
AI44
AI31
AI23
PN
AI22AI21
PC1_AI1
PC2_AI2PC2_AI1
CVBS2CP
BIAS
AI51
REF 4
AI32
REF 2
REF 1
GND_A3_TG
PC1_AIDPC1_AI3PC1_AI2
OUTIN
AI5N
CURREF
PC3_AID
PC2_AID
AI1P_IFAI1N_IF
AI13AI12
C
3HRR B93HRS A12
IHSG E1
16
16
5H82 B5
18
IHV3 G3
H
IHRC C10
IHR0 B8
2HTV C112HTZ G8
3HSJ A83HSK E1
IHSR A12
C
2HUC H92HUK E12HUN G42HUP G4
IHSD F3
5
A
19
I
14
3HSH A9
9H55 E5
5HR9 G10
IHR4 D10
IH43 D4
7H00-1 D2
IHSA E3IHSB E1IHSC F3
3H89 C43H90 C53H91 D43H93 D5
O
3H99 C43HRP B8
2HSS I102HST G3
5HRA G115HRC A95HRG C11
B
2HT1 E52HT5 F32HT6 F3
F
19
P
13
9H54 E4
L
owne
r.
IHR1 A10
183
3HRY D103HRZ D123HS0 E103HS1 D9
IHSE E1
3HS6 E13HS7 E13HS8 F83HS9 F12
8
3HSF B2
2HTR A92HTU C10
2H99 D32HA3 E3
IH44 A5
IH85 B5IH87 D5IHPF A8
2HS0 G42HS1 B82HS2 B8
10
6
N
B
IHR3 C11
17
2HS3 B9
3HST F123HSU G83HSV F103HSW E1
IHSH G3
5H81 A5
3H79 A43H80 A53H81 A43H82 A5
5H85 B45H86 C4
C
5HR5 D9
2HSP F102HSR H10
1 2
IHS3 E1IHS4 E3IHS5 F4IHS6 H11
7 8 9
K
11
K
O
5HRL F9
12
2H82 A5
2 14
FHR1 B8FHR5 B2
IHSS B12IHST B12
2HTD G102HTE G102HTF G112HTG G11
IHV6 G3IHVE D1
IH41 B4IH42 C4
2H97 D42H98 D4
2HA5 F52HKL E1
IH45 C5IH46 G10IH80 A5IH81 B5
I
2H80 A62H81 A5
9
3HSM C12
158
L
EE
2HS4 A102HS7 B8
IHR5 D8IHR6 F9IHR8 G11IHRB F4
2HSC C102HSD D102HSE D112HSF D10
IHRD E8IHRE F8IHRF F10IHS2 A2
12 13A
20
5H87 D45HR0 B95HR2 B95HR3 C11
20
10 11 12
3HRT A10
4
G
2
A
B
2H83 A52H84 B6
9H50 D49H51 D59H52 E49H53 E5
2H89 B42H90 B52H91 C42H92 C5
FHR6 B2IH38 A4IH39 A4IH40 B4
D
2HA4 E3
5
5
3HSA G93HSB G103HSD G103HSE G11
F
7
H
17
3H29 C4
G
7
9
2 3
15
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
PNX 8543 : ANALOGUE AV
3HSN C103HSQ E83HSR G10
7 8 9 10
3HT3 H113HT4 H113HT9 E15H80 A5
2HSW D12HSY G3
3H96 A43H97 B43H98 B4
3
11
J
D
13
F
2H85 B5
M
3
4
1
2H87 A52H88 A4
C
D
12
3HRU B93HRV B83HRW C12
2H95 C42H96 D5
A
B
3HS2 D83HS3 H93HS4 I93HS5 E1
2HU8 F32HUB H11
1
C
13
11
D
J
6
10
1
H
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
I
2HS8 B82HS9 B92HSA C102HSB E8
4 5
N
3H34 F93H40 G103H47 G11
2HSM D92HSN G8
G
2HSU I9
3H83 B43H84 B53H85 B43H88 C5
H
3H95 A4
4
2HSJ D82HSK D8
P
2H94 C4
M
6
2HRZ A8
E
F
G
6
2H93 C5
2HT7 E52HT8 F82HTB G92HTC G10
I
2HTH D32HTK G32HTL B22HTP A8
E
2HU0 G92HU5 E3
2H86 D3
2HSV G4
100p
2HT
D
IHRE
27R
3HS9
22n2HSY
2HSF
22n
3H88
56R
IH85
22n
IHV3
2HRZ
3HRZ
27R
18R
3H89
56R
3HS
2
IH41
3HSB
18R
3HS
J
56R
330n
5H85
3HS
0
47R
100p
2HS
D
IHVE
2HS
2
100p
120n
5HRL
2HSR
100n
2H92
100p
2H90
22n
27R
3HRS
IHSH
56R
3H82
IH45
100p
2H87
IH42
100p
2HT
F
100p
2H88
3HS
U
56R
2H86
10n 2H96
22n
22n2HSA
IHRB
2H95
100p
10n
2H99
IH44
100p
2HS
E
2H82
100p
2H83
22n 2HT
R
100p
22n
2HSJ
5HRA
120n
IHSG
2HST22n
100p
2HUC
IH46
27R
3HS1
100p
2HT
V
2HT
P
100p
2HT622n
75R3HSW
2H94
100p
330n
5H86
27R
3HRU
18R
3H47
75R3HS6
IHR0
2HS
U
12p
3H85
18R
27R
3HSM
IH38
3HT4
27R
18R
3H83
2HT122n
IHR3
2H84
22n
2HS4
22n
IH81
100p
2H85
2HT
L
270p
IHR1
3HS54K7
IHSA
2HUP22nIHV6
IH87
3HS
A
56R
100n
2HSS
22n
2HA4
2HTB
22n
3HT94K7
22n
2H80
330n
5HR0
3HS775R
IH40
3HS
F
75R
22n2HSW
IH43
IHSE
FHR1
2HS1
22n
5HR3
330n
22n2HSN
27R
3HST
5H80
330n
3HSH
27R
3H81
18R
56R
3H80
22n
2HTE
56R
3HR
Y
22n
2HA5
2HSB22n
3HS4
820R
IHSS
IHST
IHSR
2HS
3
100p
22n2HU8
3H90
56R
5H81
330n
3HR
V
56R
2HSC
22n
3HT
3
IHS3
47R
IHSD
2HSVRES 22n
100p
2H89
IH39
3HR
P
56R
2HS
9
100p
IH80
3H91
18R
18R
3H29
18R
3H99
18R
3H95
3H96
18R
47R
3HR
T
2HU
0
100p
3H40
18R
De Pauw B
2008-10-10 3
47R
3HS
8
A2
ANALOG AV
PNX8543 TV543 R2 LDIPNX 8204 000 8927
CHECK DATE
NAME
3
SUPERS.
CLASS_NO
EMANTESNHC
16 11
2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005
2009-01-29
R1R3
T2U1
130
M4M5
K1K3K4K5
N4
L4
J4
H4
G2
A2
C3
J5
T1 P1P3P4P5
M1M3
G3
F2F3F4G1
F1
A1
B3A3
B2L2L3
E2E1
J1J2J3
G4H1H2H3
ANALOG_VIDEO
PNX85439EH/M2/241827H00-1
C2
N1N2N3
D2D1
L1
3HRW
27R
18R
3HSE
FHR6
2HT722n270p
2HUK
2HKL270p
IHS6
18R
3H79
3HSR
18R
100p
2HS
K
2HT
G
100p
IHR5
5H82
330n
56R
3HS
D
56R
3HS
N
3H93
56R
22n2HTK
2HS
8
100p
330n
5HR2
5HR5
330n
3HS
Q
47R
IHRC 5HRG
330n
820R
3HS3
2H97
100p
IHRD
FHR5 56R
3H84
IHS2
9H539H52
9H51
22n
9H50
2HS7
2HU522n
IHPF
100p
2H81
3HRR
27R
22n2HT5
IHR8
330n
5H87
IHSC
2HT
C
100p
IHS5
2HS022n
2H98
100p
IHR6
22n2HUN
2HT
Z
100p
22n2HTH
IHS4
3HS
V
47R3H34
18R
10K3HSK
22n
2HT8
IHSB
2HUB
22n
2H91
100p
3H98
18R
3H97
100p
2HT
U
18R
IHRF
5HR9
IHR4
120n
100p
2HS
M
22n2HSP
330n
5HRC
22n
2HA3
22n
2H93
55H945H9
V-SYNC-VGAH-SYNC-VGA
Y_CVBS-MON-OUT
AV4-PB
AV4-Y
AV5-PR
AV5-PB
AV5-YAV5-Y
B-VGA
G-VGA
R-VGA
AV4-PR
AV1-Y
AV1-PB
FRONT-C
AV4-Y
AV3-PR
AV1-Y_CVBS
AV1-PR
IF-P
IF-N
CVBS4
AV3-Y
AV3-PB
AV2-Y_CVBS
FRONT-Y_CVBS
18320_512_090728.eps090728
Circuit Diagrams and PWB Layouts EN 101Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Audio
OUT IN
INHBP
COM
C
SPDIF_IN
ADAC7BUFADAC8BUF
PNADAC5
PNADAC4
PN
P
AOUT
ADAC6 N
RESREF
VCOM_ADC
P
OSCLK
VSSA_ADAC
7
PN
R AIN_5
SPDIF_OUT
ADAC1
AGND1
NEG
RL
I2S_OUT_WS
VRNEG
VREF
I2S_OUT
I2S_OUT_SD
ADAC
VREF_AADC
AADCAADC
POS
8
I2S_IN_WS
SD4SD3SD2SD1
4
OSCLKSCK I2S_IN
I2S_IN
321
LR
12
AIN_1
LR AIN_2
LR AIN_3
LR AIN_4
L
ADAC3
VDDA_3V3_DAC
SCK
NADAC2
5
I
O
1
3HRJ-3 F3
8
P
3HRJ-2 E3
19
IHSU C6
M
I
18
10
3HRM G5
4121
B
2HR7 D4
I3HRJ-4 F2
IHSV D6
IHS1 D3
17
IH13 C11
7
7HP0 C10
IHRH C4
10
IHRM G6
IHPD F9
L
O
14
3HRC-3 E3
IHRY D3
18
P
IHS0 D3
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or i
n pa
rts
15
F
D
IHRZ E3
J
A
1 5
IHSW C9
H
FHPE C10
L
3HRK H6
3HAH D11
3HRN G5
2HRB D4 C
9H12 C49H11 C4
G
IHSZ D6
3HR3-1 D3
E
11
A
2
15
IHRJ D4
17
M
2HRF E4
IHRT F3
2HRH F4
2HRK F4
3HR3-2 D4
IHRL G6IHRK G5
3HR8-1 E3
12
IHRU F3IHRV E3IHRW E3
3HRJ-1 F23HRC-4 E2
3HAG D11
N
2HPA C11
A
F
G
H
19
2HP8 D9
3
3HT8-3 D10
1072
3HP0 F9
3HT8-1 F93HT8-2 F9
3HP5-2 E9
3HT8-4 E95HP2 C105HRW D65HRZ D67H00-7 D7
3HR0-3 C33HR0-4 D3
1
owne
r.
16
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
2101
2HRC E42HRD E42HRE E4
F
16
2HRJ F3
11
IH11 C10
3HR3-3 D33HR3-4 D3
G
3HR8-2 E33HR8-3 D33HR8-4 D33HRC-1 E33HRC-2 E3
3H62 F63H63 F6
12
B
C
D
E
2HRT E11
2HP6 D9
I
9
B
C
D
E
F
8
J
2
3HP1 F10
6
6
IHSY D11
2HRN D6
1
3HP5-4 F9
2HRV C6
3HR0-1 C33HR0-2 C4
2HR9 E42HRA D4
8764 11
9
5
K
2HRS E11
2HRM D6
43 6 7
E
2HRP C6
2HR6 D4
20
8
D
2HRG E3
PNX 8543 : AUDIO
2HRW G62HRY G6
G
K
A
4
2HR2 C4
139
13
B
H
2HR8 E4
3
N
2HP7 D9
2HRU C6
9
2HR1 D5
2HR3 C5
4
11
2HR5 D4
3HPN G9
H
2
2HR4 D4
2HP5 D953
C
3HP5-1 E10
2HP4 D10
2HPB D10
3HP5-3 F10
20
2HR0 C4
3HT8-2
2 7
33R
54
33K
3HR8-2
4 5
33K
3HR0-4
33K
3HR8-4
2HR7
1u0
10n
2HP
B
IHSU
VDDA-AUDIO
VDDA-DAC
IHRU
2HR633pRES
3HR0-1
33K
81
3n3
2HR
T
10u
2HR
P
RES 33R3HP1
1
3
5
LD2985BM33R7HP0
4
2
3633K
3HR3-3
3HP5-233R
73HR3-2
33K2
27
1u0
2HR5
3HRJ-233K
IHRT
5HP2
30R
2HRF
1u0
1u0
2HRB
33K
3HRJ-33 6
100n
2HR
U
22K
3HAG
1u0
2HRK
2HP
8
100n
VDDA-AUDIO
33R3HT8-3
IHS
Y
1u0
2HRD
IH13
VDDA-AUDIO
IH11
2HR0
33pRES
IHSZ
33R3HP5-1
36
IHRM
33K3HRC-3
2HR9
1u0
47K
3H63
2HRC
RES 33p
IHPD
IHS1
IHSW
V1
AM7
AK9AK7AL7
AM8AM9
AP8AN8
AJ10
AM14AA2
Y2
Y3AA1AA3AA4
Y1
B1
U5C19
AP6AM5
AN5AP5
C1
AN15AL14
AK14AP15AM15AL15
AP9
AL8
AN9
D3
AN7AP7
AK6AL6
AM6AN6
AP12
AM11AL11AK11
AN11AP11AL10
AP10AN10AM10
AL9
AUDIOPNX85439EH/M2/241827H00-7
AN14AP14AL13
AP13AN13AM13
AM12AN12
4K7
3HR
N
3HR
M
4K7
7 2FHPE
130
33K
3HR0-2
16
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
AUDIO
3
A3
2008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20062007-11-29
12
3HR
K
75R
33R3HP5-3
100n
2HR
M
1u0
2HR3
RES
3HRJ-118
33p2HRJ
33K
2HRH
1u0
100n
IHRH
2HP
5
5HRZ 30R
3HP5-433R
3HPN
68R
33K
3HRC-118
3HRC-4
33K4 5
36
RES3HR8-3
33K 33p2HRA
2HR1
1u0
3HT8-1 33R
2HP
A
10u
IHRW
47K
3H62
IHRV
10u
2HR
Y
RES
2HR8
33p
RES
IHRK
33p2HR2
1 8
IHS0
3HR8-1
33K
IHRL
+5V
3HRJ-4
33K
4
5
VDDA-AUDIO
9H11
2HRG
33pRES
1 833K
3HR3-1
2HP
4
10u
5HRW
100n
2HP
6
30R33p
2HR4
RES
2HRE33pRES
+3V3
RES3HP0
33R
IHRY
2HR
V
100n
3HA
H
22K
9H12
IHSV
100n
2HR
W
IHRZ
IHRJ 2HP
7
100n
2HR
N
100n
3HT8-433R
2HR
S
3n3
2 73HRC-2
33K
3HR0-3
33K
6 3
3HR3-4
33K
4 5
ADAC(8)ADAC(7)
SPDIF-IN1
ADAC(2)
ADAC(1)
ADAC(7)ADAC(8)
ADAC(8)ADAC(7)
ADAC(6)
ADAC(5)
ADAC(4)
ADAC(3)
AUDIO-IN1-L
AUDIO-IN2-L
AUDIO-IN3-R
AUDIO-IN3-L
AUDIO-IN4-R
AUDIO-IN4-L
AUDIO-IN5-L
AUDIO-IN5-R
SPDIF-OUT
AUDIO-IN1-R
AUDIO-IN2-R
18320_513_090728.eps090728
EN 102Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Audio
C
VIAGND_HS
VOIN-
VDD
1
SHUTDOWN
BYPASS
2
GND
2
1
3H18-1 B5
IHW8 E7IHWE C2IHWJ C5IHWL C2
I
E
F
10
G
I
E
2101
F
D
1 4
4
J J
2
A
B
C
D
E
3
2 11
owne
r.
C
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
8
3H71 A13H74 B13H75 A33H76 B2
2H05 B2
3H94 C23HV3 D23HV4-1 D73HV4-2 C83HV4-3 E6
H
6
B
97
IH24 C2IH25 C2IH27 D4IH29 D8IH31 C8
13
3H18-2 C23H18-3 C23H18-4 B53H35 C7
B
7
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
G
1
8 9
6
C
11
A6 7 8
1 2 3
PNX 8543 : AUDIO
IH47 C1IH48 C1IH51 A2IH52 A2IH53 B1IH54 C2IH55 B2IHV1 C5IHVA D8IHW7 D7
5
D
H
133 12
A
A
B
C
D
E
1HV9 B32H02 D42H04 A2
4 5 6 7 8
3H77 B2
3HV4-4 E67H01-1 A27H01-2 B27HV0 C47HVA-1 E77HVA-2 D8FH50 B3FHV3 E6FHV4 A3FHV5 C3
5
2H25 D12H26 D12HVA A52HVB B52HVC C52HVD C12HVE C22HVG E62HYC B32HYD C3
1 2 3 4 5
3H74
5K6
100R
3H76
100R
3H75
100n
2HVD
3
4
AUDIO-VDD
7H01-2BC847BS(COL)5
IH27
4 5
IHWE
22K
3H18-4
63
1n0
2HV
G
3HV
4-3
22K
2H25
3n3
IHW7
470R
IHWL
3H94
33p
2HVB
5K6IH51
3H71
2H05
1u0
IH522H04
1u0
100p
2HY
C
2HY
D
100n
4 5
22K
3HV4-4
10K
3HV3
2HVA
33pFHV4
FHV5
2H02
1u0
130
100n
2HV
C
2007-11-29
1316
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
AUDIO
A3
+3V3
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 2005
7H01-1BC847BS(COL)2
6
1
AUDIO-VDD
IH24
FHV3
IH31
+AUDIO-POWER
470R
3H77
IHV1
IHVA
3HV4-1 18
IH29
22K
1 8
IHWJ
22K
3H18-1
6 3
3n3
2H26
22K
3H18-3
IH48
23
IH47
1HV9
1735446-3
1
4
10K
3H35
BC847BPN(COL)7HVA-25
3
100n
2HVE
2
6
5
8
1011
1
7
7HV0TPA6111A2DGN
3
4 9
FH50
ΦAMPLIFIER
IH54
IH53
IH55
IH25
3HV
4-2
22K
27
IHW8
22K
3H18-27 2
2
6
1
ADAC(3)
7HVA-1BC847BPN(COL)
AUDIO-HDPH-R-AP
AUDIO-HDPH-L-AP
A-STBY
ADAC(4)
A-PLOP
RESET-AUDIO
RESET-AUDIO
18320_514_090728.eps090728
Circuit Diagrams and PWB Layouts EN 103Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Video Streams
CA_RST
1
DIR
CA_MOCLK
CA_RDY
4
01
0
10
2
10
TNR_MIVAL
TNR_MISTRT
CA_MDO3
765432
7654
TNR_MICLK
TNR_ERROR
CA_MDI
CA_MISTRT
ENTNR_TSDI
CA_VCCEN
CA_VPPEN
CA_MIVAL
CA_MOSTRT
CA_MOVAL
CA_OOB_EN
3210
CA_ADD_EN
567
CA_VSN
CA_MICLK
CA_DATA
CA_CDN
G3
12
3EN23EN1
C
G3
12
3EN23EN1
F
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
17
B
C
D
E
F
G
2H08 D32H09 F33H73 F23HB1 C23HB2 C2
owne
r.
O
D
5
13
P
PNX 8543 : VIDEO STREAMS
H
8
16
1 2 3 4 5 6 7 8 9
7
C
J
42
A
J
1
1
N
3HB3 C23HB4 D2
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
20
10 11
1 2 3 4 5 6 7
19
K
8 8151
G
7 14
16
M8
2
11
A
B
C
D
E
F
G
A
12
I
10
B B
G
9
P
6
9H06-2 B29H06-3 B29H06-4 B29H07-1 B2
3HB5 D23HB6 F2
M
3HWN-1 B113HWN-2 B113HWP C103HWR-1 B113HWR-2 B11
N
10
K
18
O
15
6
5
L
E
I
F
9H06-1 B2
3HWR-3 C103HWR-4 B10
9 10
3HWV-3 C103HWV-4 B107H00-12 B97H04 D37H05 F3
11
H
3
C
D
17
14
E
L
123 4
3HWV-1 B103HWV-2 C10
9H07-2 B29H07-3 B29H07-4 B2
3HB7 F43HWK D5
9H08-1 C29H08-2 C29H08-3 C29H08-4 B29HW0 D69HW1 D109HW2 C8IH50 F2
19 20
IHW0 D6
11
A
9
13
83HWV-147R
1
E10A9A11C11D11E11A10
C34
C33
A33
J32A34
C12
B10
B9
C10
D10
J30K34K33H30J33
J31
E32
E34
D34
C31
J34
G33G31G30H34F34F32F31G34
E33C32B32
B31
K32A32
D31A31
H32H31
3 6
TUN_CAPNX85439EH/M2/241827H00-12
3HWR-347R
+3V3IH50
2H08
100n
47R3HWR-4 4 5
+3V3-PER
9H06-33 6
10K
1 8
3HB5
9H06-1
1 8
2 7
47R 3HWN-1
3HWR-247R
4 547R
3HWV-4
10K
+3V3
3HB6
10
19
20
89
18
17161514131211
174LVC245A
7H04
2
34567
2 7
3 647R
3HWV-2
3HWV-3
47R9HW2
100n
2H09
3HWR-11 847R
100R
130
3HB3
ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-05
1416
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
CONDITIONAL ACCESS
A2
32008-10-10
De Pauw B
2009-01-29
100R
3HB1
8
9HW1
9H08-11
10K
3HB
4
9H06-44 5
IHW0
+3V3
2 7
9H08-44 5
9H06-2
4 5 79H07-4 3HWN-247R
2
9HW
0
3HB2100R
3HWK
4K7
3 6
1 8
9H08-3
9H07-1
9H07-33 6
9H08-22 7
10K
3HB7
10K
3H73
33R3HWP
+3V3
10
19
20
9
18
17161514131211
1
2
345678
2 7
7H0574LVC245A
9H07-2
CA-DATAEN
IRQ-CA
CA-RST
CA-VS1
TSINO-DATA7TSINO-DATA6TSINO-DATA5TSINO-DATA4TSINO-DATA3TSINO-DATA2TSINO-DATA1TSINO-DATA0
TSO-SYNCTSO-BIT-VALID
TSO-BIT-CLK
RESET-BOLT-ON
I2C-SDAI2C-SCL
CA-ADDEN
CA-CD1CA-CD2
CA-DATADIR
FE-ERR
FE-CLKFE-VALIDFE-SOPFE-DATA0FE-DATA1FE-DATA2FE-DATA3FE-DATA4FE-DATA5FE-DATA6FE-DATA7
TSO-BIT-ERR
SCL-BOLT-ONSDA-BOLT-ON
BOLT-ON-IO
CA-MDI6
FE-DATA7
FE-DATA6FE-DATA5FE-DATA4FE-DATA3FE-DATA2FE-DATA1FE-DATA0
TSINO-DATA7
TSINO-DATA6TSINO-DATA5TSINO-DATA4TSINO-DATA3TSINO-DATA2TSINO-DATA1TSINO-DATA0
FE-SOPFE-VALIDFE-CLKFE-ERR
TSO-SYNCTSO-BIT-VALID
TSO-BIT-CLKTSO-BIT-ERR
BOLT-ON-TS-ENn
CA-MOCLK_VS2
CA-MDI5
CA-MIVAL
CA-MDI3
CA-MDI0
CA-MDI2CA-MDI1
CA-MISTRT
CA-MDO2CA-MDO3CA-MDO4CA-MDO5
CA-MDO7CA-MDO6
CA-MDI7
CA-MOCLK_VS2
CA-MOSTRT
CA-MOVAL
FE-CLK
FE-SOP
FE-VALID
FE-ERR
CA-MDO0CA-MDO1
FE-DATA7FE-DATA6FE-DATA5FE-DATA4FE-DATA3FE-DATA2
FE-DATA1FE-DATA0
CA-MDI4
CA-MICLK
FE-ERR
18320_515_090728.eps090728
EN 104Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX8543 - Digital Video Out/LVDS
NC
NC NC
NC
N
IREF_LVDS
NP
B
CLK
NP
C
NP
D
NP
E
LOUT2_A
NP
LOUT2_B
LOUT2_CLKNP
LOUT2_CNP
LOUT2_DNP
LOUT2_ENP
PN
PA
NP
C
6
9
8
owne
r.
10
2
6
9
3
4 5
E
9
1
B
I
G
10
7H00-5 A6
4
B
7
3HP9 A7
5
D
H
C
6 7 8
4 11
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
7
G
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
1
2
H
E
I
J
9
PNX8543 : DIGITAL VIDEO OUT / LVDS
8
54
8
B
E
12
3
A
D
F
122
A
13
E
B
3
2
6 7
1
DD
C
11
A
F
F
J
1 13
A
IHPG A7
7H00-11 B2
C
3
5
F
C
130
VDDA-LVDS
16
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATECHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
LVDS
A3
AM24
32008-10-10
De Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
15
AN22AP22
AK22AL22
AL23AM23
AN23AP23
AN24AP24
AL24
AP18
AK18AL18
AL19AM19
AN19AP19
AN20AP20
AL20AM20
LVDSPNX85439EH/M2/241827H00-5
AK19
AN18
AN
30A
P30
AN
31A
P31
AP
32M
30K
31
W5F11F12
W29
Y29
AA
29A
B29
AC
29A
D29
AE
29A
F29
AG
29A
M30
R5K29L29M29N29P29R29T29U29V29
W4
Y4
AM
27A
N27
AK28AL28AM28AK29AL29AM29
T4
AN29
AP
21A
L25
AM
25A
N25
AP
25A
K26
AL2
6A
M26
AN
26A
P26
R4
F13F14F15C14AJ11AL12AK15
AL1
7A
N21
C4
7H00-11PNX85439EH/M2/24182
NC
R2
IHPG
1%12K
3HP9
TX852C-TX852C+
TX852D-TX852D+
TX852E-TX852E+
TX851C+
TX851D-TX851D+
TX851E-TX851E+
TX852A-TX852A+
TX852B-TX852B+
TX852CLK-TX852CLK+
TX851A-TX851A+
TX851B-TX851B+
TX851CLK-TX851CLK+
TX851C-
18320_516_090728.eps090728
Circuit Diagrams and PWB Layouts EN 105Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543 - Power
C
VSSVSS
VSS
VSS
VSS
COM
OUTIN
VDD_1V2_HDMI_1
VPP_ID_8543
VDDA_1V2_HDMI_EQVDD_3V3_HDMI_TERM_2VDDA_HDMI_3V3_BIAS
VDDA_3V3_VID_4
VDDA_3V3_MCAB
VDD_3V3_LVDS
VDD_3V3_PER
VDD_3V3_SBPERVDDA_3V3_USB
1
VDDA_1V2_USB_PLL
GNDA_USB
0
VDDA_1V2_ADC4A
VDDA_1V2_CAB
VDD_1V8_DDR
VDD_1V2_SBCORE
VDDA_1V2_DLL
VDDA_3V3_DDRPLL0
VDD_1V2_DDRPLL0
74
VSS_DDRPLL
VDDA_3V3_VIDOUT
JTAG_VSST1
VSSA_DLL
VDDA_3V3_VID_1_2VDDA_3V3_VID_1_1
VDDA_3V3_HDMI_PLL_2
VDDA_3V3_DCSCCOVDDA_1V2_DCS_A
VDD_1V2_HDMI_2
VPP_ID_8542
VDDA_1V2_AADC
VDD_1V2_CORE
VDDA_1V2_LVDS_PLL
VDDA_3V3_ADAC
VSSA_DDRPLL0
VDDA_3V3_AADC
VDDA_3V3_LVDS
VDDA_3V3_ACT
VSS_CL
VDDA_3V3_HDMI_PLL_1VDD_3V3_HDMI_TERM_1VDDA_1V2_HDMI_EQ
VDDA_1V2_VID
E
F
G
H
I
4 5 6 7 8 9 10 11
F
G
3 4
2H13 E42H14 D2
7 8
2H17 A32H18 A3
11 12
19
B
G
I
5121
13 14
A
B
C
D
2H20 A42H21 A42H22 A42H23 A52H24 F112H27 D102H28 D112H29 D11
A
B
C
D
E
2H35 A102H36 A11
H
I
2H39 C102H40 C11
2H15 A32H16 A3
2H43 D22H44 D2
A
169
6
A
P
1 2 3ow
ner.
F
1 1412
2H50 C42H51 C42H52 C3
12 13 14
1 2
2HU4 F92HU6 F9
5 6
2HUA A22HV0 B4
9 10
2HV3 C42HV4 C3
11
3
C
L
15
C
H
18
2H19 A4
2HVH E52HVJ F42HVK D102HVL C122HVM C102HVN B112HVP B132HVR B10
2H30 A92H31 A92H32 A102H33 A102H34 A10
2HVY G32HVZ G3
2H37 A112H38 A11
4 5
2H41 C112H42 C2
1
J
O
H
20
10
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
E
M
7
P
2HY5 B122HY6 C102HY7 C112HY8 D112HY9 D122HYA A132HYB A132HYE F4
2HH6 E112HH9 E112HU1 B32HU2 A122HU3 C12
2HZC-4 F102HZD F11
2HU7 F32HU9 B2
2
I
2HV1 C32HV2 F2
13 17
018
N
2HV5 D42HV6 D42HV7 E22HV8 D22HV9 F22HVF E3
2HZM A32HZV I42HZY-1 B32HZY-2 B22HZY-3 B22HZY-4 B23H55 D23H57 C2
2HVS B32HVT B42HVU A112HVV A102HVW A9
5HV3 F45HV4 C3
B
16
E
3
F
17
K
G
6
K
2 1497
2HY2 E22HY3 E32HY4 B11
5HVB D115HVC C135HVD C135HVE B125HVF B135HVG B105HVH A125HY2 A12
2HYF F52HZB F102HZC-1 F112HZC-2 F112HZC-3 F10
5HYB E47H00-10 F6
PNX 8543 : POWER
18
J
7H00-9 A6
11
D
9H19 E59H20 E5
M
54
2HZE F102HZF F92HZG F92HZH H42HZK A52HZL A4
IHK1 B12IHK2 D11IHK3 C12IHK4 C12IHSK E11IHSL B11IHSN D11IHSP A13
5H50 C35HG0 E125HV0 B45HV1 C35HV2 C1
IHY5 A11IHY6 C10
20
L
IHY9 B5IHYA E2
O
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
IHYH D2IHYM F5
13
198
5HV5 D35HV6 D15HV7 E15HV8 F25HV9 E35HVA E3
IHY0 E5IHY1 H3IHY2 I4IHY3 F11IHY4 A12
5HY3 C115HY4 H35HY5 D125HY6 A135HY7 I3
IHY7 E4IHY8 D4
D
N
IHYC D4IHYF C3
7H06 C29H18 E5
IHYN F2IHYP F3
9H21 E5CH53 F3FHK1 D4IH05 E5IH10 E5IH28 B10IH49 C4IH60 C2IH61 D2
IH28
+3V3
IH49
+1V2-PNX85XX
100n
2HZ
V
+1V2-PNX85XX
30R
5HV1
2HV
T
100n
+1V2-PNX85XX
2HV
S
100n
2HV
3
IH61
10u
VDDA-AUDIO
FHK1
2HV
7
100n
+1V2-PNX85XX
VDDA-LVDS
+1V2-STANDBY
+1V8-PNX85XX
IHYA
5HV4
30R
1u0
100n
2H50
2H52
+1V2-PNX85XX
+3V3
1u0
+1V2-PNX85XX
2HU
3
100n
2HV
85HVE
30R
+3V3-PER
5HVB
30R
100n
2HZ
E
9H19RES
30R
5HV6
2H15
100n
+1V2-PNX85XX
2H32
100n
2HY
7
1u0
100n
2HV
W
2HZ
B
100n
2HZ
H
100n
10u
2H51
2H28
100n
2HV
N
100n
100n
2HV
K
100n
2H35
30R
5HY2
5HVF
30R
+1V2-PNX85XX
45
5H50
30R
2HZ
Y-4
100n
100n
2H23
2H13
1u0
2HU
1
1u0
2HV
M
100n
VDDA-ADC
RREF-PNX85XX
100n
2HZ
C-3
36
30R
5HVH
IHYP
100n
2HV
5
2H30
100n
100n
2H19
2H44
10u
35V
IHY8
IHY3
IH60
IHY9
9H18RES
IHY0
IHYM
1u0
2HU
2
IHY5
2H14
100n
5HG0
30R
IHYC
2HV
6
22u
6.3V
RREF-PNX85XX
6.3V
330u2H
VY
5
+3V3
IHK1
2HZ
C-4
100n
4
30R
5HVG
+3V3-STANDBY
RES
1u0
2HU
A10
u
2H43
100n
2HV
9
100n
2HY
4
IH10
100n
2H36
IH05
3H57
68R
+1V2-PNX85XX
+3V3
IHYN
2HV
U
100n
+3V3
100n
2HY
F
IHSN
2H20
100n
IHK3
2HY
8
100n
2HY
3
1u0
100n
2H39
30R
5HY4
IHY7
2HU
6
1u0
2HY
6
100n
100n
2HZ
G
IHK4
100n
2HV
V
CHECK
8204 000 8927PNX8543 TV543 R2 LDIPNX
POWER
A2130
32008-10-10
DE Pauw B
2009-01-29
ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29
1616
SETNAMECHN
CLASS_NO
SUPERS.
3
NAME
DATE
100n
2H16
2HV
H
100n
2H34
100n
5HVD
30R
5HV8
30R
+1V2-PNX85XX
5HYB
30R
30R
VDDA-AUDIO
5HV0
5HV5
1u0
2HY
B
IHY1
30R
VDDA-ADC
30R
5HV7
100n
100n
2H24
2HZ
F
27
2HY
9
1u0
IHSP
2HZ
Y-2
100n
18
1u0
2HY
5
+3V3
100n
2HZ
C-1
SENSE+1V2-PNX85XXCH53
9H20
2H38
100n
30R
5HY6
2HV
4
100n
2HU
9
1u0
+3V3
IHSL
100n
2HZ
M
+3V3-PER
1u0
2HV
2
100n
2HZ
L
T15T16T17T18T19T20
P33R14R15R16R17
AA5
R18R19R20T14
N5P14P15P16P17
AA21 P18P19
P2P20P21
F7
F8
G29 G5
G6
AA20
H6
K2
L33
L5M2
E18 E
3E
4F
21
AA19
F22
F27
F29
F30 F
5
AN
34A
P33
AP
34
AA18
B34
D12
D13
D17
D18
E12
AM
2A
M21
AM
22
AA17
AM
31A
M32
AM
33A
M34
AN
1A
N32
AN
33
AK10AK13AK23
AA16
AK25AL1AL2AL3AL30AM1AM18
AH29AH6
AA15
AJ15AJ24AJ25AJ29AJ33AJ5AJ9
Y18
Y19
AC31
Y20
Y33
Y5
Y6
AC33AE6AF33AG31
W15
W16
AB5
W17
W18
W19
W20
Y14
Y15
Y16
Y17
U6
AB4
V14
V15
V16
V17
V18
V19
V20
W14
AA14
AB31
T31U14U15U16U17U18U19U20U33
+1V2-PNX85XX
PNX85439EH/M2/241827H00-10
+3V3
2HV
J
100n
100n
2HH
6
5HVA
30R
100n
2H40
IHY6
+3V3-PER
IHY2
30R
5HVC
30R
5HV3
2HV
P
100n
2H22
100n
100n
2H29
7H06LD1117
1
324
+3V3
2H33
100n
+3V3
1u0
2HU
7
2HZ
D
100n
5HY3
30R
30R
5HV9
+3V3
IHYF
100n
2HV
F10
0n
2HV
1
30R
2HV
Z
330u
6.3V
5HY7
100n
2HY
2
27
2HV
R
2HZ
C-2
100n
T6
AA30
100n
F28
AC6AD6
AJ26F17
AD30
W30AK30N30AE30
AM3
H29J29
J6W6
AJ22AJ27AJ28
AJ8F10F23F24
U21
V21
W21
E13
E17
AK20AK21AK24AL21
AJ21
F6
AF6AG5AG6
AG
30
Y21
AH
30R
21R
30T
21T
30
AJ14AJ20AJ23F18F19F20F25
AB30
C13C17
AF5
H5
F16
AJ12
F26F9K30L30U30V30V6
AJ13
T5
AC30E14
E16
AJ19
AB6
AJ17
D4
P6R6
AF30D14
D16
AJ18
AK17
L6M6N6
AJ6AK8AK12
AJ16
AJ7
K6
AA6
T3
Y30AJ30P30
IHY4
VDD
PNX85439EH/M2/241827H00-9
+1V2-PNX85XX
+1V2-PNX85XX
2H18
100n
100n
2H31
+3V3
2HH
9
100n
2H27
100n
2HY
E
1u0
100n
2HZ
Y-3
36
IHYH
9H21RES
30R
5HV2
+1V8-PNX85XX
100n
2H21
1u0
2HU
4
+3V3
100n
2H37
+3V3
IHSK
VDDA-DAC
100n
2HZ
Y-1
18
VDDA-DAC
IHK2
+1V2-PNX85XX
100n
2HV
L
2H42
10u
6.3V
3H55
2R2
5HY5
30R
100n
2HY
A
2HZ
K
100n
2HV
0
100n
2H41
100n
2H17
100n
+1V2-PNX85XX
18320_517_090728.eps090728
EN 106Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX5100 - SDRAM
1211109876543
0123456789101112
CK
VD
DL
VREF
VS
SD
L
14
VDDQ
QSSVSSV
BA
A
LDQS
UDQS
NC
DQ
CKEWE
ODT
RAS
1
CS
CAS
0012
VDD
LDMUDM
15
131211109876543
0123456789101112
CK
VD
DL
VREF
VS
SD
L
14
VDDQ
QSSVSSV
BA
A
LDQS
UDQS
NC
DQ
CKEWE
ODT
RAS
1
CS
CAS
0012
VDD
LDMUDM
15
13
NP
NP
NP
NP
PN
VREFIREF
CSB
CKEODT
WEBCASBRASB
BA2
10111213
BA1BA0
1211109876543210
232425262728293031
0123
D
A
DQM
DQS0
DQS1
DQS2
DQS3
CLK
222120191817161514
0123456789
C
E
31
11 12
2C17 F5
9
2C19 F6
2C15 F52C16 F5
13
A
B
C
D
E
4
13
1
G
3
15
J
11
PNX5100 : SDRAM
F
2C38 F12
H
2C40 I6
A
B
4
N
4 5 6
2C02 E4
2C14 F5
A
P
A
15
P
7
10
K
4
I
2C00 E4
B
9
2C13 F4
C
11
2C42-2 F2
2C18 F6
2C42-4 F3
2C29 E102C30 E10
5
D
6
D
O
owne
r.
F
P
M
10
L
2013
G
L
14
A
2
20
9
D
2
12
2C35 F122C36 F12
2C44-3 F9
2C39 I12
3C00 C2
2C41-1 F12C41-2 F1
7
K
14 15
31
14
13
J
B
8 9
2
I
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2C01 D4
E
10
2C41-4 F22C42-1 F2
3C08-1 H5
2C42-3 F2
3C08-3 H6
2C43-1 F82C43-2 F8
E
F
K
G
N
12
J
I
19
M
18
A
5 16
7 10
2C33 F11
1
2C44-1 F92C44-2 F9
3C26-3 G11
2C44-4 F9
3C27-1 H11
3C01 D23C02 D3
C
17
4
J
3
F
G
6
D
G
M
L
F
4
H
N
1C00 D9
K
8
17
3C07-3 G53C07-4 H6
7C00-8 A6
3C08-2 H5
7C02 F9
3C09-1 H63C09-2 H5
2C32 F11
1211 20
C
13
2 8
16
15
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
16
18
12
86
11
C 2C34 F12
3C26-1 G123C26-2 G11
3C28-3 H11
3C26-4 H12
3C30-1 H11
3C27-2 H113C27-3 H9
2C41-3 F2
85
H
2 17
E
6
3C05-1 G6
O
L
6
B
3C07-1 G6
I
3C31 H123C32 H12
19
7C01 F3
FC05 B11FC06 B9
2C43-3 F8
C
5
12
19
O
8
D
1
3C09-4 H63C10 C4
H
3C12 I2
53
O
2C43-4 F8
3C23 B123C25-1 G123C25-2 G12
3C25-4 H12
3C30-2 H113C30-3 I8
3C03 H2
3C06-1 H5
14 19
3C21 B9
1817
3C04 H8
1
3C05-2 G63C05-3 I5
P
G
7
3C28-2 H11
2
3C05-4 H5
9
3C06-2 H53C06-3 H23C06-4 I2
1810
M
3C22 B12
3C25-3 H11
N
F
3C28-4 H12
10
16
I
3C11 H6
B
3C13 I23C20 B9
H
13
H
E
3C27-4 I8
3C07-2 G5
3
I
119
3C30-4 I9
IC04 C2
3C09-3 H5
20
3C28-1 H12
77
1%
27
1K0
3C23
33R3C06-2
100n
2C35
2C14
100n
33R3C08-336
100n
2C13
22u
2C38
100n
2C44
-22
7
4 533R
3C30-4
PNX5100-DDR2-VREF-DDR
150R3C04
3C1133R
2733R
3C30-2
+1V8-PNX5100
H2
K3
P9 J7 A7
H8
B2
B8
D2
D8
E7
F2
F8
C7
C9
E9
G1
G3
G7
J2
A3
E3 J3 N1
A1
E1
J9 M9
R1
J1 A9
G9
C1
C3
A2E2L1R3R7R8
K9
K7
B3
B7A8
H7H3H1H9F1F9C8C2
F3F7E8
K8
L8
G8G2
D7D3D1D9B1B9
N8N3N7P2P8P3
L2L3
L7
J8
K2
M8M3
M2P7R2
M7N2
7C01HYB18TC512160CF-2.5
SDRAMΦ
FC06
2733R
3C27-2
186 R333
3C25-1
8
3C26-333R
33R3C27-1 1
1K0
1%
3C21
1%820R
3C01
33R3C25-227
54 3C07-433R
B8
D2
D8
E7
F2
F8
H2
K3
J2
A3
E3 J3 N1
P9 J7 A7
H8
B2
J1 A9
G9
C1
C3
C7
C9
E9
G1
G3
G7
R8
K9
K7
B3
B7A8
A1
E1
J9 M9
R1
C8C2
F3F7E8
A2E2L1R3R7
D3D1D9B1B9
H7H3H1H9F1F9
P3
L2L3
L7
J8
K2
K8
L8
G8G2
D7
M2P7R2
M7N2N8N3N7P2P8
7C02HYB18TC512160CF-2.5
SDRAMΦ
M8M3
36
HOOK11C00
100n
2C41
-3
18
72
3C28-133R
3C07-233R
54 3C26-433R
2C39
100n
2C01100n
45
36
2C42
-4
100n
1
33R
3C25-3
3C09-133R
8
3C05-3
36
33R
100R
3C02RES
Y23Y24
E26E25
E23E24
N23
K23
K24
P24
U24
AB26V26W24
AB23
AA26AA23G26G23
W25W26
F23H24F24J23J24D23
AC26
G24D24
AC25U26
AB24V24F26H26G25J26
Y25
K26D25H25D26
U23
P25P26
L23
Y26AB25
AA24AC24AC23
V23
T23M26T24L25R24L26M23
R26T25N24
L24
N26U25
T26K25M24
N25
ΦDDR2
PNX5100E7C00-8
3C12
33R
2C41
-2
100n
27
3 633R
3C06-3
3C1333R
2C16
100n
18
FC05
33R3C30-1
45
2C44
-4
100n
100n
2C17
100n
2C40
45
33R3C31
2C43
-4
100n
2C42
-2
100n
27
1833R
3C08-1
+1V8-PNX5100
723C09-233R
330u
6.3V
RE
S2C
00
2C18
100n
3C03150R
100n
2C33
2C34
100n
PNX5100-DDR2-VREF-CTRL
+1V8-PNX5100
4 5
33R
3C06-4
3C00
5K6 1%
100n
2C44
-33
6
33R
3C27-33 6
PNX5100-DDR2-VREF-CTRL
3C09-433R
54
45
2C41
-4
100n
36
+1V8-PNX5100
3C28-333R
3C07-133R
81
18
100n
2C43
-1
3C22
1K0
1%
36
100n
2C42
-3
633C07-333R
1u0
2C02
RES3K33C10
2C43
-2
100n
27
4 5
33R3C27-4
100n
2C15
1833R
3C05-1
2C30
1u0
27
1%1K
0
3C20
33R3C08-2
3 6
33R3C30-3
81
PNX5100-DDR2-VREF-DDR
3C26-133R
33R
3C25-4 45
2C44
-11
8
100n
3C3233R
18
100n
2C42
-1
2C36
100n
7
2C19
22u
3C28-233R
2
1833R
3C06-1
1X01REF EMC HOLE
27
2C32
100n
33R3C05-2
23C26-233R
7
IC04
36
18
100n
2C43
-3
+1V8-PNX5100
100n
2C41
-1
PNX5100-DDR2-VREF-DDR
633C09-333R
RE
S
6.3V
330u2C
29
45 3C28-433R
DDR2 PNX5100
A2130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 2008
19
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8928TV543 R2 LDIPNX
4533R
3C05-4
PNX5100-DDR2-D30PNX5100-DDR2-D31
PNX5100-DDR2-D4PNX5100-DDR2-D5PNX5100-DDR2-D6PNX5100-DDR2-D7PNX5100-DDR2-D8PNX5100-DDR2-D9
PNX5100-DDR2-DQM0PNX5100-DDR2-DQM1PNX5100-DDR2-DQM2PNX5100-DDR2-DQM3
PNX5100-DDR2-DQS0_NPNX5100-DDR2-DQS0_P
PNX5100-DDR2-DQS1_NPNX5100-DDR2-DQS1_P
PNX5100-DDR2-DQS2_NPNX5100-DDR2-DQS2_P
PNX5100-DDR2-DQS3_NPNX5100-DDR2-DQS3_P
PNX5100-DDR2-D1
PNX5100-DDR2-D10PNX5100-DDR2-D11PNX5100-DDR2-D12PNX5100-DDR2-D13PNX5100-DDR2-D14PNX5100-DDR2-D15PNX5100-DDR2-D16PNX5100-DDR2-D17PNX5100-DDR2-D18PNX5100-DDR2-D19
PNX5100-DDR2-D2
PNX5100-DDR2-D20PNX5100-DDR2-D21PNX5100-DDR2-D22PNX5100-DDR2-D23PNX5100-DDR2-D24PNX5100-DDR2-D25PNX5100-DDR2-D26PNX5100-DDR2-D27PNX5100-DDR2-D28PNX5100-DDR2-D29
PNX5100-DDR2-D3
PNX5100-DDR2-WE
PNX5100-DDR2-RAS
PNX5100-DDR2-ODT
PNX5100-DDR2-CS
PNX5100-DDR2-CLK_PPNX5100-DDR2-CLK_N
PNX5100-DDR2-CKE
PNX5100-DDR2-CAS
PNX5100-DDR2-BA1PNX5100-DDR2-BA0
PNX5100-DDR2-A9PNX5100-DDR2-A8PNX5100-DDR2-A7PNX5100-DDR2-A6PNX5100-DDR2-A5PNX5100-DDR2-A4PNX5100-DDR2-A3PNX5100-DDR2-A2
PNX5100-DDR2-A12PNX5100-DDR2-A11PNX5100-DDR2-A10
PNX5100-DDR2-A1PNX5100-DDR2-A0 PNX5100-DDR2-D0
PNX5100-DDR2-DQS3_PPNX5100-DDR2-DQS3_N
PNX5100-DDR2-D26
PNX5100-DDR2-DQM3
PNX5100-DDR2-D10
PNX5100-DDR2-DQM1
PNX5100-DDR2-A3PNX5100-DDR2-A2
PNX5100-DDR2-A12PNX5100-DDR2-A11PNX5100-DDR2-A10
PNX5100-DDR2-A1PNX5100-DDR2-A0
PNX5100-DDR2-RAS
PNX5100-DDR2-DQM0PNX5100-DDR2-DQS0_PPNX5100-DDR2-DQS0_N
PNX5100-DDR2-DQS1_NPNX5100-DDR2-DQS1_P
PNX5100-DDR2-DQM2
PNX5100-DDR2-DQS2_NPNX5100-DDR2-DQS2_P
PNX5100-DDR2-D15
PNX5100-DDR2-D8
PNX5100-DDR2-D4PNX5100-DDR2-D3
PNX5100-DDR2-D1
PNX5100-DDR2-D6
PNX5100-DDR2-D0
PNX5100-DDR2-D2
PNX5100-DDR2-WE
PNX5100-DDR2-ODT
PNX5100-DDR2-CS
PNX5100-DDR2-CLK_N
PNX5100-DDR2-CKE
PNX5100-DDR2-CLK_P
PNX5100-DDR2-CAS
PNX5100-DDR2-BA1PNX5100-DDR2-BA0
PNX5100-DDR2-A9PNX5100-DDR2-A8PNX5100-DDR2-A7PNX5100-DDR2-A6PNX5100-DDR2-A5PNX5100-DDR2-A4
PNX5100-DDR2-D28
PNX5100-DDR2-D5
PNX5100-DDR2-D7
PNX5100-DDR2-D12PNX5100-DDR2-D11
PNX5100-DDR2-D9
PNX5100-DDR2-D14
PNX5100-DDR2-D16
PNX5100-DDR2-D18
PNX5100-DDR2-D29
PNX5100-DDR2-D31
PNX5100-DDR2-D24
PNX5100-DDR2-D13
PNX5100-DDR2-D20PNX5100-DDR2-D19
PNX5100-DDR2-D17
PNX5100-DDR2-D22PNX5100-DDR2-D21
PNX5100-DDR2-D23
PNX5100-DDR2-D30
PNX5100-DDR2-D25
PNX5100-DDR2-D27PNX5100-DDR2-A8PNX5100-DDR2-A9
PNX5100-DDR2-BA0PNX5100-DDR2-BA1
PNX5100-DDR2-CAS
PNX5100-DDR2-CLK_P
PNX5100-DDR2-CKE
PNX5100-DDR2-CLK_N
PNX5100-DDR2-CS
PNX5100-DDR2-ODT
PNX5100-DDR2-RAS
PNX5100-DDR2-WE
PNX5100-DDR2-A0PNX5100-DDR2-A1
PNX5100-DDR2-A10PNX5100-DDR2-A11PNX5100-DDR2-A12
PNX5100-DDR2-A2PNX5100-DDR2-A3PNX5100-DDR2-A4PNX5100-DDR2-A5PNX5100-DDR2-A6PNX5100-DDR2-A7
18320_518_090728.eps090728
Circuit Diagrams and PWB Layouts EN 107Q549.3E LA 10.
2009-Aug-07
SSB: PNX5100 - Video-In
262728293031
D D
16
2120191817
1234
0123456789101112131415
242322
25
CLK
C
DPDN
CPCN
CLKPCLKN
BPBN
AP
AP
BNBP
CLKNCLKP
CNCP
DNDP
ENEP
AN
LIN1
LIN2
AN
EPEN
B
4
A
6
12
J
H
3C17 C2
3C19 D2
3 13
2
7C00-9 C7
4
12
C
9
3
3C35 E2A
I1
F
3
2
E
5
C
10
E
13
G
10
G
A
PNX5100 : VIDEO-IN
D
7
A
3C24 D2
F
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
F
D
3C34 E2
11
D
IC54 C7
3C50 C6
7C00-5 B4
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
B
J
4
7
3C36 F2
3C29 D2
9876
4
3C51 C7
5 9
I
C
E
5
3C33 E2
2 3 8ow
ner.
C
9
B
115
6
H
1
B
7
D
F
3C15 B2
E
1
8
RES
IC54
2
8
3C14 B2
3C18 C2
1 6
3C16 B2
3C16
100R
100R
3C15
100R
3C19 F2
F1E3E1D2
C6A7B7C7D7A8B8
F4
C8D8
F3
B3B4
C4A5B5C5
G1
D5A6B6
VDIΦ
D6A4E2G4
G3G2
D1C1A2A3
7C00-9PNX5100E
3C24
100R
3C34
R0010
K1
3C29
100R
3C17
2
NAME
DATECHECK
8204 000 8928TV543 R2 LDIPNX
VIDEO PNX5100
A3130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 2008
29
SETNAMECHN
CLASS_NO
SUPERS.
1K0
3C513C
18
100R
AE19
AF18AE18
AD18AC18
AE15
AD15AC15
AF20AE20
AD20AC20
AD19AC19
AF19
AF17AE17
AD17AC17
AD16AC16
AF16AE16
AF15
7C00-5PNX5100E
LVDS_RXΦ
3C14
100R
3C33
100R
1K0
3C50
3C36
1K0
3C35
1K0
RX51002B+
RX51001A+
RX51001CLK+
RX51001B+
RX51001B-
RX51001CLK-
RX51002CLK-RX51002C+
RX51002C-
RX51002D-
RX51002E-
RX51001A-
RX51001C+
RX51001D+
RX51001E+
+3V3
RX51001D-
RX51001C-
RX51002E+
RX51002D+
RX51002CLK+
RX51002A-
RX51001E-
RX51002A+
RX51002B-
18320_519_090728.eps090728
EN 108Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX5100 - Power
C
VSS
VDD_3V3_PER
VSS
VDD_3V3_LVDSOUT
VDD_1V8_DDR
VSS
VDD_3V3_LVDSIN
VDD_1V2_CORE
VSS
VSS
2C67-1 C2
D
E
2C66-3 C2
2C61-2 B2
B
C
2
2C80 D6
87
H
2C84 D8
1 2
2C87 D92C88 E9
2C66-2 C2
2C60-2 B1
11
2C63-1 B32C63-2 B32C63-3 E6
2C78-4 D3
10
I
PNX5100 : POWER
J
5C67 E8
2C67-4 C22C68-1 D12C68-2 D2
2C66-4 C2
2C68-4 D22C69-1 D22C69-2 D2
F
2C69-3 D2
B
2C70-2 D3
2C61-3 B22C61-4 B22C62-1 B2
4
7 8
A
2C76 E32C77 C92C78-1 B1
IC80 D7IC81 D7IC82 E7
2C79 D6
12
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
owne
r.
3 4 5
2C83 F6
IC90 F9
3 109
2C89 E9
4
2C60-3 B12C60-4 B12C61-1 B2
9
2C78-3 B1
C
D
E
5C64 F65C65 F65C66 D8
A
11
2C81 B32C82 F6
2C67-2 C22C67-3 C2
2C62-2 D62C62-3 B22C62-4 E6
2C68-3 D2
2C64 B32C65 B32C66-1 C1
G
F
A 2C56 D12C57 D9
2C63-4 B3
6
2C60-1 B1
F
2C78-2 B1
H
E
IC83 E7
1361
I
9
765321
2C45 D12C55 D1
J
2C90 F92C91 F82C92 F9
2C96 A22C97 A25C60 D6
2C58 F92C59 A1
IC84 E7
2C95 A1
C
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
43
5C61 D6
5C62 E6
12
8
2C85 D92C86 D9
2C69-4 D22C70-1 D3
F
E
2C71 E2
65
2C70-3 D32C70-4 D3
2C72 E22C73 E22C74 E22C75 E2
D
C
CC60 A3FC07 A2
IC86 D9IC87 E9IC88 E9
5C68 E85C69 E85C70 F87C00-10 A47C00-11 A7
7
IC85 F7
5
D
B
2C94 F7
8 9
A
B
5C63 E6
IC89 E9
13
G
21
IC83
+3V3-PNX5100-LVDS-PLL
+3V3
2C71
100n
+3V3
18
100n
2C62
-1
+1V2-PNX5100-DLL
IC85
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
A3
SUPPLY PNX5100
TV543 R2 LDIPNX 8204 000 8928
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
9 3
100n
130
+3V3
2C74
+3V3-PNX5100-LVDS-PLL
18
+1V2-PNX5100-TRI-PLL2
+1V2-PNX5100
2C68
-1
100n
36
IC88
6
2C60
-3
100n
2C67
-3
100n3
2C62
-33
62C
69-4
100n4
510
0n
2C62
-4
100n
4
100n
2C79
+1V2-PNX51001
8
30R
5C63
2
100n
2C78
-1
2C62
-2
100n
2C70
-3
100n3
6
2C68
-3
100n3
6
CC60
30R
5C69
27
100n
2C63
-2
+1V2-PNX5100-DLL
+3V3
IC86
10u
2C97
100n
2C86
10V
330u2C
59
2C77
100n
2C66
-11
8
2C61
-2
100n2
7
100n
+3V3-PNX5100-CLOCK
5C62
30R
2C61
-4
100n4
5
+1V2-PNX5100-TRI-PLL3
45
100n
2C68
-4
+1V2-PNX5100
10u
2C56
30R
5C64
IC87
27
27
100n
2C67
-2
100n
2C68
-2
+1V2-PNX5100-LVDS-PLL
IC80
+1V2-PNX5100
100n
2C82
+1V2-PNX5100-LVDS-PLL
100n
2C76
45
+3V3
27
100n
2C63
-4
IC81
100n
2C60
-2
+1V2-PNX5100
+3V3-PNX5100-DDR-PLL0
+1V8-PNX5100
2C96
10u
100n
2C73
2C45
220u
16V
2C69
-2
100n2
7
+1V2-PNX5100-DLL
2C89
100n
VSS_MCAB1AC13
VSS_MCAB2AB13
VSSA_TRI_PLL2K4
VSSA_TRI_PLL3U4
VSSA_XTALAE12
VSSD_TRI_PLL1J3
VSSD_TRI_PLL2K3
VSSD_TRI_PLL3U3
VSS_DDRPLL0AD26
VSS_DDRPLL1R22
VSSA_DLL0L22
VSSA_DLL1AB22
VSSA_DLL4E22
VSSA_DLL7U22
VSSA_LVDS1A15
VSSA_LVDS2C15
VSSA_LVDSINAB19
VSSA_TRI_PLL1J4
VDDD_1V2_TRI_PLL1H5
VDDD_1V2_TRI_PLL2K5
VDDD_1V2_TRI_PLL3U5
VDD_1V2_DDRPLL0AD25
VDD_1V2_DDRPLL1N22
VDD_1V2_MCAB1AB14
VDD_1V2_MCAB2AC14
VSSA_DDRPLL1T22
VDDA_1V2_TRI_PLL3T5
VDDA_1V2_UIP_PLLAF12
VDDA_1V2_XTALAD13
VDDA_3V3_DDRPLL0AE25
VDDA_3V3_LVDS1B15
VDDA_3V3_LVDS2D15
VDDA_3V3_LVDSINAB18
VDDA_3V3_SYS_PLLAD14
VDDA_1V2_DDRPLL1P22
VDDA_1V2_DLL0M22
VDDA_1V2_DLL1AA22
VDDA_1V2_DLL4F22
VDDA_1V2_DLL7V22
VDDA_1V2_LVDS_PLLE15
VDDA_1V2_TRI_PLL1J5
VDDA_1V2_TRI_PLL2L5
7C00-11PNX5100E
ΦSUPPLY_2
VDDA_1V2_1_7_MCABAE14
18
+1V2-PNX5100-TRI-PLL1 10u
2C57
100n
2C69
-1
30R
5C67
2C78
-2
100n2
7
2C60
-1
100n1
8
3
+1V2-PNX5100
2C63
-3
100n
36
FC07
+1V2-PNX5100
100n
2C66
-3
2C75
100n
+1V2-PNX5100-CLOCK
+1V2-PNX5100
+3V3-PNX5100-LVDS-IN
2C83
100n
+1V2-PNX5100
5C65
30R
AE26
AC2AC3AC4
+3V3-PNX5100-CLOCKR15
AC1
R23R25T11T12T13T14T15V25W23
AB5
P12P13P14P15P23R11R12R13R14
AB4
M13M14M15M25N11N12N13N14N15P11
AB3
F25H23J25L11L12L13L14L15M11M12
A17B2
A20C2
C25C3D3D4E4E5
AD1AD2AD24
AD3AE1AE2AF1
B1A10A13
AA25
V5W5
AB6AB7D22E6E7G5M5N5
A1
P16R16T16
AB15AB17
D10D13D17D20
AB20
AB16AB8AB9AC9AD9AE9AF9E16
L16M16N16
AA5
E8E9F5J22K22P5R5Y5
7C00-10PNX5100E
SUPPLY_1Φ
45
2C66
-4
100n
8
+1V2-PNX5100
2C63
-1
100n1
10u
2C95
5C68
30R
5C70
30R
IC90
2C94
100n
100n
2C84
2C64
100n
27
2C80
100n
8
100n
2C70
-2
2C70
-1
100n1
2C61
-33
6
+1V2-PNX5100
100n
+3V3
+1V2-PNX5100-TRI-PLL2
100n
2C72
45
IC84
100n
2C70
-4
IC89
IC82
30R
5C66
510
0n
2C67
-44
30R
5C61
36
+1V2-PNX5100-CLOCK10
0n
2C69
-3
2C87
100n
2C85
100n
100n
2C58
2C66
-2
100n2
7
+1V2-PNX5100
100n
2C81
+1V2-PNX5100-DDR-PLL1
+1V2-PNX5100-TRI-PLL3
+1V2-PNX5100
2C55
10u
5
+1V2-PNX5100-DDR-PLL1
+1V2-PNX5100
100n
2C78
-44
100n
2C65
18
100n
2C61
-1
+1V2-PNX5100-CLOCK
100n
2C88
2C60
-44
510
0n
2C91
100n
100n
2C92
+3V3-PNX5100-DDR-PLL0
+1V2-PNX5100
+1V2-PNX5100-TRI-PLL1
+3V3
100n
2C78
-33
6
+3V3-PNX5100-LVDS-IN
100n
2C90
18
5C60
30R
2C67
-1
100n
SENSE+1V2-PNX5100
18320_520_090728.eps090728
Circuit Diagrams and PWB Layouts EN 109Q549.3E LA 10.
2009-Aug-07
SSB: PNX5100 - Audio
C
SCKOSCLK
SD
OUTIN
OSCLKSCK
0123
WS
WS
SD0
CLKDE
SYNC_HSYNC_V
AMBI
01234567
9 107
A
3
5
A
B
4
8
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
F
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
3 4 5 6
I
G
C
4321
13
H2
D
7C00-7 C3
1 2 3 4 5 6 7 8
1
C
J
101 76
A
D
E
E
H
G
I
8
D
1311
E
J
7
8
9
A
BB
owne
r.
9 12
6
PNX5100 : AUDIO
F
11
B
C
D
E
3C41 D43C95-1 B53C95-2 B53C95-3 B43C95-4 B47C00-6 B3
9
2
12
5
C
3C41
100R
AE11AD11
AC11AB11
AB12AC12
7C00-7PNX5100E
AMBIΦ
AF10AE10AD10AC10AB10AF11
AF21AC21
AE21
AD21
AUDIOΦ
7C00-6PNX5100E
AC22AD22
AF22AD23AE23AF23
AE22 2 7
6
3C95-2
100R
83C95-3
100R3
3C95-1
100R1
3C95-4
100R4 5
EMANTESNHC
9 4
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A3
AUDIO PNX5100
TV543 R2 LDIPNX 8204 000 8928
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
BL-OSCLK
BL-SCK
BL-SD0
BL-WS
AMBI-VS
18320_521_090728.eps090728
EN 110Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX5100 - LVDS
C
CNCP
DNDP
BPBN
APAN
DPDN
CPCN
CLKPCLKN
BPBN
APAN
EPEN
IREF
LOUT1
LOUT2 LOUT4
LOUT3
RGB_CLKLVDS2LVDS1
EP
EP
ANAP
BNBP
CLKNCLKP
DPDN
CPCN
EN
EN
CLKPCLKN
BPBN
APAN
EPEN
DPDN
CPCN
CLKPCLKN
H
J
FCBE E12
RES
FCAC D7
ICAE B14
TO DISPLAY
M
FCBP E8FCBR E8FCJ4 B7FCJ5 C7
FCAW C12
K
owne
r.
ICA1 B8ICA2 B8ICA9 B1
O
5
D
144
9C10 B7
L
FCBF E13
C
FCB3 D12
FCAZ C12FCB0 C12FCB1 C12FCB2 C12
FCBA D12FCBB D12FCBC D12FCBD D12
FCA0 C7
17
D
1918
FCA1 C7FCA2 C8
N
11
TO DISPLAY
FCA3 C7FCA4 C8FCA5 C7FCA6 D8FCA7 D7FCA8 D8FCA9 D7FCAA D8
FCAB C8
FCBJ E12FCBK E12FCBM E14FCBN B8
FCAR E7FCAS B12FCAT B12FCAV C12
7C00-4 B1
J
12
P
12
B
ICAA B1
M
2CBA F102CBB F10
9C11 C79C31 C89C32 C89CA0 E14
A
6
FCAY C12
FCB6 D12FCB7 D12FCB8 D12FCB9 D12
FC15 C13FC16 C13FC17 E14FC19 B12
2CH6 B7
76 10
G
I
E
3
FCAD D7FCAE D7FCAF D8FCAG D8
FCBG E12FCBH E12
FCAK E8FCAM E8FCAN E7FCAP E7
3CAB C123CAC C123CAD C123CAE C12
2CB9 E10
13
13 17
E
G
F
O
4
2CBC F102CBD F102CBE G102CBF G10
9CA1 B149CA2 B89CA3 B89CA4 B8
FCB4 D12FCB5 D12
FC10 B7FC12 C12FC13 C13FC14 C13
2CBY F82CBZ F82CH4 B62CH5 B6
2CAN G5
H
8
PNX5100 : LVDS
A
15
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
F
9
2CAP G52CAR G52CAS A10
2CH7 C73CA2 E73CA3 E7
FCAH D8FCAJ E8
3CA6 B13CA7 B13CA9 B123CAA B12
2CB5 D102CB6 E102CB7 E102CB8 E10
B
2
19
16
2
15
P
2CA4 B52CA5 B52CA6 C5
2CBG G102CBH G102CBJ B132CBK B13
9CA5 B8FC08 B7
2CBN B132CBP B132CBR B132CBS B14
2CAH F52CAJ F52CAK F52CAM G5
10 11
9
L
20
K
I
C
C
B
85
2CAT A102CAV B102CAW B102CAY B10
3CA4 B123CA5 B12
2CB1 C102CB2 C102CB3 C102CB4 D10
C
6 7 8 9 10
101
2CA0 A52CA1 A52CA2 B52CA3 B5
11
1
N
7
1 2
2CA7 C52CA8 C52CA9 C52CAA D5
2CBL B132CBM B13
2CAB D52CAC E52CAD E52CAE E52CAF E52CAG F5
G
H
1G50 E81G51 F1412 13 14
1 2 3
20
18
E
F
D
E
F
G
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
4 5
2CAZ B102CB0 C10
H
A
B
D
11 12 13 14
A
1614
7 8 9
3
3 4 5 6
2CH7
10p RES
FCA2
FCAM
FC13
100R3CA9
9CA
2
FCBJ
2008-11-21
Maelegheer Ingrid
2008-10-10 3
RES9C10
A2
LVDS PNX5100
TV543 R2 LDIPNX 8204 000 8928
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
9 5
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
2CAGRES
4p7
FCA7
FCAH
ICA1
ICA2
FCA3
FCJ5
4p7RES
2CB5
2CH4 10p
RES
RES
9CA
3
9C11
3CAE100R
FCBA
RES
FCAK
FCB4
FCAY
9CA
5
FCA6
4p7
RES
D9
A22
2CAP
A11B11
C11D11
E10E11
B10C10
A9B9
C9
C14D14
E12E13
B13C13
A12B12
C12D12
D18
E18E19
B17C17
A16B16
C16D16
A14B14
E20E21
B20C20
A19B19
C19D19
A18B18
C18
7C00-4PNX5100E
LVDS_TXΦ
E17E14
A21B21
C21D21
4p72CBBRES
FC08
2CH6
FCBM
RES 10p
FCJ4
2CH5
FCA1
RES10p
9C31RESRES
9CA
4
9C32
2CAC 4p7
RES
RE
S10
0p2C
BP
FCAJ
FCAB
FCAR
RES4p72CAD
4p7
FCAC
RES2CA8
FCA5
4p7
RES2CB0
2CA2 4p7
RES
4p7
RES2CBC
FCBH
2CABRES4p7
FCB2
3CAA
100R
RES2CAM 4p7
FCB3
FC14
RES2CAT 4p7
FCAE
RE
S
FCBP
2CB
N10
0p
4p7RES
100R3CAD
2CB3
RES
FCBD
+VDISP2
FCA4
FCBB
FCB0
2CBGRES
4p7
2CB
R10
0pR
ES
FCAS
FCBC
2CA6RES
4p7
FCAD
ICAE
4p72CAS
FCBR
RES
FCBK
FCAA
FCAZ
RE
S
2CAKRES4p7
100p
2CB
S
FCB1
4p7
RES2CB8
FC10
FCB7
FC17
2CBF 4p7RES
RES4p72CA9
+3V3
5758 5960
FCAN
789
52
61
5354 5556
43444546474849
5
5051
6
343536373839
4
404142
2526272829
3
30313233
1516171819
2
2021222324
FI-RE51S-HF
1G51
1
1011121314
FCA8
FCBE
RES4p72CA3
2CBA 4p7
RES
FCB8
RES
4p72CAJ
FCAW
2CB1 4p7
FCBG
RES
FCAG
4p72CA7RES
2CBHRES4p7
4p7RES
2CBD
RES4p72CA1
2CA0 4p7
RES
RES
4p72CAV
4p7RES
2CAZ
FCBN
2CB2RES4p7
FCBF
FCB6
RE
S10
0p2C
BM
FCA9
FC19
FC16
FCB5
+3V3
4p7
100R
3CA4
2CANRES
RES
FCAF
2CAH 4p7
FCAT
RES2CB4
2CAR
4p7
4p7RES
10p
2CB
K
RE
S
48 4950
2CB
Y10
p
789
42
51
4344 4546 47
3536373839
4
4041
56
2526272829
3
3031323334
1516171819
2
2021222324
FI-RE41S-HF
1G50
1
1011121314
3CABRES
100R
12K
3CA
6
4p7RES
4p7
RES2CA4
2CB7
3CA2100R
RE
S
RES
2CB
L10
0p
4p7
2CB
J10
p
2CAARES
3CA
7
12K
FCA0
FC12
2CAERES
4p7
RES4p7
9CA0
2CAF
RES
4p72CB6
3CA5100R
2CAW 4p7RES
9CA1
10p
2CB
ZR
ES
4p7RES
2CB9
RES 3CAC100R FC15
ICAA
2CA5RES4p7
4p72CBERES
FCAP
ICA9
FCAV
FCB9
+VDISP1RES100R
3CA3
2CAYRES
4p7
TXCLK+
TXDAT-
TXDAT+
TXCLK-
TX3B-TX3B+
TX3A-TX3A+
SCL-DISPSDA-DISP
TX1E-
LAMP-ON-OUTBACKLIGHT-OUT
TX4B+
TX4A-TX4A+
TX3E-TX3E+
TX3D-TX3D+
TX3CLK-TX3CLK+
TX3C-TX3C+
TX1A+
TX4E-TX4E+
TX4D-TX4D+
TX4CLK-TX4CLK+
TX4C-TX4C+
TX4B-
TX1E-TX1E+
TX1D-TX1D+
TX1CLK-TX1CLK+
TX1C-TX1C+
TX1B-TX1B+
TX1A-
TX2E-TX2E+
TX2D-TX2D+
TX2CLK-TX2CLK+
TX2C-TX2C+
TX2B-TX2B+
TX2A-TX2A+
TX3E-TX3E+
TX4A-TX4A+TX4B-TX4B+
TX3A-TX3A+TX3B-TX3B+TX3C-TX3C+
TX3CLK-TX3CLK+
TX3D-TX3D+
TX4C+TX4C-
CTRL-DISP1CTRL-DISP2CTRL-DISP3CTRL-DISP4
SCL-DISPSDA-DISP
TX3B+
TX3C-
TX3C+
TX3CLK+
TX3CLK-
TX3D-
TX3D+
TX3E-
TX3E+
TX4A-
TX4A+
TX4B-
TX4B+
TX4C-
TX4C+
TX4CLK+
TX4CLK-
TX4D-
TX4D+
TX4E+
TX4E-
TX4CLK-TX4CLK+
TX4D-TX4D+TX4E-TX4E+
TX1E+
TX2A-
TX2A+
TX2B-
TX2B+
TX2C+
TX2C-
TX2CLK-
TX2CLK+
TX2D-
TX2D+
TX2E+
TX2E-
TX2E-TX2E+
TX3A-
TX3A+
TX3B-
TX2D-TX2D+
TX2A+TX2A-
TX2B+TX2B-
TX2C+TX2C-
TX2CLK+TX2CLK-
TX1A+TX1A-
TX1C+TX1C-
TX1CLK+TX1CLK-
TX1D+TX1D-
TX1E-TX1E+
TX1B+TX1B-
TX1A-
TX1A+
TX1B-
TX1B+
TX1C-
TX1C+
TX1CLK+
TX1CLK-
TX1D-
TX1D+
18320_522_090728.eps090728
Circuit Diagrams and PWB Layouts EN 111Q549.3E LA 10.
2009-Aug-07
SSB: PNX5100 - Control
SCLADR
012 SDA
WC
TDITDO
RESET_SYS
SDASCL
SDASCL
RXTX
RXTX
XTAL
UA1
UA2
1
2TMSTRST
NC
RESET_IN
OUT2
OUT
IN
VPP_ID
OBSERVE
TCK
C
FCD9 D5
FCD1 B3
FCD3 B3FCD4 B3
D
C08 OR C16
3CDB D7
2CD1 A2
3CD2 C2
owne
r.
D
C
6
F
3CD3 B2
A
2CD0 A21
J
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
5
B
13
10
E
7
G
11
4
8
9
H
1CD0 A2
3C40 C1
G
1
7C00-1 A37CD0 C4
6
5
5
C
DD
10
3CDD D6
1
H
FCD6 D5
6
A
4
3CDA B5
B
C
F
3CD1-2 C23CD1-3 C2
9CD0 D7
8
2 3
ICD8 B3
3CD1-4 C1
PNX5100 : CONTROL
5
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
3
9
FCD2 B3
3CDC D6
6 7
2
1
J
4 7
732
I
2
3CD0 B2
12 13
3CD1-1 C2
A 3CD9 B5
B
only for DEBUG
3CD7 B53CD8 B5
FCD0 B3
A
3 4
+3V3
12
11
I
FCD8 B3
E
C
B
27M
1CD0
ICD8
+3V3
2CD
0
27p
FCD0
+3V3
+3V34K7
3CDB
FCD4
FCD9
3CD
2
10K
100R3CD8FCD1
+3V3+3V3
100R
3CD0
J2
AF8AE8
AD8AC8
AB21
AE13
AF13
AF14
AF24AD12
K2
L2
K1
L1
H4H2H3J1
G22H22W22Y22
R1
3CDC
PNX5100E7C00-1
ΦCONTROL
10K
100R
3CD
1-3
3CD7 100R
+3V3
FCD2
27p
2CD
1
23
6
5
84
7(2Kx8)Φ
EEPROM
7CD0M24C16-WDW6
1
FCD8
100R3CDA
RES
10K
3CD
1-1
3CD3
10K
3CD
1-2
10K
10K
3CD
1-4
10K
+3V3
3C40
3CDD
100R
9CD
0
DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
9 6
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A3
CONTROL PNX5100
TV543 R2 LDIPNX 8204 000 8928
CHECK
FCD6
FCD33CD9 100R
RES SDA-AMBI-3V3EJTAG-PNX5100-TDO
EJTAG-PNX5100-TCK
RESET-PNX5100PNX5100-RST-OUT
EJTAG-PNX5100-TRSTn
CLK-OUT-PNX5100
EJTAG-PNX5100-TDI
EJTAG-PNX5100-TMS
SCL-SSB
WC-EEPROM-PNX5100
SCL-SSB
SDA-SSB
WC-EEPROM-PNX5100
SDA-SSB
SCL-AMBI-3V3
18320_523_090728.eps090728
EN 112Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX5100 - PCI
78910111213
0
CLKINTA
0123
56
AD
CBE
SEL
XIO
GNTBGNTA
GNTREQBREQA
REQSERRPERRIDSEL
DEVSELSTOPTRDYIRDY
FRAMEPAR
3210
3
PLL_OUT
4
141516171819202122232425262728293031
AD25ACK
21
C
4
C
A
31
D
1311
IC51 C5
3CFL-3 B5
D
3CFL-2 B5
8
5
3CFK-3 B5
3CFK-1 B5
owne
r.
D
7
E
3CFN B5
J
3CFL-1 B5
6
A
3CF1 C5
C
B
B
H
G
F
13
3CFK-2 B5
2
3 9
72
PNX5100 : PCI
7C00-2 A3
1
8
G
B
5
I
F
B
C
A
5
7
12
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
J
I
2 6
H
4
10
IC50 C5
C
10
653
8
7
3
11
6
E
4
12
42
8
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
1
3 6
EE
91
A
D
100R3CFL-3RES
IC50
RES 2 7
M4N1
100R3CFK-2
AD6AC7AD7
W2
V4V2
H1
AC6AF7
M2M3
L3
V3
U2
AE6AF6AE7
L4
M1
V1
W3
W1
AE3AF2AB2AB1AA4AA3
AE5AD5AC5AF4
R4R3R2P4P3P2P1N4
AF3
N3N2
Y4Y3Y2Y1W4U1T4T3
AD4
T2T1
7C00-2PNX5100E
PCI_XIOΦAF5
AE4
AA2AA1
IC51
RES 2 7
+3V3
3CFL-2 100R10K3CFN
3CFL-1 100RRES 1 8
1 8 100R3CFK-1RES3CFK-3 100RRES 3 6
2
NAME
DATECHECK
8204 000 8928TV543 R2 LDIPNX
PCI PNX5100
A3130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 2008
79
SETNAMECHN
CLASS_NO
SUPERS.
3CF1
10K
+3V3
PCI-CBE0PCI-CBE1PCI-CBE2PCI-CBE3
PCI-CLK-PNX5100
PCI-DEVSEL
PCI-FRAME
PCI-AD25
PCI-IRDY
PCI-PAR
PCI-PERRPCI-SERR
PCI-STOPPCI-TRDY
PCI-AD0PCI-AD1
PCI-AD10PCI-AD11PCI-AD12PCI-AD13PCI-AD14PCI-AD15PCI-AD16PCI-AD17PCI-AD18PCI-AD19
PCI-AD2
PCI-AD20PCI-AD21PCI-AD22PCI-AD23PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29
PCI-AD3
PCI-AD30PCI-AD31
PCI-AD4PCI-AD5PCI-AD6PCI-AD7PCI-AD8PCI-AD9
18320_524_090728.eps090728
Circuit Diagrams and PWB Layouts EN 113Q549.3E LA 10.
2009-Aug-07
SSB: PNX5100 - Display-Interfacing
C
GPIO
0
121110987654321
131415
EN
H
I
D
E
PNX5100 : DISPLAY-INTERFACING
VDISP-SWITCH
1C02 B52C03 H52C04 G4
2
2043
B
A
16
5 6 7 8
9
8 19
11
A
I
14
F
P
1
10 11 12 13 14
1
17
7 8 9 10
2CG0 A5
F
G
H
I
1C01 A5
16
2CH0 E11
O
RES
RES
12 13 14
A
B
17
1 2 3 4
H
I
A
B
9
CAPACITOR OR
7
5
C
12
D
3CGR H133CGS G12
N
L
M
18
P
G
C
2CG1 B5
2 3 4 5 6
2CG7 F52CG8 F52CGB H122CGC H12
11
J J
152
10
14
4
5CG0 A45CG1 A4
2CH1 E123C37 G33C38 G33C39 G33C42 G93C43 A73C44 B83CG0-2 D53CG0-3 D5
C
D
E
F
G
3CG8 E53CG9 E53CGA E33CGF E3
C
3
10
12 13
NOTE : CAN BE
3CGH E33CGJ E33CGN H113CGP H12
H
3CGT G113CGV G133CGZ B123CH0 B123CH1 B123CH2 C43CH3 G113CH4 H113CH5 G11
2CG2 C42CG3 C22CG4 D52CG5 F52CG6 F5
3CHC D113CHD D113CHE E113CHF E12
2CGD G11
1
owne
r.
E
D
1811
O
5
5CG2 B45CG3 B46CG0 C36CG2 C57C00-3 A97C03 G47CG0 B27CG1 C37CG2 C4
3CG0-4 C33CG1 C23CG5 D43CG6 E53CG7 E5
7CH0 D127CH1-1 D137CH1-2 D139CG0 B3
3CGG E3
20
7
M
B
9CH0 E13BCG0 E6BCG1 E6
ICGY B12ICGZ B8
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
BCG2 E6BCG3 E6BCG5 A5BCG6 B5FCG0 A5
3CH7 C23CH8 D113CH9 D113CHA D133CHB D12
FCG6 H13FCG7 E13FCG8 B4IC01 E3
3CHG E13
6
RESERVED
19
ICG9 E2
F
6
IC02 G3
K
G
8
15
RES
7CG4 H127CG5 G127CG6-1 G137CG6-2 G137CG8 B12
ICGA E2ICGH H12ICGK G13ICGM G12ICGN G11ICGP G11
9
N
K
13
9CG9 H10
9CG7 G109CG8 G10
ICGV B8ICGW C3
ICHA B8ICHB B8
ICH1 G9ICH2 G9ICH3 H9ICH4 A8ICH5 D10ICH6 D11ICH7 D11ICH8 D12ICH9 D13
FCG1 B5FCG2 E6FCG3 E6FCG4 E6FCG5 E6
L
IC03 G3ICG1 C4ICG2 C2
ICG3 C2
WIRE BRIDGE
+3V3
ICG4 D4ICG5 D4ICG6 D5ICG7 E2ICG8 E2
32V
32V
ICGR G10
9CG1 B3
E
9CG4 H13
RES47R
3CGJ
47K
3CH7
30R
5CG3
3CH0
100R
+VDISP2
FCG3
100p
2CG
8
ICH7
ICG5
ICGW
3CG
N
10K
2CG
7
100p
+3V3+3V3
ICGN
1K0
3CH
G
3 6
ICG9
3CG0-3
47K
13
2
+3V3
7CG2BC847BW
RE
S2K
2
3CH
3
FCG8
SI4835DDY7CG0
RES
2CG
4
7CG8PDTA114EU
100n
FCG6
3CH
9
27K
ICG7
+12VD
47R
RE
S
3CG
7
100R
ICGZ
3C43
3C44
100R
RES470p
2CH0
ICGY
2CG3
1u0
ICGK
+3V3F
6CG0
BZX384-C5V6
+3V3
47K
3CG
V
8204 000 8928
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
9 8
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A2
DISPLAY INTERF PNX5100
TV543 R2 LDIPNX
15K
3CG
P
RE
S
RE
S
3CH
D
IC01 2K2
IC03
3CG0-4
47K
5 4
30R
3CH2
5CG0
2K2
9CG1
+VDISP1
RES
ICH2
FCG7
BCG6
+3V3
2C04
100n
C22
AF26C24C26B25B26A26A25A24
7C00-3PNX5100E
ΦGPIO
AE24AF25
B24A23B23C23B22
+12VD
ICG6
ICH6
3CHB
12K
ICG1
RES
30R
9CG0
5CG1
4K7
3CG5
BCG5
10K3C
G9 RE
S
PDTC114EU7CG4
ICHB
ICH8
100p
2CG
6
ICG2
3CGA
100R
BCG3
100n
RES
2CG
0
470K
3CGS
ICHA
3C37
47R
3C39
10K
RES
3CG
6
9CG8
RE
S47
R
FCG4
ICGR
3CH
A
47K
+3V3
ICH1
5
4
7C0374LVC1G125GW
2
3
1
2CGD
470p RES
ICG4
LTST-C190KGKT
BCG1
6CG2
47R
3C38
ICH9
2CG
1
ICGM
BCG2
100n
ICG8
470K
3CG
T
+3V3
10K
3C42
RES
3CGH
47R
25V
220u2C
03
5CG2
ICGV
1u0
30R
2CG
B
BC847BPN(COL)7CH1-25
3
4
3CGF
47R RES
2 7
47K
3CG0-2
FCG1
1
RES
3CHE
1K0
7CG6-1BC847BPN(COL)
2
6
IC02
9CG
9
ICH3
+3V3
7CG6-2BC847BPN(COL)
5
3
4
+12VD
ICGH
RE
S22u
2CG
2
7CH1-1
2
6
1
+3V3
BC847BPN(COL)
10K
3CG
Z
RE
SR
ES
ICG3
3CH
1
10K
9CG7
3CH
8
10KRES
10K
3CH4
FCG2
ICH5
4K7
3CH5
RES
1C02
3CG
8
47R
T3.0A
RE
S
ICGP
9CG4
RES
SI3441BDV7CG1
RES
3CHC
4K7
RE
S
3CH
F
15K
2CH
1
1u0
RE
S
FCG5
RES47R
3CGG
RES
9CH0
3
2
+VDISP
7CG5BC847BW
RES
1
RE
S1u
0
2CG
C
ICH4
3CG1
47R
3CG
R
1K0
2
BCG0
7CH01
3
2CG
5
100p
BC847BW
ICGA
1C01
3.0A T
BACKLIGHT-CTRL
BACKLIGHT-PWM-ANA-SSB
BACKLIGHT-OUT2FCG0
BACKLIGHT-BOOST
BACKLIGHT-CTRL
CTRL4-PNX5100
CTRL-DISP4
BACKLIGHT-OUT
CTRL-DISP4
CTRL-DISP3
CTRL-DISP2
CTRL4-PNX5100
CTRL3-PNX5100CTRL2-PNX5100CTRL1-PNX5100
LCD-PWR-ONBACKLIGHT-PWM-ANA-DISP
BACKLIGHT-CTRL
BOOST-CTRL
BACKLIGHT-CONTROL-FPGA-IN
FAN-CTRL-1FAN-CTRL-2
BOOST-CTRL
CTRL1-PNX5100 CTRL-DISP1
CTRL2-PNX5100
CTRL3-PNX5100
CTRL4-PNX5100
LCD-PWR-ON
BACKLIGHT-PWM-ANA-SSB
18320_525_090728.eps090728
EN 114Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: PNX5100 - Debug
C
H
G
F
A
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2
1 2
3 4
A
B
654
RESERVED
3
I
3 4
1 2
B
64
owne
r.
A
5
B
C
D
3CJ0 C3 3CJ1 C3 6CJ0 C3
B
C
1
A
I
J
E
D
C
7CJ0 D3 FCJ0 D3
PNX5100 : DEBUG
3
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
G
D
E
C
D
2
1
J
F
H
+3V3
FCJ0
PDTC114EU7CJ0
330R
3CJ0
6CJ0SM
L-31
0
+3V3
3CJ1
10K
SETNAME
9 9
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A4
DEBUG SHEET PNX5100
TV543 R2 LDIPNX 8204 000 8928
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
CHN
PNX5100-RST-OUT
18320_526_090728.eps090728
Personal Notes:
10000_012_090121.eps090121
Circuit Diagrams and PWB Layouts EN 115Q549.3E LA 10.
2009-Aug-07
SSB: FPGA Backlight-LVDS I2C-Mux
D
C
S
W
HOLD
VSS
Q
VCC
C
OUTIN
INH BP
COM
VCCO
VCCO
BANK2
BANK3
GND
VCCINT
VCCO
IP
IO
TMSTDOTDITCK
PROG_B
DONE
VCCO
VCCAUX
BANK1
BANK0
-BUSCTRLFIL
I 2 CINP
COM
OUTIN
FFA7 A13
IF17 D10
9F05-2 F9
9F05-4 F9
FFA8 A14FFA9 A13IF00 H9IF01 F10IF02 D10IF07 C10IF08 D9IF09 C10
FF24 F14
IF13 C10
FF00 I2
IF34 F7IF35 F7IF36 E10
9FA1 A69FA2 A6
6F82 E6
FF01 I1
6F84 E6
FF03 H8FF04 I8FF05 I8FF06 G4FF07 G4FF08 B6FF09 C3FF10 A3
IF37 E10IF38 F10IF39 F10IFA8 A11IFA9 A10
TEMPERATURE
FOR FACTORY USE ONLY
1
O
P
FF40 E14FF41 E14FF42 E14FF43 E14FF44 E14FF54 F6
9
3F31 G13
9F05-3 F9
3F37 A8
9F06 D109F08 E109F09 A59F10 A59F11 A59F12 A59F13 A89F14 A8
18
N
IF18 D9IF19 E9IF20 C13IF21 C13IF29 B14IF32 E7IF33 E7
AMBILIGHT
13
9F20 B69F21 A129F22 A12
5F06 B14
6F13 E2
3F12 C11
6F83 E6
3F14 F7
6F85 F67F00 B87F01 H97F05 E27F06 B27F07 D27F08 A69F00 D11
IF16 D10
FF12 F7
FF14 G4FF15 B6
D
20
FF02 H10
FF22 C14
FF25 F14FF30 G5FF31 F14
N
B B
3F29 F133F30 G13
2F42 G13
3F36 A8
2F47 C13
3F38 A83F39 B83F40 C133F41 C133F79 F103F80 F103F82 E73F83 E7
IF12 B3
9F16 A8
IF14 D7
9F18 B69F19 B6
4
E
8 18
20
IF15 D10
3FAB A105F02 C15F03 A25F04 A25F05 B14
3F10 E113F11 D7
2F18 D1
3F13 C10
2F20 B2
3F15-1 G43F15-2 G43F15-3 G53F16-1 H43F16-2 H43F16-3 H43F16-4 H53F17 D13
FF11 B6
9F02 E11
FF13 G5
9F04 D79F05-1 F9
15
FF16 B6FF17 A3FF20 B14FF21 C14
14
FF23 F14
3F23 E73F24 E13F25 E23F26 F63F27 F23F28 F4
2F40 F132F41 G13
2F01 H9
2F46 C13
2F03 D11
2F48 C142F49 A62FA6 B132FA7 B132FND F112FNE F113F00-1 I33F00-2 I2
9F15 A8
3F85 E7
9F17 B6
3FA6 A123FAA A10
M
9
E
3F06 I83F07 D113F08 D113F09 D11
7
2F17 C3
5
2F19 D2
7
2F21 C32F22 B22F23 B22F24 B22F25 B32F26 A112F27 A112F28 E13
9F01 E11
3F19 E13
9F03 D10
3F21 F133F22 E7
5
I
TO
2F34 B32F35 B32F36 A32F37 A32F38 A32F39 A3
1M71 C142F00 I2
2F02 I10
2F04 C112F05 I42F06 D132F07 D132F08 E132F09 C22F10 C22F11 D3
3F84 E7
3F00-4 H2
3FA5 A12
3F02 H83F03 H10
1614
10
A
DEBUG
H
C
P
2
owne
r.
K
T 1
A 6
3V
643
B
8 9 10 11 12 13 14
A
3F18 D13
2F30 A2
3F20 E13
2F32 A22F33 A2
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
5
6
F
J
O
SENSOR
17
2
11
1F53 E141M59 A14
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
2 3 4 5 6 7 8 9 10 11
D
3F00-3 H2
2F13 C3
3F01 I2
2F15 C32F16 C2
TO
12
14
1 2
I
A
E
F
G
H
I
1F03 H51F05 H11
10
B
1F29 I6
2F29 F13C2F31 A2
E
F
FPGA Backlight-LVDS & I2C-MUX
19
FOR
17
D
I
8
3
A
1
C
L
D
F
2F12 C2
4
2F14 C3
12 13
FOR
156
H
RESERVED
K
7
L
3
19
J
G
H
1F50 B14
12
G G
16
11
13
DEBUG
C
M
3F27
+5V
100K
100n
2F32
+1V
2M
3F25
100K
RE
S2F
31
4u7
2FN
E
4p7
RE
S
FF09
+2V
5M
9FA2
2F39
100n
10K
3F28
9F20 RES
2F49
100n
+3V3M
470R
3F24
3F41
100R
*
6
5
7
2
1
84
3
7F01M25P20-VMN
FLASH2MΦ
4p7
2FN
DR
ES
FF05
9F05-4
+1V2M
FF42
IF01
470R3F84
+2V
5M
LTST-C190KGKT6F82
IF20
2F04
33p
10p
2FA
6
10K
3F26
+3V3
+3V3
2F25
100n
3F11RES
FF12
1K0
9F10 RES
IF09
3F03
10R
150p
2F27
RES
FF07
3F02
4K7
45
9F14 RES
100R
3F16
-4
2F19
100n
6F13
SML-310
2F37
100n
+1V2-PNX85XX
2F33
100n
4K7
3F39
RES
9F03
+3V3M
IF14
RE
S2F
35
100n
2F20
100n
1
3
5
LD3985M257F06
4
2
FF44
+3V3M
FF41
FFA8
FF40
1M71
1735446-4
1234
5F03
120R
3
RES
FPGA Backlight-LVDS & I2C-MUX
TV543 R2 LDIPNX 8204 000 8933
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
8 1
2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2005
2008-11-21
Maelegheer Ingrid
2008-10-10
9F01
130 A2
FF22
30R
5F06
LTST-C190KGKT
RES
1
6F84
IFA8
IF21
FF04
LTST-C190KGKT6F85
+3V3
100n
2F09
RE
S 2F47
10p
100n2F
34
RE
S
3F00-4
100R4 5
RE
S
IF12
IF15
IF193F23 100R
9F00
+3V3
+2V5M
100n
2F48
+2V
5M
9F05-3
IF17
IF18
9F15
IF16
+2V5M
IF13
EMC HOLE1X02
1F50
FF43
RES
+3V3
IF29
9F09
2F26
150p
RES
4567
89
9F12
1F03
123
3F79
150R
FF13
RE
S
FF10
4K7
3F37RES
RES5F02
120R
1K03F08 RES
+3V3
+3V3M
100n
2F13
1K03F07
IF08
RES
470R3F82
FFA7
+2V5M
7
FF08
123456
3 6
1M59
100R3F00-3
+3V3M
FF02
FF00
FF11
IF00
3F85 470R
9F13
18
330R
3F15
-1
220R
3FA6
100R
3F06
100n
2F22
3F83 470R
+3V3M
1u0
2F16
9FA1
+3V3
FF30
100n
2F30
RE
S
+1V
2M
FF16
+3V3
FFA9
FF03
RES
IF32
9F17
3F38
4K7
FF54
8297
5573
3145
820
7675
21 46 74 96 6 28 56 80
89 IP_L04P|GCLK888
IP_L05N|M2|GCLK139IP_L05P|RDWR_B|GCLK038
IP|VREF69
IP|VREF30
1
77100
IO_L07P70
IO_L07P|M043
22IO_L07P
IO_L08N|VS148IO_L08P|VS247
IO_L09N|CCLK50IO_L09P|VS049
13
IP_L04N|GCLK9
IO_L06P|RHCLK667
IO_L06P|D2|GCLK240
IO_L06P|LHCLK617
IO_L07N|HSWAP99
IO_L07N71
IO_L07N|DIN|D044
23IO_L07N
IO_L07P98
IO_L05P|GCLK1090
IO_L05P|RHCLK465
IO_L05P|LHCLK415
IO_L06N|VREF95
IO_L06N|RHCLK768
IO_L06N|D1|GCLK341
IO_L06N|LHCLK718
IO_L06P94
IO_L04N|D3|GCLK1536
IO_L04N|LHCLK312
IO_L04P|RHCLK262
IO_L04P|D4|GCLK1435
IO_L04P|LHCLK211
IO_L05N|GCLK1191
IO_L05N|RHCLK566
IO_L05N|LHCLK516
IO_L03N|RHCLK161
IO_L03N|D6|GCLK1333
IO_L03N|LHCLK110
IO_L03P|GCLK685
IO_L03P|RHCLK060
IO_L03P|D7|GCLK1232
IO_L03P|LHCLK09
IO_L04N|RHCLK363
IO_L02N58
IO_L02N|MOSI|CSI_B27
5IO_L02N|VREF
IO_L02P|GCLK483
IO_L02P57
IO_L02P|DOUT|BUSY26
4IO_L02P
IO_L03N|GCLK786
54
IO_L01N|INIT_B25
3IO_L01N
IO_L01P78
IO_L01P53
IO_L01P|CSO_B24
2IO_L01P
IO_L02N|GCLK584
29 37 52 59 64 72
92
IO|D534
IO|M142
IO_L01N79
IO_L01N
7F00XC3S100E-4VQG100C
SPARTAN-3 FPGAΦ
51
7 81 87 9314 19
IF34
33p
2F02
+2V5
FF20
9F05-2
FF21
150R
3F80
100R
RE
S
3F22
9F06
3FA
A
2K2
+3V3
IF35
+3V3
IFA9
3F00-2100R
2 7
IF07
100R
3F16
-33
6
IF37
36
3
VSS
6
330R
3F15
-3
SC0 5
SC1 8
SCL 40DS1
SD1 7SDA2
VDDPCA9540B
7F08
RES1K0
3F10
9F19 RES
IF38
+3V3
+1V
2M
FF319F05-1
+3V3M2F
21
1u0
9F04
IF33
3F36
4K7
RES
FF15
+3V3M
LTST-C190KGKT6F83
IF02
+2V5M
3FA
B
+2V
5M
2K2
HOOK11F29
FF01
10K3F13 RES
10n
2F17
100R
81
3F16
-1
9F21100n
2F36
2F14
100n
+3V3
+1V
2M
RE
S2F
00
100n
100R3F00-11 8
9F02
3FA5
220R
3F09
100R
4u7
2F11
FF06
3F40
100R
100n
2F38
IF39
100n
2F24
120R
RE
S2F
05
100n
27
5F04
3F15
-2
330R
2F10
47u
6.3V
RE
S
3F16
-2
100R
27
5F05
30R
9F22
+3V3
56789
1516
+3V3
1
1011121314
234
1F53
502382-1470
1234567
+3V3M
1F05
2F28
10p
100R
3F12
100n
2F18
2F12
100n
9F11 RES
+2V5M
+3V3
2F23
100n
7F05BC847BW
IF36
100n
2F15
RE
S
10p
2F46
2F0310p
9F18
3F01
100R
FF17
FF14
+3V3
+3V3M
100n
2F01
2FA
7
10p
+3V3M
FF25
+3V3M
FF23
3F14
10K
RES
LD1117DT127F07
1
3 2
9F16
2F41
10p
100R
3F30
10p
2F08
3F19
100R
2F06
10p
3F17
100R
9F08
10p
2F40
FF24
100R
3F29
10p
2F42
3F31
100R
10p
2F29
3F21
100R
100R
3F20
10p
100R
3F18
2F07
+2V5M
BL-HS
BL-CS
BL-MOSI
BL-MISO
BL-VS
SDA-SET
SCL-SET
BL-CLK
BL-WSBL-SD0BL-OSCLK
SCL-AMBI-3V3
SDA-AMBI-3V3
BL-VS
SCL-SET SCL-BOLT-ONSDA-SET SDA-BOLT-ON
+3V3M
BL-MISOBL-CS
AMBI-VS
BACKLIGHT-CONTROL-FPGA-IN
TXDAT+
TXDAT-
TXCLK+
TXCLK-
SDA-SET0SDA-DISP
SDA-SET1SDA-BOLT-ON
SCL-SET0SCL-SET1
SDA-SET0SDA-SET1SDA-SET
SCL-SET
SCL-SET SCL-DISPSDA-SET SDA-DISP
SCL-SET0SCL-DISP
SCL-SET1SCL-BOLT-ON
DONE
MISO
SCL-SET
SDA-SET
SCL-DISP
SDA-DISP
SCL-BOLT-ON
SDA-BOLT-ON
MOSI
BL-SCK
SCL-SSBSDA-SSB
CSO-BINIT
PROG-B
CCLK
DONE
CCLK
MOSI MISO
CSO-B
CSO-B
PROG-B
CSO-BMOSIMISOCCLK
BL-CLKBL-MOSI
BL-HS CLK-OUT-PNX5100
18320_527_090728.eps090728
EN 116Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: U-Wand
C
FFC2 A3FFC3 A3
4
A
FFC5 A3
J
FFHG C3FFHH C3
F
FOR FACTORY
6
1
H
RES U-WAND
2
owne
r.
IFC0 A2
3
E
C
1F10 B3
3
D
2
IFC1 A3
4
IFC5 A2
C
F
B
6
D
1R20 A3 5FC8 A25FC9 A3
USE ONLY
2
G
4
I
2
E
1
5FC7 A3
J
G
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
FFC4 A3 FFHD B3FFHE B3FFHF C3
1
5
5
I
C
B
H
3
FFHJ C3FFHK C3
FFHL C3
A
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
A
B
A
B
4
1
5FC5 A35FC6 A2
3
U-WAND
C FFHB B3FFHC B3
8 2
2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007
2008-11-21
Maelegheer Ingrid
2008-10-10 3
FFHE
130 A4
U-WAND
TV543 R2 LDIPNX 8204 000 8933
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
30R5FC8
5FC730R
FFHL
30R5FC6
FFHB
FFHD
12345
1735446-5
1R20
FFC5
FFC4
FFHH
+3V3
FFC2
IFC15FC9
30R
FFHF
FFHG
FFHJ
+12V
IFC0 5FC5
30RIFC5
789
1
1011121314
23456
FFHC
5-147279-3
1F10
FFHK
FFC3TXD-MIPS2
RXD-MIPS2
EJTAG-TCK
EJTAG-TDI
EJTAG-TDO
EJTAG-TMS
EJTAG-TRSTNEJTAG-DETECT
18320_528_090728.eps090728
Personal Notes:
10000_012_090121.eps090121
Circuit Diagrams and PWB Layouts EN 117Q549.3E LA 10.
2009-Aug-07
SSB: Temperature & Fan control
SCL
SDA
VSS
LED3
LED2
LED1
LED0
VDD
C
J
A
3F66 D7
IF56 F3
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
10
5 8
4
IF64 B9
7F50 B7
IF66 B9
IF62 B8
6F50 B76F51 D2
IF63 B7
IF65 B7
3F54 E4
IF68 D7IF67 E4
B
I
E
D
7
2
FF52 C3
IF54 E5IF55 F2
7F55 E3
D
C
I
3
9F52 C9FF49 A2
H
9F51 B9
3F63 C8
FF51 B3
FF53 C3
9
139
3
F
12
8
FF50 A3
12
IF50 D2
IF52 E3IF53 E4
1
2
F
IF59 E6
3F73 F8
A
7F51 C87F52 D37F53 E4
4
2F52 B2
3F60 A7
2F54 C2
B
2F57 E42F58 B8
2F60 E8
IF69 D7
owne
r.
IF61 F8
TEMPERATURE- & FAN-CONTROL
11
F
3F55 E5
7F54 D9
7
9F50 B8
3F62 B7
2F56 E4
7
J
3F64 C93F65 B9
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
5 6
2F53 C2
2F55 C2
9
5
1 2
6
4
G
IF51 E3
H
10
2
3F67 D73F68 E8
IF58 E8IF57 E8
IF60 F8
3F72 F8
A
B
3F51 E2
1 11
C
A
7
C
D
2F59 C8
F
2F61 F8
G
3F50 E3
3F52 E53F53 E3
D
1F01 A1
3F56 E23F57 F2
7F56 F97F57 F69F07 F6
3F61 B7
B
E
1F02 B12F50 B2
3F58 F33F59 D2
32F51 B2
5
E
C
8 9
6
6
1
E
13
3 4
3F69 E83F70 E63F71 F8
8
1K0
3F65
+12V
+12V
RE
S
2F61
100n
3F56
10R
IF68
IF62
100R
3F62
IF63
IF69
1K0
3F60
1u0
2F56
3F57RES
RES
10R7F56
PDTA114EU
3F68
27K
BC857BW7F53
100n
2F60
FF53
3F67
2F57
10u
12
100R
IF50
3F55
22K
1u0
2F53
RES
+12V
3F58
100R3F
52
10K
3F51
10R
IF58
IF51
10K
3F69
IF55
IF60
100R
3F53
2F55
1u0
PDTC114EU
7F57
3F63 1K
0RE
S
2F58
100n
2F50
1u0
123
9F51
1F02
SM
L-31
0
6F50
1F01
123
+12V
+3V3
9F52
1K0
3F73
RE
S
IF61
1K0
3F59
1K0
3F64
RE
S
1
2
3
5
6
7
84
7F51
PCA9533
Φ
100R
3F61
IF66IF65
+12V
IF57
+3V3
IF56
24
3
FF49
7F55BCP53
RES
1
RE
S
+3V
310
K
3F70
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8933TV543 R2 LDIPNX
TEMPERATURE- & FAN-CONTROL
A3130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20072007-12-04
38
10K
3F72
3F54
100R
3F50
10K
+3V3
IF59
FF50
FF51
100n
2F59
FF52
6A1
5A2
4G
ND
3OS
2SCL
1SDA
8+
VS
7A0
9F50
LM75ADP7F50
9F07
+3V3
RE
S
+12V
SM
L-31
0
6F51
100R
3F66
IF52
IF67 IF54IF53
27K
3F71
+12V
3
PDTA114EU
7F54
BCP537F52
1
24
IF64
1u0
2F52
100p
2F51
2F54
100p
TACHO2
FAN2-DRV
TACHO2-INVFAN-CTRL-1
TACHO2
FAN2-DRV
TACHO1
TACHO1-INV
FAN1-OUT
FAN1-DRV
SDA-SET
SCL-SET
SDA-SET
SCL-SET
FAN1-OUT
TACHO1-INV
TACHO2-INV
FAN1-DRVTACHO1
18320_529_090728.eps090728
EN 118Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: FPGA WOW - LVDS In/Out
C
12
9FG9-4 B2
3FH5 B85FG1 E8
5FG2 E89FG2-1 A2
3FF7-2 C5
9FG2-3 A2
3FF7-4 C53FF8 A5
9FG3-2 B2
9FGC-3 E2
9FG2-4 A29FG3-1 B2
9FGB-3 D2
A
9FGD-3 F2
9FGC-1 F29FGC-2 E3
9FG4-2 C2
3FFE B5
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3FFL C5
9FG6-2 E2
2
E
5
3FFC-4 F5
2F81 F6
3FFH C5
2F83 F62F84 F6
3FFT D5
9FG8-1 A39FG8-2 A29FG8-3 A3
3FG3 B2
3FFP D5
9FG7-4 F2
FFL4 B8
1
G
4
9FGA-1 C39FGA-2 C2
9FGA-4 C2
9FG8-4 A29FG9-1 B39FG9-2 B29FG9-3 B3
F
H
3FF6-2 B53FF6-3 B53FF6-4 B53FF7-1 C5
B
3FF7-3 C5
3FF9-1 E5
9FG3-3 B29FG3-4 B29FG4-1 C2
3FFA-1 F5
9FG2-2 A2
9FGB-1 E29FGB-2 D3
3FGC F23FGE E2
9FG5-4 D2
9FGC-4 E39FGD-1 F29FGD-2 F3
6
9FGD-4 F3FFL2 E8
9FG6-1 F2
With FPGA
B
FFL3 A8
2F77 E62F78 E62F79 E62F80 F6
1F51 B9
2F82 F6
J
12
2F85 C6
3FFW E53FG1 A23FG2 A2
3FE0 E5
9FG6-4 E29FG7-1 F29FG7-2 F29FG7-3 F2
3FGA E23FGB F2
1
With FPGAFPGA WOW - LVDS IN/OUT
9FGA-3 C3
I
D
2
5
3FH4 A8
7 8 9
A
E
6
3FF9-2 D53FF9-3 D53FF9-4 D5
8
9FGB-4 D3
9FG4-4 C29FG5-1 E29FG5-2 D29FG5-3 D2
3FFC-2 F53FFC-3 F5
3
A No FPGA
13
13
G
2F64 A6
C
D
E
F
2F65 A62F66 B62F67 B62F68 B6
2FN8 F82FN9 B82FNA B8
2F62 A6
9FG6-3 E2
3FG5 C23FG6 C23FG8 D23FG9 D2
3FF4-4 A53FF5 A5
6
9
3
J
7
owne
r.
4
11
3FF6-1 B5
1 2 3
H
91 2
C
9
10
C
9FG4-3 C2
3FFA-3 E53FFA-4 E53FFB B53FFC-1 F5
2F75 D62F76 E6
11
C
10
D
2F63 A6
7
4
D
E
F
A
3FE3 F5
5
2F69 B6
3FG4 B2
3FE6 F53FF4-1 A53FF4-2 A53FF4-3 A5
3 4 5
F
7 8
B
TO DISPLAY
8
2F70 C6
3FFA-2 E5
2F71 C62F72 C62F73 D62F74 D6
I
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
B
6
4 59FG2-4
RE
S
2FN
8
100n
RE
S5F
G2 30
R
3FG
1
100R
2F64
RES2F65 4p7
RES4p7
100R
3FG
6
3FF
B
150R
9FG7-11 8
3 6
4 5
9FGB-3
3 6
9FGB-4
9FG4-33 6
9FG2-3
9FG4-22 7
3FG
8
100R
4p72F67RES
3 6
RES2F66 4p7
2 7
9FGA-3
3 6
9FG7-2
9FG7-3
CLASS_NO
EMANTESNHC
8 4
2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A3
FPGA WOW - LVDS IN/OUT
TV543 R2 LDIPNX 8204 000 8933
CHECK DATE
NAME
2
SUPERS.
150R
3FF
5
3FF4-1
180R1 8
9FG8-44 5
4 59FGD-4
9FG9-22 7
9FG3-44 5
9FGA-44 5
100R
3FG
B
100R
180R
3FF6-1
1 8
3FG
A
RES4p72F63
2F62 4p7
9FGC-22 7
RES
9FGA-22 7
9FGA-11 8
9FG3-33 6
9FG3-22 7
RES2F69 4p7
RES4p72F68
3FF
L
150R
3FF6-2
180R2 7
180R
3FF6-3
3 6
2 7180R
3FF4-2
9FG4-44 5
9FG2-11 8
10p
2FN
AR
ES
RE
S
RES
2FN
9
10p
2 7
3FH5
100R
180R
3FF7-2
9FGC-44 5
9FG9-33 6
7
9FGD-11 8
3 6
9FGD-22
9FGD-3
4p72F71RES
RES2F70 4p7
2 7
1 8
9FG8-2
9FG7-44 5
9FG8-1
3FF7-3
180R3 6
180R
3FF7-4
4 5
9FG5-11 8
150R
TF
F30
EF3
150R
2 7
3FF9-2
180R
3FF
P
150R
4 5
3FG
C
100R
3FF6-4
180R
FFL2
9FG9-11 8
1 89FGB-1
3FFA-1
180R1 8
180R
3FFA-2
2 7
9FG4-11 8
9FG2-22 7
150R
3FF
H
1 8
2 7
9FG6-1
9FG6-2
3FG
3
100R
1 8
100R
3FG
2
9FG3-1
3FFA-3
180R3 6
3FFA-4
4 5
3 6
180R
9FGC-3
9FG9-44 5
4344 4546 4748 4950
4
4041
56789
42
51
3
30313233343536373839
2
20212223242526272829
10111213141516171819
RES
FI-RE41S-HF
1F51
1
3FE
6
150R
79FGB-2
2
100R
3FH4
RES
3FF
E
150R
RES2F85 4p7
RES4p72F72
180R
3FFC-1
1 8
9FG5-22 7
4 5
9FG5-33 6
9FG5-4
6
9FGC-11 8
9FG8-33
9FG6-44 5
30R
5FG
1
3FF4-3
180R3 6
RE
S
4 5180R
3FF4-4
2F73 4p7
4p72F74
RES
RES
3FF
W
150R
2F84 4p7
4p72F83
RES
3FFC-2
180R2 7
RES
3FF9-4
180R4 5
4p72F79
RES2F80 4p7
RES
3FG
9
100R
100R
3FG
E
2F75
RES2F76 4p7
RES4p7
3FG
5
100R
100R
3FG
4
4p72F82RES
3 6
RES2F81 4p7
4 5
180R
3FFC-3
3FFC-4
180R
180R
3FF9-1
1 8
2F78RES
4p7
RES2F77 4p7
FFL3
FFL4
8
3FF7-1
180R1
9FG6-33 6
3FF
8
150R
3 6
3FE
3
150R
180R
3FF9-3
RX51002D+
RX51002E-
RX51002E+
+VDISP
RX51002B+
RX51002C-
RX51002C+
RX51002CLK-
RX51002CLK+
RX51002D-
RX51001E+
RX51001A-
RX51001A+
RX51002A-
RX51002A+
RX51002B-
RX51001C+
RX51001CLK-
RX51001CLK+
RX51001D-
RX51001D+
RX51001E-
RX51002D+
RX51002E-
RX51002E+
RX51001B-
RX51001B+
RX51001C-
RX51002B-
RX51002B+
RX51002C-
RX51002C+
RX51002CLK-
RX51002CLK+
RX51002D-
RX51001D-
RX51001D+
RX51001E-
RX51001E+
RX51002A-
RX51002A+
RX51001A+
RX51001B-
RX51001B+
RX51001C-
RX51001C+
RX51001CLK-
RX51001CLK+
RX51001A-
RX51002D+RX51002D-RX51002CLK+RX51002CLK-
SDA-DISP
SCL-DISP
RX51002C+RX51002C-
RX51002B+RX51002B-RX51002A+RX51002A-
RX51001E+RX51001E-RX51001D+RX51001D-RX51001CLK+RX51001CLK-
RX51001C+RX51001C-
RX51001B+
RX51002E+
RX51001B-RX51001A+RX51001A-
RX51002E-
TXF2C+
TXF2CLK+
TXF2CLK-
TXF2D-
TXF2D+
TXF1CLK-
TXF2E+
TXF2E-
TXF1E+
TXF2A-
TXF2A+
TXF2B-
TXF2B+
TXF2C-
TXF1A-
TXF1A+
TXF1B-
TXF1B+
TXF1C-
TXF1C+
TXF1CLK+
TXF1D-
TXF1D+
TXF1E-
TX852CLK-
TX852CLK+
TX852D-
TX852D+
TX852E-
TX852E+
TX852A-
TX852A+
TX852B-
TX852B+
TX852C-
TX852C+
TX851CLK-
TX851CLK+
TX851D-
TX851D+
TX851E-
TX851E+
TX851A-
TX851A+
TX851B-
TX851B+
TX851C-
TX851C+
18320_530_090728.eps090728
Circuit Diagrams and PWB Layouts EN 119Q549.3E LA 10.
2009-Aug-07
SSB: FPGA WOW - Power & Control
D
C
S
W
HOLD
VSS
Q
VCC
C
2FHR C3
13
2FHT B32FHV C3
5
2FHH B4
3FHL B11
2FHK B5
3FHB-2 E10
C
D
A
B
12
IM
2
2FJ9 C2
12
2FJB C3
10 11
D
E
2FJC C32FJD F12
A
C
2FJK B72FJP B33FH0 H23FH1 H2
1
2FHS C3
5FH2 C2
G
C
L
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
G
3
2
E
2FHL B22FHM B22FHN C2
F
3FH2 H23FH3 H3
431
CFH0 B2
2FHP C3
FFH0 A3
3FH9-2 D93FH9-3 E93FHB-1 E10
FFH4 D3
3FHB-3 E10
I
E
2FHJ B5
2FH7 E2
13
14
J
K
1
20
2FH4 A32FH5 A42FH6 E2
2 9
F
2FHG B4
H
3FHJ C12
2FJJ B8
FFHA E3
3FHK C12
FFHN B9
3FHM B125FH0 A25FH1 B2
FFHT C11
5FH3 D2
N
F
14
K
18
owne
r.
B
9 10 11 12
2FHE B4
3FH6 H33FH7 H33FH8 D93FH9-1 D9
2FJA C3
CFH1 D6
FFH1 B3FFH2 B3FFH3 C3
G
FFH5 E10
A
I
6
F
G
2FH8 E3
I
1F00 E122FH0 B5
M
2FH2 A3
9
6 7 8
2FJ5 F11
2FJ8 C22FJ7 D12
H3FHB-4 E103FHG C9
D
FFHM B9
6
FFHP B9FFHR C9FFHS C9
IFH4 A7
5FH4 E2
P
13
1
5
7543
2FHA A32FHB C32FHC B32FHD B4
2FHF B4
7FH0 B87FH2 C129FH0 D11
137
J
4
A
113 7
19
H
FPGA WOW - POWER & CONTROL
O
2FH1 B5
8
2FH3 A3
17
2FJ4 F11
2FJ6 F11
B
FFH7 E10FFH8 E10FFH9 E10
P
O
N
16
1715
E
B
10
2FH9 E3
DEBUG
6
11
8
6FH1 I26FH2 I2
H
9
6FH8 B12
198
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2FHW D32FHZ D32FJ0 D3
4
6FH7 I3
105
C
2
2012
2FJ1 D22FJ2 D22FJ3 F11
18
FFH6 E10
FOR
16
6FH3 I3
6FH0 I2
15
FOR DEBUG
L
D
6FH6 I3
2FH
Z
100n
RE
S
1K0
3FH
8
FFH5
2FH
C
10n
+2V5
4u7
2FH
M
CFH0
2FH
H
10n
FFH0
6FH
6
LTS
T-C
190K
GK
T
6FH
0
LTS
T-C
190K
GK
T
LTS
T-C
190K
GK
T
6FH
12F
J2
4u7
FFH3
5FH4
30R
100n
2FH
6
100n
RE
S
2FH
S
2FJ5 10
0p
LTS
T-C
190K
GK
T
6FH
7
470R
3FH
7
100K
3FH
J
RE
S
2FH
D
10n
+2V5-PLL
+2V5
100n
2FH
8
2FH
9
100n
3FH
9-4
1K0
470R
3FH
6
100n
2FH
5
2FH
V
100n
2FJC
100n
10n
2FJ7
RE
S
1
8
4
3
2FH
A
4u7
7FH0M25P16
6
5
7
2
FLASH
Φ16M
2FH
B
100n
+2V5
+3V3
FFHA
IFH4
4u7
2FJ8
100n
2FJ9
2FH
P
100n
FFHS
+1V2-PLL
10n
2FH
0
LTS
T-C
190K
GK
T
6FH
3
100p
RE
S
+1V2-PNX85XX
FFHT
2FJD
2FJK
100n
6FH
8
SM
L-31
0
7FH2BC847BW
+2V5in-FPGA
+3V3
10n
2FH
E
3FHG
47R
5
2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007
2008-11-21
Maelegheer Ingrid
2008-10-10 3
+2V5out-FPGA
A2
FPGA WOW - POWER & CONTROL
TV543 R2 LDIPNX 8204 000 8933
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
8
100n
2FJ0
130
FFHM
100n
RE
S2F
JJ
10n
2FH
G
+2V5
1 8
FFH2
3FHB-1
100R
3FH
3
470R
100p
2FJ4
RE
S
6FH
2
LTS
T-C
190K
GK
T
3FH
M
1K0
2FH
4
100n
10n
2FH
F
2FH
N
+3V3-FPGA
4u7
+1V2-FPGA
FFHN
470R
3FH
0
6
4V10
0u 2FH
L
100R
3FHB-33
100n
RE
S
2FH
R
FFH6
10n
2FJ6
FFH9
100R
3FHB-44 5
FFH1
4u7
2FJP
5FH1
30R
2 7
+2V5
3FHB-2
100R
+1V8-PNX5100
RE
S
9FH
0
100K
3FHK
2FH
J
100n
2FH
3
10n FFHP
+2V5in-FPGA
789
2FH
1
10n
1
10
23456
1F00
5-147279-2
470R
3FH
2
3FH
1
470R
FFH7
FFHR
+3V3
2FH
7
100n
2FJ3 10
0pR
ES
CFH1
+2V5
30R
5FH3
3FH
L
+1V8-PNX85XX
10K
2FJ1
100n
10n
2FH
K
100n
2FH
W
+2V5
+2V5
1K0
3FH
9-1
100n
2FJB
FFH8
5FH2
30R
3FH
9-3
1K0
330u 2F
HT
RE
S
6.3V
30R
5FH
0
FFH4
2FH
2
100n
2FJA
nCSO
ASDO
DATA0
100n
CON26
CON27
DCLK
CON23
CONF-DONE
CON20
CON21
CON22
TCK
TDI
TDO
TMS
18320_531_090728.eps090728
EN 120Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: FPGA WOW - DDR
14
9
VSSQVSS
13
4
BA
CS
5
2
CASWE
15
RAS
0
CKE
6
12
8
10
VDDQ
D
A
DQSLU
VDD
710
NC
1011
AP3
789
11
456
123
CLK
DMUL
VREF
10
CLK
C
2FLP A1
2FLA B8
1
B
8
I
7
2FL6 C1
D
H
11
C
D
5
3
126
F
6
E
2
3
4
C
D 3FLM B9
FPGA WOW - DDR
A
5
F
3
3FLE C4
2FL4 B4
E
12
7
5
2FL1 A12FL2 B32FL3 B4
J
8
B
13
2FL9 B6
2FLM C8
2FLS B4
I
3FLG D4
7
FFL0 B8
J
4
3FL8 C43FL9 C4
3FL3 C4
2FL0 A1
owne
r.
2FL5 B5
9
2FL7 B6
31
A
5
4
IFL1 C7
8
2FLF D7
C
H
2FLN C9
3FLN B9
2
3FL0 B43FL1 B43FL2 C4
FFL1 B7
2FLD C62FLE C6
D
E
A
1 2
G
C
2FLC B8
G
2 6 11
2FLK C8
A
1
2FLL C8
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
9
B
3FLF C4
4
3FLH D4
2FLB B8
10
3FL4 C4
5FL0 C75FL1 C77FL0 B2
8
E
3FL5 C4
3FL7 C4
7
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
9
2FLH C72FLJ C8
10
6
2FLR B4
B
9
3FLB C43FLC C43FLD C4
3FL6 C4
13
3FLJ D13FLK B63FLL B6
3FLA C4
100n2FL6
3FLG 22R
+2V5-DDR1
2FLP
100n
3FL43FL3 22R
22R
2FLK
100n
560R
3FLK
+2V5-DDR1
100n
2FLJ
100n
2FL1
2FL0
100n
100p
2FLC
1u0
2FLA
100n
2FL3
2FL2
100n
+2V5-DDR1
VREF-FPGA1
100n
2FLB
100n
2FLN
3FL1 22R22R3FL2
3FLL
560R
VREF-DDR1
100p
2FL7
22R3FLF3FLE 22R3FLD3FLC 22R
22R
22R3FLB
10u
2FL5
2FL4
100n
FFL1VREF-DDR1
2008-11-21
Maelegheer Ingrid
2008-10-10 3
A3
FPGA WOW - DDR
TV543 R2 LDIPNX 8204 000 8933
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
8 6
2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007
130
2FLH
22u
16V
2FLR
100n
3FL0
66 6 12 52 58 64
21
22R
9 15 55 61
49
34 48
23
47
51
1 18 33 3
16
1417192543505342
78
101113545620
4
575960626365
5
2627
22
444546
24
2
3132353637383940
DDRΦ
8Mx16SDRAM
2930
2841
7FL0
EDD1216AJTA-5B-E
1u0
2FL9
3FLM
560R
3FLN
560R
3FLA 22R22R3FL9
3FL8 22R3FL7 22R
100n
2FLL
5FL1
120RRES
5FL0
120R
22R3FL63FL5 22R
220R
3FLJ
3FLH 22R
+2V5-DDR1
FFL0
RE
S2F
LD
330u
6.3V
IFL1
2FLS
100n
2FLM
100n
2FLF
100n
+2V5
2FLE
100n
MM1-A12
+2V5-DDR1
DQ1(8)DQ1(9)
DQ1(10)DQ1(11)DQ1(12)DQ1(13)DQ1(14)DQ1(15) DQ1(15)
DQ1(0)DQ1(1)DQ1(2)DQ1(3)DQ1(4)DQ1(5)DQ1(6)DQ1(7)
DQ1(9)DQ1(10)DQ1(11)DQ1(12)DQ1(13)DQ1(14)
DQS11
DQ1(3)DQ1(4)DQ1(5)DQ1(6)DQ1(7)DQ1(8)
MM1-D14MM1-D15
MM1-DQS1MM1-DQS0DQS10
MM1-D9MM1-D10MM1-D11MM1-D12MM1-D13
MM1-D4MM1-D5MM1-D6MM1-D7MM1-D8
DQS11
MM1-WE
MM1-D0MM1-D1MM1-D2MM1-D3
MM1-CKE
MM1-CLK-
MM1-CS0
DQ1(0)DQ1(1)DQ1(2)
DQS10
MM1-RAS
MM1-A6MM1-A7MM1-A8MM1-A9
MM1-BA0MM1-BA1
MM1-CAS
MM1-CLK+
MM1-A0MM1-A1
MM1-A10MM1-A11
MM1-A2MM1-A3MM1-A4MM1-A5
18320_532_090728.eps090728
Circuit Diagrams and PWB Layouts EN 121Q549.3E LA 10.
2009-Aug-07
SSB: FPGA WOW - I/O Banks
VCCD_PLL4 VCCA4
GNDA4
VCCD_PLL3
GNDA3
CECONFIGDCLKSTATUSTCKTDITDOTMS
VCCA3
GND
GND
GND
GNDGND
GND
GND
GNDVCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCIO6
VCCIO1
VCCIO8
VCCIO5
VCCIO2
VCCIO4
VCCIO7
VCCIO3
VCCD_PLL1 VCCA1
GNDA1
VCCD_PLL2 VCCA2
CONF_DONE
MSEL0MSEL1MSEL2MSEL3
GNDA2
C
8
10
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
2 3
1615 20
1
D
4 5 6 7
A
P
D
15
2 17
N
D
62
G
F
C
144
2 3 4 51
F
G
H
2F43 E7
E
2FN7 D13
17
9 18
F
16
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
184
M
14 15
A
B
JJ
I
14
12
L
20
C
3
M
K
9FN7 E4
12
3F74-2 B42FN0 D92FN1 D9
2FN2 D92FN3 D92FN5 D12
2FN6 D13
12 13
B
91
1
13 19
G
13
K
IFN9 B13IFNA B15
7FN0-2 A67FN0-3 A107FN0-4 A13
8 9 10 11 12 13
A
B
C
E
3
N
118
E
H
7
owne
r.
155
IFNN D59FN8 D59FN9 D7
9FNA D79FNB D79FNC E7
6 7 8 9 10 11
3FNG E77FN0-1 A37FN0-10 F11
1411
O
H
6
10
B
7
A
O
P
19
IFN4 B9
IFN5 B9IFN6 B11IFN7 B11
IFN8 B13
C
D
E
F
G
H
9FN1 D49FN4 E49FN6 E49FN0 D4
IFNB B15IFNC D13IFND E11
IFNF D7IFNG D5IFNH D3
IFNJ D3IFNK D4IFNL D4
IFNM D5
I
5
FPGA WOW - IO-BANKS
L
9FND C9FF18 A1FF19 B1
FF48 B1IFN0 A2
3F74-3 B23F74-4 B53FN1 A1
3FN2 B13FN3 B13FNF E7 IFN1 A4
IFN2 B8IFN3 B8
7FN0-5 C17FN0-6 C57FN0-7 C10
7FN0-8 C137FN0-9 E4
+1V2-FPGA
9FN
1
+2V5out-FPGA
+2V5-PLL
1n0
2FN
2
+1V2-FPGA
+2V5-DDR1
+2V5in-FPGA
R16
R17IO_R17|VREFB5N2
R18IO_R18|VREFB5N3
T16IO_T16|RUP3
T17IO_T17|R54N
T18IO_T18
N14
P15
L18M14
IO_M14|R38N
M17IO_M17|R33N
M18IO_M18|R32N|DEV_OE
N15IO_N15|R55P
N16IO_N16|VREFB5N1
P17IO_P17|R42P
P18IO_P18|R42N
IO_R16|RDN3
P14
K17IO_K17|R29P
K18IO_K18|R29N
L13IO_L13|R38P
L14IO_L14|R36P
L15IO_L15|R36N
L16IO_L16|R33P
L17IO_L17|R32P|DEV_CLR_
IO_L18|VREFB5N0
BANK5
EP3C40F324C7N7FN0-5
N17CLK6|CLK_3P
N18CLK7|CLK_3N
+1V2-FPGA
+1V2-FPGA
+1V2-FPGA
+1V2-PLL
IFNL
+3V3-FPGA
IFN5
T7T9
C13
T10T12T15
C15E3E16F7
M13M16
C11
N3N6N8
N10N12
P3P16
T5
K8K9C8
K10K11K16
L8L9
L10L11M10
H10
C6
H11J3J8J9J10J11J16
K3C4
F9F11F13G3G6G9G16H8H9
GND
EP3C40F324C7N7FN0-10
F5
+2V5-DDR1+2V5-DDR1
H1IO_H1|VREFB1N3
H2IO_H2
H3IO_H3|DATA0
H6IO_H6|VREFB1N2
G5J1J6J5J2
E4
D1IO_D1|L8N|DATA1|ASDO
D2IO_D2|L8P
D3IO_D3|L7P
E1IO_E1|L10N
E2IO_E2|L10P|FLASH_CE_|CSO_
F3IO_F3|VREFB1N1
G1IO_G1|L20N
G2IO_G2|L20P
CLK1|CLK_0N
H5H4
E5
B1IO_B1|L1N
B2IO_B2|L1P
C1IO_C1|L3N
C2IO_C2|VREFB1N0
C3IO_C3|L4P|RESET_
BANK1
EP3C40F324C7N7FN0-1
K6
F2CLK0|CLK_0P
F1
4 5
+1V2-FPGA
47R 3F74-4
D11D13D15
D4D6D8
+1V2-FPGA
R9
R10R12R14
K15M15R15
F16G15J15
G12G13G7
F4G4J4
K4M4N4
R6R7
M7M8M9N11N13N7N9
F6F8G10G11
J12J7K12K7L12L7M11
F12
M12M6
VCC
EP3C40F324C7N7FN0-9
F10
G8H12H7
1n0
2F43
9FN
0R
ES
+2V5out-FPGA
+3V3-FPGA
47R
3F74-2
2 7
+1V2-FPGA
+3V3-FPGA
IFN6
+2V5out-FPGA
2FN
1
1n0
+2V5-DDR1
+1V2-FPGA
IFN9
1n0
2FN
7
+1V2-FPGA
IFNH
+1V2-FPGA
2FN
3
1n0
RESIFNM
+1V2-PLL
9FNA
+1V2-FPGA
+2V5out-FPGA
1K03FN1
IO_V13|B32NV13
IO_V14|B34NV14
IO_V15|B35NV15
IO_V16|B44NV16
IO_V17|B47NV17
IO_V18|PLL4_CLKOUTNV18
IO_U13|B32PU13
IO_U14|B34PU14
IO_U15|B35PU15
IO_U16|VREFB4N1U16
IO_U17|B47PU17
IO_U18|PLL4_CLKOUTPU18
IO_V11|B28NV11
IO_V12|VREFB4N3V12
IO_P13|VREFB4N0P13
IO_R11|B36NR11
IO_R13|B48NR13
IO_T11|VREFB4N2T11
IO_T13|RUP2T13
IO_T14|RDN2T14
IO_U11|B28PU11
IO_U12|B29PU12
7FN0-4EP3C40F324C7N
BANK4
CLK12|CLK_7NV10
CLK13|CLK_7PU10
IO_P10|B33PP10
IO_P11|B33NP11
IO_P12P12
+1V2-FPGA
9FN
4
+3V3-FPGA
+1V2-FPGA
FF18
+3V3-FPGA
+1V2-FPGA
VREF-FPGA1
P4
R2IO_R2|L45P
R3IO_R3|L52N
R4IO_R4
R5IO_R5|VREFB2N3
T1IO_T1|RDN1
T2IO_T2|RUP1
T3IO_T3|L52P
N5
L6IO_L6|VREFB2N0
M1IO_M1|L34N
M2IO_M2|L34P
M3IO_M3|VREFB2N1
M5IO_M5
P1IO_P1|L44N
P2IO_P2|L44P
R1IO_R1|VREFB2N2
K1IO_K1|L26N
K2IO_K2|L26P
K5IO_K5|L28P
L1IO_L1|L32N
L2IO_L2|L32P
L3IO_L3|L33N
L4IO_L4|L33P
L5IO_L5|L28N
BANK2
EP3C40F324C7N7FN0-2
N2CLK2|CLK_1P
N1CLK3|CLK_1N
P5
+1V2-PLL
IFN1
IFN7
+1V2-FPGA
+1V2-FPGA
IFNJ
IO_D9|T24P|PADD17D9
IO_E10|T25P|PADD15E10
IO_E6|VREFB8N3E6
IO_E7|T5N|DATA9E7
IO_E8|T8P|DATA6E8
IO_E9|VREFB8N0E9
IO_B6|T18P|DATA15B6
IO_B7|T19P|DATA4B7
IO_B8|T20P|DATA3B8
IO_C5|T11P|DATA5C5
IO_C7|VREFB8N1C7
IO_C9|T24N|PADD16C9
IO_D5|T3P|DATA12D5
IO_D7|VREFB8N2D7
IO_A4|T7N|DATA7A4
IO_A5|T16N|DATA14A5
IO_A6|T18N|PADD19A6
IO_A7|T19N|PADD18A7
IO_A8|T20N|DATA2A8
IO_B3|T4P|DATA11B3
IO_B4|T6P|DATA8B4
IO_B5|T16P|DATA13B5
BANK8
EP3C40F324C7N7FN0-8
CLK10|CLK_4NA9
CLK11|CLK_4PB9
IO_A1|PLL3_CLKOUTNA1
IO_A2|PLL3_CLKOUTPA2
IO_A3|T4N|DATA10A3
VREF-FPGA1
IFN8
3FN3 10K
RES
VREF-FPGA1
+1V2-FPGA
9FN9
+3V3-FPGA
VREF-FPGA1
+2V5in-FPGA
FF48
RES
E12IO_E12|T45P|PADD0
E13IO_E13|RDN4
E14IO_E14|RUP4
+2V5-PLL
9FNB
C12IO_C12|VREFB7N2
C14IO_C14|PLL2_CLKOUTN
C16IO_C16|T49N
D10IO_D10|T27P|PADD14
D12IO_D12|VREFB7N1
D14IO_D14|PLL2_CLKOUTP
D16IO_D16|T49P
E11IO_E11|VREFB7N3
A18IO_A18|T48P
B11IO_B11|T29P|PADD12
B12IO_B12|T31P|PADD10
B13IO_B13|T35P|PADD8
B14IO_B14|T36P|PADD6
B15IO_B15|T37P|PADD4
B16IO_B16|T41P|PADD2
C10IO_C10|T27N|PADD13
B10CLK9|CLK_5P
A11IO_A11|T29N|PADD11
A12IO_A12|T31N|PADD9
A13IO_A13|T35N|PADD7
A14IO_A14|T36N|PADD5
A15IO_A15|T38N|PADD3
A16IO_A16|T41N|PADD1
A17IO_A17|VREFB7N0
BANK7
EP3C40F324C7N7FN0-7
A10CLK8|CLK_5N
+2V5in-FPGA
V3
IO_V4|B17NV4
IO_V5|B18NV5
IO_V6|B24NV6
IO_V7|B26NV7
IO_V8|B27NV8
IO_U4|B17PU4
IO_U5|B18PU5
IO_U6|B24PU6
IO_U7|B26PU7
IO_U8|B27PU8
IO_V1|B1NV1
IO_V2|PLL1_CLKOUTNV2
IO_V3|B16N
IO_P9|B23NP9
IO_R8|B21PR8
IO_T4|VREFB3N3T4
IO_T6|VREFB3N2T6
IO_T8|B21NT8
IO_U1|B1PU1
IO_U2|PLL1_CLKOUTPU2
IO_U3|B16PU3
7FN0-3EP3C40F324C7N
BANK3
CLK14|CLK_6NV9
CLK15|CLK_6PU9
IO_P6|B6PP6
IO_P7|VREFB3N1P7
IO_P8|VREFB3N0P8
VREF-FPGA1
+1V2-FPGA
RES9FND
IFN4
2FN
6
1n0
+1V2-FPGA
IFNN
IFN0
FF19
+2V5in-FPGA
9FN
7
10K
3FN2
VREF-FPGA1
9FN8
+2V5-DDR1
9FNCRES
E15
+2V5in-FPGA
IFNC
H16IO_H16|R23N
H17IO_H17|R28PH18
IO_H18|VREFB6N2J13
IO_J13|VREFB6N3
K13J18J17J14
F14
E17IO_E17|R24P|CLKUSRE18IO_E18|R24N|CEO_
G14IO_G14|R7N|PADD23
G17IO_G17|R27P|CRC_ERRORG18IO_G18|R27N|INIT_DONE
H13IO_H13|R8P|RDYH14IO_H14|R8N|AVD_
H15IO_H15|VREFB6N1
F18CLK5|CLK_2N
K14
F15
B17IO_B17|VREFB6N0
B18IO_B18|R4N|PADD20C17IO_C17|R5P|PADD21C18IO_C18|R5N|PADD22
D17IO_D17|R12P|OE_D18IO_D18|R12N|WE_
BANK6
EP3C40F324C7N7FN0-6
F17CLK4|CLK_2P
+2V5out-FPGA
VREF-FPGA1
+2V5in-FPGA
+3V3-FPGA
+1V2-FPGA
+1V2-FPGA
+1V2-FPGA
IFND
IFN2IFNA
+3V3-FPGA
IFNF
1n0
2FN
0
+1V2-FPGA
+1V2-FPGA
+1V2-PLL
IFNK
1n0
2FN
5
IFN3
VREF-FPGA1
+2V5out-FPGA
+2V5-PLL
+2V5-DDR1
IFNG
+1V2-FPGA
+1V2-FPGA
100R3FNG
+3V3-FPGA
47R3F74-3
3 6
+1V2-FPGA
IFNB
100R3FNF
TV543 R2 LDIPNX
FPGA WOW - IO-BANKS
A2130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20072007-12-06
78
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8933
9FN
6
nCSO
nSTATUS
MSEL2MSEL1
MSEL3
+2V5-PLL
TX851CLK-
TX851CLK+
CLK-OUT2-PNX5100CLK-OUT-PNX5100
TX851B+TX851B- MM1-A2
MM1-A4
ASDO
TX851D-TX851B+
TX851C+
TX851A-TX851A+
TX851D+
TX851E-TX851E+
TX851C-
DCLKnCONFIGnCE
MSEL0
CLK-OUT2-PNX5100
SCL-AMBI-3V3
SDA-AMBI-3V3
BACKLIGHT-OUTBACKLIGHT-CONTROL-FPGA-IN
SDA-SSBSCL-SSB
TDOTMS
nCEnCONFIG
nSTATUSTCKTDI
MM1-D15
MM1-D11
MM1-A5
MM1-D9
MM1-D14MM1-A8 MM1-DQS0
MM1-A6
MM1-DQS1
MM1-D10
MM1-D12
MM1-D13
MM1-A12
MM1-A11
MM1-A9
MM1-A7
MM1-BA1MM1-BA0
MM1-CLK-MM1-CLK+
MM1-CKE
MM1-D8
MM1-D4
MM1-RAS
MM1-D6
MM1-A3MM1-WE
MM1-A1
MM1-D0
MM1-D3
MM1-D5
MM1-CAS
MM1-D7
MM1-A0
MM1-A10
MM1-D2
CON22
CON21CON20MM1-D1
MM1-CS0
TX852D-
TX852C-
TX852B-
TX852A-
CONF-DONE
BACKLIGHT-OUT2
CON27
CON26
CON23
TX852E+
TX852D+
TX852C+
TX852B+
TX852A+
TX852E-
TXF2C-
TXF2CLK-
TXF2D-
TXF2E-
TX852CLK-
TX852CLK+
TXF2B+
TXF2C+
TXF2CLK+
TXF2D+
TXF2E+
TXF2A-
TXF2B-
TXF1C+
TXF1CLK-TXF1CLK+
TXF1D-TXF1D+
TXF1E-TXF1E+
TXF2A+DATA0
TXF1A-TXF1A+
TXF1B-
TXF1B+
TXF1C-
18320_533_090728.eps090728
EN 122Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: CI: PCMCIA Connector
G3
12
3EN23EN1
+T
C
G3
12
3EN23EN1
H
10
3
11
2
F
3P09 A2
owne
r.A
E
C
F
7
D
1P00-A B1
C
3P85-2 E8
A
7
3P13-3 A63P24 D6
D
8
1 9
D B
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
B
82P16 C8 3P27-4 E6
RESERVED
13
E
12
4
H
3P11 C7
3
1P00-B B5
5
3P27-3 E6IP04 A6
C
9
3P10-2 A6 3P80-4 B9
2
3P82-1 D9
A
5
12
2P15 A8
2
I
F
I
3P10-4 A6
C
J
3P12 A6
9
1
3P83-4 D9
8
13
3P10-1 A63P85-1 E8
J
3P13-1 A6
3P87 E8
3P20 D2 7P15 A8
6
3P26-1 E6
3P26-2 E6IP01 A6
J
IP18 D2
9
CABLE CARD INTERFACE
6I
3P84-4 E8
4
10
CI : PCMCIA CONNECTOR
2
3P27-2 E6IP03 A6
3P80-1 B93P80-2 B9
10
3P81 B9
H
4
3P82-3 D9
3P82-4 D9
B
87
3P84-3 E8
B
3
3P27-1 E6
6
6 11
2P40 A2
5
E
E
3P85-3 E83P85-4 E8
3P13-2 A6
7
3P88 E8
A
3P25 E6 FP04 A2FP05 D6
B
IP00 A6
G
IP08 D2
E
3P26-4 E6A
ll rig
hts
rese
rved
. Rep
rodu
ctio
n in
who
le o
r in
par
ts
J
1
3P26-3 E6
4
10
3P84-1 E8
IP05 A6
1
3P80-3 B93P84-2 E83P82-2 D9
C
7P16 C8
D
IP02 A6
A
G
5
3P86 E83P83-3 D9
D
3
G
IP09 C9
5
2
47R3P85-4
3P80-247R
3P83-447R
4
FP04
3P80-1147R
47R3P85-18
447R
3P80-4
3P27-4
10K4
+3V3
47R3P84-18
23P27-2
10K3P8747R
3P27-33
10K
PCMCIA-VCC-VPP
PCMCIA-VCC-VPP
EMC HOLE1X06
100n
2P16
10K
3P13-1 18
47R3P83-33
WAIT
71 72
61REG
58RESET
51VCC2
52VPP2
43VS1
57VS2
59
41D15
64D8
65D9
35GND3
68GND4
60INPACK
44IORD
45IOWR
36CD1
67CD2
42CE2
66D10
37D11
38D12
39D13
40D14
49A20
50A21
53A22
54A23
55A24
56A25
63BVD1|STSCHG
62BVD2|SPKR
ROW_B1P00-B
46A17
47A18
48A19
FP05
22u
2P40
6
3P25
10K
47R3P84-3
131211
1
10
19
20
456789
18
17161514
74LVC245A7P16
2
3
3P80-347R
3
7
PCMCIA-VCC-VPP
3P85-247R
5 3P84-447R
3P11
100K
210K
3P26-2
2P15
100n
1810K
3P10-1
3P09
0R4
3P82-347R
3
3P27-11
10K1
10K
3P26-1
IP08IP18
2
4
3P82-247R
47R3P82-4
IP03
PCMCIA-VCC-VPP
3P8147R
IP09
IP05
10K
3P24
CHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8948 DIGI i/O TV543 R2 LDIPNX_ET
UFD2K8
A3130De Pauw B
2009-01-22
ROYAL PHILIPS ELECTRONICS N.V. 20072009-01-22
18
SETNAME
3P85-347R
647R3P88
IP00
47R3P86
3P26-33
IP01
10K
27 3P13-2
10K
RES
10K
3P12
1X05REF EMC HOLE
+3V3
PCMCIA-VCC-VPP
147R
3P82-1
+3V3
IP02
3P10-2
10K27
1
10
19
20
89
18
17161514131211
74LVC245A7P15
2
34567
4510K
3P10-4
10K
3P2033
GND1
GND234
69 70
9OE
16RDY|BSY
17VCC1
18VPP1
15WE|P
WP|IOIS16
D0
31D1
32D2
2D3
3D4
4D5
5D6
6D7
1
A325
A424
A523
A622
A7
12A8
11A9
7CE1
30
A10
10A11
21A12
13A13
14A14
20A15
19A16
27A2
26
1P00-A
29A0
28A1
8
ROW_A
7
IP04
3P84-247R
3P13-3
10K36
10K
3P26-44CA-MDO0CA-MDO2CA-MDO1
MOVALMOSTRT
MDO0
MDO1MDO2
CA-MDO6CA-MDO5MDO5
MDO6
CA-RST
MDO7 CA-MDO7
MOCLK_VS2 CA-MOCLK_VS2
CA-MOCLK_VS2
CA-MOVALCA-MOSTRT
CA-MDO0
CA-MDO1CA-MDO2
MOVALMOSTRT
MDO0
MDO1MDO2
CA-MOVALCA-MOSTRT
MDO3
MDO4
MDO7
MOCLK_VS2
CA-MDO3
CA-MDO4
CA-MDO7
MDO3 CA-MDO3MDO4 CA-MDO4MDO5 CA-MDO5MDO6 CA-MDO6
PCMCIA-A8PCMCIA-A9 CA-IOWR
MOCLK_VS2
PCMCIA-A14
CA-INPACK
MOCLK_VS2
+5V
PCMCIA-D6PCMCIA-D7
PCMCIA-A10
PCMCIA-A11
PCMCIA-A13
PCMCIA-A12
PCMCIA-A3PCMCIA-A2PCMCIA-A1PCMCIA-A0PCMCIA-D0PCMCIA-D1PCMCIA-D2
CA-MISTRT
PCMCIA-A4
PCMCIA-A6PCMCIA-A5
MOSTRT
MOVAL
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
CA-INPACK
CA-VS1
CA-CD2
CA-CD1
IRQ-CA
CA-WAIT
PCMCIA-D3PCMCIA-D4PCMCIA-D5
CA-MDI7
CA-RSTCA-WAIT
CA-REGMOVAL
MOSTRTMDO0MDO1MDO2
CA-CD2
CA-CE1
CA-OE
CA-WEIRQ-CA
CA-MIVALCA-MICLK
PCMCIA-A7
CA-CD1MDO3MDO4MDO5MDO6MDO7
CA-CE2CA-VS1
CA-IORD
CA-MDI0CA-MDI1CA-MDI2CA-MDI3
CA-MDI4CA-MDI5CA-MDI6
18320_534_090728.eps090728
Circuit Diagrams and PWB Layouts EN 123Q549.3E LA 10.
2009-Aug-07
SSB: Audio In HDMI
C
3 4
B
2P11 D4
3
2
6P01 B3
7
J
11
A
D
B
C
1
1P0A B21P0B D2
G
4
owne
r.
D
7
A
10
2P06 B22P07 B3
5
F
9
5
3P06 B4
1210
5 6
D
3P08 D4
1P9A B31P9B D3
13
F
13
2P09 D22P10 D3
C
D
7
5
1
FP02 B2FP24 D2
3
AUDIO IN HDMI
8
J
G
6
1 2
H
E
12
6 7
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
3P07 D3
4
I
6P02 D3FP01 D2
B
A
2P08 B4
3
E
A
6
IP06 B4IP07 D4
E
8
3P05 B3
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
9
2
H4
B
11
C
2
E
1
I
C
2P10
100n
6P02
BZ
X38
4-C
V_N
OM
1P9B
FP24
2P09
1n0
RE
S
RE
S
100p
2P08
100K
3P06
RE
S
1K0
3P05
100n
2P07
BZ
X38
4-C
6P01
1P9A
V_N
OM
1n0
2P06
CHECK
8204 000 8948 DIGI I/O TV543 R2 LDIPNX_ET
UFD2K8
A3130De Pauw B
2009-01-22
ROYAL PHILIPS ELECTRONICS N.V. 20052009-01-22
28
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATE
1
2
2
YKB11-3004
1P0B
1P0A
YKB11-3004
1
+12V
+12V
2P11
100p
3P08
100K
RE
S
3P07
1K0
RE
S
IP07FP01
IP06FP02AUDIO-IN4-L
AUDIO-IN4-R
18320_535_090728.eps090728
EN 124Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: USB Connector
C
+T
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
C
53
I
5P07 A29P21 C39P22 C3
FP27 C3FP28 C3FP29 C3
E
H
CONNECTOR
G G
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
J
4
FP2A C3FP45 B1IP12 A2
F
IP13 C2IP19 C2
I
2
2
B
4
1 2 3 4
A
B
C
6
1
4
D
J
5
B
C
1P07 C4
F
A
2P27 A12P30 A1
2P31 A13P60 B23P62 B23P17 A2
3P18 A23P19 A33P21 A3
3P23 A43P55 A43P56 A4
3P59 A2
owne
r.
3
31
D
E
6
USB CONNECTOR
B
1
A
2
C
H
A
1P10 C22P17 A1
2P24 B23P16 A2
USB
IP12
FP28FP29
FP27
220R
5P07
130
ROYAL PHILIPS ELECTRONICS N.V. 20072009-01-22
38
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8948TV 543 R2 LDIPNX_ET
DIGI I/O UFD2K8
A4De Pauw B
2009-01-22
16V
2P27
220u
10V
330u2P
30
22u
2P31
FP45
16V
220u2P
17
+5V
3P62
100K
+5V
+3V3
RE
S10
0R
3P56
3P55
100R
3P23
100R
100R
3P21
IP19
IP13
3P19
100R
9P22
6 7
9P21
502382-0570
1P10
12345
3P18
180R
RE
S
RE
S
180R
3P17
RE
S3P
16
180R
3P60
56K
3P59 0R
4
FP2A
6.3V
47u2P
24
1234
5 6
USB20-DMUSB20-DP
1P07
292303-4
USB-OC
18320_536_090728.eps090728
Personal Notes:
10000_012_090121.eps090121
Circuit Diagrams and PWB Layouts EN 125Q549.3E LA 10.
2009-Aug-07
SSB: HDMI
XTAL
01
I2C
SEL
HP_CTRL
C
RXAD0
+D1
-+
D2-
RXB
C
+-
D0
+-
D1
+-
D2
+-
RXC
C
+-
D0
+-
D1
+-
D2
+-
RXD
C
+-
D0
+-
D1
+-
D2
OUT
C
+-
D0
+-
D1
+-
D2
DDC
RXA DDC
5VCLKDATHPD
RXB DDC
5VCLKDATHPD
RXC DDC
5VCLKDATHPD
RXD DDC
CDEC
VD
DC
_1V
8 VDDH_3V3
VSS
VD
DS
_3V
3
VD
DO
_3V
3
VD
DO
_1V
8
VD
DH
_1V
8
VD
DC
_3V
3
5VCLKDATHPD
NC
DDCSTBY
CEC
TEST
+-
R12K
PD
DATCLK
MODE
+-+-
+-
OUT
IN
SCLSDA
INT
C
COM
OUTIN
BP5J H2BP5K H2BP5L H2
BP5N I2BP5P I2BP5R I2BP5S I2
FP13 B1FP14 B2FP15 B1
20
FP09 G1FP0A G1FP0C G1FP0E D1
F
A
HDMI CONNECTOR 3
O
FP0P D1FP0R I1
FP0S I1
BP1R B2
12
FP17 I1FP20 B11
FP26 D12
BP1W I1BP5A C2BP5B C2BP5C C2
FP39 C12FP40 C11
14
BP5H D2
14
IP10 G12IP11 H12IP17 F13
F
H
G
1375
7P02 D10
P
IP5Y G6
BP1A F2BP1B F1BP1C F2BP1D F1
IP5Z H6IP60 H13
FP0T I2
FP12 B1
4
11
9
20
BP1F F1BP1G F2
K
N
BP1M A2BP1N A2BP1P A2
3P61 B4
FP0U I2FP0W I1FP10 B1FP11 B1
3P67 F33P68 G33P75 G53P76 E9
FP41 C10FP42 A6FP43 H12FP44 F13
17
A
5
HDMI CONNECTOR 1
6 10
5P08 C12
FP21 E9FP22 H12FP23 I10FP25 D8
5P15 H136P03 G137P01 A6
2P52 D13
BP5E D2BP5F D2BP5G D2
2P57 F122P58 G122P59 G123P14 F13
IP26 H5IP5U G6IP5V G7
P
E
FP03 F14FP06 F1FP07 F1FP08 G1
H
19
NFP0F D1FP0G D2FP0H D2FP0J E1
3P47 H143P53 H53P58 B4
I
BP1S B2BP1T B1BP1U E1BP1V G1
E
F
G
H
FP16 G1
18
I
12
2P41 D92P42 D92P43 D122P44 C10
M
owne
r.
G
2P49 A62P50 D122P51 D12
17
7P12 H57P32 G69P0J G79P33 E9
13 14
A
B
BP5M H2
L
M
F
HDMI
9
G
D
19
B
BP1H F2BP1J A2BP1K A2BP1L A2
F
G
H
1
3P63 D43P64 D43P65 I43P66 I4
6 7 8 9
BP5D C2
18
3
14
1 2 3
I2C Address = 0xCE
C
8 9 10 11
5P11 B105P12 C105P13 C105P14 C10
H
E
K
2P53 D132P54 D132P55 D132P56 F12
16
IBP1E F2
2
C
L
1P05 H12P03 C62P05 C102P28 H13
1
RES
B2P36 D102P37 D102P38 D92P39 D9
RES
3P36 F143P38 H63P43 E9
D
O
J
HDMI CONNECTOR SIDE
A
B
C
D
3
Remark for service:
Replacing the TDA 9996
3P77 E9
I
Requires reprogramming
of its I2C address from 0xC0 to 0xCE
7
6
B
8
1P02 E11P03 C11P04 A1
2P32 H13
2P45 C112P46 B102P47 C102P48 A5
2P33 I122P34 D122P35 D12
15
11
C
12
10
HDMI CONNECTOR 2
13
3P34 E14
16
4
15
10A
ll rig
hts
rese
rved
. Rep
rodu
ctio
n in
who
le o
r in
par
ts
D
J
E
11 12 13
4
8
D
E
5 6 7
2 3 4 5
I
1 2
22K
CIN-5V
C
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
BP1P
3P38
FP06
BP1F
1V8-HDMI
BP1V
DIN-5V
BP1U
3P43
1K0
1%12K
3P14
47K 3P
63
1V8-HDMI
FP0F
BP5B
FP11
DIN-5V
CIN-5V
+3V3
2P47
22u
3P58
47K
BIN-5V
2P49
10u
9P33
+3V3
3P65
47K
+5V
IP10
1K83P
34
100n
2P45
100n
2P28
BP1N
BP1E
BP1L
FP0R
2P48
100n
6P03
BAT54 COL
+3V3
FP0S
FP20
+1V8-PNX85XX
FP14
FP0E
100n
2P44
47K
3P66
2P53
BP1M
100n
IP60
CIN-5V
+5V
BP1R
6.3V
22u2P
05
BP5K
100n
IP11
2P52
FP07
DIN-5V
FP03
AIN-5V
BIN-5V
5P08
30R
IP17
FP08
FP41
FP40
47K
3P67
3P68
47K
5P11
FP17
30R
220u2P
03 16V
2P59100n
2P54
100n
2P58
AIN-5V
100n
BP1B
BP1S
REF-3V3
BP1G
FP12
FP43
FP13
56 67 73
51
52
55
1 85 92 987 18 26 37 43
75 15 21 34 40 64 70 82 8895 4
8180
797876
27
8 45 91 4624
616058
77
848387869089
3028
596362666569687271
9
29
3332363539384241
31
1413171620192322
1211
99100
96979394
56
48
74
10
4454
57
5049
53
47
25
23
Φ
7P02TDA9996
FP25
100R
3P77
3P76
100R
2P50
100n
REF-3V3
89
20212223
1516171819
234567
DC1R019JB1E400
1
1011121314
1P05
BP5E
5P12
30R
IP5Z
100n
2P55
47K 3P
61
+5V-EDID
3P64
47K
BC847BW7P32
BP5M
FP10
2P57100n
BP5S
BP5J
+3V
3BP1H
3P36
1K8
FP39
IP5U
FP26
100n
2P35
IP5V
FP0J
100R
3P75
100n
2P43
100n
2P42
BP5R
FP44
3P53
22K
FP227P12BC847BW
89
202122232425
26
16171819
234567
1
101112131415
1P02
DC1R019WBER220
FP0H
100n
2P34
IP26
100n
2P39
AIN-5V
30R
5P13
FP15
DIN-5V
BIN-5V
+5V
100n
2P36
+3V3
9P0J
BP5P
IP5Y
FP0P
BP1K
1X07EMC HOLE
100n
BP5H
2P37
2526
5P14
30R
456789
2021222324
1213141516171819
23
1P04
DC1R019WBER220
1
1011
BP5F
FP0W
4
2009-01-22 ROYAL PHILIPS ELECTRONICS N.V. 2005
2009-01-22
De Pauw B A2
UFD2K8
DIGI IO TV543 R2 LDIPNX_ET 8204 000 8948
CHECK DATE
NAME
1
SUPERS.
CLASS_NO
EMANTESNHC
8
3P47
4R7
130
30R
5P15
BP1D
BP1C
FP42
BIN-5V
CIN-5V
2P32
100n
BP5G
2P38
BP5L
100n
100n2P56
BP5C
FP21
BP5D
BP1T
FP0G
AIN-5V
+3V3
FP0U
1
3 2
BP1A
7P01LD1117DT18
100n
FP0C
2P41
BP1J
FP0A
FP0T
BP1W
FP16
+3V3-STANDBY
+3V3
100n
2P46
BP5N
2122232425
26
FP23
19
23456789
20
1
101112131415161718
1P03
DC1R019WBER220
BP5A
100n
2P33
100n
2P51
FP09
ARX1+ARX0-ARX0+
PCEC-HDMI
WRITE-PROT
WC-EEPROM-PNX5100
CRX1+CRX0-CRX0+
BRXC-BRXC+
BRX2-BRX2+BRX1-BRX1+BRX0-BRX0+
ARXC-ARXC+
ARX2-ARX2+ARX1-
HDMIB-RX1-
HDMIB-RX0-
HDMIB-RXC-
DRXC-DRXC+
DRX2-DRX2+DRX1-DRX1+DRX0-DRX0+
CRXC-CRXC+
CRX2-CRX2+CRX1-
CRX-DDC-SDACRX-DDC-SCL
BRX-DDC-SDABRX-DDC-SCL
ARX-DDC-SDAARX-DDC-SCL
DDC-SDADDC-SCL
HDMIB-RX2+
HDMIB-RX1+
HDMIB-RX0+
HDMIB-RXC+
HDMIB-RX2-
DRX-HOTPLUG
CRX-HOTPLUG
BRX-HOTPLUG
ARX-HOTPLUG
SDA-SSB
SCL-SSB
DRX-DDC-SDADRX-DDC-SCL
DRX-DDC-SDA
CRX-DDC-SCLCRX-DDC-SDA
PCEC-HDMICRXC-
CRXC+
CRX2+
ARX-DDC-SDAARX-DDC-SCL
BRX-DDC-SCLBRX-DDC-SDA
DRX-DDC-SCLDRX-DDC-SCL
PCEC-HDMIDRXC-
DRXC+
DRX2+
CRX0-
CRX0+CRX1-
CRX1+CRX2-
CRX-HOTPLUG
CRX-DDC-SDACRX-DDC-SCL
BRX-DDC-SDABRX-DDC-SCL
PCEC-HDMIBRXC-
BRXC+
BRX2+
DRX0-
DRX0+DRX1-
DRX1+DRX2-
DRX-HOTPLUG
DRX-DDC-SDA
ARX-HOTPLUG
ARX2-ARX1+
ARX1-ARX0+
ARX0-
BRX0-
BRX0+BRX1-
BRX1+BRX2-
BRX-HOTPLUG
PCEC-HDMI CEC-HDMI
ARX2+
ARXC+
ARXC-PCEC-HDMI
ARX-DDC-SCLARX-DDC-SDA
18320_537_090728.eps090728
EN 126Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: HDMI Switch
SCLADR
012 SDA
WC
C
A
I
G
F
1
3P29 B6
1
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
12
D
3P22 B53P28 B5
9P29-3 D29P29-4 D29P30-1 E29P30-2 E29P30-3 E29P30-4 E2
BP52 A1BP53 A2BP54 A1
I
11
HDMI SWITCH
B
8
B
HDMI CONNECTOR 4
11
C
HDMI 4
8 9
A
B
C
D
E
9P19 A69P20 A6 C
IP14 A6IP15 A6IP16 B5IP20 C4IP23 C5
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
7
12
1 2 3 4 5
D
E
1M96 D11P06 A12P04 A52P12 A52P23 E62P60 B13P15 C5
6 7
3 8
5
owne
r.
BP55 A1BP56 B2BP57 B1BP5Z B1FP00 B1FP0B A4FP30 B1FP31 B1FP32 B1
E
6
J
2 3 4 5
G
13
5P06 A56P06 D67P07 B47P17 C5
H H
D
EDID0
IP28 B4IP68 C6
9P32-1 D19P32-2 D19P32-4 D1BP50 A1BP51 A2
A
EDID NVM9P31-1 E2
3P31 B53P32 C63P33 C43P35 C3
6
B
C
97
FP33 B1FP34 B1FP35 B5FP36 D1FP37 D2FP38 D2
9
J
9P31-2 E29P31-3 E29P31-4 E2
42
3
E
6 7 8 9
1
42 10
5 10
F
A
13
3P30 B5
IP16FP32
IP15FP0B
EIN-5V
9P29-4 45
FP38
EIN-5V
2P04
100n
+5V-DDC
EIN-5V+5V-EDID
9P30-33 6
BAT54
6P06
3P29
47K
IP28
BP51
100n
2P12
18
2P23
100n
IP68
9P32-1
100n2P60
FP00
IP20
IP23
9P30-11 8
FP34
9P31-44 5
+5V-DDC
9P19
BP55
10K
3P32
3P28
47K
9P30-44 5
FP35
22232425
26
23456789
2021
1
10111213141516171819
DC1R019WBER220
1P06
EIN-5V
FP37
2 7
120R
9P31-2
5P06
22R
3P30
9P31-11 8
45
22R
3P31
9P32-4
3P35
1K0
2 7
BP5Z
9P30-2
FP30
3P33
22R
IP14
BP56
BP54
BP52
BP53
FP36
FP31
BP57
10K
9P20
3P22
FP33
9P31-33 6
9P32-2 27
36 9P29-3
5
2009-01-22 ROYAL PHILIPS ELECTRONICS N.V. 2006
2009-01-22
De Pauw B
BC847BW7P17
A3
UFD2K8
DIGI I/O TV543 R2 LDIPNX_ET 8204 000 8948
CHECK DATE
NAME
1
SUPERS.
CLASS_NO
EMANTESNHC
8 130
RES
10K
3P15
6
5
84
7
M24C02-WDW6
EEPROM
Φ(256x8)
123
BP50
7P07
2324252627282930
21
3456789
22
31
111213141516171819
2
20
1M96
FI-RE21S-HF-R1500
1
10
ERX-HOTPLUG
ERX-DDC-SDA
ERX-DDC-SDA
ERX-DDC-SCL
HOT-PLUG-A
HDMIA-RX1-HDMIA-RX1+HDMIA-RX2-HDMIA-RX2+
ERX-DDC-SCL
PCEC-HDMI
HDMIA-RXC-HDMIA-RXC+HDMIA-RX0-HDMIA-RX0+
HDMIA-RXC+
ERX-HOTPLUG
ERX-DDC-SDAERX-DDC-SCL
HDMIA-RXC-
HDMIA-RX2-
HDMIA-RX2+
ERX-HOTPLUGWRITE-PROT
PCEC-HDMI
DDCA-SCL
DDCA-SDAHDMIA-RX1+
HDMIA-RX1-HDMIA-RX0+
HDMIA-RX0-
18320_538_090728.eps090728
Circuit Diagrams and PWB Layouts EN 127Q549.3E LA 10.
2009-Aug-07
SSB: PNX8543: Flash
C
BRWP
VCC
VSS
IO
NC
01234567
CLEALECEREWE
I
9
7P10 C5
3P42 E3
A
2
M
4 149
PNX 8543 : FLASH
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
15
H
N
3P44 D3
8
M
17
3P40-4 D3
6
5
IP24 E5
7
8
3P40-1 D3
IP29 B5
7
I
B
C
P
5P09 B1
3P48-2 E33P48-3 F33P48-4 F3
1
6 16
F
3P57 C11
13
12 13
20
O
K
EC
D
20
A
2P14 C73P37 C1
3P39-2 C33P39-3 C33P39-4 D3
F
3
G
18
3P40-3 D3
11
G
7
1M97 C12
4
2P13 C6
K
J
1 5
B
2 3
3 4 5
12 13
9 10
N
P
7 18
IP27 D5
E
L
F
1 11
owne
r.
J
11
B
A
E
9
2
H
19
5
I
103
E
12
L
3P40-2 D3
O
1
F
D
8
6
15
D
G
H
4
3P48-1 E3
10
C
12
17
H
19
13
6
2
6
+3V3-NAND
8
I
11
B
C
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
IP30 E4
16
G
A
3P39-1 C3
14
D
10
3P48-3100R
3
10K
3P57
+3V3
100R1 83P48-1
2 73P40-2100R
2K2
3P44
1 8
+3V3-NAND
100R3P39-1
+3V3-NAND
+3V3-NAND
CHECK
8204 000 8948 DIGI I/O TV543 R2 LDIPNX_ET
UFD 2K8
A2130De Pauw B
2009-01-22
ROYAL PHILIPS ELECTRONICS N.V. 20072009-01-22
68
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATE
2526 2728 29
3456789
22 2324
111213141516171819
2
2021
1M97
FI-RE21S-VF-R1300
1
10
3 6100R
3P39-3
IP30
2 73P39-2100R
3P37
10K
3 6100R
3P40-3
14
8
7
12 37
13 36
1819
45464748
3456
1011
2425262728
2
333435383940
41424344
1
1520212223
7P10NAND01GW3B2BN6F
Φ[FLASH]
1G
179
16
29303132
+3V3-NAND
3P40-4
100R
4 5
100R3P48-2 2 7
3P42
10K
5P09
30R
IP24
IP29
4 53P39-4100R
2P14
100n
IP27
100R3P40-1 1 8
100n
4 5
2P13
100R
3P48-4
I2C-SDAI2C-SCL
RESET-BOLT-ON
TSO-BIT-CLKTSO-BIT-VALIDTSO-SYNCTSINO-DATA0TSINO-DATA1TSINO-DATA2TSINO-DATA3TSINO-DATA4TSINO-DATA5TSINO-DATA6TSINO-DATA7
NAND-REn
NAND-AD(7)NAND-AD(6)NAND-AD(5)NAND-AD(4)NAND-AD(3)NAND-AD(2)NAND-AD(1)NAND-AD(0)
NAND-CLE
XIO-SEL-NANDNAND-ALE
XIO-ACK
PCI-CBE2
NAND-CLENAND-ALENAND-WEnNAND-REn
XIO-SEL-NAND
XIO-ACK
WP-NANDFLASH
WP-NANDFLASHNAND-WEn
PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29PCI-AD30PCI-AD31
NAND-AD(0)NAND-AD(1)NAND-AD(2)NAND-AD(3)NAND-AD(4)NAND-AD(5)NAND-AD(6)NAND-AD(7)
PCI-AD0PCI-AD1PCI-CBE1
18320_539_090728.eps090728
EN 128Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Ethernet
2728293031
PCICLKFRAME
23IRDYTRDYSTOP
01234567891011121314151617181920212223242526
PMEPWRGOOD
VAUXDETEEDIO
EECSEECLK|GPO4
123
AUTOMDIX_ENXI
XO
NC
EXRES
+-
VSS
VDD18VDD33PLL TX VDD33VDD33A
DEVSELPAR
PERRSERR
INTIDSEL
PCIRST01
(CORE)(IO)(BIAS)VDD18
AD
CBE
TPI
+-
TPO
GPIO<0:2>
LED
GPO3
GPO4
REQGNT
C
2N0P G22N0Q G22N0V H22N0W H22N0Y G4
IN0U H2IN0V E8IN0W D9IN0Y E9IN0Z D9
1 2 3 4
IN10 E9IP0J F2IP33 D7IP34 D7IP35 D7
20
4 18
4
G
7
16 20
5
F
G
H
1N00 F121N02 E82N0K F82N0L F8
4 5 6 7 8
2N0Z G42N10 G32N11 G42N12 G32N13 G3
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
11
12
K
19
owne
r.
17
9
1
B
D
E
F
G
H
5 6 7 8 9
B
8
1
I
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
14
L
C
ETHERNET CONNECTOR
10 11 12 13
1 2 3
3N0K E103N0V E83N0W E73N0Y F13P69 E7
9 10 11 12 13
10
1715
D
183
H
D
16
A
B
C
IN0T E8
2 11
A
B
C
D
E
2N14 G32N15 G32N16 G22N17 G22P63 H22P64 H22P65 G92P66 G92P67 G92P68 G102P69 G102P70 B52P71 B52P72 B52P73 B62P74 B62P75 B62P76 G42P77 G43N0G D73N0H E83N0J D9
19
F
12
3P70-1 F93P70-2 F93P70-3 F93P70-4 F103P71 F105N06 G15N07 H15N08 B66N00 D96N01 E97N04 C4BN0A F11BN0B F11BN0C F11BN0D F11FN05 F11FN06 F11FN07 F11FN08 F11FN09 G12FN0A D10FN0B E10FN10 D10FN15 F11IN0K E7IN0L G2IN0M E8
J
E
L
6
G
5
N
P
6 7 8
A
O
ETHERNET
E
139
A
F
3101
O
M
2
P
RES
J
3
I
H
15
K
M
2N17
100n
C
N
14
+3V3-ET-ANA
IN0V
BN0C
2N0Y
100n
+3V3-ET-ANA
2P77
100n
2P76
100n
FN0B
220R
5N06
3P6910K
220R
5N07
100R
BN0D
3N0G
12K
4
3N0W
10K
3N0Y
+3V3-ET-DIG
100n
2P73
4u7
2P75
RE
S2P
71
10n
10n
2P74
100n
RE
S
+3V3-ET-DIG
2P70
NX5032GB
1N02
25M
2N0W
100n
IN0W
BN0A
IN10
IN0Y
2N12
100n
IN0M
6N00
BAS316
FN0A
100n
2N16
270R
3N0J
1M0
3N0V
100n
2P63
+3V3
5N08
220R
12
+3V3-ET-DIG
4u72N
0V
FN15
2P72
4u7
100n
2N0Z
FN06
2P64
100n
IN0U
FN07
IN0Z
+3V3-ET-DIG
18
27
51R
3P70
-1
3P70
-2
51R
100n
2N14
2N11
100n
FN05
FN09
IP35
+3V3-ET-DIG
IP34
IP33
10K
3N0H
RE
S
22n
2P69
BN0B
+3V3
15p
2P65
15p
2P67
2P68
15p
IN0L
100n
2N0Q
IN0K
51R
3P70
-3
36
3P70
-4
51R
4522
p
2N0L
130
100n
2N15
8
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8948 DIGI I/O TV543 R2 LDIPNX_ET
UFD 2K8
A2De Pauw B
2009-01-22
ROYAL PHILIPS ELECTRONICS N.V. 20072009-01-22
7
11811 12 20 27 35 42 49
120119
57 66 73 80 83 89 99 102
10810 110
905 6 7 13 21 28 36 43
4 50
116
103
107
111
3 51 58 67 74 8155
106104
101100
53
122
8 9 82117
9798
105
6016
15
56
19121
18
59
124125126127128
6364919396
17
12312
3414
52
32
112113114
115
76614733
54
9594
92
109
48
24
85
2322
847978777572
41
86
403938373130292625
8887
717069686562464544
7N04LAN9420
22p
2N0K
100n
2N10
12345678
13 14
1N00
1840420-1
220R
3N0K
2N0P
12
6.3V
4u7
BAS316
6N01
2N13
100n
FN10
IN0T
+3V3-ET-ANA
2P66
15p
3P71
10R
IP0J
FN08
PCI-AD23PCI-REQ-ETHPCI-GNT-ETH
IRQ-PCI
PCI-STOP
PCI-CBE1
PCI-CLK-ETHERNETPCI-FRAME
PCI-CBE3PCI-CBE2
PCI-CBE0
PCI-PARPCI-PERRPCI-SERR
PCI-DEVSEL
PCI-AD31RESET-ETHERNET
PCI-IRDY
PCI-AD19PCI-AD20PCI-AD21PCI-AD22PCI-AD23PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29PCI-AD30
PCI-AD8PCI-AD9PCI-AD10PCI-AD11PCI-AD12
PCI-AD14PCI-AD13
PCI-AD15PCI-AD16PCI-AD17PCI-AD18
RESET-ETHERNET
PCI-TRDY
PCI-AD0PCI-AD1PCI-AD2PCI-AD3PCI-AD4PCI-AD5PCI-AD6PCI-AD7
18320_540_090728.eps090728
Circuit Diagrams and PWB Layouts EN 129Q549.3E LA 10.
2009-Aug-07
SSB: Buffering
G3
12
3EN23EN1
C
G3
12
3EN23EN1
G3
12
3EN23EN1
G3
12
3EN23EN1
12
G
7 11
B
136
Ais
pro
hibi
ted
with
out t
he w
ritte
n co
nsen
t of t
he c
opyr
ight
12
owne
r.
C
D
E
F
2N30 D32N31 B52N32 D52N33 B32P18 E92P19 E92P20 D72P21 C8
5 13
1 2 3 4 5
86
D
A
C
6 7 8 9 10
1 2 3 4 5 6 7 8 9 10
A
B
C
D
E
F
A
B
42
J
G
F
D
1
B
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2P22 C82P25 D82P26 E92P61 C72P62 C83N30 D13N31 B43N32 D43N33 E43N34 D23P46 C73P49 D63P50 D83P51 D8
3
E
9
C
5
F
I
4 7
E
I
11
H
3P52 E83P54 E85P10 C97N10 D27N11 B5
9 10
10
BUFFERING
J
2 31
H
8
7N12 D57N13 B27P11 D97P13 D7FP18 D7FP19 D8IN20 B4IN21 D4IN22 D2IN30 D2
3N31
10K
IN32 E4IN34 B2IN35 B2IP31 D8IP32 D8
2N30
100n
IN22
IP32
3P54
1K0
2
1
3
7P11PHD38N02LT
1K0
3P51
1K0
3P50
IN32
+12V
2P25
220p
130
10K
3P49
2009-01-22
ROYAL PHILIPS ELECTRONICS N.V. 20072009-01-22
88
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8948 DIGI I/O TV543 R2 LDIPNX_ET
UFD 2K8
A3
131211
1
10
19
20
De Pauw B
456789
18
17161514
74LVC245A7N13
2
3
+3V3
+5V5-TUN
10K
3N34
IN35
R
7P13TS2431
3A
K1
2
FP19
3P52
RES
20
10K
18
17161514131211
1
10
19
74LVC245A7N10
2
3456789
16V
22u2P
26
2P22
1u025
V22
0u2P61
2P62
220u
25V
3N32
10K
+5V-TUN
+3V3
2N33
100n
3N33
10K
+3V3
3N30
10K
IN34
1211
1
10
19
20
56789
18
1716151413
74LVC245A7N12
2
34
+3V3
131211
1
10
19
20
456789
18
17161514
74LVC245A7N11
2
3
IN20
FP18
IN30
IP31
3P46
2K2
IN21
2N32
100n
RE
S
2P19
1u0
1u0
2P21
2P20
RE
S
22n
30R
5P10
RE
S1u
0
2P18
CA-OECA-WE
CA-IOWRCA-IORDCA-REG
100n
2N31
CA-WAIT
PCI-CBE1
PCI-AD17
PCI-AD23
PCI-AD19PCI-AD22
PCI-AD16PCI-CBE2
PCI-AD18
CA-CE1CA-CE2
PCMCIA-A2
PCI-AD10
PCI-AD8PCI-AD9
PCMCIA-A10
PCMCIA-A8PCMCIA-A9
PCI-AD3
PCI-AD0PCI-AD1PCI-AD2
PCMCIA-A1
PCMCIA-A3
CA-ADDEN
PCMCIA-A7
PCMCIA-A6PCMCIA-A5PCMCIA-A4
PCMCIA-A0
PCMCIA-A12
PCMCIA-A14
PCMCIA-A11
PCMCIA-A13
PCI-AD11
PCMCIA-D2
PCMCIA-D1
PCMCIA-D0
PCMCIA-D4
PCMCIA-D6PCMCIA-D5
PCMCIA-D7
PCMCIA-D3 PCI-AD7
PCI-AD6PCI-AD5PCI-AD4
PCI-AD14
PCI-AD13
CA-ADDEN
CA-DATADIR
CA-DATAEN
PCI-AD12
CA-ADDEN
PCI-AD26
PCI-AD25PCI-AD27PCI-AD28PCI-AD29PCI-AD30PCI-AD31PCI-AD24
18320_541_090728.eps090728
EN 130Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Analogue Externals A
4X1
G4
4X2
12
VDD
VEEVSS
C
H
14
I
1E02 C8
1E13 E7
1009 B12
1022 A7
1024 B7
1027 D6
642
1E22 H13
1023 B7
1E24 I7
1025 C7
1E26 H7
1
1E31 B12
3
2E04 C11
13 14
(AV1)
15
O
18
2E16 D5
A
2E18 E12
B
2
C2E30 B5
5
2E32 B5
7
2E41 I6
9
2E50 A7
11
2E70 B7
4
D
6
E
8
F
10
G
12
E
F
C
J
G
H
I
2E75 D1
1E12 D12
2E82 C7
1001 E11
1E18 F12
1015 C12
2E91 C12
1E23 I11
2EA5 A3
1E25 I11
3E06 D4
1E27 I7
3E11 A6
2E01 A11
3E14 C6
5
2E10 B11
O
7 8 12
6
I
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
2E12 G12
9 10 11
owne
r.
2E17 E6
3E18 B5
1
2E24 H11
3
3E24 A5
2E31 C5
3E28 D11
2E33 E5
3E31 D11
2E44 I12
3E34 C5
2E51 A7
3E38 F11
13
2E74 G2
A
B
C
H
19
G
D
E
F
9
1028 E61E00 A121E01 C14
3E54 G11
2E77 C2
3E59 I11
1E16 F7
2E88 A12
1E19 G12
3E64 B6
2EA4 A3
3E69 H6
3E02 D6
3E99 C2
3E07 A11
3EA8 A3
3E12 A11
3EB0 B2
2E06 B11
3E16 D6
8
N
H
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
P
2E13 G62E14 F122E15 D12
20
3E17 E5
3EB9 I1
2E19 F6
3E21 B5
2E29 A5
6E07 B12
3E27 B11
6E09 C12
3E30 B11
6E12 B6
3E32 E11
6E22 E12
3E37 A11
6E24 D6
2E73 I2
3E44 H11
3
7
K
4 1310
C
6E30 I11
3E55 F5
6E32 I11
2E87 A13
3E62 I6
2E90 B12
6E37 I6
3E68 H12
7E01-2 B2
3E73 G5
7E04 I1
3EA7 A3
7E09 H11
3EA9 A2
7E15 C3
3E15 B11
3EB7 H2
17
B
J
SCART1
3 115
(AV2)
9E18 F5
3EB8 I2
9E20 G10
3E19 C11
6E02 E6
3E22 C11
9E25 F10
6E08 B6
9E27 G10
6E10 A6
FE60 A7
6E14 C6
FE62 B7
6E23 D11
FE64 D7
3E43 H12
6E28 G12
B
121 2
ANALOGUE EXTERNALS A
9
A
1 5
3E45 I103E51 E53E52 I5
FE68 C7
6E31 I6
FE71 C13
3E61 H6
6E35 F6
3E63 A6
FE75 D13
7E01-1 A2
FE77 F7
7E02 D2
FE79 F7
7E05 H1
FE81 E13
7E14 H5
FE83 F13
3EB6 H1
9E12 C5
11
N
* EU
10
L
9E19 F5
FE85 F13
6E01 A12
9E23 D10
6E03 B12
IE16 E5
9E26 G10
IE18 D10
9E33 F2
IE21 C5
FE61 A7
IE23 C11
FE63 D7
IE51 H5
6E26 F12
7
A
F
14
E
D
G
I
6E29 H12
IEC1 A2
FE70 C13
IEC3 B2
6E34 E6
FE73 D13
6E36 H7
FE76 E7
8
FE78 F7
FE80 D13
FE82 E13
9E10 I3
1912
M
* EU
SCART2
6
P
20
9E15 D59E16 E59E17 E5
FEA1 B3
* EU
IE05 D5
9E22 D10
IE09 H11
9E24 E10
FEA0 A3
IE04 D1
IE06 H6
IE14 C5
IE17 F5
IE20 A5
IE22 A11
IE48 H11
IE91 H1
FE65 E7
IE92 H2
17
D
18
4 13
14
IE93 I2IE94 I1IE96 E2
M
15
IE97 D3IE98 C2IEC0 A3
L
FE66 E7FE67 E7
* EU
IEC2 A3
K
FE72 C13
FE74 D13
FE84 F13
2 16
16
1K0
3E19
470R
3E15
1E26
1E24
FE71
IE92
3E52
68R
IE04
9E27
+3V3
10K
3E68
100K
3E21RES
CD
S4C
12G
TA
6E29
12V
3E99
8K2
100p
2E06 RES
1009
9E17
12V
1E18
6E34
CD
S4C
12G
TA
3E62
RE
S
75R
3E37
470R
2E24
100n
12
2
5
14
15
4
FE65
11
10
9
1678
13
1
3
74HC4053PW7E02
MDX 6
2E41
100p
75R
3E54
FE66
RE
S
IEC3
6E07
CD
S4C
12G
TA
12V
IE06
RES
9E20
IE18
1028
2E33
330p
EMC HOLE1X04
3E32
3K3
FE76
+3V3
1024
IE22
1E27
IE96
3E43
75R
9E26
390R
3EB
7
2E01
100p RES
3EB
8
+5V
FE80
390R
1023
FE67
FE83
6E35
CD
S4C
12G
TA
12V
9E22
IE94
9E19
FE70
IE48
FE63
6E01
CD
S4C
12G
TA
12V
3E73
4K7
9E16FE82
12V
CD
S4C
12G
TA
6E03
1E22
FE62
2E87
1n0
IE14
RES
100KRES
2E29
100p
3E27
2E14
100p
3E38
75R
RE
S
IEC2
75R
3E61
2E44
100p
RE
S3E
28
75R
1E00
IE23
9E25
FE74
3E69
10K
RE
S9E
10
3E44
4K7
3E55
75R
12V
RE
S
6E31
CD
S4C
12G
TA
2E04 RES
2E31
100p
100p
RE
S
100p RES
RES
2E30
100K
3E12
4
2E73 100n
BC847BS(COL)
7E01-2
5
3
100n
3E11
2E74
1K0
3E17
3K3
9E18
2E77
100n
1025
3E45
68R
150R
3EA7
RE
S
100K
3E34
1n0
2E88
6E37
CD
S4C
12G
TA
12V
Maelegheer Ingrid
2008-10-10 3
6E24
CD
S4C
12G
TA
12V
A2
ANA + SIDE I/O
TV543 R2 LDIPNX 8204 000 8930
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
4 1
2008-01-18 ROYAL PHILIPS ELECTRONICS N.V. 2005
2008-11-21
130
RES
9E15
9E33
1n0
2E70
3E24RES
FE79
100K
CD
S4C
12G
TA
6E32
12V
6E36
CD
S4C
12G
TA
12V
6E28
CD
S4C
12G
TA
12V
2E51
1n0
1E25
FE81
6E22
CD
S4C
12G
TA
12V
100p
2E32 RES
FE64
+5v
9E24
1E19
FE60
3EB0
1015
FE84
6K8
FE78
FE77
100KRES
7E05BC847BW
3E30
100R
3EB9
3E06
10K
2EA4
1u0 16V
100p
2E15
FEA0
12V
CD
S4C
12G
TA
6E26
2E16
100p
3E07
1K0
1001
IE91
+5V
FE73
IE20
75R
3E51
IE16
RE
S
FE689E12
150R
3EA8
IEC0
1027
6E23
CD
S4C
12G
TA
12V
FE61
IE21
1022
1E23
CD
S4C
12G
TA
12V
IE98
6E30
3E16
8K2
IE51
6E10
CD
S4C
12G
TA
12V
BC847BW7E14 1
3
2
PDTC114EU
1
3
2
7E15
470R
3E64
12V
CD
S4C
12G
TA
6E09
2E13 16
V10
0n
75R
RE
S
IE97
3E02
RES
6
7
8
9
3E18
100K
16
17
18
19
2
20
21
3
4
5
1
10
11
12
13
14
15
MTJ-505H-01 NI LF
1E01
RE
S3E
59
75R
7E04BC847BW
2E18
330p
2E17
100p
6
1
2E90
1n0
BC847BS(COL)
7E01-1
2
FE759E23
IE09
3E31
8K2
IE17
100K
3E22RES
RES
1E12
100p
2E10
2EA5
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AP-SCART-OUT-R
A-PLOP
Y_CVBS-MON-OUT-SC
AV1-STATUS
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AV1-BLK
18320_542_090728.eps090728
Circuit Diagrams and PWB Layouts EN 131Q549.3E LA 10.
2009-Aug-07
SSB: Analogue Externals B
C
SCLADR
012 SDA
WC
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187
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8204 000 8930TV543 R2 LDIPNX
ANA + SIDE I/O
A2130
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20052008-01-18
24
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A-PLOP
18320_543_090728.eps090724
EN 132Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Analogue Externals C
C
1121
1E11-2 C21E11-3 D21E14 B11E15 E21M36 B8
E
F
A
B
C
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8
ANALOGUE EXTERNALS C
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1
2
3
4
3
2008-01-18 ROYAL PHILIPS ELECTRONICS N.V. 2007
2008-11-21
Maelegheer Ingrid
2008-10-10 3
A3
ANA + SIDE I/O
TV543 R2 LDIPNX 8204 000 8930
CHECK DATE
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
4
75R
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RE
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AUDIO-IN5-L
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FRONT-C
FRONT-Y_CVBS
AUDIO-IN5-L
AUDIO-IN5-R
AUDIO-HDPH-L-AP
AUDIO-HDPH-R-AP
FRONT-Y_CVBS
FRONT-C
18320_544_090728.eps090724
Circuit Diagrams and PWB Layouts EN 133Q549.3E LA 10.
2009-Aug-07
SSB: Analogue Externals D
S1A
D2
S1B
IN1
IN2
S2B
D1
S2A
NC
S4B
D4
S4A
IN4
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D3
S3A
IN3
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IN
IN OUT
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1
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4 5
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10 11 12 13
LEVEL
G
14
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5
6
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2
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9
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1 2 3 4
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3E86 H3
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3EAB D9
1
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2EAD E9
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ANALOGUE EXTERNAL D
B
8
All
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12
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7
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A
11
7
M
N
15
K
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FEB0 H10
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FEB4 H2FEB5 I10FEB6 I10
FE27 I2
FEB8 I10
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18 19
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D
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IEB4 G10
I
G
B
USE ONLY
I
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3
FE11 G1
IED0 H12
FEB7 I10
IEC5 E9
FEB9 D1
IED2 H11
FEB1 H9
IE95 C12
IEC6 F9IEC7 G9IEC8 G12IEC9 G12
IED1 H11
IE78 C12
9
M
161
IE79 A4IE81 C2IE82 E2IE84 E2
FE57 F5
IE99 D12
IEA5 C10
16
K
O
IEA6
IEA5
3 63ECQ-3
33K
2E62
100n
3E84
100R
FE15
9EA4
FEB5
1008
1u02EAE
IEA3
FEA5
IEC6
100R3E09
12
14
19
17
165
1
10
11
20
15
2
4
9
7
3
8
13
18
6
IE11
SWITCHSPDTΦ
7EA1ADG734BRU
10u
RE
S
2EAA
2EA
N
100p
33K
45
3EC
Q-4
2EC
C
100p
RE
S
FEB7
RE
S
33K
45
2EC
D
22p
FE27
3EC
S-4
FEA6
BEB9
4u72EA2
2EAC 1u0
FE99
FE97
BEB1
IEC9
IEC8
7E20PDTC114EU
100R
3E67
45
B3B-PH-SM4-TBT(LF)
1E51
123
IED2IED1
27
IE95
33K
3EC
S-2
2EAQ 4u7
100R3ECG3ECH 100R
3EC
5
100R 3E85
47K
+3V3-STANDBY
6E25
BZ
X38
4-C
5V1
FE35
47K
3EA
V
FE36
3EAZ 1K0
FE95
FE47
47K
3EC
2
FEB0
47K
3EC
3
5E0330R
1n0
2EA
K
9EA2
IEB0
3EC
7
47K
IEA1
BEB8
8 1
FEB1
33K
3ECQ-1
6789
IEC4
1
10
2345
2
1
3
1R08
B10P-PH-K-S
1E06
3E40
10K
+3V3
RES
2EAF 1u0
FE92
789
15 16
3ECF 100R1
1011121314
23456
BM14B-SRSS-TBT
1R12
IE99
9E09
+3V3-STANDBY
FE32
RE
S
BZ
X38
4-C
5V1
6E27
3E23 100R
FE94
9EA3
100n
2E63100n
2E61
FEA7
FE96
9E08
9EA5
RES
100R3E57
5EA
1
30R
FEB8
FE30
2EA9
100n
BEB5
BEB6
5
IEC5
1HP0
123
4
RE
S
6E19
PM
EG
1020
EA
3ECN
100R
IED0
100p
2EA
MR
ES
3EA
C
47K
4u7
2ECE9E35
3E08
100R
100R 3E93
FEA8
9
4111701
2
6
16ST3232C7E17
1
3
4
5
15
21318
RS232Φ
3
IEA4
7E19-274HC4066
5
714
4
9EA1
13
714
12
74HC40667E19-1
IEC7
FE37
IEA2
FE57
3E91
100R
3EA
A
47K
FE34
IEA7
3EAT
47K
+5V
9E31
4u72EA3
FEB9
BEB4
FE33
2EA
L
1n0
BEB3
9E30
FEB62E09
100p
2E60
100n
2EAP 4u7
3ECM
10K
11
9E36
123456789
10
+3V3
1R07
FEC0
10
FE29
7E19-474HC4066
12
714
11
6
714
89
74HC40667E19-3
47K
3EA
B
IE78
BEB2
3E41
100R
7 8
13
1
3
12
2
5
14
15
4
74HC4053PW7EA3
MDX6
11
10
9
16
100R
3E00
100p
2E25
47K
3EC
8
9EA7
FE31
3E83
100R
100p
2E20
IEB5
+3V3-STANDBY
1u02EAD
IE84
3EB3
47K
2EB6
4u7
BEB0
FEA9
+3V3-STANDBY
2E38
100p
100R
3ECP
FE10FE11
3ECK
100R100n
2ECH
1 8
33K3ECS-1
47K
3EC
6
9E03
PMEG1020EA
6E50
FE12
2E03
100p
IE12
3ED1
+3V3
47K
FEB4
130
3E86
100R
ROYAL PHILIPS ELECTRONICS N.V. 20072008-01-18
44
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8930TV543 R2 LDIPNX
ANA + SIDE I/O
A2
32008-10-10
Maelegheer Ingrid
2008-11-21
B4B-PH-SM4-TBT(LF)
1234
56
1E50
FE28
FE93
BEB7
IE75
9E41
FE44
9E40
100n
2EAB
IE82
3ED
2
47K
+3V3
+3V3
100R
3ECL
1K03EAY
2EA1 4u7
IE79
9E05
33K3ECS-3
3 6
33K
27
IEB1
3EC
Q-2
3EC
4
10K
3E39
47K
RES
IEB4
IEA8
IE76
FE14
4u72EA647K
3EC9
2EC
BR
ES
100p
10K
3E88
3ECE 68R3E87
10K
IE81
1029
FE45
RXD-MIPS RXD
TXD-MIPS TXD
TXD
RXD
CVBS-TER-OUTSTANDBY
AV1-BLK
RXD-UP
RXD-MIPS
TXD-UP
TXD-MIPS
RXD
UART-SWITCH
UART-SWITCHn
TXD
UART-SWITCH
UART-SWITCHn
BOLT-ON-IORXD-UPTXD-UP
SPDIF-IN1
BO-AUDIO-LBO-AUDIO-R
SCL-BOLT-ONSDA-BOLT-ON
RC-UPBOLT-ON-IO
MHP-SWITCH
BO-AUDIO-R
AV1-AUDIO-R
MHP-SWITCH
AV1-BLK-BOAV1-AUDIO-L
BO-AUDIO-L
BO-CVBS
BO-RBO-GBO-B
AV1-PB
AV1-AUDIO-L AUDIO-IN1-L
AV1-AUDIO-R AUDIO-IN1-R
AV1-PR
AV1-PB
AV1-Y_CVBS
AV1-Y
BO-CVBS
AV1-CVBS
AV1-CVBS AV1-Y_CVBS
MHP-SWITCH
AUDIO-IN1-L
SDA-SSB
AV1-CVBS
BO-R
AV1-R
BO-B
AV1-B
BO-G
AV1-G
AUDIO-IN1-R
AV1-R
AV1-G AV1-Y
AV1-B
AV1-PR
TXD-UP
RXD-UP
RXD-MIPS
TXD-MIPS
RXD-UPTXD-UP
BOLT-ON-IO
AV1-AUDIO-LAV1-AUDIO-R
AV1-BAV1-GAV1-R
SCL-SSB
18320_545_090728.eps090724
EN 134Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Mini PCI Connector
C
4
1A01-B A6
76
IA25 E9IA26 B7IA27 B7IA28 A3
2A05 A42A06 A42A07 A42A08 A5
3A00 E93A01 C43A02 B93A03 D9
5A01 A79A00 B39A01 B79A02 B9
FA34 E6FA35 E6FA36 E6
2 3 4
FA37 A8
1 2 3
IA30 C4
4 9
4
A
9 10
H
G
11
5
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
F
E
6 7
IA24 E9
IA29 B2
8
2A00 A3
C
D
E
101
A
1A01-A A1
12
J
I
H
G
B
C
D
E
owne
r.
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
1
11
FA33 E1
IA20 B9
5
D
13
MINI PCI CONNECTOR
5
I
12
J
9
5 6 7
IA21 D9IA22 D9IA23 D9
832
C
3
2A01 A32A02 A32A03 A3
A
B
C
F
2A04 A4
2A09 A52A50 A72A51 A7
E
D
A
B
2A52 A8
3A04 D93A05 D93A06 E9
13
1
5A00 A2
FA30 E1FA31 E2FA32 E1
6 7 8
8
2
B
9
RES9A00
100R
3A05
+3V3-mPCI
IA26
10K
3A02
IA30
9A02
100n
2A522A
08
100n
100n
2A07
100n
2A04
2A03
100n
+3V3-mPCI
8204 000 8935TV543 R2 LDIPNX
MINI PCI
A3130
+3V3-mPCI
32008-10-10
Maelegheer Ingrid
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20082007-10-16
12
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
9A01
10K
3A00
2A00
330u
6.3V
RE
S
IA21
FA31
FA33
FA30
RES
3A04
100R
2A51
100n
2A50
1u010
0n
2A06
FA35
2A05
100n
FA37
100n
2A02
1u0
2A01
+5V
+3V3-mPCI
100n
2A09
IA24
IA20
IA23
IA29
FA34
FA32
1X09REF EMC HOLE
100R
RES3A03
3A01
10K
116118
12
120122124
141618
125126
98
10
100102104106108110112114
8
808284868890929496
6
60626466687072747678
4
40424446485052545658
20222426283032343638
1A01-B
ROW_B
1734065-3
2
+5V-mPCI
3A06
10K
1517
IA28
109111113115117
11
119121123
13
8991939597
9
99101103105107
6971737577
7
7981838587
4951535557
5
5961636567
2931333537
3
3941434547
1A01-A
1
1921232527
1734065-3
ROW_A
5A00
30R
+3V3-mPCI
+3V3-mPCI
+3V3-mPCI
+3V3-mPCI
+5V-mPCI
IA22
FA36
RES
30R
5A01
IA25
+5V-mPCI+3V3-mPCI
+3V3-mPCI
+3V3-mPCI
+3V3
IRQB-mPCI
IRQA-mPCI
IA27
PCI-CLKRUN
PCI-AD12
PCI-CLKRUN
PME
RESET-mPCI RESET-ETHERNET
PCI-AD13PCI-AD13PCI-AD11
IDSEL
PCI-AD11
IDSEL
MPCIACT
M66EN
PCI-FRAMEPCI-TRDYPCI-STOP
PCI-DEVSEL
PCI-AD15
PCI-AD9PCI-CBE0
PCI-AD6PCI-AD4PCI-AD2PCI-AD0
M66EN
MPCIACT
IRQ-PCIIRQ-PCI
PCI-AD10
PCI-AD8PCI-AD7
PCI-AD5
PCI-AD3
PCI-AD1
RESET-mPCI
PCI-GNT-MINI
PME
PCI-AD30
PCI-AD28PCI-AD26PCI-AD24
PCI-AD22PCI-AD20PCI-PAR
PCI-AD18PCI-AD16
PCI-CLK-MINI
PCI-REQ-MINI
PCI-AD31PCI-AD29
PCI-AD27PCI-AD25
PCI-CBE3PCI-AD23
PCI-AD21PCI-AD19
PCI-AD17PCI-CBE2PCI-IRDY
PCI-SERR
PCI-PERRPCI-CBE1PCI-AD14
PCI-AD12
18320_546_090728.eps090728
Circuit Diagrams and PWB Layouts EN 135Q549.3E LA 10.
2009-Aug-07
SSB: DDR Supply
C
NC
NC
A
RE
F
K
FA06 C4
12
5AC4 E36A01 E7
3A25 D43A24 D4
I
3A23 C5
C
2 51
13
11
43
64
3A08 A3
3A13 A63A14 B5
7
3A09 A3
3A18 E63A19 D6
7A02 D7
7 8 9 10
B
4
FA01 A6FA02 E6FA03 E6FA04 A1
D
IAC4 E1
F
E
J
IA01 B3
2A23 E62A24 E6
3AC0 E15AC1 E25AC2 E2
2A28 D72A29 D7
7A00-1 A5
3A26 A13A27 A1
D
Aow
ner.
A
B
2A14 B6
12
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
J
2A16 C42A19 A52A20 A4
IA02 A4
6
3A10 B33A11 A33A12 A4
H
3A15 B53A16 E53A17 B5
2 3
3A20 C3
7A03 D3
3A22 C4
7A07 A1
FAC0 E3
IAC3 E3
5
1 2
9 10
C
E
H
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
5
F
2A21 B52A22 C1
A
B
2A25 A72A26 A72A27 B7
2A10 E3
A
B
7A00-2 D5
3A07 C1
7A01 A6
11
8
D
2A15 C4
3
C
IA03 A5
G
13
IA04 B5IA05 A6IA06 B5IA07 D4IA08 D3
4 51
I
2A11 E52A12 E52A13 B6
1 2 3
3A21 C3
6 7 8
IA12 E7
IA13 E6IAC2 E3
IA09 E5IA10 C1IA11 E5
6 7 8
DDR SUPPLY
G
C
D
E
2A30 E72AC0 E1
E
1M01 E3
+1V8-PNX85XX
IA06
IA04
IA11+3V3-STANDBY
IA09
6.3V
22u2A
27
IAC3
RE
S
1u0
2A25
5AC430R
FA04
3
30R
5AC1
7A01PHD38N02LT
2
1
1M01
123
330p
2A16 RES
2AC0
100p
1u0
2A23
1n02A
19
2K2
3A27
3A22
1K0
RES
NAME
2
SUPERS.
CLASS_NO
EMANTESNHC
2 2
2008-01-18 ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-11-21
Maelegheer Ingrid
2008-10-10 3
130 A3
MINI PCI
TV543 R2 LDIPNX 8204 000 8935
CHECK DATE
3A26
2K2
1K0
3A10
2A14 1u
0
+V-LM833
IA01
IAC4
RE
S
IAC2
2A10 10
0n
+3V3F
5AC2 30R
3AC0
10R
PHD38N02LT7A02
FAC0
3A17
1K0
3
21
84
+2V5-REF
7A00-1LM833
+12V
IA05
FA03
7A07TS2431
A
3
1
K2
R
100n
2A22
10R
3A07
3A21
4K7
RES
470R
3A09
RE
S
3A08
470R
3A11 10
K
2A24
1u0
2A30
22u
6.3V
RE
S2A
26
1u0
+2V5-REF
3A19
22R
3A15
22K
RES
1K0
3A16
IA10
22n
2A15
IA03
2A28
1u0
+12V
3A23
1K0 1%RES
1K0
3A18
+2V5
+V-LM833
IA07
1K0
3A12
+3V3F
22R
3A13
2A11 1n
0
2A12
330p
SS
24
6A01
3A14
1K0
IA13IA12
4K7
3A20
RES
FA02
IA02
1u0
2A13
1u0
2A29
+V-LM833
330p2A
21
FA01
FA06
84
7A00-2LM8335
67
RES
53 1
2
4
RES
7A03TS431AILT
3A25
2K2
1%
RE
S3A
24
22K
2A20 10
0n
+12V
IA08
KEYBOARD
18320_547_090728.eps090728
EN 136Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: Audio
C
VCLAMP
MUTE
IN
BSL
SD
R
AVCC
L
BSR
GND_HS
L
PGNDAGND L R
L
OUT
R
BYPASS
1
R
0
PVCC
GAIN
VIA VIA
VIA
VIA
FD05 E9FD06 F9FD07 D2FD14 A5
108
7
ID05 C8ID06 C8
7D03-1 A47D03-2 C27D10-1 B67D10-2 D3
11
8
2D20 A52D21 D8
3D11-2 F83D11-3 E83D11-4 E7
5
3D10-3 D73D10-4 D73D11-1 F7
2D26 B82D27 D82D30 A52D31 A6
ID27 A6ID28 B6
3D06-2 D23D06-3 D23D06-4 D23D09 A3
ID33 D2ID36 B4
B
C
ID29 C5ID30 C5ID31 C6ID32 C6
ID19 B5
3D14-4 B73D16 A43D17 C45D01 C75D02 C75D04 C95D05 C95D07 A6
ID37 C4
2D06 A52D07 A52D08 A72D09 C72D10 C72D11 C8
5D08 A65D09 F8
2D14 E92D15 C82D16 C42D17 C4
CD10 D5FD02 F9
6 7
2D22 B82D23 C42D24 B42D25 F8
H
ID07 C8ID08 C8ID09 C7
ID10 C7ID11 A4ID12 A4ID16 C4ID18 C5
C
All
right
s re
serv
ed. R
epro
duct
ion
in w
hole
or
in p
arts
C
3
3D03 E23D06-1 D2
5 6 7 8
3D10-1 D83D10-2 D8
1D50 E91D51 F8
D
E
F
A
F
131
E
3D14-1 B83D14-2 B83D14-3 B8
10
9
I
H
2D12 C82D13 F9
ID38 D4
G
5
2D18 B82D19 A7
2
8 9
1 2
B
6 9
is p
rohi
bite
d w
ithou
t the
writ
ten
cons
ent o
f the
cop
yrig
ht
I
13
owne
r.
B
C
D
E
12
F
1735 E9
3 4 9
A
G
1D52 F91D53 F51D54 F62D01 E22D02 D22D05 A4
F
A
J
4
1D38 E6
12
1
4
AUDIO
J
2 3 4 5
1
E
2
A
D
3
B
11
6
2D11
220u25V
7
D
ID30
GND-AUDIO
BC847BS(COL)
5
3
4
7D03-2
GND-AUDIO
ID28
ID07
1K5
3D11
-27
2
GND-A
1 2
GND-AUDIO
3D17
4K7
FD06
3D09
4R7
5D07
220R
2D22
220n
5D05
220R
GND-AUDIO
2D06
220n
ID18
ID05
ID16
5D02
22u
2D1922
0u25
V
2D30
220u 25V
2D31 22
0u25
V
GND-AUDIO
GND-AUDIO
ID38
3D03
100R
ID36
ID27
1735
1735446-4
1234
13D
14-1
15K
8
ID06
22u
5D01
ID29
GND-AUDIO
+AUDIO-POWER
8
FD14
3D06-1
100K
1
3D11
-1
1K5
81
V_N
OM
1D51
GND-AUDIO
220n
2D21
V_N
OM
1D54
220n
2D07
5 4
GND-AUDIOID33
130
3D06-4
100K
1
SETNAMECHN
CLASS_NO
SUPERS.
2
NAME
DATECHECK
8204 000 8931TV543 R2 LDIPNX
CLASS D
A3
6 3
32008-10-10
Randal De Keyzer
2008-11-21
ROYAL PHILIPS ELECTRONICS N.V. 20072007-10-12
1
100K
3D06-3
1D53
V_N
OM
1D50
V_N
OM
72
3D10
-2
15K
23
2D18
220u25V
1
1735446-3
1D38
1
BC847BS(COL)7D03-1
2
6
+AUDIO-POWER
72
25V 220u
2D12
15K
3D14
-2
ID19
2D25
10n
GND-AUDIO
ID09
220R
5D04
220R
5D09
1u0
2D17
112D16
1u0
24 13 14
1 3 10 12
615
2
21
16
7
1817
25
522
4
23
7D10-1TPA3120D2PWP
CLASS-DΦ
AUDIO AMP
8 919 20
220n
2D10
FD02
220n
2D13
2D09
10u
2D02
2n2
2D08
220n
15K
63
GND-AUDIO
3D14
-3
220R
5D08
2D27
220n
ID08
22K
3D16
GND-AUDIO
ID10
3D11
-4
1K5
54
3D14
-4
15K
54
100K2 7
2D20
220u 25V
3D06-2
1K5
63
GND-AUDIO
54
3D11
-3
15K
3D10
-4
3D10
-3
15K
63
47n
2D24
GND-A
ID12
2D14
2n2
CD10
2D23
47n
FD07
31 32 33
34
ID31
26
353637
383940
272829
30
TPA3120D2PWP7D10-2
VIA
1D52
V_N
OM
ID37
2D26
220n
10n
2D01
GND-AUDIO
25V 220u
2D15
FD05
3D10
-18
1
ID11
15K
2D05
10u
35V
GND-AUDIO
ID32
-AUDIO-R
+AUDIO-L
RIGHT-SPEAKER
RIGHT-SPEAKER
GND-AUDIO
LEFT-SPEAKER
LEFT-SPEAKER
RIGHT-SPEAKER
A-STBY
RIGHT-SPEAKER
LEFT-SPEAKER
A-STBYAUDIO-MUTE
LEFT-SPEAKER
18320_548_090728.eps090728
Circuit Diagrams and PWB Layouts EN 137Q549.3E LA 10.
2009-Aug-07
SSB: SRP List Explanation
1 . 1 . Introduction
Example
SRP (Service Re ference Protocol) is a softw are too l that creates a list w i th all refer e n c es to signal lines. The list contains references to the signals w i thin all schemat ics of a PWB. It replaces the text refe r ences currentl y p r inted next t o the signal names in the schematics. These printed refe rences are created man ually an d are t h e r efore n o t guar an teed to be 100 % correct. In additio n , in the current crowded schema t ics there is often none or ver y little pl ace for these references. Some of the PW B schematics w ill use SRP while others w ill sti ll use the manual refe rences. Either there w ill be an SRP r e fer ence list for a schematic, or ther e w ill be pr inted r e ferences in the schematic.
1.2. No n - SRP Schematics
There a r e severa l different signals available in a schematic:
1.2.1. Po w e r Supply Lines
All pow er suppl y lines are available in t he suppl y line overview (see chapter 6). I n th e schematics (se e chapter 7) is n o t indicated w h e r e supplies are coming from or going to. It is how ever indi cated if a supply is incoming (created elsew h e r e), o r outgoing (cr eat ed or adapt ed in the current sche m atic).
+5 V +5 V
Outgoing Incoming
1.2.2. Normal Signals
For no rmal signals, a schematic r e ference (e. g . B1 4b) is placed next to the signals.
si gnal _nam e B 14b
1.2.3. Grounds
For no rmal and s pecial grounds (e .g. GN DH OT o r GND3V3 etc.), n o thing is indicate d.
1.3. SRP Schematics
SRP is a tool, w h ich automatically creates a list w i th signal reference s , indicating on which sc hematic t he signals are used. A reference is cr eated for all signals indicat ed w i th an SRP s y mbol, these s y mbols are:
+5 V +5 V Power suppl y li ne.
na m e na m e Stand alone signal or sw itching li ne (used as less as possible).
na m e na m e
Signal line into a w i re tree.
na m e na m e
Sw itching line into a w i re tre e .
na m e
Bi-directional lin e (e.g. SDA ) into a w i r e tree.
na m e
Signal line into a w i r e tree, its dir e ction depends on t he circuit (e.g. ingoing for PD P, outgoing for L C D sets).
Remarks: • When there is a black dot on the "signal dire ction arrow" it is an SRP symbol, so there will be a reference to the signal
name in the SRP list. • All references to normal grounds (Ground symbols without additi onal text) are not listed in the reference list, this to keep
it concise. • Signals that are not used in multiple schematics, but only onc e or several times in the same schematic, are included
in the SRP reference list, but only with one reference.
Additional Tip:
When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: • Select the signal name you want to sear ch for, with the "Select text" tool. • Copy and paste the signal name in the "Search PDF" tool. • Search for all occurrences of the signal name. • Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to
"zoom in" to e.g. 150% to see clearly, which text is select ed. Then you can zoom out, to get an overview of the complete schematic.
PS. It is recommended to use at least Adobe PDF (reader) version 6. x, due to better search possibilities in this version. 10000_031_090121.eps
090121
Net Name Diagram +12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)
Personal Notes:
EN 138Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
SSB: SRP List Part 1
3104 313 6343.218310_700_090309.eps
090309
Netname Schematic
B01B +12VB01C +12VB02B +12VB06B +12VB06C +12VB07B +12VB07H +12VB08B +12VB09B +12VB01B +12VDB05H +12VDB01A +12VFB01B +12VFB01A +12VF1B01C +12VF2B02B +1V2B02B +1V2AB06E +1V2-FPGAB06G +1V2-FPGAB06A +1V2MB06E +1V2-PLLB06G +1V2-PLLB01C +1V2-PNX5100B04A +1V2-PNX5100B05C +1V2-PNX5100B05C +1V2-PNX5100-CLOCKB05C +1V2-PNX5100-DDR-PLL1B05C +1V2-PNX5100-DLLB05C +1V2-PNX5100-LVDS-PLLB05C +1V2-PNX5100-TRI-PLL1B05C +1V2-PNX5100-TRI-PLL2B05C +1V2-PNX5100-TRI-PLL3B01A +1V2-PNX85XXB02B +1V2-PNX85XXB04A +1V2-PNX85XXB04P +1V2-PNX85XXB06A +1V2-PNX85XXB06E +1V2-PNX85XXB01A +1V2-STANDBYB01B +1V2-STANDBYB04P +1V2-STANDBYB05A +1V8-PNX5100B05C +1V8-PNX5100B06E +1V8-PNX5100B04G +1V8-PNX85XXB04P +1V8-PNX85XXB06E +1V8-PNX85XXB07D +1V8-PNX85XXB09B +1V8-PNX85XXB06A +2V5B06E +2V5B06F +2V5B09B +2V5B06F +2V5-DDR1B06G +2V5-DDR1B06E +2V5in-FPGAB06G +2V5in-FPGAB06A +2V5MB06E +2V5out-FPGAB06G +2V5out-FPGAB06E +2V5-PLLB06G +2V5-PLLB09B +2V5-REFB01B +33VTUNB02A +33VTUNB01A +3V3B01B +3V3B02B +3V3B04A +3V3B04L +3V3B04M +3V3B04N +3V3B04P +3V3B05C +3V3B05E +3V3B05F +3V3B05G +3V3B05H +3V3B05I +3V3B06A +3V3B06B +3V3B06C +3V3B06E +3V3B07A +3V3B07C +3V3B07D +3V3B07F +3V3B07G +3V3B07H +3V3B08A +3V3B08B +3V3B08D +3V3B09A +3V3B02A +3V3AB02B +3V3AB02B +3V3DB02B +3V3EB07G +3V3-ET-ANAB07G +3V3-ET-DIGB01A +3V3FB05H +3V3FB09B +3V3FB06E +3V3-FPGAB06G +3V3-FPGAB06A +3V3MB09A +3V3-mPCIB07F +3V3-NANDB04A +3V3-PERB04B +3V3-PERB04E +3V3-PERB04F +3V3-PERB04N +3V3-PERB04P +3V3-PERB05C +3V3-PNX5100-CLOCKB05C +3V3-PNX5100-DDR-PLL0B05C +3V3-PNX5100-LVDS-INB05C +3V3-PNX5100-LVDS-PLLB01B +3V3-STANDBYB04A +3V3-STANDBYB04P +3V3-STANDBYB07D +3V3-STANDBY
B08D +3V3-STANDBYB09B +3V3-STANDBYB01B +5VB01C +5VB04A +5VB04L +5VB06A +5VB07C +5VB07D +5VB08A +5VB08B +5VB08D +5VB09A +5VB01C +5V5-TUNB07H +5V5-TUNB07E +5V-DDCB07D +5V-EDIDB07E +5V-EDIDB09A +5V-mPCIB02A +5V-TUNB02B +5V-TUNB07H +5V-TUNB02B +5V-TUN-CVBSB02A +5V-TUN-PINB04I +AUDIO-LB10 +AUDIO-LB01B +AUDIO-POWERB04I +AUDIO-POWERB04M +AUDIO-POWERB10 +AUDIO-POWERB05H +VDISPB06D +VDISPB05E +VDISP1B05H +VDISP1B05E +VDISP2B05H +VDISP2B09B +V-LM833B02A +VTUNB07D 1V8-HDMIB04I (1×) ADAC(1)B04L (1×) ADAC(1)B04I (1×) ADAC(2)B04L (1×) ADAC(2)B04L (1×) ADAC(3)B04M (1×) ADAC(3)B04L (1×) ADAC(4)B04M (1×) ADAC(4)B04I (1×) ADAC(5)B04L (1×) ADAC(5)B04I (1×) ADAC(6)B04L (1×) ADAC(6)B04I (1×) ADAC(7)B04L (3×) ADAC(7)B04I (1×) ADAC(8)B04L (3×) ADAC(8)B07D (4×) AIN-5VB04A (2×) ALEB05D (1×) AMBI-VSB02B (2×) ANTENNA-CTRLB02A (2×) ANTENNA-SUPPLYB02B (1×) ANTENNA-SUPPLYB04M (1×) A-PLOPB08A (1×) A-PLOPB08B (2×) A-PLOPB08A (3×) AP-SCART-OUT-LB08A (3×) AP-SCART-OUT-RB07D (2×) ARX0-B07D (2×) ARX0+B07D (2×) ARX1-B07D (2×) ARX1+B07D (2×) ARX2-B07D (2×) ARX2+B07D (2×) ARXC-B07D (2×) ARXC+B07D (3×) ARX-DDC-SCLB07D (3×) ARX-DDC-SDAB07D (2×) ARX-HOTPLUGB06E (1×) ASDOB06G (1×) ASDOB04M (1×) A-STBYB10 (2×) A-STBYB04I (1×) AUDIO-CL-LB08A (1×) AUDIO-CL-LB04I (1×) AUDIO-CL-RB08A (1×) AUDIO-CL-RB04M (1×) AUDIO-HDPH-L-APB08C (1×) AUDIO-HDPH-L-APB04M (1×) AUDIO-HDPH-R-APB08C (1×) AUDIO-HDPH-R-APB04L (1×) AUDIO-IN1-LB08D (2×) AUDIO-IN1-LB04L (1×) AUDIO-IN1-RB08D (2×) AUDIO-IN1-RB04L (1×) AUDIO-IN2-LB08A (1×) AUDIO-IN2-LB04L (1×) AUDIO-IN2-RB08A (1×) AUDIO-IN2-RB04L (1×) AUDIO-IN3-LB08B (1×) AUDIO-IN3-LB04L (1×) AUDIO-IN3-RB08B (1×) AUDIO-IN3-RB04L (1×) AUDIO-IN4-LB07B (1×) AUDIO-IN4-LB04L (1×) AUDIO-IN4-RB07B (1×) AUDIO-IN4-RB04L (1×) AUDIO-IN5-LB08C (2×) AUDIO-IN5-LB04L (1×) AUDIO-IN5-RB08C (2×) AUDIO-IN5-RB04A (2×) AUDIO-MUTEB10 (1×) AUDIO-MUTEB04I (1×) AUDIO-OUT-LB08B (1×) AUDIO-OUT-LB04I (1×) AUDIO-OUT-RB08B (1×) AUDIO-OUT-RB04I (1×) -AUDIO-RB10 (1×) -AUDIO-RB04I (7×) AUDIO-VDDB04M (2×) AUDIO-VDDB08A (1×) AV1-AUDIO-LB08D (3×) AV1-AUDIO-LB08A (1×) AV1-AUDIO-RB08D (3×) AV1-AUDIO-R
B08A (1×) AV1-BB08D (3×) AV1-BB04A (1×) AV1-BLKB08A (1×) AV1-BLKB08D (1×) AV1-BLKB08A (1×) AV1-BLK-BOB08D (1×) AV1-BLK-BOB08A (1×) AV1-CVBSB08D (3×) AV1-CVBSB08A (1×) AV1-GB08D (3×) AV1-GB04K (1×) AV1-PBB08D (2×) AV1-PBB04K (1×) AV1-PRB08D (2×) AV1-PRB08A (1×) AV1-RB08D (3×) AV1-RB04A (1×) AV1-STATUSB08A (1×) AV1-STATUSB04K (1×) AV1-YB08D (2×) AV1-YB04K (1×) AV1-Y_CVBSB08B (1×) AV1-Y_CVBSB08D (2×) AV1-Y_CVBSB04A (1×) AV2-BLKB08A (1×) AV2-BLKB04A (1×) AV2-STATUSB08A (1×) AV2-STATUSB04K (1×) AV2-Y_CVBSB08A (1×) AV2-Y_CVBSB08B (1×) AV2-Y_CVBSB04K (1×) AV3-PBB08A (1×) AV3-PBB04K (1×) AV3-PRB08A (1×) AV3-PRB04K (1×) AV3-YB08A (1×) AV3-YB04K (1×) AV4-PBB08A (1×) AV4-PBB08B (1×) AV4-PBB04K (1×) AV4-PRB08A (1×) AV4-PRB08B (1×) AV4-PRB04K (2×) AV4-YB08A (1×) AV4-YB08B (1×) AV4-YB04K (1×) AV5-PBB08A (1×) AV5-PBB04K (1×) AV5-PRB08A (1×) AV5-PRB04K (2×) AV5-YB08A (1×) AV5-YB01B (1×) BACKLIGHT-BOOSTB05H (1×) BACKLIGHT-BOOSTB05H (1×) BACKLIGHT-CONTROL-FPGA-INB06A (1×) BACKLIGHT-CONTROL-FPGA-INB06G (1×) BACKLIGHT-CONTROL-FPGA-INB05H (3×) BACKLIGHT-CTRLB01B (1×) BACKLIGHT-OUTB05E (1×) BACKLIGHT-OUTB05H (1×) BACKLIGHT-OUTB06G (1×) BACKLIGHT-OUTB05H (1×) BACKLIGHT-OUT2B06G (1×) BACKLIGHT-OUT2B01B (1×) BACKLIGHT-PWM-ANA-DISPB05H (1×) BACKLIGHT-PWM-ANA-DISPB05H (2×) BACKLIGHT-PWM-ANA-SSBB02A (3×) B-IF-_N-IF-B02A (3×) B-IF+_N-IF+B07D (4×) BIN-5VB06A (2×) BL-CLKB06A (2×) BL-CSB06A (2×) BL-HSB06A (2×) BL-MISOB06A (2×) BL-MOSIB05D (1×) BL-OSCLKB06A (1×) BL-OSCLKB05D (1×) BL-SCKB06A (1×) BL-SCKB05D (1×) BL-SD0B06A (1×) BL-SD0B06A (2×) BL-VSB05D (1×) BL-WSB06A (1×) BL-WSB08D (2×) BO-AUDIO-LB08D (2×) BO-AUDIO-RB08D (2×) BO-BB08D (2×) BO-CVBSB08D (2×) BO-GB04A (2×) BOLT-ON-IOB04N (1×) BOLT-ON-IOB08D (3×) BOLT-ON-IOB04A (2×) BOLT-ON-TS-ENnB04N (1×) BOLT-ON-TS-ENnB05H (3×) BOOST-CTRLB04E (2×) BOOTMODEB08D (2×) BO-RB07D (2×) BRX0-B07D (2×) BRX0+B07D (2×) BRX1-B07D (2×) BRX1+B07D (2×) BRX2-B07D (2×) BRX2+B07D (2×) BRXC-B07D (2×) BRXC+B07D (3×) BRX-DDC-SCLB07D (3×) BRX-DDC-SDAB07D (2×) BRX-HOTPLUGB04K (1×) B-VGAB08B (1×) B-VGAB04N (1×) CA-ADDENB07H (3×) CA-ADDENB04N (1×) CA-CD1B07A (2×) CA-CD1B04N (1×) CA-CD2B07A (2×) CA-CD2B07A (1×) CA-CE1B07H (1×) CA-CE1B07A (1×) CA-CE2B07H (1×) CA-CE2B04N (1×) CA-DATADIRB07H (1×) CA-DATADIRB04N (1×) CA-DATAEN
B07H (1×) CA-DATAENB07A (2×) CA-INPACKB07A (1×) CA-IORDB07H (1×) CA-IORDB07A (1×) CA-IOWRB07H (1×) CA-IOWRB04N (1×) CA-MDI0B07A (1×) CA-MDI0B04N (1×) CA-MDI1B07A (1×) CA-MDI1B04N (1×) CA-MDI2B07A (1×) CA-MDI2B04N (1×) CA-MDI3B07A (1×) CA-MDI3B04N (1×) CA-MDI4B07A (1×) CA-MDI4B04N (1×) CA-MDI5B07A (1×) CA-MDI5B04N (1×) CA-MDI6B07A (1×) CA-MDI6B04N (1×) CA-MDI7B07A (1×) CA-MDI7B04N (1×) CA-MDO0B07A (2×) CA-MDO0B04N (1×) CA-MDO1B07A (2×) CA-MDO1B04N (1×) CA-MDO2B07A (2×) CA-MDO2B04N (1×) CA-MDO3B07A (2×) CA-MDO3B04N (1×) CA-MDO4B07A (2×) CA-MDO4B04N (1×) CA-MDO5B07A (2×) CA-MDO5B04N (1×) CA-MDO6B07A (2×) CA-MDO6B04N (1×) CA-MDO7B07A (2×) CA-MDO7B04N (1×) CA-MICLKB07A (1×) CA-MICLKB04N (1×) CA-MISTRTB07A (1×) CA-MISTRTB04N (1×) CA-MIVALB07A (1×) CA-MIVALB04N (2×) CA-MOCLK_VS2B07A (2×) CA-MOCLK_VS2B04N (1×) CA-MOSTRTB07A (2×) CA-MOSTRTB04N (1×) CA-MOVALB07A (2×) CA-MOVALB07A (1×) CA-OEB07H (1×) CA-OEB07A (1×) CA-REGB07H (1×) CA-REGB04N (1×) CA-RSTB07A (2×) CA-RSTB04N (1×) CA-VS1B07A (2×) CA-VS1B07A (2×) CA-WAITB07H (1×) CA-WAITB07A (1×) CA-WEB07H (1×) CA-WEB06A (3×) CCLKB04A (2×) CEC-HDMIB07D (1×) CEC-HDMIB07D (4×) CIN-5VB06G (2×) CLK-OUT2-PNX5100B05F (1×) CLK-OUT-PNX5100B06A (1×) CLK-OUT-PNX5100B06G (1×) CLK-OUT-PNX5100B06E (1×) CON20B06G (1×) CON20B06E (1×) CON21B06G (1×) CON21B06E (1×) CON22B06G (1×) CON22B06E (1×) CON23B06G (1×) CON23B06E (1×) CON26B06G (1×) CON26B06E (1×) CON27B06G (1×) CON27B06E (1×) CONF-DONEB06G (1×) CONF-DONEB07D (2×) CRX0-B07D (2×) CRX0+B07D (2×) CRX1-B07D (2×) CRX1+B07D (2×) CRX2-B07D (2×) CRX2+B07D (2×) CRXC-B07D (2×) CRXC+B07D (3×) CRX-DDC-SCLB07D (3×) CRX-DDC-SDAB07D (2×) CRX-HOTPLUGB06A (4×) CSO-BB05H (2×) CTRL1-PNX5100B05H (2×) CTRL2-PNX5100B05H (2×) CTRL3-PNX5100B05H (3×) CTRL4-PNX5100B05E (1×) CTRL-DISP1B05H (1×) CTRL-DISP1B05E (1×) CTRL-DISP2B05H (1×) CTRL-DISP2B05E (1×) CTRL-DISP3B05H (1×) CTRL-DISP3B05E (1×) CTRL-DISP4B05H (2×) CTRL-DISP4B02B (1×) CVBS4B04K (1×) CVBS4B08B (2×) CVBS-MON-OUT-CINCHB08A (2×) CVBS-OUT-SC1B02B (1×) CVBS-TER-OUTB08A (1×) CVBS-TER-OUTB08D (1×) CVBS-TER-OUTB06E (1×) DATA0B06G (1×) DATA0B06E (1×) DCLKB06G (1×) DCLKB04H (1×) DDCA-SCLB07E (1×) DDCA-SCLB04H (1×) DDCA-SDAB07E (1×) DDCA-SDA
B04H (1×) DDC-SCLB07D (1×) DDC-SCLB04H (1×) DDC-SDAB07D (1×) DDC-SDAB04G (3×) DDR2-A0B04G (3×) DDR2-A1B04G (3×) DDR2-A10B04G (3×) DDR2-A11B04G (3×) DDR2-A12B04G (3×) DDR2-A2B04G (3×) DDR2-A3B04G (3×) DDR2-A4B04G (3×) DDR2-A5B04G (3×) DDR2-A6B04G (3×) DDR2-A7B04G (3×) DDR2-A8B04G (3×) DDR2-A9B04G (3×) DDR2-BA0B04G (3×) DDR2-BA1B04G (2×) DDR2-BA2B04G (3×) DDR2-CASB04G (3×) DDR2-CKEB04G (4×) DDR2-CLK_NB04G (4×) DDR2-CLK_PB04G (3×) DDR2-CSB04G (2×) DDR2-D0B04G (2×) DDR2-D1B04G (2×) DDR2-D10B04G (2×) DDR2-D11B04G (2×) DDR2-D12B04G (2×) DDR2-D13B04G (2×) DDR2-D14B04G (2×) DDR2-D15B04G (2×) DDR2-D16B04G (2×) DDR2-D17B04G (2×) DDR2-D18B04G (2×) DDR2-D19B04G (2×) DDR2-D2B04G (2×) DDR2-D20B04G (2×) DDR2-D21B04G (2×) DDR2-D22B04G (2×) DDR2-D23B04G (2×) DDR2-D24B04G (2×) DDR2-D25B04G (2×) DDR2-D26B04G (2×) DDR2-D27B04G (2×) DDR2-D28B04G (2×) DDR2-D29B04G (2×) DDR2-D3B04G (2×) DDR2-D30B04G (2×) DDR2-D31B04G (2×) DDR2-D4B04G (2×) DDR2-D5B04G (2×) DDR2-D6B04G (2×) DDR2-D7B04G (2×) DDR2-D8B04G (2×) DDR2-D9B04G (2×) DDR2-DQM0B04G (2×) DDR2-DQM1B04G (2×) DDR2-DQM2B04G (2×) DDR2-DQM3B04G (2×) DDR2-DQS0_NB04G (2×) DDR2-DQS0_PB04G (2×) DDR2-DQS1_NB04G (2×) DDR2-DQS1_PB04G (2×) DDR2-DQS2_NB04G (2×) DDR2-DQS2_PB04G (2×) DDR2-DQS3_NB04G (2×) DDR2-DQS3_PB04G (3×) DDR2-ODTB04G (3×) DDR2-RASB04G (2×) DDR2-VREF-CTRLB04G (3×) DDR2-VREF-DDRB04G (3×) DDR2-WEB04A (3×) DETECT1B01B (1×) DETECT-12VB04A (1×) DETECT-12VB04A (3×) DETECT2B07D (4×) DIN-5VB06A (2×) DONEB06F (2×) DQ1(0)B06F (2×) DQ1(1)B06F (2×) DQ1(10)B06F (2×) DQ1(11)B06F (2×) DQ1(12)B06F (2×) DQ1(13)B06F (2×) DQ1(14)B06F (2×) DQ1(15)B06F (2×) DQ1(2)B06F (2×) DQ1(3)B06F (2×) DQ1(4)B06F (2×) DQ1(5)B06F (2×) DQ1(6)B06F (2×) DQ1(7)B06F (2×) DQ1(8)B06F (2×) DQ1(9)B06F (2×) DQS10B06F (2×) DQS11B07D (2×) DRX0-B07D (2×) DRX0+B07D (2×) DRX1-B07D (2×) DRX1+B07D (2×) DRX2-B07D (2×) DRX2+B07D (2×) DRXC-B07D (2×) DRXC+B07D (3×) DRX-DDC-SCLB07D (3×) DRX-DDC-SDAB07D (2×) DRX-HOTPLUGB04A (2×) EAB07E (4×) EIN-5VB04A (2×) EJTAG-DETECTB06B (1×) EJTAG-DETECTB05F (1×) EJTAG-PNX5100-TCKB05F (1×) EJTAG-PNX5100-TDIB05F (1×) EJTAG-PNX5100-TDOB05F (1×) EJTAG-PNX5100-TMSB05F (1×) EJTAG-PNX5100-TRSTnB04E (2×) EJTAG-TCKB06B (1×) EJTAG-TCKB04E (2×) EJTAG-TDIB06B (1×) EJTAG-TDIB04E (2×) EJTAG-TDO
B06B (1×) EJTAG-TDOB04E (2×) EJTAG-TMSB06B (1×) EJTAG-TMSB04E (2×) EJTAG-TRSTNB06B (1×) EJTAG-TRSTNB01B (1×) ENABLE-3V3B04A (2×) ENABLE-3V3B01A (1×) ENABLE-3V3-5VB01B (1×) ENABLE-3V3-5VB01C (1×) ENABLE-3V3-5VB07E (3×) ERX-DDC-SCLB07E (3×) ERX-DDC-SDAB07E (3×) ERX-HOTPLUGB06C (2×) FAN1-DRVB06C (2×) FAN1-OUTB06C (2×) FAN2-DRVB05H (1×) FAN-CTRL-1B06C (1×) FAN-CTRL-1B05H (1×) FAN-CTRL-2B02B (1×) FE-CLKB04N (3×) FE-CLKB02B (1×) FE-DATA0B04N (3×) FE-DATA0B02B (1×) FE-DATA1B04N (3×) FE-DATA1B02B (1×) FE-DATA2B04N (3×) FE-DATA2B02B (1×) FE-DATA3B04N (3×) FE-DATA3B02B (1×) FE-DATA4B04N (3×) FE-DATA4B02B (1×) FE-DATA5B04N (3×) FE-DATA5B02B (1×) FE-DATA6B04N (3×) FE-DATA6B02B (1×) FE-DATA7B04N (3×) FE-DATA7B04N (4×) FE-ERRB02B (1×) FE-SOPB04N (3×) FE-SOPB02B (1×) FE-VALIDB04N (3×) FE-VALIDB04K (1×) FRONT-CB08C (2×) FRONT-CB04K (1×) FRONT-Y_CVBSB08C (2×) FRONT-Y_CVBSB10 (2×) GND-AB01B (1×) GND-AUDIOB10 (16×) GND-AUDIOB01A (15×) GND-SIGB01C (15×) GND-SIG1B04K (1×) G-VGAB08B (1×) G-VGAB04H (1×) HDMIA-RX0-B07E (2×) HDMIA-RX0-B04H (1×) HDMIA-RX0+B07E (2×) HDMIA-RX0+B04H (1×) HDMIA-RX1-B07E (2×) HDMIA-RX1-B04H (1×) HDMIA-RX1+B07E (2×) HDMIA-RX1+B04H (1×) HDMIA-RX2-B07E (2×) HDMIA-RX2-B04H (1×) HDMIA-RX2+B07E (2×) HDMIA-RX2+B04H (1×) HDMIA-RXC-B07E (2×) HDMIA-RXC-B04H (1×) HDMIA-RXC+B07E (2×) HDMIA-RXC+B04H (1×) HDMIB-RX0-B07D (1×) HDMIB-RX0-B04H (1×) HDMIB-RX0+B07D (1×) HDMIB-RX0+B04H (1×) HDMIB-RX1-B07D (1×) HDMIB-RX1-B04H (1×) HDMIB-RX1+B07D (1×) HDMIB-RX1+B04H (1×) HDMIB-RX2-B07D (1×) HDMIB-RX2-B04H (1×) HDMIB-RX2+B07D (1×) HDMIB-RX2+B04H (1×) HDMIB-RXC-B07D (1×) HDMIB-RXC-B04H (1×) HDMIB-RXC+B07D (1×) HDMIB-RXC+B04H (1×) HOT-PLUGB04H (1×) HOT-PLUG-AB07E (1×) HOT-PLUG-AB04K (1×) H-SYNC-VGAB08B (1×) H-SYNC-VGAB04N (1×) I2C-SCLB07F (1×) I2C-SCLB04N (1×) I2C-SDAB07F (1×) I2C-SDAB09A (2×) IDSELB02A (1×) IF-B02B (1×) IF-B02A (1×) IF+B02B (1×) IF+B02A (2×) IF-AGCB02B (1×) IF-AGCB04K (1×) IF-NB02B (1×) IF-PB04K (1×) IF-PB09A (1×) IRQA-mPCIB09A (1×) IRQB-mPCIB04E (2×) IRQ-CAB04N (1×) IRQ-CAB07A (2×) IRQ-CAB04E (2×) IRQ-PCIB07G (1×) IRQ-PCIB09A (2×) IRQ-PCIB01B (1×) KEYBOARDB04A (2×) KEYBOARDB09B (1×) KEYBOARDB04A (3×) LAMP-ONB01B (1×) LAMP-ON-OUTB04A (1×) LAMP-ON-OUTB05E (1×) LAMP-ON-OUTB05H (2×) LCD-PWR-ONB01B (2×) LED1B04A (2×) LED1B01B (2×) LED2
B04A (2×) LED2B10 (3×) LEFT-SPEAKERB01B (2×) LIGHT-SENSORB04A (1×) LIGHT-SENSORB09A (2×) M66ENB07A (4×) MDO0B07A (4×) MDO1B07A (4×) MDO2B07A (4×) MDO3B07A (4×) MDO4B07A (4×) MDO5B07A (4×) MDO6B07A (4×) MDO7B04A (2×) MHP-SWITCHB08D (3×) MHP-SWITCHB06A (3×) MISOB06F (1×) MM1-A0B06G (1×) MM1-A0B06F (1×) MM1-A1B06G (1×) MM1-A1B06F (1×) MM1-A10B06G (1×) MM1-A10B06F (1×) MM1-A11B06G (1×) MM1-A11B06F (1×) MM1-A12B06G (1×) MM1-A12B06F (1×) MM1-A2B06G (1×) MM1-A2B06F (1×) MM1-A3B06G (1×) MM1-A3B06F (1×) MM1-A4B06G (1×) MM1-A4B06F (1×) MM1-A5B06G (1×) MM1-A5B06F (1×) MM1-A6B06G (1×) MM1-A6B06F (1×) MM1-A7B06G (1×) MM1-A7B06F (1×) MM1-A8B06G (1×) MM1-A8B06F (1×) MM1-A9B06G (1×) MM1-A9B06F (1×) MM1-BA0B06G (1×) MM1-BA0B06F (1×) MM1-BA1B06G (1×) MM1-BA1B06F (1×) MM1-CASB06G (1×) MM1-CASB06F (1×) MM1-CKEB06G (1×) MM1-CKEB06F (1×) MM1-CLK-B06G (1×) MM1-CLK-B06F (1×) MM1-CLK+B06G (1×) MM1-CLK+B06F (1×) MM1-CS0B06G (1×) MM1-CS0B06F (1×) MM1-D0B06G (1×) MM1-D0B06F (1×) MM1-D1B06G (1×) MM1-D1B06F (1×) MM1-D10B06G (1×) MM1-D10B06F (1×) MM1-D11B06G (1×) MM1-D11B06F (1×) MM1-D12B06G (1×) MM1-D12B06F (1×) MM1-D13B06G (1×) MM1-D13B06F (1×) MM1-D14B06G (1×) MM1-D14B06F (1×) MM1-D15B06G (1×) MM1-D15B06F (1×) MM1-D2B06G (1×) MM1-D2B06F (1×) MM1-D3B06G (1×) MM1-D3B06F (1×) MM1-D4B06G (1×) MM1-D4B06F (1×) MM1-D5B06G (1×) MM1-D5B06F (1×) MM1-D6B06G (1×) MM1-D6B06F (1×) MM1-D7B06G (1×) MM1-D7B06F (1×) MM1-D8B06G (1×) MM1-D8B06F (1×) MM1-D9B06G (1×) MM1-D9B06F (1×) MM1-DQS0B06G (1×) MM1-DQS0B06F (1×) MM1-DQS1B06G (1×) MM1-DQS1B06F (1×) MM1-RASB06G (1×) MM1-RAS
Circuit Diagrams and PWB Layouts EN 139Q549.3E LA 10.
2009-Aug-07
SSB: SRP List Part 2
3104 313 6343.218310_701_090309.eps
090309
Netname Schematic
B06F (1×) MM1-WEB06G (1×) MM1-WEB07A (4×) MOCLK_VS2B06A (3×) MOSIB07A (4×) MOSTRTB07A (4×) MOVALB09A (2×) MPCIACTB06G (1×) MSEL0B06G (1×) MSEL1B06G (1×) MSEL2B06G (1×) MSEL3B07F (2×) NAND-AD(0)B07F (2×) NAND-AD(1)B07F (2×) NAND-AD(2)B07F (2×) NAND-AD(3)B07F (2×) NAND-AD(4)B07F (2×) NAND-AD(5)B07F (2×) NAND-AD(6)B07F (2×) NAND-AD(7)B07F (2×) NAND-ALEB07F (2×) NAND-CLEB07F (2×) NAND-REnB07F (2×) NAND-WEnB06G (2×) nCEB06G (2×) nCONFIGB06E (1×) nCSOB06G (1×) nCSOB06G (2×) nSTATUSB07D (6×) PCEC-HDMIB07E (2×) PCEC-HDMIB04F (1×) PCI-AD0B05G (1×) PCI-AD0B07F (1×) PCI-AD0B07G (1×) PCI-AD0B07H (1×) PCI-AD0B09A (1×) PCI-AD0B04F (1×) PCI-AD1B05G (1×) PCI-AD1B07F (1×) PCI-AD1B07G (1×) PCI-AD1B07H (2×) PCI-AD1B09A (1×) PCI-AD1B04F (1×) PCI-AD10B05G (1×) PCI-AD10B07G (1×) PCI-AD10B07H (1×) PCI-AD10B09A (1×) PCI-AD10B04F (1×) PCI-AD11B05G (1×) PCI-AD11B07G (1×) PCI-AD11B07H (1×) PCI-AD11B09A (2×) PCI-AD11B04F (1×) PCI-AD12B05G (1×) PCI-AD12B07G (1×) PCI-AD12B07H (1×) PCI-AD12B09A (2×) PCI-AD12B04F (1×) PCI-AD13B05G (1×) PCI-AD13B07G (1×) PCI-AD13B07H (1×) PCI-AD13B09A (2×) PCI-AD13B04F (1×) PCI-AD14B05G (1×) PCI-AD14B07G (1×) PCI-AD14B07H (1×) PCI-AD14B09A (1×) PCI-AD14B04F (1×) PCI-AD15B05G (1×) PCI-AD15B07G (1×) PCI-AD15B09A (1×) PCI-AD15B04F (1×) PCI-AD16B05G (1×) PCI-AD16B07G (1×) PCI-AD16B07H (1×) PCI-AD16B09A (1×) PCI-AD16B04F (1×) PCI-AD17B05G (1×) PCI-AD17B07G (1×) PCI-AD17B07H (1×) PCI-AD17B09A (1×) PCI-AD17B04F (1×) PCI-AD18B05G (1×) PCI-AD18B07G (1×) PCI-AD18B07H (1×) PCI-AD18B09A (1×) PCI-AD18B04F (1×) PCI-AD19B05G (1×) PCI-AD19B07G (1×) PCI-AD19B07H (1×) PCI-AD19B09A (1×) PCI-AD19B04F (1×) PCI-AD2B05G (1×) PCI-AD2B07G (1×) PCI-AD2B07H (1×) PCI-AD2B09A (1×) PCI-AD2B04F (1×) PCI-AD20B05G (1×) PCI-AD20B07G (1×) PCI-AD20B09A (1×) PCI-AD20B04F (1×) PCI-AD21B05G (1×) PCI-AD21B07G (1×) PCI-AD21B09A (1×) PCI-AD21B04F (1×) PCI-AD22B05G (1×) PCI-AD22B07G (1×) PCI-AD22B07H (1×) PCI-AD22B09A (1×) PCI-AD22B04F (1×) PCI-AD23B05G (1×) PCI-AD23B07G (2×) PCI-AD23B07H (1×) PCI-AD23B09A (1×) PCI-AD23B04F (2×) PCI-AD24B05G (1×) PCI-AD24B07F (1×) PCI-AD24B07G (1×) PCI-AD24B07H (1×) PCI-AD24B09A (1×) PCI-AD24B04F (1×) PCI-AD25
B05G (2×) PCI-AD25B07F (1×) PCI-AD25B07G (1×) PCI-AD25B07H (1×) PCI-AD25B09A (1×) PCI-AD25B04F (1×) PCI-AD26B05G (1×) PCI-AD26B07F (1×) PCI-AD26B07G (1×) PCI-AD26B07H (1×) PCI-AD26B09A (1×) PCI-AD26B04F (1×) PCI-AD27B05G (1×) PCI-AD27B07F (1×) PCI-AD27B07G (1×) PCI-AD27B07H (1×) PCI-AD27B09A (1×) PCI-AD27B04F (1×) PCI-AD28B05G (1×) PCI-AD28B07F (1×) PCI-AD28B07G (1×) PCI-AD28B07H (1×) PCI-AD28B09A (1×) PCI-AD28B04F (1×) PCI-AD29B05G (1×) PCI-AD29B07F (1×) PCI-AD29B07G (1×) PCI-AD29B07H (1×) PCI-AD29B09A (1×) PCI-AD29B04F (1×) PCI-AD3B05G (1×) PCI-AD3B07G (1×) PCI-AD3B07H (1×) PCI-AD3B09A (1×) PCI-AD3B04F (1×) PCI-AD30B05G (1×) PCI-AD30B07F (1×) PCI-AD30B07G (1×) PCI-AD30B07H (1×) PCI-AD30B09A (1×) PCI-AD30B04F (1×) PCI-AD31B05G (1×) PCI-AD31B07F (1×) PCI-AD31B07G (1×) PCI-AD31B07H (1×) PCI-AD31B09A (1×) PCI-AD31B04F (1×) PCI-AD4B05G (1×) PCI-AD4B07G (1×) PCI-AD4B07H (1×) PCI-AD4B09A (1×) PCI-AD4B04F (1×) PCI-AD5B05G (1×) PCI-AD5B07G (1×) PCI-AD5B07H (1×) PCI-AD5B09A (1×) PCI-AD5B04F (1×) PCI-AD6B05G (1×) PCI-AD6B07G (1×) PCI-AD6B07H (1×) PCI-AD6B09A (1×) PCI-AD6B04F (1×) PCI-AD7B05G (1×) PCI-AD7B07G (1×) PCI-AD7B07H (1×) PCI-AD7B09A (1×) PCI-AD7B04F (1×) PCI-AD8B05G (1×) PCI-AD8B07G (1×) PCI-AD8B07H (1×) PCI-AD8B09A (1×) PCI-AD8B04F (1×) PCI-AD9B05G (1×) PCI-AD9B07G (1×) PCI-AD9B07H (1×) PCI-AD9B09A (1×) PCI-AD9B04F (1×) PCI-CBE0B05G (1×) PCI-CBE0B07G (1×) PCI-CBE0B09A (1×) PCI-CBE0B04F (1×) PCI-CBE1B05G (1×) PCI-CBE1B07F (1×) PCI-CBE1B07G (1×) PCI-CBE1B07H (1×) PCI-CBE1B09A (1×) PCI-CBE1B04F (1×) PCI-CBE2B05G (1×) PCI-CBE2B07F (1×) PCI-CBE2B07G (1×) PCI-CBE2B07H (1×) PCI-CBE2B09A (1×) PCI-CBE2B04F (1×) PCI-CBE3B05G (1×) PCI-CBE3B07G (1×) PCI-CBE3B09A (1×) PCI-CBE3B04F (2×) PCI-CLK-ETHERNETB07G (1×) PCI-CLK-ETHERNETB04F (2×) PCI-CLK-MINIB09A (1×) PCI-CLK-MINIB04E (1×) PCI-CLK-OUTB04F (3×) PCI-CLK-OUTB04F (2×) PCI-CLK-PNX5100B05G (1×) PCI-CLK-PNX5100B04F (3×) PCI-CLK-PNX8535B09A (2×) PCI-CLKRUNB04F (2×) PCI-DEVSELB05G (1×) PCI-DEVSELB07G (1×) PCI-DEVSELB09A (1×) PCI-DEVSELB04F (2×) PCI-FRAMEB05G (1×) PCI-FRAMEB07G (1×) PCI-FRAMEB09A (1×) PCI-FRAMEB04F (2×) PCI-GNTB04F (2×) PCI-GNT-BB04F (1×) PCI-GNT-ETHB07G (1×) PCI-GNT-ETHB04F (1×) PCI-GNT-MINIB09A (1×) PCI-GNT-MINIB04F (2×) PCI-IRDYB05G (1×) PCI-IRDYB07G (1×) PCI-IRDY
B09A (1×) PCI-IRDYB04F (1×) PCI-PARB05G (1×) PCI-PARB07G (1×) PCI-PARB09A (1×) PCI-PARB04F (2×) PCI-PERRB05G (1×) PCI-PERRB07G (1×) PCI-PERRB09A (1×) PCI-PERRB04F (2×) PCI-REQB04F (2×) PCI-REQ-BB04F (1×) PCI-REQ-ETHB07G (1×) PCI-REQ-ETHB04F (1×) PCI-REQ-MINIB09A (1×) PCI-REQ-MINIB04F (2×) PCI-SERRB05G (1×) PCI-SERRB07G (1×) PCI-SERRB09A (1×) PCI-SERRB04F (2×) PCI-STOPB05G (1×) PCI-STOPB07G (1×) PCI-STOPB09A (1×) PCI-STOPB04F (2×) PCI-TRDYB05G (1×) PCI-TRDYB07G (1×) PCI-TRDYB09A (1×) PCI-TRDYB07A (1×) PCMCIA-A0B07H (1×) PCMCIA-A0B07A (1×) PCMCIA-A1B07H (1×) PCMCIA-A1B07A (1×) PCMCIA-A10B07H (1×) PCMCIA-A10B07A (1×) PCMCIA-A11B07H (1×) PCMCIA-A11B07A (1×) PCMCIA-A12B07H (1×) PCMCIA-A12B07A (1×) PCMCIA-A13B07H (1×) PCMCIA-A13B07A (1×) PCMCIA-A14B07H (1×) PCMCIA-A14B07A (1×) PCMCIA-A2B07H (1×) PCMCIA-A2B07A (1×) PCMCIA-A3B07H (1×) PCMCIA-A3B07A (1×) PCMCIA-A4B07H (1×) PCMCIA-A4B07A (1×) PCMCIA-A5B07H (1×) PCMCIA-A5B07A (1×) PCMCIA-A6B07H (1×) PCMCIA-A6B07A (1×) PCMCIA-A7B07H (1×) PCMCIA-A7B07A (1×) PCMCIA-A8B07H (1×) PCMCIA-A8B07A (1×) PCMCIA-A9B07H (1×) PCMCIA-A9B07A (1×) PCMCIA-D0B07H (1×) PCMCIA-D0B07A (1×) PCMCIA-D1B07H (1×) PCMCIA-D1B07A (1×) PCMCIA-D2B07H (1×) PCMCIA-D2B07A (1×) PCMCIA-D3B07H (1×) PCMCIA-D3B07A (1×) PCMCIA-D4B07H (1×) PCMCIA-D4B07A (1×) PCMCIA-D5B07H (1×) PCMCIA-D5B07A (1×) PCMCIA-D6B07H (1×) PCMCIA-D6B07A (1×) PCMCIA-D7B07H (1×) PCMCIA-D7B07A (5×) PCMCIA-VCC-VPPB02A (2×) PDNB02B (1×) PDNB02A (1×) PDPB02B (1×) PDPB09A (2×) PMEB05A (3×) PNX5100-DDR2-A0B05A (3×) PNX5100-DDR2-A1B05A (3×) PNX5100-DDR2-A10B05A (3×) PNX5100-DDR2-A11B05A (3×) PNX5100-DDR2-A12B05A (3×) PNX5100-DDR2-A2B05A (3×) PNX5100-DDR2-A3B05A (3×) PNX5100-DDR2-A4B05A (3×) PNX5100-DDR2-A5B05A (3×) PNX5100-DDR2-A6B05A (3×) PNX5100-DDR2-A7B05A (3×) PNX5100-DDR2-A8B05A (3×) PNX5100-DDR2-A9B05A (3×) PNX5100-DDR2-BA0B05A (3×) PNX5100-DDR2-BA1B05A (3×) PNX5100-DDR2-CASB05A (3×) PNX5100-DDR2-CKEB05A (3×) PNX5100-DDR2-CLK_NB05A (3×) PNX5100-DDR2-CLK_PB05A (3×) PNX5100-DDR2-CSB05A (2×) PNX5100-DDR2-D0B05A (2×) PNX5100-DDR2-D1B05A (2×) PNX5100-DDR2-D10B05A (2×) PNX5100-DDR2-D11B05A (2×) PNX5100-DDR2-D12B05A (2×) PNX5100-DDR2-D13B05A (2×) PNX5100-DDR2-D14B05A (2×) PNX5100-DDR2-D15B05A (2×) PNX5100-DDR2-D16B05A (2×) PNX5100-DDR2-D17B05A (2×) PNX5100-DDR2-D18B05A (2×) PNX5100-DDR2-D19B05A (2×) PNX5100-DDR2-D2B05A (2×) PNX5100-DDR2-D20B05A (2×) PNX5100-DDR2-D21B05A (2×) PNX5100-DDR2-D22B05A (2×) PNX5100-DDR2-D23B05A (2×) PNX5100-DDR2-D24B05A (2×) PNX5100-DDR2-D25B05A (2×) PNX5100-DDR2-D26B05A (2×) PNX5100-DDR2-D27B05A (2×) PNX5100-DDR2-D28B05A (2×) PNX5100-DDR2-D29B05A (2×) PNX5100-DDR2-D3
B05A (2×) PNX5100-DDR2-D30B05A (2×) PNX5100-DDR2-D31B05A (2×) PNX5100-DDR2-D4B05A (2×) PNX5100-DDR2-D5B05A (2×) PNX5100-DDR2-D6B05A (2×) PNX5100-DDR2-D7B05A (2×) PNX5100-DDR2-D8B05A (2×) PNX5100-DDR2-D9B05A (2×) PNX5100-DDR2-DQM0B05A (2×) PNX5100-DDR2-DQM1B05A (2×) PNX5100-DDR2-DQM2B05A (2×) PNX5100-DDR2-DQM3B05A (2×) PNX5100-DDR2-DQS0_NB05A (2×) PNX5100-DDR2-DQS0_PB05A (2×) PNX5100-DDR2-DQS1_NB05A (2×) PNX5100-DDR2-DQS1_PB05A (2×) PNX5100-DDR2-DQS2_NB05A (2×) PNX5100-DDR2-DQS2_PB05A (2×) PNX5100-DDR2-DQS3_NB05A (2×) PNX5100-DDR2-DQS3_PB05A (3×) PNX5100-DDR2-ODTB05A (3×) PNX5100-DDR2-RASB05A (2×) PNX5100-DDR2-VREF-CTRLB05A (3×) PNX5100-DDR2-VREF-DDRB05A (3×) PNX5100-DDR2-WEB05F (1×) PNX5100-RST-OUTB05I (1×) PNX5100-RST-OUTB01B (1×) POWER-OKB04A (2×) POWER-OKB06A (2×) PROG-BB04A (2×) PSENB01B (1×) RCB04A (2×) RCB04A (1×) RC-INB08C (1×) RC-INB04A (1×) RC-OUTB08C (1×) RC-OUTB04A (4×) RC-UPB08D (1×) RC-UPB07D (2×) REF-3V3B04A (2×) REGIMBEAU_CVBS-SWITCHB08A (1×) REGIMBEAU_CVBS-SWITCHB04A (2×) RESET-AUDIOB04M (2×) RESET-AUDIOB04N (1×) RESET-BOLT-ONB07F (1×) RESET-BOLT-ONB04A (2×) RESET-ETHERNETB07G (2×) RESET-ETHERNETB09A (1×) RESET-ETHERNETB09A (2×) RESET-mPCIB04A (3×) RESET-NVMB04A (2×) RESET-PNX5100B05F (1×) RESET-PNX5100B04A (2×) RESET-STBYB02B (1×) RESET-SYSTEMB04A (2×) RESET-SYSTEMB04B (1×) RESET-SYSTEMB04E (1×) RESET-SYSTEMB02A (4×) RF-AGCB02B (1×) RF-AGCB10 (3×) RIGHT-SPEAKERB04H (1×) RREF-PNX85XXB04P (2×) RREF-PNX85XXB04K (1×) R-VGAB08B (1×) R-VGAB05B (1×) RX51001A-B06D (3×) RX51001A-B05B (1×) RX51001A+B06D (3×) RX51001A+B05B (1×) RX51001B-B06D (3×) RX51001B-B05B (1×) RX51001B+B06D (3×) RX51001B+B05B (1×) RX51001C-B06D (3×) RX51001C-B05B (1×) RX51001C+B06D (3×) RX51001C+B05B (1×) RX51001CLK-B06D (3×) RX51001CLK-B05B (1×) RX51001CLK+B06D (3×) RX51001CLK+B05B (1×) RX51001D-B06D (3×) RX51001D-B05B (1×) RX51001D+B06D (3×) RX51001D+B05B (1×) RX51001E-B06D (3×) RX51001E-B05B (1×) RX51001E+B06D (3×) RX51001E+B05B (1×) RX51002A-B06D (3×) RX51002A-B05B (1×) RX51002A+B06D (3×) RX51002A+B05B (1×) RX51002B-B06D (3×) RX51002B-B05B (1×) RX51002B+B06D (3×) RX51002B+B05B (1×) RX51002C-B06D (3×) RX51002C-B05B (1×) RX51002C+B06D (3×) RX51002C+B05B (1×) RX51002CLK-B06D (3×) RX51002CLK-B05B (1×) RX51002CLK+B06D (3×) RX51002CLK+B05B (1×) RX51002D-B06D (3×) RX51002D-B05B (1×) RX51002D+B06D (3×) RX51002D+B05B (1×) RX51002E-B06D (3×) RX51002E-B05B (1×) RX51002E+B06D (3×) RX51002E+B08D (3×) RXDB04E (2×) RXD-MIPSB08D (3×) RXD-MIPSB04E (2×) RXD-MIPS2B06B (1×) RXD-MIPS2B04A (2×) RXD-UPB08D (4×) RXD-UPB04E (2×) SCL1B04E (3×) SCL2B04E (2×) SCL3
B05F (1×) SCL-AMBI-3V3B06A (1×) SCL-AMBI-3V3B06G (1×) SCL-AMBI-3V3B04N (1×) SCL-BOLT-ONB06A (3×) SCL-BOLT-ONB08D (1×) SCL-BOLT-ONB05E (2×) SCL-DISPB06A (3×) SCL-DISPB06D (1×) SCL-DISPB01B (1×) SCL-SETB04E (2×) SCL-SETB06A (5×) SCL-SETB06C (2×) SCL-SETB06A (2×) SCL-SET0B06A (2×) SCL-SET1B02B (2×) SCL-SSBB04E (2×) SCL-SSBB05F (2×) SCL-SSBB06A (1×) SCL-SSBB06G (1×) SCL-SSBB07D (1×) SCL-SSBB08D (1×) SCL-SSBB04A (3×) SCL-UP-MIPSB04E (3×) SCL-UP-MIPSB04E (2×) SDA1B04E (3×) SDA2B04E (2×) SDA3B05F (1×) SDA-AMBI-3V3B06A (1×) SDA-AMBI-3V3B06G (1×) SDA-AMBI-3V3B04N (1×) SDA-BOLT-ONB06A (3×) SDA-BOLT-ONB08D (1×) SDA-BOLT-ONB05E (2×) SDA-DISPB06A (3×) SDA-DISPB06D (1×) SDA-DISPB01B (1×) SDA-SETB04E (2×) SDA-SETB06A (5×) SDA-SETB06C (2×) SDA-SETB06A (2×) SDA-SET0B06A (2×) SDA-SET1B02B (2×) SDA-SSBB04E (2×) SDA-SSBB05F (2×) SDA-SSBB06A (1×) SDA-SSBB06G (1×) SDA-SSBB07D (1×) SDA-SSBB08D (1×) SDA-SSBB04A (3×) SDA-UP-MIPSB04E (3×) SDA-UP-MIPSB04A (2×) SDMB04B (1×) SDMB04P (2×) SENSE+1V2-PNX85XXB04L (1×) SPDIF-IN1B08D (1×) SPDIF-IN1B04L (1×) SPDIF-OUTB08B (1×) SPDIF-OUTB04A (2×) SPI-CLKB04A (2×) SPI-CSBB04A (2×) SPI-PROGB04B (1×) SPI-PROGB04A (3×) SPI-SDIB04A (2×) SPI-SDOB04A (3×) SPI-WPB01B (1×) STANDBYB04A (2×) STANDBYB08D (1×) STANDBYB04A (2×) SUPPLY-FAULTB06C (2×) TACHO1B06C (2×) TACHO1-INVB06C (2×) TACHO2B06C (2×) TACHO2-INVB06E (1×) TCKB06G (1×) TCKB06E (1×) TDIB06G (1×) TDIB06E (1×) TDOB06G (1×) TDOB06E (1×) TMSB06G (1×) TMSB04N (2×) TSINO-DATA0B07F (1×) TSINO-DATA0B04N (2×) TSINO-DATA1B07F (1×) TSINO-DATA1B04N (2×) TSINO-DATA2B07F (1×) TSINO-DATA2B04N (2×) TSINO-DATA3B07F (1×) TSINO-DATA3B04N (2×) TSINO-DATA4B07F (1×) TSINO-DATA4B04N (2×) TSINO-DATA5B07F (1×) TSINO-DATA5B04N (2×) TSINO-DATA6B07F (1×) TSINO-DATA6B04N (2×) TSINO-DATA7B07F (1×) TSINO-DATA7B04N (2×) TSO-BIT-CLKB07F (1×) TSO-BIT-CLKB04N (2×) TSO-BIT-ERRB04N (2×) TSO-BIT-VALIDB07F (1×) TSO-BIT-VALIDB04N (2×) TSO-SYNCB07F (1×) TSO-SYNCB02A (5×) TUN-P1B02A (5×) TUN-P10B02A (4×) TUN-P11B02A (5×) TUN-P2B02A (6×) TUN-P3B02A (5×) TUN-P4B02A (5×) TUN-P5B02A (5×) TUN-P6B02A (5×) TUN-P7B02A (5×) TUN-P8B02A (6×) TUN-P9B02A (2×) TUN-SCLB02B (2×) TUN-SCLB02A (2×) TUN-SDAB02B (2×) TUN-SDAB05E (3×) TX1A-B05E (3×) TX1A+B05E (3×) TX1B-B05E (3×) TX1B+
B05E (3×) TX1C-B05E (3×) TX1C+B05E (3×) TX1CLK-B05E (3×) TX1CLK+B05E (3×) TX1D-B05E (3×) TX1D+B05E (3×) TX1E-B05E (3×) TX1E+B05E (3×) TX2A-B05E (3×) TX2A+B05E (3×) TX2B-B05E (3×) TX2B+B05E (3×) TX2C-B05E (3×) TX2C+B05E (3×) TX2CLK-B05E (3×) TX2CLK+B05E (3×) TX2D-B05E (3×) TX2D+B05E (3×) TX2E-B05E (3×) TX2E+B05E (3×) TX3A-B05E (3×) TX3A+B05E (3×) TX3B-B05E (3×) TX3B+B05E (3×) TX3C-B05E (3×) TX3C+B05E (3×) TX3CLK-B05E (3×) TX3CLK+B05E (3×) TX3D-B05E (3×) TX3D+B05E (3×) TX3E-B05E (3×) TX3E+B05E (3×) TX4A-B05E (3×) TX4A+B05E (3×) TX4B-B05E (3×) TX4B+B05E (3×) TX4C-B05E (3×) TX4C+B05E (3×) TX4CLK-B05E (3×) TX4CLK+B05E (3×) TX4D-B05E (3×) TX4D+B05E (3×) TX4E-B05E (3×) TX4E+B04O (1×) TX851A-B06D (1×) TX851A-B06G (1×) TX851A-B04O (1×) TX851A+B06D (1×) TX851A+B06G (1×) TX851A+B04O (1×) TX851B-B06D (1×) TX851B-B06G (1×) TX851B-B04O (1×) TX851B+B06D (1×) TX851B+B06G (2×) TX851B+B04O (1×) TX851C-B06D (1×) TX851C-B06G (1×) TX851C-B04O (1×) TX851C+B06D (1×) TX851C+B06G (1×) TX851C+B04O (1×) TX851CLK-B06D (1×) TX851CLK-B06G (1×) TX851CLK-B04O (1×) TX851CLK+B06D (1×) TX851CLK+B06G (1×) TX851CLK+B04O (1×) TX851D-B06D (1×) TX851D-B06G (1×) TX851D-B04O (1×) TX851D+B06D (1×) TX851D+B06G (1×) TX851D+B04O (1×) TX851E-B06D (1×) TX851E-B06G (1×) TX851E-B04O (1×) TX851E+B06D (1×) TX851E+B06G (1×) TX851E+B04O (1×) TX852A-B06D (1×) TX852A-B06G (1×) TX852A-B04O (1×) TX852A+B06D (1×) TX852A+B06G (1×) TX852A+B04O (1×) TX852B-B06D (1×) TX852B-B06G (1×) TX852B-B04O (1×) TX852B+B06D (1×) TX852B+B06G (1×) TX852B+B04O (1×) TX852C-B06D (1×) TX852C-B06G (1×) TX852C-B04O (1×) TX852C+B06D (1×) TX852C+B06G (1×) TX852C+B04O (1×) TX852CLK-B06D (1×) TX852CLK-B06G (1×) TX852CLK-B04O (1×) TX852CLK+B06D (1×) TX852CLK+B06G (1×) TX852CLK+B04O (1×) TX852D-B06D (1×) TX852D-B06G (1×) TX852D-B04O (1×) TX852D+B06D (1×) TX852D+B06G (1×) TX852D+B04O (1×) TX852E-B06D (1×) TX852E-B06G (1×) TX852E-B04O (1×) TX852E+B06D (1×) TX852E+B06G (1×) TX852E+B05E (1×) TXCLK-B06A (1×) TXCLK-B05E (1×) TXCLK+B06A (1×) TXCLK+B08D (3×) TXDB05E (1×) TXDAT-B06A (1×) TXDAT-
B05E (1×) TXDAT+B06A (1×) TXDAT+B04E (2×) TXD-MIPSB08D (3×) TXD-MIPSB04E (2×) TXD-MIPS2B06B (1×) TXD-MIPS2B04A (2×) TXD-UPB08D (4×) TXD-UPB06D (1×) TXF1A-B06G (1×) TXF1A-B06D (1×) TXF1A+B06G (1×) TXF1A+B06D (1×) TXF1B-B06G (1×) TXF1B-B06D (1×) TXF1B+B06G (1×) TXF1B+B06D (1×) TXF1C-B06G (1×) TXF1C-B06D (1×) TXF1C+B06G (1×) TXF1C+B06D (1×) TXF1CLK-B06G (1×) TXF1CLK-B06D (1×) TXF1CLK+B06G (1×) TXF1CLK+B06D (1×) TXF1D-B06G (1×) TXF1D-B06D (1×) TXF1D+B06G (1×) TXF1D+B06D (1×) TXF1E-B06G (1×) TXF1E-B06D (1×) TXF1E+B06G (1×) TXF1E+B06D (1×) TXF2A-B06G (1×) TXF2A-B06D (1×) TXF2A+B06G (1×) TXF2A+B06D (1×) TXF2B-B06G (1×) TXF2B-B06D (1×) TXF2B+B06G (1×) TXF2B+B06D (1×) TXF2C-B06G (1×) TXF2C-B06D (1×) TXF2C+B06G (1×) TXF2C+B06D (1×) TXF2CLK-B06G (1×) TXF2CLK-B06D (1×) TXF2CLK+B06G (1×) TXF2CLK+B06D (1×) TXF2D-B06G (1×) TXF2D-B06D (1×) TXF2D+B06G (1×) TXF2D+B06D (1×) TXF2E-B06G (1×) TXF2E-B06D (1×) TXF2E+B06G (1×) TXF2E+B04A (2×) UART-SWITCHB08D (2×) UART-SWITCHB08D (2×) UART-SWITCHnB04E (2×) USB20-DMB07C (1×) USB20-DMB04E (2×) USB20-DPB07C (1×) USB20-DPB04E (1×) USB-OCB07C (1×) USB-OCB04P (2×) VDDA-ADCB04L (4×) VDDA-AUDIOB04P (2×) VDDA-AUDIOB04L (1×) VDDA-DACB04P (2×) VDDA-DACB04O (1×) VDDA-LVDSB04P (1×) VDDA-LVDSB06F (2×) VREF-DDR1B06F (1×) VREF-FPGA1B06G (16×) VREF-FPGA1B01A (1×) VSWB01B (1×) VSWB04K (1×) V-SYNC-VGAB08B (1×) V-SYNC-VGAB04E (1×) WC-EEPROM-PNX5100B05F (2×) WC-EEPROM-PNX5100B07D (1×) WC-EEPROM-PNX5100B04A (2×) WP-NANDFLASHB07F (2×) WP-NANDFLASHB07D (1×) WRITE-PROTB07E (1×) WRITE-PROTB08B (1×) WRITE-PROTB04F (1×) XIO-ACKB07F (2×) XIO-ACKB04F (1×) XIO-SEL-NANDB07F (2×) XIO-SEL-NANDB04K (1×) Y_CVBS-MON-OUTB08B (1×) Y_CVBS-MON-OUTB08A (1×) Y_CVBS-MON-OUT-SCB08B (1×) Y_CVBS-MON-OUT-SC
EN 140Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Layout Small Signal Board (Top Side)
3104 313 6357.1 18320_550_090724.eps090729
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1022
1023
1024
1025
1026
1027
1028
1029
1235
1240 1241
1242
1246
1250
1255
1735
1A01
1C00
1D381D50
1D51 1D521D
53
1D54
1E00
1E011E021E031E04
1E05
1E06
1E07
1E10
1E11
1E12
1E13
1E14
1E15
1E16
1E18
1E19
1E22
1E231E24
1E25
1E26
1E27
1E31
1E501E511F00
1F01
1F02
1F05
1F10
1F29
1F51
1F531FA01FA1
1G50
1G51
1H11
1HF0
1HP
0
1HV9
1M01
1M20
1M36
1M591M71
1M95
1M96 1M97
1M99
1N00
1P001P021P031P04
1P05
1P06
1P07
1P0A 1P0B
1P10
1P9A
1P9B
1R07
1R08
1R121R20
1T011T11
1T21 1T25
1U01
1U03
1X01
1X02
1X03
1X04
1X05
1X061X07
1X08
2AC0
2C03 2C452CBK
2CBL2CBM
2CB
N2C
BP
2CB
R
2CBS
2CB
Y
2CG
2
2CH1
2D02
2D05
2D06
2D07 2D08
2D09 2D10
2D11
2D12
2D13
2D14
2D15
2D16
2D17
2D18
2D19
2D20
2D23
2D24
2D30
2D31
2E01
2E03
2E04
2E05
2E06
2E07
2E08
2E09
2E10
2E11
2E12
2E13
2E14
2E152E16
2E17
2E18
2E19
2E20
2E21
2E22
2E24
2E25
2E26
2E27
2E28
2E29
2E30
2E312E32
2E33
2E34
2E35
2E36
2E37
2E38
2E39
2E40
2E41
2E42
2E44
2E45
2E46
2E49
2E50
2E51
2E52
2E53
2E54
2E55
2E56
2E57
2E58
2E64 2E65
2E67
2E68
2E70
2E71
2E72
2E73
2E74
2E80
2E82
2E87
2E88
2E90
2E91
2E92
2E93
2E95
2E96
2E97
2E98
2E99
2EA
1
2EA
2
2EA
3
2EA
4
2EA
5
2EA
9
2EAA
2EAB
2EA
E
2EA
F2E
AK
2EA
L
2EA
M
2EA
N
2EA
P
2EB3
2EB4
2EB
6
2EC
B
2EC
C
2EC
D
2EC
E
2ECH
2F00
2F01
2F02
2F06
2F07
2F08
2F09
2F10
2F28
2F29
2F342F35
2F40
2F41
2F42
2F43
2F46 2F47
2F48
2F49
2F50 2F512F52
2F53
2F54
2F55
2F572F602F
61
2F74
2FHA
2FHL
2FJ3
2FJ4
2FJ5
2FJ6
2FJ7
2FJD
2FL1
2FL2
2FL62FL7
2FLD
2FLE
2FLF
2FLH2FLP
2FN
9
2FNA
2FND2FNE
2H02
2H06
2H08
2H09
2H25
2H26
2H44
2H80
2H81
2H82
2H83
2H84
2H85
2H86
2H87
2H88
2H89
2H90
2H91
2H92
2H93
2H942H95
2H96
2H972H98
2H99
2HF
02HF
1
2HM
1
2HM
2
2HM
3
2HM
4
2HM5
2HM
8
2HMJ
2HM
P
2HM
T
2HM
Y
2HN
1
2HR
0
2HR
1
2HR
2
2HR
3
2HR
42H
R5
2HR
62H
R7
2HR
8
2HR
9
2HR
A
2HR
B
2HR
C
2HR
D
2HR
E
2HR
F
2HR
G
2HR
H
2HR
J
2HR
K
2HRZ
2HS1
2HS2
2HS3
2HS4
2HS72HS8 2HS9
2HSA2HSB
2HSC
2HSD 2HSE2HSF
2HSJ
2HSK2HSM
2HSN2HSP
2HSR
2HSS
2HS
U
2HT8
2HTB
2HTC 2HTD
2HTE
2HTF
2HTG
2HTL
2HTP 2HTR
2HTU
2HTV
2HTZ
2HU0
2HUB
2HUC
2HV
A2HV
B
2HVC
2HV
D
2HVE
2HYC
2P03
2P05
2P12
2P13
2P14
2P15
2P17
2P24
2P26
2P27
2P28
2P31
2P472P49
2P56
2P57
2P58
2P59
2P60
2P61
2P62
2T10
2T112T
122T
14
2T222T23 2T25
2T262T27
2T282T29 2T
35 2T36
2T37
2T39
2T60
2T61
2T62
2T63
2T65
2U00
2U01
2U06
2U0F
2U0J
2U0K
2U0R
2U0W
2U0Y
2U0Z
2U10
2U11 2U14
2U15
2U19
2U1B
2U21
2U22
2U23
2U24
2U25
2U26
2U2C
2U30
2U31
2U32
2U33
2U34
2U35
2U36
2U40
2U41
2U42
2U43
2U44
2U45
2U46
2U47
2U48
2U49
2U51
2U52
2U53
2U8A
2U8C
2U8D
2U8E
2U8F
2U8G
2U8H
2U8K
2U8M
2U90
3AC0
3C03
3C05
3C06 3C07
3C08 3C093C11
3C12
3C13
3C14
3C15
3C16
3C17
3C18
3C19
3C24
3C25
3C263C27
3C28
3C29
3C30 3C31
3C32
3C33
3C34
3C35
3C36
3C41
3C42
3C95
3CA2
3CA3
3CA93CAA
3CA
B
3CA
C3C
AD
3CAE
3CD0
3CFK 3CFL
3CH8
3CH
9
3CHA
3CHB
3CHF
3CH
G
3D06
3D11
3E00
3E01
3E02
3E03
3E04
3E05
3E06
3E07
3E08
3E09
3E10
3E11
3E12
3E13
3E14
3E15
3E16
3E17
3E18
3E19
3E20
3E21
3E22
3E23
3E24
3E25
3E26
3E27
3E28
3E29
3E30
3E31
3E32
3E33
3E34
3E35
3E36
3E37
3E38
3E39
3E40
3E41
3E42
3E433E44
3E45
3E463E47
3E48
3E50
3E51
3E52
3E53
3E543E55
3E56
3E57
3E58
3E59
3E60
3E61
3E62
3E63
3E64
3E65
3E67
3E68
3E69
3E70
3E71
3E72
3E73
3E74
3E75
3E76
3E77
3E78
3E79
3E80
3E81
3E82
3E85
3E86
3E87 3E88
3E893E90
3E92
3E93
3E953E96
3E97
3E98
3EA7
3EA8
3EA9
3EA
T
3EA
Y
3EA
Z
3EB0
3EB
3
3EB6 3EB7
3EB8
3EB9
3EC
0
3EC
1
3EC
2
3EC
3
3EC
4
3EC
5
3EC
9
3EC
E
3EC
F
3EC
G
3EC
H
3ECK
3EC
L
3ECM
3ECN
3EC
P
3ECS
3ED
1
3ED3
3F00
3F01
3F02
3F06
3F11
3F17
3F18
3F19
3F20
3F213F
24
3F29
3F30
3F31
3F363F37
3F383F39
3F40
3F51
3F563F57
3F59
3F68
3F693F71 3F72
3F73
3F793F80
3FE
0
3FE
33F
E6
3FF
4
3FF
5
3FF
63F
F7
3FF
8
3FF
93F
FA
3FF
B
3FF
C
3FF
E
3FF
H
3FF
L
3FF
P
3FF
T
3FF
W
3FG13FG2
3FG33FG4
3FG5
3FG6
3FG
8
3FG
93F
GA
3FG
B3F
GC
3FG
E
3FH
4
3FH5
3FH
8
3FH
9
3FH
B
3FL0
3FL1
3FL2
3FL3
3FL4
3FL5
3FL6
3FL7
3FL8
3FL9
3FLA
3FLB
3FLC
3FLD
3FLE
3FLF
3FLG
3FLH
3FLJ
3FLK
3FLL
3H00
3H04
3H05
3H12
3H18
3H22
3H24
3H253H29
3H34
3H36
3H40
3H47
3H58
3H64
3H67
3H68
3H71
3H72
3H73
3H79
3H80
3H81
3H82
3H83
3H84
3H85
3H87
3H88
3H893H903H91
3H92
3H93
3H95
3H96
3H97
3H98
3H99
3HB
1
3HB
2
3HB
3
3HB
43H
B5
3HB6
3HB7
3HF
3
3HF5
3HF
D
3HFE
3HMA
3HM
B
3HM
C
3HM
D
3HME
3HML
3HMU
3HM
V
3HM
Z
3HP
0
3HP
1
3HP5
3HPN
3HR0
3HR3
3HR8
3HRC 3HRJ
3HRP
3HRR
3HRS
3HR
T
3HRU
3HRV
3HRW
3HRY3HRZ 3HS0
3HS1
3HS2
3HS33HS4
3HS83HS9
3HSA
3HSB
3HSD
3HS
E
3HSF
3HSH
3HSJ
3HS
M
3HSN
3HSQ
3HSR
3HST
3HSU
3HSV
3HT3
3HT4
3HT8
3HV
3
3HWN
3HWR
3HWV
3P15
3P16
3P18
3P21
3P22
3P28
3P29
3P303P31
3P32
3P34
3P35
3P36
3P37
3P39
3P40
3P42
3P44
3P48
3P57
3P59
3P60
3P62
3P633P64 3P76
3P77
3P80
3P81
3P82
3P83
3P87
3T10
3T11
3T12
3T13 3T14 3T15
3T16
3T22
3T56
3T60
3T62
3T63
3T64
3T653T70
3T71
3T72
3T73
3T74
3T75
3T76
3T77
3T78
3T79
3T95
3U0K
3U1J
3U3V
3U3W
3U41
3U46
3U4A
3U4B
3U55
3U56
3U57
3U58
3U60
3U61
3U62 3U
63
3U64
3U65
3U66
3U67
3U74
3U76
3U80
3U81
3U82
3U83
3U84
3U85
3U86
3U88
3U89
3U90
3U91
3U92
3U93
3U94
3U95
3U96
3U97
3U98
5AC1
5AC2
5AC4
5D01
5D02
5D04
5D05
5E00
5E01
5E03
5E05
5E06
5EA1
5F02
5F03
5FC
5
5FC
6
5FC
7
5FC
8
5FC
9
5FH0
5FL0
5FL1
5H80
5H81
5H82
5H85
5H865H87
5HR0
5HR2
5HR3
5HR5
5HR9
5HRA
5HRC
5HRG
5HRL
5P06
5P07
5P09
5P135P14
5T105T11
5T55
5U00
5U01
5U02
5U03
5U04
5U05
5U06
5U07
5U08
5U09
5U10
5U11
5U12
5U13
5U14
5U15
5U16
5U17
5U18
5U19
5U20
5U21
5U30
5U31
5U32
5U33
6CG2
6E01
6E02
6E03
6E04
6E05
6E06
6E07
6E08
6E09
6E10
6E11
6E12
6E13
6E14
6E15
6E16
6E176E18
6E20
6E21
6E22
6E23
6E24
6E25
6E26
6E286E29
6E30
6E31
6E32
6E34
6E35 6E36
6E37
6E38
6E40
6E41
6E43
6E44
6E45
6E46
6E47
6E48
6E51
6E52
6E53
6F13
6F51
6F82
6F83
6F84
6F85
6FH0
6FH1
6FH2
6FH3
6FH66FH7
6HF
0
6T10
6T11
6U09
6U40
7C00
7C017C02
7CH
07C
H1
7E01
7E03
7E04
7E05
7E09
7E10
7E14
7E18
7E197E20
7EA
17E
A3
7F007F01
7F08
7F51
7F52
7F54
7F55
7F56
7FL07FN0
7H00
7H01
7H03
7H04
7H05
7HD
0
7HF2
7HG0
7HG1
7HM17HM2
7HV0
7N04
7P02
7P07
7P10
7P15
7P16
7P17
7T51
7T52
7T53
7U02
7U057U06
7U08
7U0D
7U0H
7U0M
7U0N
7U10
7U11
7U40
7U41
7U50
9CG9
9CH
0
9E00
9E01
9E02
9E04
9E06
9E10
9E11
9E12
9E13
9E14
9E15
9E169E17
9E189E19
9E20
9E22
9E23
9E24
9E25
9E269E27
9E29
9E30
9E31
9E32
9E33
9E34
9E35
9E37
9EA1
9EA3
9EA
4
9EA5
9F04
9F05
9F07
9F09
9F10
9F11
9F12
9F13
9F14
9F15
9F16
9F17
9F18
9F19 9F209FA1 9FA2
9FH0
9H05
9H069H07 9H08
9H11
9H12
9H13
9H25
9H26
9H27
9H28
9HK0
9P19
9P20
9P21
9P22
9P29
9P30
9P31
9P33
9T10
9T11
9T12 9T13
9T15
9T16 9T18
9T20
9T21
9T23
9T24
9T25
9T27
9T29 9T30
9T409T41
9T63
9U06
9U07
9U08
BCG0
BCG1
BCG2
BC
G3
BN0A
BN0B
BN0C
BN0D
BP1A
BP
1B
BP1C
BP
1D
BP
1EB
P1F
BP
1G
BP1H
BP1J
BP
1K
BP1L
BP1M
BP
1N
BP1P
BP
1R
BP1S
BP1T BP1U BP1V
BP1W
BP50
BP51
BP52
BP
53
BP54
BP55
BP
56
BP57
BP5A
BP5B
BP5C
BP5D
BP5E
BP5F
BP
5G
BP5H
BP5J
BP5K
BP5LBP5M
BP
5N
BP
5P
BP5RBP5S
BP5Z
CC60
CU
70
CU
71
IF32 IF33
IF34
IF35
IF36
IF37
IF38
IF39
IH93
IH94
IH95
IP16
IP68
TH01TH02
TH03TH04TH05
TH
06
TH07TH08
TH
09T
H10
TH
11T
H12
TH
13T
H14
TH
15T
H16
1X09
Circuit Diagrams and PWB Layouts EN 141Q549.3E LA 10.
2009-Aug-07
Layout Small Signal Board (Bottom Side)
3104 313 6357.1 18320_551_090724.eps090729
1C01
1C02
1CD
0
1F03
1F50
1N02
1T50
2A00
2A01
2A02
2A03
2A04
2A05
2A06
2A07
2A08
2A09
2A10
2A11
2A12
2A132A14
2A15
2A16
2A19
2A20
2A21
2A22
2A23
2A24
2A25
2A262A27
2A28
2A29
2A30
2A50
2A51
2A52
2C00
2C01
2C02
2C04
2C13
2C14
2C15
2C16
2C17
2C182C19
2C29
2C30
2C322C33
2C34
2C35
2C36
2C38
2C39
2C40
2C41 2C42
2C43
2C44
2C55
2C56
2C57
2C58
2C59
2C60
2C61
2C62
2C63
2C64
2C65
2C66
2C67
2C68
2C69
2C70
2C71
2C72
2C73
2C74
2C75
2C76
2C77
2C78
2C79
2C80
2C81
2C82
2C83
2C84
2C85 2C86
2C87
2C88
2C89
2C90
2C912C92
2C94
2C95
2C96
2C972CA0
2CA1
2CA
22CA
3
2CA4
2CA52CA6
2CA7
2CA8
2CA9
2CAA
2CAB
2CAC
2CAD
2CAE
2CAF
2CAG
2CAH
2CAJ
2CAK
2CAM
2CAN
2CAP
2CAR
2CA
S
2CA
T
2CAV
2CAW
2CAY
2CAZ
2CB0
2CB1
2CB2
2CB3
2CB4
2CB5
2CB6
2CB7
2CB8
2CB9
2CBA
2CBB
2CBC
2CB
D2C
BE
2CBF
2CB
G 2CB
H
2CB
J
2CBZ
2CD0
2CD1
2CG
0
2CG1
2CG
3
2CG4
2CG5
2CG6
2CG7
2CG8
2CG
B2C
GC
2CG
D
2CH0
2CH
4
2CH
5
2CH
6
2CH7
2D01
2D21
2D22
2D25
2D26
2D27
2E60
2E61
2E62
2E63
2E75
2E76
2E77
2E78
2E79
2E81
2EA
6
2EAC2EAD
2EA
Q
2EB1
2EC
F
2F03
2F04
2F05
2F11
2F12
2F13
2F14
2F15
2F16
2F17
2F18
2F19
2F20
2F21
2F22
2F23
2F24
2F25
2F262F27
2F30
2F31
2F32
2F33
2F36
2F37
2F38
2F39
2F56
2F58
2F59 2F622F63 2F64
2F652F662F67 2F68
2F692F702F71 2F72
2F73
2F752F76
2F772F782F79
2F802F812F822F832F84
2F85
2FA
6
2FA7
2FH
02F
H1
2FH2
2FH3
2FH4
2FH
5
2FH6 2FH7
2FH8
2FH9
2FH
B
2FH
C2F
HD
2FH
E
2FH
F
2FHG
2FHH
2FH
J
2FH
K
2FHM
2FH
N
2FH
P
2FHR
2FH
S
2FHT
2FH
V
2FHW
2FHZ
2FJ0
2FJ1
2FJ2
2FJ8
2FJ9
2FJA
2FJB
2FJC
2FJJ
2FJK
2FJP
2FL0
2FL3
2FL4
2FL5
2FL9
2FLA
2FLB
2FLC
2FLJ
2FLK
2FLL
2FLM
2FLN
2FLR
2FLS
2FN0
2FN12FN2
2FN3
2FN
5
2FN6
2FN
7
2FN8
2H00
2H01
2H03
2H04
2H05
2H07
2H10
2H11
2H12
2H13
2H14
2H15
2H16
2H17
2H18
2H19
2H202H21
2H22
2H23
2H24
2H27
2H28
2H29
2H30
2H31
2H32
2H33
2H34
2H35
2H36
2H37
2H38
2H39
2H40
2H41
2H42
2H43
2H50
2H512H
52
2HA3
2HA4
2HA5
2HC0
2HD
0
2HF5
2HF6
2HF
7
2HG
0
2HG1
2HG2
2HG3
2HG
4
2HG5
2HG
6
2HG
7
2HG8
2HG
9
2HG
A
2HG
B
2HG
C
2HGD
2HG
E
2HG
F
2HG
G
2HG
H
2HGJ
2HGK
2HG
M
2HGN
2HG
P
2HG
R
2HG
S
2HG
T
2HG
U
2HGV
2HG
W
2HGY
2HG
Z
2HH
0
2HH1
2HH
2
2HH
3
2HH4
2HH
5
2HH6
2HH9
2HHA
2HH
B
2HH
K2H
HM
2HH
N2H
HP
2HK
L
2HMG
2HMW
2HM
Z
2HP4
2HP
5
2HP
6
2HP7
2HP
8
2HP
A
2HPB
2HRM
2HR
N
2HR
P
2HR
S
2HR
T
2HR
U
2HRV
2HRW
2HRY
2HS0
2HST
2HSV
2HSW
2HSY
2HT1
2HT5
2HT6
2HT7
2HTH
2HTK
2HU
1
2HU
2
2HU
3
2HU4
2HU5
2HU6
2HU
7
2HU8
2HU9
2HU
A
2HUK
2HUN
2HUP
2HV0
2HV
1
2HV2
2HV
32HV
4
2HV5
2HV6
2HV7
2HV8
2HV9
2HVF
2HV
G
2HV
H2HV
J
2HV
K
2HV
L
2HVM
2HV
N
2HV
P
2HVR
2HV
S
2HVT
2HV
U
2HV
V
2HVW
2HVY 2HV
Z
2HY2
2HY3
2HY
4
2HY
5
2HY
6
2HY
7
2HY
8
2HY9
2HY
A
2HYB
2HYD
2HYE
2HY
F
2HZB
2HZC
2HZD
2HZ
E
2HZF
2HZG
2HZ
H
2HZ
K
2HZ
L
2HZM
2HZ
V
2HZY
2N0K
2N0L
2N0P
2N0Q
2N0V
2N0W
2N0Y
2N0Z
2N10
2N11
2N12
2N13
2N14
2N15
2N16
2N17
2N30
2N31
2N32
2N33
2P04
2P062P
07
2P08
2P092P
10
2P11
2P16
2P18
2P19
2P20
2P21
2P22
2P23
2P252P30
2P32
2P33
2P34
2P35
2P36
2P37
2P382P39
2P40
2P41
2P42
2P432P44
2P45
2P46
2P48
2P502P51
2P52
2P53
2P54
2P55
2P63
2P64
2P65
2P66
2P672P68
2P69
2P70
2P71
2P72
2P73
2P74
2P75
2P76
2P77
2T13
2T15
2T16
2T17
2T18
2T19
2T20
2T212T
24
2T50
2T51
2T522T
53
2T54
2T552T56
2T572T58
2T59
2T64
2T66
2T67
2T68
2T69
2T70
2T71
2T72
2T73
2T74
2T75
2T76
2T77
2T78
2T79
2T80
2T812T82
2T83
2T84
2T85
2U02
2U03
2U04
2U05
2U07
2U08
2U09
2U0B
2U0D
2U0H
2U0S
2U0T
2U0U
2U0V
2U12
2U13
2U16
2U17
2U18
2U20
2U27
2U28
2U29
2U2A
2U2B
2U37
2U38
2U39
2U50
2U54
2U55
2U56
2U57
2U58
2U59
2U60
2U61
2U62
2U63
2U64
2U65
2U66
2U67
2U80
2U81
2U83
2U8Q
2U8R
2U8T
2U8U
2U8V 2U
8Y
3A00
3A01
3A02
3A033A04
3A05
3A06
3A07
3A08
3A09
3A10
3A11
3A12
3A13 3A14
3A15
3A16
3A17
3A18
3A19
3A20 3A21
3A223A
233A
243A
253A26
3A27
3C00
3C01
3C02
3C04
3C10 3C20
3C21
3C22
3C23
3C37
3C38
3C39
3C40
3C43
3C44
3C50
3C51
3CA
43C
A5
3CA6
3CA
7
3CD1 3CD
2
3CD
3
3CD
73C
D8
3CD
9
3CD
A
3CDB3CD
C
3CD
D
3CF1
3CFN
3CG
0
3CG
1
3CG5
3CG6
3CG7
3CG8
3CG9
3CGA
3CGF
3CGG
3CGH
3CGJ
3CG
N
3CG
P
3CG
R
3CGS
3CGT
3CG
V
3CG
Z
3CH0
3CH
1
3CH
2
3CH3
3CH4
3CH
5
3CH
7
3CHC
3CHD
3CHE
3CJ0
3CJ1
3D03
3D09
3D10
3D14
3D16
3D17
3E83
3E84
3E91
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IT96
IT97
IT98
IU00
IU01
IU02
IU03
IU04
IU05
IU06
IU07
IU08
IU09
IU0K
IU0N
IU0P
IU0S
IU0T
IU0U
IU10
IU11
IU12
IU13
IU14
IU15
IU16
IU19
IU1B
IU1D
IU1E
IU1P
IU1R
IU1T
IU20
IU21
IU25
IU28
IU29
IU2A
IU2C
IU2D
IU2T
IU2V IU2Y
IU2Z
IU30
IU31
IU32
IU33
IU34
IU35
IU36
IU37
IU38
IU39
IU3B
IU3C
IU3T
IU40 IU41
IU42
IU43
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IU45
IU47
IU48
IU49
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IU52
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IU55
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IU82IU85
EN 142Q549.3E LA 10.Circuit Diagrams and PWB Layouts
2009-Aug-07
Wi-Fi Antenna
C
B
C
D
21
J
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H
G
F
C
A
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D
C
B
A
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1000 B1
654321
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SETNAME ********
1
******
1
****-**-** ROYAL PHILIPS ELECTRONICS N.V. 2008
08-07-07
********
Maelegheer Ingrid
08-10-20
2
3
1 2 3
1 2 3
A
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130
2
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08-10-20
**-**-**
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08-07-07
A4
WIFI antenna
WIFI ANTENNA
3104 303 5212
CHECK DATE
NAME
1
SUPERS.
*
CLASS_NO
CHN
23
1 HOT1000U.FL-R-SMT-1(10)
18310_640_090306.eps090730
W
Layout Wi-Fi Antenna
3104 313 6328.2 18310_557_090309090309
1000