2013 pb prediction of rise time errors of a cascade of equal behavioral cells

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May 2nd 2013 Copyright 2013 Piero Belforte 1 Prediction of rise time errors of a cascade of equal behavioral cells. Introduction In this paper the effects of finite rise time of time-domain step response on a chain of equal behavioral cells are analyzed. The chain output delay and rise time are obtained by time-domain simulation using the SWAN/DWS (1) wave circuit simulator and the Spicy SWAN application available on the WEB and on mobile devices (2, https://www.ischematics.com/webspicy/portal.py# ). Two situations are considered: Ramp shape and erfc (complementary error function) shape of behavioral time-domain description of the single cell with equivalent rise times. RAMP SHAPED TRANSFER FUNCTION The situation of Fig.1 is simulated to get the response at even cell outputs of a 10-cell chain. A single block is modeled as a SWAN/DWS VCVS (Voltage Controlled Voltage Source) whose static transfer function is linear and of unit value. The dynamic portion s(t) of the VCVS's control link is described with a two- breakpoints PWL behavior corresponding to a ramp with a total rise time of 20ps. The last two parameters of the VCVS control link are the delay set to 0ns (will be approximated as a unit time

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In this paper the effects of finite rise time of time-domain step response on a chain of equal behavioral cells are analyzed. The chain output delay and rise time are obtained by time-domain simulation using the SWAN/DWS (1) wave circuit simulator and the Spicy SWAN application available on the WEB .

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Page 1: 2013 pb prediction of  rise time errors of a cascade of equal behavioral cells

May 2nd 2013 Copyright 2013 Piero Belforte

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Prediction of rise time errors of a cascade of

equal behavioral cells.

Introduction

In this paper the effects of finite rise time of time-domain step

response on a chain of equal behavioral cells are analyzed. The

chain output delay and rise time are obtained by time-domain

simulation using the SWAN/DWS (1) wave circuit simulator and

the Spicy SWAN application available on the WEB and on mobile

devices (2, https://www.ischematics.com/webspicy/portal.py#).

Two situations are considered:

Ramp shape and erfc (complementary error function) shape of

behavioral time-domain description of the single cell with

equivalent rise times.

RAMP SHAPED TRANSFER FUNCTION

The situation of Fig.1 is simulated to get the response at even cell

outputs of a 10-cell chain. A single block is modeled as a

SWAN/DWS VCVS (Voltage Controlled Voltage Source) whose

static transfer function is linear and of unit value. The dynamic

portion s(t) of the VCVS's control link is described with a two-

breakpoints PWL behavior corresponding to a ramp with a total

rise time of 20ps. The last two parameters of the VCVS control

link are the delay set to 0ns (will be approximated as a unit time

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May 2nd 2013 Copyright 2013 Piero Belforte

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step, 20fs by DWS) and the output resistance of the VS (set to 0

ohms).

Figure 1: circuital configuration to calculate the step response of a 10 equal

blocks with ramp step response.

Figure 2: Spicy SWAN voltage waveforms at even tap outputs of circuit of Fig.1

The simulation results with a time step of 100 femtoseconds on a

window of 200ps are shown in Figure 2 (1000 samples per

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May 2nd 2013 Copyright 2013 Piero Belforte

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waveform). The increasing 50% point delay and rise time values

are easily measurable as function of tap number.

2-port S-parameter blocks

A situation like that of figure 1 can be also modeled by DWS

using a chain of equal 2-port S-parameters blocks (Fig.3). Each

block is both symmetrical and reciprocal and can be characterized

by its time-domain S11 and S21 behaviors ( BTM: Behavioral

Time Model). For sake of semplicity S11 is assumed to be zero.

S21 has a ramp shape with a 20 ps rise time described by a 2-

point PWL behavior. Due to DWS stability no particular

requirement is needed for S11-S21 relationship. To get voltage

values similar to those of circuit of fig.1 a 2V step input is

required because the S-parameters are related to a 50 ohm

impedance and the chain is terminated by a 50 ohm resistance

(R0).

Figure 3: circuit configuration to get the step response of a 10 equal S-parameters

blocks with ramp step response of S21

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May 2nd 2013 Copyright 2013 Piero Belforte

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Figure 4: Voltage waveforms at even tap outputs of circuit of Fig.3

Figure 5 : Calculation of the ratio between the output rise time (10-90%) and unit-

cell rise time

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May 2nd 2013 Copyright 2013 Piero Belforte

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As can be easily noticed from Fig.4 the tap waveforms are exactly

the same of that of Fig.2. A perfect equivalence is observed

between the transfer function blocks and impedance matched S-

parameter block implementations. The results got from transfer

function implementation are still applicable to a cascade of S-

parameters blocks. This is particularly interesting because chain

of BTM cells can be utilized to model interconnections like cables

and p.c.b traces (3).

The total delay of the chain (101ps) is pointed out by a cursor on

the simulated waveform. This delay approaches the half of ramp

total rise time (20ps) multiplied by the number of cells (10). The

extra 1ps delay is the error due to simulation time step (100fs *

10).

Fig. 5 reports the calculation of the ratio between the output rise

time (47ps,10%-90%) and the unit-cell rise time (16ps,10%-90%).

This ratio (2.95) approaches the square root of the number of

cells (10).

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May 2nd 2013 Copyright 2013 Piero Belforte

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CASCADE of 1000 CELLS

Thanks to DWS speed it easy to extend this investigation to a

situation where 1000 unit cells are connected in a chain (Fig.6).

Figure 6: 1000-cell of transfer function blocks using the CHAIN utility of DWS

Fi

FIgure 7: Output rise time calculation after 1000 cells

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May 2nd 2013 Copyright 2013 Piero Belforte

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As can easily verified in the plot of figure 7 the rule of the square

root of the number of cells still apply to the chain out rise time

even in this case.

ERFC SHAPED TRANSFER FUNCTION

To point out the unit-cell transfer function shape effects, a

couple of equivalent rise time generators has been built up.

Two set of generators related to 10%-90% and 20%-80%

equivalent rise times respectively are built up to compare their

waveforms (Fig.8). An extra delay has been added to ramp

generators to compensate erfc higher delay at 50% of its swing.

Figure 8: Equivalent 50% point delay and rise time ramp and erfc shapes

Figure 9 shows the waveforms of the 4 generators superimposed.

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May 2nd 2013 Copyright 2013 Piero Belforte

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The equivalence of 50% point delay and rise times is pointed out

in Fig.9.

Figure 9: Wave shape comparison of the generators of Fig.8

Fig. 10 reports the total delay at the output of 1000 erfc shaped

unit cells. The previous rule of calculation (half rise time

multiplied by the number of cells) is still verified.

Figure 10: Total delay (50% point) of 1000 cells with erfc shaped transfer function

Page 9: 2013 pb prediction of  rise time errors of a cascade of equal behavioral cells

May 2nd 2013 Copyright 2013 Piero Belforte

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Fig. 11 reports the rise time at the ouput of 1000 erfc-shaped

unit cells. The previous rule of calculation (Unit cell rise time

multiplied by the square root of number of cells) is still verified

with an error of 10% (556ps instead of 506ps).

Figure 11: 10%-90% rise time at the output of 1000 cells having erfc shaped

transfer function.

Previous plots (Fig.10 and Fig. 11) are obtained with a cell erfc

shape modeled with its PWL (Piece Wise Linear) approximation

behavior using 10 breakpoints (Fig.12).

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May 2nd 2013 Copyright 2013 Piero Belforte

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Figure12: 10-breakpoint PWL approximation of erfc behavior used in the unit cell

transfer function (BTM)

Figure 12 shows the Spicy SWAN schematic related to the

comparison between the pulse response of two cascades of 1000

cells having equivalent delay an 10%-90% rise times but with erfc

and linear (ramp) shapes respectively.

Figure 13: 1000-cell outputs, comparison between equivalent ramp and erfc

shapes of unit-cell transfer function

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May 2nd 2013 Copyright 2013 Piero Belforte

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As can be easily noticed in Figure 13 the erfc shaped outputs are

similar with a 50% point delay difference of 70ps (erfc more

delayed) for a total delay of about 16ns corresponding to a +.4%.

The rise time difference is 75ps (erfc slower) over a risetime of

about 500ps (+15% for the erfc shape).

Figure 14: 1000 cell outputs waveforms , comparison between equivalent ramp

and erfc shapes of unit-cell transfer function

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May 2nd 2013 Copyright 2013 Piero Belforte

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Concluding remarks

Previous simulations demonstrate that cascading N equal block

each showing a step response rise time tr, the chain ouput shows

a total rise time TRT that is about :

Eq. 1 TRT= tr * SQRT(N)

The total 50% point delay of the chain, TDT, is about:

Eq. 2 TDT= td * N

where td is the 50% point delay of the single cell.

Equations 1 and 2 applies to both ramp and erfc Transfer

Function of the unit cell with a small difference in overall output

wave shapes shown in Fig.13 in the case of a cascade of 1000

cells.

Equations 1 and 2 applies to cascades of both time-domain

(BTM) transfer function blocks and BTM 2-port S-parameter

blocks.

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May 2nd 2013 Copyright 2013 Piero Belforte

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The above considerations are to be taken into account when

cascading several equal blocks starting from the Time-domain

transfer function of each block obtained experimentally (eg.

from TDR measures) or by simulation (eg. from 2D-3D field

solvers).

The previous situation is very common for fast and accurate

modeling of physical interconnects (cables, p.c.b. traces etc.).

In this case the response of a total length L is obtained from a

cascade of N equal cells related to a sub-multiple length l of the

same interconnect (L= N*l where N is an integer). If the response

of the unit cell of length l is obtained from a band-limited

instrument (like a TDR having a 20ps rise time pulse) or a band-

limited numerical method (like a 3D full wave field solver) there

will be a delay error and a rise time error (or bandwidth error) on

the overall response as previously shown .

The rise time (bandwidth) absolute error increases with the

square root of the number of cascaded cells.

The good thing is that the ratio between rise time error and

physical delay of the interconnect (relative error) decreases with

the length of the interconnect by a factor proportional to the

square root of the number of cells utilized.

Page 14: 2013 pb prediction of  rise time errors of a cascade of equal behavioral cells

May 2nd 2013 Copyright 2013 Piero Belforte

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WEB REFERENCES

1) http://www.slideshare.net/PieroBelforte1/dws-84-

manualfinal27012013

2) https://www.ischematics.com/webspicy/portal.py#

3) http://www.slideshare.net/PieroBelforte1/2009-pb-

dwsmultigigabitmodelsoflossycoupledlines

NOTE : some of Spicy SWAN circuits shown in this paper are

available in the public libraries available on line at Ischematics

website (https://www.ischematics.com/). All simulations

related to previous circuits run in few seconds (SWAN mode).