2010_dftmax_rviolations

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Page 1: 2010_DFTMAX_RViolations

1

Common Compressor DRC Violations

Page 2: 2010_DFTMAX_RViolations

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Compression DRCs

• Common DRC Errors and Messages seen:

R7, R8, R16, R17, R22, R23, R24, R27

M464, M620

• Most common causes

Netlist and SPF not created during same DFTMAX insertion script

Revision control issues between CTL models and netlists

Post-route netlist issues, make sure that the netlist used at the start of P&R

passes DRC with same SPF then investigate P&R changes

• Once I’ve verified these match, then what?

Proceed to the detailed debug steps on the next pages…

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Full X-Tolerance compressor (4 ext to 12 int)

sel

din[2:0]

enable

dout[13:0]

sel[1:0] din[11:0]

[2]

4 bits SI

[1:0]

[13:0]

[11:0][13:12]

4 bits SO

[3]DUT

DECOMPRESSOR

COMPRESSOR

Select bits select

output modes

Global

x-tolerance

enable

12 stump

channels

to/from DUT

Input mode

select

Input care bits

[11:0]

dout[3:0]

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Review

Load Compressor

Unload

Compressor

De-

codeE

nab

.

AND selection

Scan Inputs

. .

.

Scan Outputs

Si

Si

Load

Mod

eL

oad

Mod

e

Si

Load

Mod

eL

oad

Mod

e

sISitest_

mod

e

Verify number of top

level test_si’s used for

compressionVerify test_mode decode for

compression mode DRC

Verify number of

short chains

Verify number of top

level test_so’s used for

compression

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X-Tolerance ScanStructures

ScanStructures {

ScanChain "1" {

ScanLength 26;

ScanEnable "SE";

ScanMasterClock "clk";

}

. . .

ScanChain "12" {

ScanLength 25;

ScanEnable "SE";

ScanMasterClock "clk";

}

. . .

Each compression

mode chain is

described along

with optional chain

length, SE term,

and clock

Chains

For debug we can

add ScanIn and

ScanOut info on

internal stub chains

ScanChain "1" {

ScanLength 26;

ScanIn "U335/Z";

ScanOut "q_reg_0_/Q“

}

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X-Tolerance ScanStructures

. . .

ScanChain "sccompin0" {

ScanIn "test_si[0]";

}

ScanChain "sccompin1" {

ScanIn "test_si[1]";

}

ScanChain "sccompin2" {

ScanIn "test_si[2]";

}

ScanChain "sccompin3" {

ScanIn "test_si[3]";

}

ScanChain "sccompout0" {

ScanOut "test_so[0]";

}

ScanChain "sccompout1" {

ScanOut "test_so[1]";

}

ScanChain "sccompout2" {

ScanOut "test_so[2]";

}

ScanChain "sccompout3" {

ScanOut "test_so[3]";

}

Output Index

defined.

“sccompout0” will be

referenced as “0”

below in the

Connection list for

compressor

Input Index defined.

“sccompin0” will be

referenced as “0”

below in

Connection list for

decompressor

Pins

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Full X-Tolerance ScanStructures

load_group {

"sccompin0";

"sccompin1";

}

unload_group {

"sccompout0";

"sccompout1";

"sccompout2";

"sccompout3";

}

mode_group {

"sccompin2";

}

unload_mode_group0 {

"sccompin0";

"sccompin1";

}

unload_mode_group1 {

"sccompin0";

"sccompin1";

}

enable_group {

"sccompin3";

}

}

These 2 inputs used to load

data into core chains

All ScanOuts used for unload

Select between input modes

SI inputs 0 and 1 are used to

create output modes through

decompressor outputs [13:12]

X-tolerance Mask Enable bit

Groups

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Full X-Tolerance CompressorStructures (1/2)

CompressorStructures {

Compressor "block0_U_decompressor_ScanCompression_mode" {

ModeGroup mode_group;

LoadGroup load_group;

CoreGroup core_group;

Modes 2;

Mode 0 {

UnloadModeGroup unload_mode_group0;

ModeControls {

"test_si[2]" = 0;

}

Connection 0 "1" "4" "6" "7" "9" "12";

Connection 1 "2" "3" "5" "8" "10" "11";

}

Mode 1 {

UnloadModeGroup unload_mode_group1;

ModeControls {

"test_si[2]" = 1;

}

Connection 0 "1" "3" "5" "7" "9" "11";

Connection 1 "2" "4" "6" "8" "10" "12";

}

}

Mode 1 has different select

decode, and different

fanout from SI ports

Only 1 pin needed to

select between 2 Modes

SI distribution terms

through MUXES

Decompressor

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Full X-Tolerance CompressorStructures (2/2)

Compressor "block0_U_compressor_ScanCompression_mode" {

UnloadGroup unload_group;

UnloadModeGroup unload_mode_group0 unload_mode_group1;

CoreGroup core_group;

UnloadModeEnable enable_group;

Modes 49;

Mode 0 {

ModeControls {

"test_si[3]" = 0;

}

Connection "1" 0 1 2;

Connection "2" 3;

Connection "3" 0;

Connection "4" 1;

Connection "5" 2;

Connection "6" 0 3;

Connection "7" 1 2;

Connection "8" 1 3;

Connection "9" 0 2;

Connection "10" 0 1 3;

Connection "11" 0 2 3;

Connection "12" 1 2 3;

}

}

}

“full observability” unload mode

group is first in SPF (same format

as in default XTOL compressor)

All other unload modes are listed

after with mode pins

Multiple UnloadModeGroups

full XTOL

test_si[3] is the XTOL gating

mask enable pin

Compressor

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R7 DRC Violations (1/5)

• Typical Message:

Error: Load compressor block0_U_decompressor_ScanCompression_mode failed

propagation checking for chain 3 during mode 0. (R7-1)

• What does this mean?

While tracing from the ScanIn ports through the decompressor, the

expected fanout to this internal chain was not found

Common cause is either badly optimized decompressor, or broken

connections

If every chain has R7s, suspect SPF not matching netlist

If a subset of chains have R7s, then continue debug…

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R7 DRC Violations (2/5)

• Debug steps

1. Look at the Decompressor in the SPF file for the mode specified

(Mode 0 in R7 violation):

Compressor "block0_U_decompressor_ScanCompression_mode" {

ModeGroup mode_group;

LoadGroup load_group;

CoreGroup core_group;

Modes 2;

Mode 0 {

UnloadModeGroup unload_mode_group0;

ModeControls {

"test_si[2]" = 0;

}

Connection 0 "1" "4" "6" "7" "9" "12";

Connection 1 "2" "3" "5" "8" "10" "11";

}

Mode 0 is enabled

when test_si[2] is 0

Chain 3

Connection 1 should

feed this chain

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• Debug steps

2. Look at what Pin corresponds to Connection 1 in the SPF:

ScanChain "sccompin1" {

ScanIn "test_si[1]";

};

3. We’re stuck in DRC due to Errors so cannot use report_scan_cell.

Look at report_scan_chains instead:

DRC> report_scan_chains

chain group length input_id output_id compressor

connections

---------------- ------------ ------ -------- --------- -----------------

1 core_group 0 102 464

2 core_group 0 94 5876

3 core_group 0 5946 1562

. . .

R7 DRC Violations (3/5)

Connection “1”

Pin = test_si[1]

Input of Chain 3 is found

to be on primitive 5946

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R7 DRC Violations (4/5)

• Debug steps

4. An alternative way to report this is to downgrade the R7 violation to get to TEST mode so that report_scan_cells can be used to see the cells

on the chain listed in the R7 violation (chain 3)set_rules R7 warning

run_drc

report_scan_cells 3

DRC> report_scan_cells 3

chain cell type inv gate# instance_name (type)

------- ---- ------- --- ------ ------------------------------------

3 0 MASTER NN 6919 pos_shft_reg_63_ (SDFCND0)

. . .

3 30 MASTER NN 7115 pos_shft_reg_33_ (SDFCND0)

3 31 MASTER NN 6791 pos_shft_reg_32_ (SDFCND0)

TEST>

Last element listed is first

in chain. Bring up this

primitive in the GSV

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• Debug steps

5. Look at this logic in the GSV by bringing up primitive 5946 (identified as start

of chain 3) and trace forward to scan flop and back to SI pins. Use SHIFT

pindata to see constraints:

6. There’s the problem! Pin test_si[0] will be selected in mode 0 (when

test_si[2]=0). But the SPF shows this should be “Connection 1”, which is the

test_si[1] input. Some signals were crossed.

It is likely the problem is that the SPF file does not match the netlist.

R7 DRC Violations (5/5)

Primitive 5946 (from

report_scan_chains)Primitive 6791 (from

report_scan_cells)

ScanMode1 is

Compression

Mode Enable

When test_si[2]=0,

test_si[0] is selected. This

should be test_si[1]!!!

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• Possible causes:

Incorrect netlist to SPF association as shown above

Use of SPFGEN to combine lower level compressed blocks and using an

incorrect lower level SPF that does not match netlist for compressed core

• Double check mapping file for SPFGEN

• Double check CTL models used and compression mode SPF files provided to

SPFGEN

Use of internal_pin flow, with internal register used as compressor enable

term

• Register driving control may be loaded during test_setup, but this only allows one

mode

• If compressor_enable source register is initialized to internal_scan state, then R7 is

seen. Need to make sure test_setup initializes to compression mode

R7 DRC Violations

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R8 DRC Violations (1/2)

• Typical Message:

Error: Unload compressor block0_U_compressor_ScanCompression_mode failed

propagation checking for output test_so[0]. (R8-1)

• What does this mean?

The compressor connections in the netlist did not match the expected

connections as provided in the SPF CompressorStructures section

• Possible steps:

These are almost always accompanied by R7, R23, R24 violations

No additional help using set_drc –compressor_debug_data

No automatic GUI analysis of R8 violations

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R8 Violations (2/2)

Port with R8

violation

Path is not

constrained to

allow propagation

Constraints to

allow

compression

mode

• Use GSV to display scan-out with R8 violation (with SHIFT pindata set)

• Trace back to compressor to ensure path is enabled

• There should not be an X’ s on any control paths

• Double-check the constraints in the protocol file

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R16 DRC Violations (1/3)

• Typical Message:

Error: Unable to identify unload compressor pipeline input for port

test_so[0]. (R16-1)

• What does this mean?

While tracing backwards from the SOUT pin, the pipeline register was not

seen. This is likely missing a constraint to enable this path, or can indicate

a missing pipeline register

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• Debug steps

1. You can run analyze_violation R16-1 to bring this up in the GSV

2. These settings help:

• set_pindata –shift

• set_pindata –shift_character S

• Use primitive mode to view schematic with hide buffers/inverters

R16 DRC Violations (2/3)

test_so pin is a

bidirectional portEnable port is not

constrained

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• Debug steps

2. Use add_pi_constraint 0 test_so_ena to constrain this port so that the

test_so ports are always used as output pins. Rerunning run_drc shows

that the R16 has been fixed, and the shift path is now identified through the

pipeline register

R16 DRC Violations (3/3)

Shift path now

identified

Enable port is not

constrained

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R17 DRC Violation (1/2)

Error: Unable to identify load compressor pipeline output for port test_si9

(R17-1)

What does this mean?

• While tracing the test_si pins forward, DRC could not identify a pipeline

head flop for this scan in. This could be due to missing

connection/constraint or missing Pipeline flop.

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R17 Violation (2/2)

• Debug steps:

• Turn on set_messages –level expert and run_drc

This will give details of already extracted pipelines

Load compressor pipeline input test_si6 successfully traced forward to gate 15704

(invert=0).

Load compressor pipeline input test_si7 successfully traced forward to gate 15705

(invert=0).

Error: Unable to identify load compressor pipeline output for port test_si9.

(R17-1)

Load compressor pipeline input test_si10 successfully traced forward to gate

16056 (invert=0).

Load compressor pipeline input test_si11 successfully traced forward to gate

16057 (invert=0).

• Use GUI to analyze the R17 violation and check on path between test_si

and decompressor. The test_si should be in input mode for shift and it

should have one sensitized path to PipeHead flop.

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R22 DRC Violations (1/2)

• Typical Message:

Error: Chain 11 has no x-tolerant observation. (R22-1)

• What does this mean?

Something in the compressor prevents the ability to block X’s from

propagating out the ScanOut ports that fan out from the specified chain

• Possible causes:

Mixed “default” and “high” XTOL compressors exist in the same design

• Created using HYBRID or manual flow (protocols generated by SPFGEN)

• “default” compressor logic will flag R22 violations

• Possible steps:

Re-architect scan chain ratio in DFTMAX to increase ScanOut pins

available for compressor output (if possible)

Downgrade R22 to warning – can cause coverage loss due to observability

blockages

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• Debug steps

1. You can run analyze_violation R22-1 to bring this up in the GSV to do

some analysis:

• set_pindata –shift

• set_pindata –shift_character S

• Use primitive mode to view schematic with hide buffers/inverters

• However, this doesn’t help much because GSV shows what is in the netlist, and

R22 is complaining about what isn’t in the netlist

R22 DRC Violations (2/2)

Last flop on chain 11 SOUTs for this chainLots of unhelpful stuff in the middle

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R23 DRC Violations (1/3)

• Typical Message:

Error: Unload mode enable test_si[3] at off_state does not condition full

compression on output port test_so[0] (No sensitized XOR path from

chain "1"). (R23-1)

• What does this mean?

While tracing from the ScanOut port, the expected XTOL Enable signal was

not found

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R23 DRC Violations (2/3)

• Debug steps

1. Look at the Compressor in the SPF file for the ModeControl. This states

what signal should be used for X-Tolerant enable:

Compressor "block0_U_compressor_ScanCompression_mode" {

UnloadGroup unload_group;

UnloadModeGroup unload_mode_group0 unload_mode_group1;

CoreGroup core_group;

UnloadModeEnable enable_group;

Mode {

ModeControls {

"test_si[3]" = 0;

}

2. Look at the Compressor connections in the netlist:

block0_SCCOMP_COMPRESSOR block0_U_compressor_ScanCompression_mode (

.din({ neg_shft[99], pos_shft[249], pos_shft[218], pos_shft[187],

neg_shft[74], pos_shft[156], pos_shft[125], neg_shft[49],

pos_shft[94], pos_shft[63], pos_shft[31], neg_shft[23]}),

.sel({n3380, n3381}), .enable(test_si[2]),

.dout({n3343, n3345, n3347, n3349}) );

X-Tolerant Enable

should be test_si[3]

Look for

something else

here. Different

signal or tie0 is

the problem!

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R23 DRC Violations (3/3)

• Debug steps

3. Similar to the R22s, the R23 violations also have GSV support that may be

very helpful. So seeing the design on the screen can help:

analyze_violation R23-1 –verbose –display

• Actions:

R23 can be downgraded to Warning, with some pattern count penalties

Look at the netlist to see what is used as the enable on the compressor

XTOL Ena should be test_si[3]

Note: no PIs in path other that ScanMode1

(reconfigured mode selection)

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R24 and M620 Messages (1/7)

• Typical Message:

Warning: #candidate chains (11) and #connecting chains (12) for unload

compressor block0_U_compressor_ScanCompression_mode are different. (M620)

Error: Unable to infer output of chain 10 for unload compressor. (R24-1)

End compressor chain output checking: #resolved=9, #ambiguous=0, #failed=1,

#undefined_inputs=12

• What does this mean?

While tracing from test_so pins through compressors, one of the core

chains was not found. In this case, only 11 out of 12 chains were found.

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R24 and M620 Messages (2/7)

• Debug steps

1. Turn on this very useful DRC switch to get additional info

DRC> set_drc –compressor_debug_data

DRC> run_drc

Warning: #candidate chains (11) and #connecting chains (12) for unload compressor

block0_U_compressor_ScanCompression_mode are different. (M620)

Error: Unable to infer output of chain 10 for unload compressor. (R24-1)

Begin R24 debug data: Chain=10, connection_ports = test_so[0] test_so[1] test_so[3]

----------------------------------------------------------------------------------

output_id instance_name of cell on chain output connections

--------- --------------------------------------- ------------------------------

6819 pos_shft_reg_249_ test_so[0] test_so[1] test_so[2] test_so[3]

1613 pos_shft_reg_125_ test_so[0] test_so[3]

1675 pos_shft_reg_187_ test_so[0] test_so[2]

1563 pos_shft_reg_63_ test_so[0]

465 neg_shft_reg_23_ test_so[0] test_so[1] test_so[2]

6825 neg_shft_reg_99_ test_so[1] test_so[2] test_so[3]

386 neg_shft_reg_74_ test_so[1] test_so[3]

3708 pos_shft_reg_156_ test_so[1] test_so[2]

5357 pos_shft_reg_94_ test_so[1]

962 neg_shft_reg_49_ test_so[2]

5876 pos_shft_reg_31_ test_so[3]

-----------------------------------------------------------------------------------

End compressor chain output checking: #resolved=9, #ambiguous=0, #failed=1, #undefined_inputs=12

This shows

11/12 chains

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R24 and M620 Messages (3/7)

• Debug steps

2. This is reported as a problem on chain 10 and only 11 out of 12 chains are listed. Look at the preview_dft report for chain 10 and see what the last

scan element should be. (Note that this only pertains to chains that have not

been reordered in ICC):

Scan chain '10' contains 31 cells

Active in modes: ScanCompression_mode :

pos_shft_reg_188_ (clk, 45.0, rising)

. . .

pos_shft_reg_217_

pos_shft_reg_218_ (m)

3. This register should connect directly to the compressor. There are no

reconfiguration muxes between the last register and the compressor, but

there may be some buffers. Bring up the GSV and add this cell by name,

switch to primitive mode, and hide bufs/inverters and look for any instance

names that contain names like this: block0_U_compressor_ScanCompression_mode

If you don’t find any, then this path has been removed somehow

This register is not

listed on previous list

as a last scan

element!

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31

R24 and M620 Messages (4/7)

• Debug steps

4. Using TetraMAX TCL mode, you can easily search for connection points

through the compressor. This works when you know where this should

connect to, which is listed in CompressorStructures:

Compressor "block0_U_compressor_ScanCompression_mode" {

[snip]

Connection "1" 0 1 2;

Connection "2" 3;

Connection "3" 0;

Connection "4" 1;

Connection "5" 2;

Connection "6" 0 3;

Connection "7" 1 2;

Connection "8" 1 3;

Connection "9" 0 2;

Connection "10" 0 1 3;

Connection "11" 0 2 3;

Connection "12" 1 2 3;}

The secret decoder is in the ScanStructures section:

ScanChain "sccompout0" { ScanOut "test_so[0]“; }

ScanChain "sccompout1" { ScanOut "test_so[1]"; }

ScanChain "sccompout2" { ScanOut "test_so[2]"; }

ScanChain "sccompout3" { ScanOut "test_so[3]"; }

You can see that:

test_so[0] is used in 6 connections

test_so[1] is used in 6 connections

test_so[2] is used in 5 connections

test_so[3] is used in 6 connections

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32

R24 and M620 Messages (5/7)

• Debug steps

5. Look for numbers of fanin to each Scan Output pin:

DRC-T> report_fanin -to test_so[0]

Possible start points for pin test_so[0]:

ScanMode1 (4) PI (_PI)

neg_shft_reg_99_ (6825) DFF (SDFNCND0)

test_si[3] (33) PI (_PI)

test_si[1] (35) PI (_PI)

test_si[0] (36) PI (_PI)

pos_shft_reg_249_ (6819) DFF (SDFCNQD0)

pos_shft_reg_125_ (6943) DFF (SDFCND0)

pos_shft_reg_63_ (6919) DFF (SDFCND0)

neg_shft_reg_23_ (6879) DFF (SDFNCND0)

pos_shft_reg_187_ (6974) DFF (SDFCND0)

Tracing Done.

DRC-T> report_fanin -to test_so[1]

Possible start points for pin test_so[1]:

ScanMode1 (4) PI (_PI)

pos_shft_reg_83_ (6929) DFF (SDFCND0)

pos_shft_reg_249_ (6819) DFF (SDFCNQD0)

neg_shft_reg_99_ (6825) DFF (SDFNCND0)

test_si[3] (33) PI (_PI)

pos_shft_reg_94_ (7108) DFF (SDFCND0)

neg_shft_reg_74_ (6862) DFF (SDFNCND0)

test_si[0] (36) PI (_PI)

test_si[1] (35) PI (_PI)

neg_shft_reg_23_ (6879) DFF (SDFNCND0)

pos_shft_reg_156_ (7063) DFF (SDFCND0)

Tracing Done.

6 DFFs feed test_so[0]

This matches step 4

7 DFFs feed test_so[1]

This is one more than shown in step 4!

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33

R24 and M620 Messages (6/7)

• Debug steps

5. Look for numbers of fanin to each Scan Output pin (cont):

DRC-T> report_fanin -to test_so[2]

Possible start points for pin test_so[2]: .

ScanMode1 (4) PI (_PI)

pos_shft_reg_166_ (7058) DFF (SDFCND0)

neg_shft_reg_99_ (6825) DFF (SDFNCND0)

test_si[3] (33) PI (_PI)

pos_shft_reg_249_ (6819) DFF (SDFCNQD0)

neg_shft_reg_23_ (6879) DFF (SDFNCND0)

neg_shft_reg_49_ (6892) DFF (SDFNCND0)

test_si[0] (36) PI (_PI)

test_si[1] (35) PI (_PI)

pos_shft_reg_156_ (7063) DFF (SDFCND0)

pos_shft_reg_187_ (6974) DFF (SDFCND0)

Tracing Done.

DRC-T> report_fanin -to test_so[3]

Possible start points for pin test_so[3]: .

ScanMode1 (4) PI (_PI)

pos_shft_reg_249_ (6819) DFF (SDFCNQD0)

neg_shft_reg_99_ (6825) DFF (SDFNCND0)

test_si[3] (33) PI (_PI)

test_si[1] (35) PI (_PI)

test_si[0] (36) PI (_PI)

pos_shft_reg_125_ (6943) DFF (SDFCND0)

pos_shft_reg_31_ (7117) DFF (SDFCND0)

neg_shft_reg_74_ (6862) DFF (SDFNCND0)

Tracing Done.

7 DFFs feed test_so[2]

This is two more than shown in step 4!

5 DFFs feed test_so[3]

This is two fewer than shown in step 4!

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34

R24 and M620 Messages (7/7)

• Actions

Look at discrepancies:

• Try to cross reference the expected connection points from the end of the chains in the preview_dft report against the fanout list found in step 5

• Ask what happened to this netlist after insert_dft and before it got to

TetraMAX

– Were there any hand edits or netlist manipulation?

– Did the flow use implicit chains? Are those connections made correctly

and verified?

– Were there any incremental compiles or change_names that could have

modified this logic?

– If R24 points to chain that should be outside of compressor, then check DFTC script for set_dft_signal –hookup_pin options for all scan

ports. Wrong hookup points from chains to pad inputs could lead to bad

tracing

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R27 DRC Message

• Typical Message:

Error: Load compressor pipeline cell Headflop_test_si1 neither holds or shifts during capture (R27-1)

• What does this mean?

Load pipeline cell is not of type:

• hold – holds shifted in value during capture nor

• shift – ATPG can load needed value into cell during capture by controlling scan_in

pin during force_pi

• Possible steps:

If load pipeline flop is a scan flop; constrain scan_en low to allow it hold shifted

in value

Ensure that ATPG has control over scan_in path from IO to D pin of load

pipeline flop

If load pipeline flop has a dedicated clock; constrain clock off during capture

Do not downgrade this error for pattern generation; The Error must be fixed.

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M464 DRC Messages

Typical Message:Begin compressor chain I/O checking: #undefined_io=384 ...

Error: Compressor chain output checking could not identify the output of chain 1 (M464)

Error: Compressor chain output checking could not identify the output of chain 2 (M464)

….

Error: Compressor chain output checking could not identify the output of chain 90 (M464)

• What does this mean?

Failed to trace chains back to an output.

1- Check all test_si/test_so pins as well as pipelines. An extra pipeline stage could cause this

2- Check constraints for compression mode

3- Check that SPF matches the netlist

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Hybrid Flow Checklist

In some cases a complete flow check needs to be thought out. Complete

steps through DFTC need to be checked:

1. Check that IO used for top level comp/decomp is what’s expected

2. IO used for compressed core is what’s expected

3. Order of any set_dft_signal on scan ports and set_scan_path

4. Reconfigured mode passes

5. Compression mode on all core levels pass

6. Obtain bottom level scripts and compression SPF file for sub_blocks

7. Obtain sub_blocks CTL models and compare Compressor section in CTL

against compression.spf file per core

8. Try integration-only flow (without hybrid)

9. Remove specifications for DFT ports (set_dft_signal –view spec)

and have the tool automatically add new ones

10. Remove all set_scan_path specifications