2003 power seminar - under the hood of low-voltage dc ...total sw fet losses 0.566 0.817 1.231 0.503...

Power Supply Design Seminar

Topic Categories:Design Reviews – Functional Circuit Blocks

Specific Power TopologiesLow-Voltage, Non-Isolated Buck

Reproduced from2002 Texas Instruments Power Supply Design Seminar

SEM1500, Topic 5TI Literature Number: SLUP206

© 2002, 2011 Texas Instruments Incorporated

Product Update:This topic references the TPS40003. While this TI device may still be available, the later-generation TPS40009 may

offer performance enhancements.

Power Seminar topics and online power- training modules are available at:

power.ti.com/seminars

Under the Hood of Low-Voltage DC/DC Converters

TexasInstruments 1 SLUP206

Under the Hood of Low-Voltage DC/DC Converters

ABSTRACT

I. INTRODUCTION

II. TOPOLOGY OVERVIEWA. Synchronous Buck Converter Operation


SR

PWM

VCC

COMP

GND

Z

Z

Z

Output

SynchronousRectifier

SW Node

Switch

Control Circuit

DC Input

Averaging Circuit

.

•=•=

( )

••−=∆

∆

•

•

•

• •

•

•

•

•

•


SwitchNode

InductorCurrent

SynchronousRectifierCurrent

SwitchCurrent

t0t1t2

t3t6


t4t5

Average Vout

t7 t8

GND

GND

GND

GND

Ts

Vin

Average Iout


PWM Switch

B. Discontinuous Current Operation

∆

•−••=


t0t1

t2t3

t6t4t5

SwtchNode

InductorCurrent

SynchronousRectifierCurrent

SwitchCurrent


PWM

GND

Average Vout

GND

GND

GND

C. Cross Conduction and Gate Switching Delay


PWMSwitch

SwitchNode

TotalSynchronous

RectifierCurrent

t0t1

t2 t3

t6


t4t5 t7

t8

DiodeCurrent

ChannelCurrent

GND

GND

GND

GND

Vout


GND

Fixed DelayAdaptive Delay

Predictive Delay

Channel Conduction

Body Diode Conduction

SW Node

MonitorLevel

D. Synchronous Rectifier Parasitic Turn On

Lg Rgi

Cdg

Cgs

Cds

Ld

VoutMain SwitchVin

Ls

Driver

SynchronousRectifierMOSFET


Bottom Gate1 V/div

SW1 V/div

dV/dt Bump

t - Time - 50 ns/div

III. CONVERTER COMPONENT SELECTION

A. Inductor Selection

•

• •

•

•

•

•

•

•=

∆+=


∝

B. Switch MOSFET

[ ]( )

••−+•−

=∆

∆+•=

•=

IRIPPLE/ILOAD (%)

0 10 20 30 40 50 60 70 80 90 1000.80

0.85

0.90

0.95

1.00

1.05

1.10

1.15

1.20

1.25

Nor

mal

ized

Sw

itch

and

SR P

ower

Los

s (W

)


.

( )

+

++•

••

=

••=

100 k 1 Mf - Frequency - Hz

SwitchingLoss

ConductionLoss

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

P LO

SS(s

witc

h) -

Switc

h Lo

ss -

W

Gate LossOutput Loss

C. Synchronous Rectifier Selection

+••=

∆+•−−−

=

•

=

••=


0.00

0.05

0.10

0.15

0.20

0.25

0.30

P LO

SS(s

witc

h) -

Switc

h Lo

ss -

W

Channel ConductionLoss

ConductionLoss

Gate Loss

100 k 1 Mf - Frequency - Hz

D. PWM Controller Selection

• • • • • •

++

+++

•••=

Rglo

Rghi

PWMGateDrive

MOSFET

Gate DriveVoltage

Driverequivalentswitch andresistance

Switch orSynchronous

Rectifier

Rg Rgi


100 k 1 M0.5

1.0

1.5

2.0

2.5

f - Frequency - Hz

P LO

SS -

Pow

er L

oss

- W

WithoutChargePump

Si4866DY

WithChargePump

Si4866DY

With Charge Pump Si4836DY

Without Charge Pump Si4836DY

E. Capacitor Types and Characteristics

µ


TABLE 1. CAPACITOR TYPE RELATIVE COMPARISONSCapacitor Type Value

(µµµµF)Voltage

(V) Current

(A)Case Size

(mm) Volt x µµµµF/Volume

ESR (ESR*µµµµF)ESL

RelativeCost/Farad

Ω

Ω

Ω

Ω

Ω

µ

10 µµµµF Ceramic

1000 µµµµFOSCON

180 µµµµFSolid

Polymer

470 µµµµFTantalum

0.1 100001 10 100 10000.001

0.01

0.1

1

10

RC

AP

- Im

peda

nce

- ΩΩ ΩΩ

f - Frequency - kHz


+ Cin

Ic(sw OFF)

Ic(sw ON) SW1

SW2

Lout

Cout

Iin

Iload

Isw = Ic + Iin

∆IchIo

Io

•=

•+•

•+•=

( ) ( ) ( ) ( )

−•+•

∆+−=


Cincurrent

Switchcurrent

ESR

C

ESL

CinRipple

Voltage

F. Selecting the Output Capacitor

µ

•+•=

−••⋅•=

•••

=


OutputCurrents

VoutAC

Coupled

Iload

0 A

ESLESR

Cout &ESR

Cout &ESRESL

ESR

Iinductor

••

∆+•+•∆=

•

∆=

IV. DESIGN EXAMPLE

===


TABLE 2. POWER LOSS CALCULATIONSSwitch MOSFET Si4836DY FDS6574A IRF7459 Si4866DY Units

Synchronous Rectifier MOSFET Si4836DY FDS6574A IRF7459 Si4836DY

Duty cycle

Switch MOSFET Total SW FET Losses 0.566 0.817 1.231 0.503 Watts

Synchronous Rectifier MOSFET Total SR FET losses 0.392 0.675 1.057 0.391 Watts

Overall power loss 1.91 2.49 3.25 1.84 Watts Converter efficiency 86.3% 82.8% 78.7% 86.7%


A. Inductor selection

µ Ω µ Ω µ Ω µΗ Ω µ µ

0.47 µµµµH

0.68 µµµµH

1.0 µµµµH

0.82 µµµµH

85

86

88

89

90

92

93

0

87

91

2 4 6 8 10I - Current - A

Effic

ienc

y (%

)

B. MOSFET Selection

( ) ( )

∆

=−•••−

=••−

=


( )( )

−•−

+•+=

C. Input Capacitor Selection

µ Ω

=µ•

•+•=

••+•=

=

•=•=

µ

=•=

D. Output Capacitor Selection

µ µ Ω

=−••µ•

•µ=

−••••

=


=

•µ••µ=

•••

=

µ Ω

( )

=•µ+•−=

•+•=

=•+•=

=µ••

+•=

••+•=

E. Thermal Design

θ θ θ θ θ θ

Section View of a PowerPAD(tm)PACKAGE

MOLD COMPOUND (EPOXY)

LEADFRAME DIE PAD - EXPOSED ATBASE OF THE PACKAGE

LEADFRAME (COPPER ALLOY)IC (SILICON)

DIE ATTACH (EPOXY)

θ


−

••

•

=

−

F. Feedback Loop Design

+

ControlVoltage

Compensation Σ

OSCONor otherCapacitorw/ESR

* Ceramic helps at high frequency

Filter Circuit

Vout

Vin

PWMGain(%/V)

*

+

=

≅==

≅•π=


Ω

≅••π=

-40

-10

-20

Gai

n - d

B

50

-30

0

10

40

30

20

60

10 100 1 k 10 k 100 k 1 M

CompensationResponse

Fp1 = 100 kHzFp2 = 200 kHz

-21.5 dB @ 100 kHz

w/ ESR = 10 mΩΩΩΩw/ ESR = 0 mΩΩΩΩ

Fz1 = Fz2 = 8.9 kHz

FDP = 8.9 kHz

21.5 dB @ 100 kHz

Filter andPWM Response

KPWM = 11 dBA

B

C

5 MHzGBWPError

AmplifierLimit


+=

⋅π=

⋅π=

⋅π

=⋅π

=

C1

Vref

Vout

R1

R3

R2

C2

+

R4

C3

Vcmp

⋅

+⋅=

+⋅

=

==

==

==

+=


Ω Ω Ω

→=⋅⋅π

=

→=⋅⋅π

=

→=+⋅

⋅=

Ω→=⋅⋅π

=

→=⋅⋅π

=

=Ω+ΩΩ⋅Ω=

-40

-30

-10

0

10

30

40

100

-20

20

Gai

n - d

B

1 k 10 k 100 k 1 Mf - Frequency - Hz

Phase

Gain

-180

-135

-45

0

45

135

180

-90

90

Phas

e M

argi

n - D

egre

es

Ω

-40

0

20

40

60

-20

100 1 k 10 k 100 k 1 Mf - Frequency - Hz

-180

-135

-45

0

45

135

180

-90

90

Phas

e M

argi

n- D

egre

esGain

(Low ESR)

Gain (High ESR)

Phase Margin(High ESR)

Phase Margin(Low ESR)G

ain

- dB


IHLP5050CE-010.68 µH

7.15 kΩ

100 nF

5

8

7

10

9

1

2

3

ILIM

FB

COMP

GND

HDRV

SW

VDD

LDRV

470 µF

10.0 k

4.12 kΩ4.7 nF

3.3 Vin

1.2 Vout

4

4.7 nF

SS/SD

6

20 kΩ

BOOT

560 µFx 2

220 pF374 Ω

4.7 nF

10 µFx4

Si4866DY

1.5 Ω

5.6 nF10 µF

x2Si4836DY

V. TEST RESULTS

t- Time - 1 µµµµs/div-0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0SR Gate Top Gate

V GA

TE -

Volta

ge -

V

-1

0

1

2

3

4

5

V GA

TE -

Volta

ge -

V

t- Time - 1 µµµµs/div


-.020

-.015

-.010

-.005

.005

.01

.015

V GA

TE -

Volta

ge -

mV

t- Time - 1 µµµµs/div

0

60

65

75

80

85

90

95

Effic

ienc

y (%

)

70

Predicted

Actual

0 1 2 3 4 5 6 7 8 9 10 11 12ILOAD - Load Current - A

-20

0

10

30

40

-10

100 1 k 10 k 100 kf - Frequency - Hz

-180

-135

-45

0

45

135

180

-90

90

Phas

e M

argi

n - D

egre

es

Gai

n - d

B

Phase

Gain

20

VI. CONCLUSION


APPENDIX A. TABLE OF VARIABLE NAMES

∆


APPENDIX B. INDUCTOR CORE MATERIALS AND HIGH-FREQUENCY EFFECTS

A. Inductor Basics

µ • •

Ungapped Core Gapped Core

µ=

∝

∝µ

µ

⋅∝ µ


B. Core Losses

•••=

−

•••=

−

C. AC Wire Losses

0

10

30

5

Rac

/Rdc

20

1530 AWG

24 AWG

18 AWG14 AWG

100 k 1 M 10 Mf - Frequency - Hz

P-Type

K-Type

500 1 k 1.5 k 2 k 2.5 kf - Frequency - Hz

1

P LO

SS -

Pow

er L

oss

- W

0

2


Ω • Ω • • Ω

APPENDIX C. LAYOUT ISSUES FOR LOW-VOLTAGE SYSTEMS

A. Trace Resistance

Ω

••ρ=

Ifoward

Ireturn

L - trace length

W - trace widthS - trace separation

T - trace thickness


Ω

0 0.20.1 0.3 0.40

10

20

30

40I TR

AC

E(m

ax) -

Max

umum

Tra

ce C

urre

nt -

A

Trace Width - Inches

2 oz.

1 oz.

B. Trace Inductance

•⋅•=

µ


C. High Current Layout

LPCB RPCB

ESR

ESL

CINBULK

ESR

ESL

CINHF

LPCB RPCB

RON

CDS

RON CDS

LBUCK ESR

CW

LPCB RPCB

ESR

ESL

COUTBULK

ESR

ESL

COUTHF

LPCB RPCB

LPKG

LPKG

Con

verte

r Inp

ut

Con

verte

r Oup

ut

SR

SBUCK

SWNode


D. SW Node Ringing


APPENDIX D. INTERLEAVED CONVERTERS

PWM1

C1

Iout

Iout

2

PWM2

Iout

2Sync

hron

izat

ion

Vout

Vin

1 Channel

2 Channels

Iout

∆I

2 * ∆I

Iout2


0

20

60

10R

elat

ive

Pow

er L

oss

- % 40

30

0 20 40 80 100Percent Duty Cycle - %

60

Dual Phase

Single Phase

QuadPhase

50


APPENDIX E. PARASITIC TURN-ON MODELING

+

Lg + LpcbCdg

Cgs

Ls

Cds

Ld

PWLVoltageSource


Ω

APPENDIX F. REFERENCES

SLUP169

SLUP132

TI Worldwide Technical Support

InternetTI Semiconductor Product Information Center Home Pagesupport.ti.com

TI E2E™ Community Home Pagee2e.ti.com

Product Information CentersAmericas Phone +1(972)644-5580

Brazil Phone 0800-891-2616

Mexico Phone 0800-670-7544

Fax +1(972)927-6377 Internet/Email support.ti.com/sc/pic/americas.htm

Europe, Middle East, and AfricaPhone EuropeanFreeCall 00800-ASK-TEXAS (0080027583927) International +49(0)8161802121 RussianSupport +7(4)959810701

Note:TheEuropeanFreeCall(TollFree)numberisnotactiveinallcountries.Ifyouhavetechnicaldifficultycallingthefreecallnumber,pleaseusetheinternationalnumberabove.

Fax +(49)(0)8161802045Internet support.ti.com/sc/pic/euro.htmDirectEmail [email protected]

JapanPhone Domestic 0120-92-3326

Fax International +81-3-3344-5317 Domestic 0120-81-0036

Internet/Email International support.ti.com/sc/pic/japan.htm Domestic www.tij.co.jp/pic

AsiaPhone International +91-80-41381665 Domestic Toll-FreeNumber Note:Toll-freenumbersdonotsupport

mobileandIPphones. Australia 1-800-999-084 China 800-820-8682 HongKong 800-96-5941 India 1-800-425-7888 Indonesia 001-803-8861-1006 Korea 080-551-2804 Malaysia 1-800-80-3973 NewZealand 0800-446-934 Philippines 1-800-765-7404 Singapore 800-886-1028 Taiwan 0800-006800 Thailand 001-800-886-0010Fax +8621-23073686Email [email protected]@ti.comInternet support.ti.com/sc/pic/asia.htm

A122010

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2003 power seminar - under the hood of low-voltage dc ...total sw fet losses 0.566 0.817 1.231 0.503...

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