137313427-mgw-for-mss
TRANSCRIPT
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MGW in Bearer Independent Circuit Switched CoreNetwork
MSS MSS,I-BCF
NcBICC, ISUP, SIP-I
HLR-FE
MGW MGW,I-BGF
NbIP, ATM, TDM Backbone
McH.248
Mc/MnH.248
subscriber database
IN
BSC
RNCWCDMA Iu-CS
GSM
AoIP, Ater
TC
A
A
PSTN/ISDN
VoIP/IMS/SIP
Other PLMNSIP,SIP-I,BICC
PSTN
Mb/Nb(SIP-I)/Nb
Mb
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Capacity in MGW (Open MGW)
Type of connectivity Number of interfaces
TDM STM-1/OC-3 80 + 80
IP for user plane (GE) 24 + 24
IP for user plane (10GE) 6 + 6
IP for control plane (GE) 1 + 1
IP for control plane (10GE) 1 + 1
IP for O&M 2 + 2
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Capacity in MGW (MGW based on IPA2800)
Type of connectivity Number of interfaces
TDM STM-1/OC-3 56 + 56
IP for user plane (GE) 16 + 16
ATM STM-1/OC-3 56 + 56
TDM E1/T1 1440
IP for control plane with L2 1 +1
IP for O&M with L2 2 + 2
IP for control plane with L3 1 + 1
IP for O&M with L3 1 + 1
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Functional units in MGW based on IPA2800
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Control and Administrative Computer Unit(CACU)Purpose: CACU controls the ATM
switch fabrics and establishesconnections for calls.Its ATM switching managementfunctions comprises:o Establishment of both internal and
external connections via the SFU,
including ATM circuit hunting andaddress analysis.o Management and control of the SFU,
A2SU, and MXUo Transmission resource managementRedundancy: 2N
PIU: CCP18-C (Intel Pentium M)Interface: ATM interface to MXUMax. number of units insubracks: 2 CCP18-C
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Central Memory (CM)
Purpose: CM serves as the central
data storage and distribution facility.It also handles the centralised partof the common channel signalling,for example, digit analysis .Redundancy: 2NPIU: CCP18-C (Intel Pentium M)Interface: ATM interface to MXUMax. number of units insubracks: 2
CCP18-C
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Interface Control and Signaling Unit (ISU)
Purpose: ISU is responsible for
signalling gateway functionsbetween access networks and MSCServer.Its task include the following:o Process MTP and SCCP of both
narrowband and wideband SS7
signalling.o Messange handling and processing
functions related to the signallingchannel connected to it.
Redundancy: N+1PIU: CCP18-C (Intel Pentium M)
Interface: ATM interface to MXUMax. number of units insubracks: 18 (New deliveries inMGW U5.0) CCP18-C
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Voice Announcement Unit (VANU)
Purpose: VANU controls the
announcement function of MGW.It stores the individual speechsamples, constructs completeannouncements from them andsends them to the DSP units forfurther processing.
Redundancy: NonePIU: CCP18-C (Intel Pentium M)Interface: ATM interface to MXUMax. number of units insubracks: 2
CCP18-C
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Switching Unit (SWU)
Purpose: SWU is a LAN/Ethernet
Switching function, which providesLAN/Ethernet interfaces for:o Control plane (H.248 and M3UA)o O&M signalling (e.g. towards NetAct)ESA40-A has four Gb Ethernet ports .This allows the separation of controlplane and O&M traffic to dedicatedports within one pair.ESA40-A supports L3 connectivitysolution.Redundancy: SN+PIU: ESA40-A (LAN/Ethernet switch)
Interface: LAN/Ethernet to OMU, ISUand site LANMax. number of units in subracks: 6
ESA40-A
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Operation and Maintenance Unit (OMU)
Purpose: OMU handles all theMGWs crucial upper -layer system
maintenance functions, such as:o Hardware configuration managemento Hardware Management System (HMS)
supervisiono Associated centralised recovery
functions.In the event of fault, the OMUautomatically activates appropriaterecovery and diagnostics procedureswithin the MGW.Redundancy: 2NPIU: CCP18-A (Intel Pentium M)Interface: ATM interface to MXU,
LAN/Ethernet via ESA40-A,Duplicated SCSI, Service Terminalinterface, Duplicated HMS interfaceMax. number of units in subracks: 2
CCP18-A
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OMUs storage devices
Purpose: OMU has two dedicated
hard disk units which serve as aredundant storage for:o The entire system softwareo The event buffer for intermediate storing
of alarmso The radio network configuration files.Backup copies are made onto a USBmemory stick that can be connected tothe CCP18- A PIUs front plate. Redundancy: 2NPIU: HDS-BInterface: SCSI (Small ComputerSystem Interface)Max. number of units in subracks: 2
HDS-B
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Transcoding Unit (TCU)
Purpose: TCU includes a number
of signal processors whose mainfunctions are:o Transcodingo Signal level controlo Discontinuous transmission
All DSPs of the unit can be freelyallocated within the MGW.Redundancy: SN+PIU: CDSP-DTInterface: ATM interface to MXUMax. number of units insubracks: 90
CDSP-DT
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Network Interfaces
SFU
MGW
2*1GB
IP Backbone
SFU
RNC/MGW
RNC/MGW
SDH/Sonet
NPGEP
ATM (AAL2) forUserplane
NPS1(P) (PIU:NP8S1)
8*STM-1/OC-3interfaces
SDH/Sonet
PSTNBSSIWFMSS
n*E1/T1via ADM PSTNMSS,
BSSIWF
PSTN
BSS
RNC
IWSEPMXU
NPS1(P)
NIWU
PSTN/A/IWF/Ater Interface
IWSEP/IWSTP (PIU:IW8S1- A)
8xSTM-1 interfaces
NIWU (PIU: IW16P1A) 16*E1/T1/JT1 TDM interface
IP for Userplane
NPGEP (PIU:NP2GE)
2x1GB Electrial orOptical Ethernet
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Network Interface Unit (NPGEP)
Purpose: NPGEP provides
2x1000Base-T Ethernet electrical and2x1000Base-LX/-SX Ethernet opticalinterfaces supporting both single-modeand multi-mode fibers and the meansto execute physical and IP layerfunctionality.It maps packets to and from Ethernet
frame structure includingo Packet classification, forwarding andscheduling
o Traffic managementRedundancy: 2NPIU: NP2GE-A
Interface: 2x1000Base-T Ethernetelectrical, 2x1000Base-LX/-SXEthernet opticalMax. number of units in subracks: 16 NP2GE-A
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Network Interface Unit STM-1 (NPS1/NPS1P)
Purpose: NPS1(P) provides SDHSTM-1 interfaces and handles bittiming, line coding, and timing recovery.Redundancy: 2NPIU: NP8S1-ACapacity :Eight optical STM-1/OC-3interfaces, 155.52 Mbit/s each.
Interface: ATM interface to SFU, Clockreference output to TSS3-AMax. number of units insubracks: 7NPS1(14NPS1P)
NPS1P/NPS1
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Network Interface Unit STM-1/OC-3(IWSEP/IWSTP)Purpose: IWSEP/IWSTP providesSTM-1/OC-3 interfaces.The main tasks are as follows:o Implements the TDM over SDH channel
bit stream conversion to the AAL1 ATMchannel cell stream to be forwarded toSFU and vice versa.
o Support Ater interface.o Support up to 128 timeslots for SS7signalling.Redundancy: 2NPIU: IW8S1-ACapacity :Eight optical STM-1interfaces
Interface: ATM interface to SFU,RS232, Clock reference output toTSS3-AMax. number of units in subracks:14
IWSEP/IWSET
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Network Interface Unit TDM (NIWU)
Purpose: IW16P1A containsE1/T1/JT1 interfaces for TDMsignalling and user plane.The unit also performs the user planeconversation between the TDM formatand the ATM format.Redundancy: NonePIU: IW16P1ACapacity :16 physical TDM electricalinterfacesInterface: ATM interface to SFU,RS232, Clock reference output toTSS3-AMax. number of units in subracks:30/60/90
IW16P1A
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ATM Connections to SFU
Switching and multiplixing in MGW isbased on the ATM technology.The units are:
o SFUs which are used for switching the callprocessed by MGW
o MXUs for connecting the low-bit-ratenetwork interface units to the SFUs.
Allocation of the MGWs ATMconnection: 2.5 Gbit/s serial switchingfabric port interface (SFPIF2G5):
o 32 ports of 3.9 Mcells/s ATM cell rate (or1.65 Gbit/s user data rate)
o One input or output port consists of oneserial data line of 2.5 Gbit/s
o Ports can be conbined for higher data rateso
Duplication needs its own fabric porto The maximum cable length is 5 m
HubSFU
MX
UMX
U
M X U
M X U
CMCM
1-22pcs
CMCACU
2pcs
CMOMU
2pcs
FDU WDUWDU
CMISU
1-8 pcs
CMIWSEP/IWSTP
0-14 pcs
CMNPS1/NPS1P
0-14 pcs
CMNPGEP
0-16 pcs
CM A2SU
(used in release
prior to U5.0 only)
0-1 pcs
CMTCU
0-9 pcs
CMNIWU
0-9 pcs
CMISU
1-2 pcs
TBU
EHU
3-11
TBU
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Switching Fabric Unit (SFU)
Purpose: SFU provides part of the ATM cell switching function.
It provides full accessibility and isnon-blocking at ATM connectionlevel.SFU supports point-to-point andpoint-to-multipoint connectiontopologies, as well as,
differentiated handling of various ATM service categories.Redundancy: 2NPIU: SF20H, SF10E (only for upgrades)Capacity :2.5 Gbits/sInterface: ATM interface Max. number of units in subracks: 2
SF20H
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Multiplexer Unit (MXU)
Purpose: MXU multiplexes traffictributary units towards SFU.It includes part of the AMT layerfunctionality, such as: o Policingo Statisticso OAMo Buffer managemento SchedulingRedundancy: 2NPIU: MX1G6-ACapacity :1.6 Gbits/sInterface: ATM interfaces
Max. number of units in subracks:24
SF20H
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Timing and Synchronization, SDH Stratum 3 (TSS3)& Timing Buffer (TBUF)
TSS3 TBUF
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Clock BUS
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Hardware Management Subsystem (HMS)
Purpose: HMS has 3 hierarchically organised layers of equipment.o Hardware Management Master Nodes (HMMNs)
Uppest level in the hierarchyControl the whole subsystemLocated in OMU
o Hardware Management System Bridge Nodes (HMSBs)
Intermediate level in the hierarchyServe as bridges which connect HMMNs to the lowest-level block in thehierarchyLocated in TBU (TSS3s and TBUFs)
o Hardware Management System Slave Nodes (HMSSs)Locate in every PIUs
Redundancy: 2N
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HMSSystem
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HMS BUS
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Power Distribution Subsystem
PD30
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External Hardware Alarm Unit ( EHU)
Purpose: EHU receive external alarmsand send indications of them asmessages to OMU-located externalalarm handler via HMS.
A second function is to drive:o the optional External Hardware Alarm
panel (EXAU-A)o the cabinet integrated lampo CAIND alarm indicator located on top ofCAMA cabinet and possible other external
equipment.Redundancy: NonePIU: EHATInterface: 32 voltage controlled inputs,
8 current controlled inputs, 16 generalpurpose 20 mA current outputs.Connections to external devices viacabling panal1 in the rear of CAMA.
SF20H
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Base Module
ExpansionModule
MGW Cabinets and Subracks
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MGW Configuration
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CAMA Subrack 1 (Base Module)
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CAMA Subrack 2 (Base Module)
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MGW Expansion Modules
Three subrack configuration
alternatives Subrack configuration with
IWS1E/T Subrack configuration with
NIWU/NIP1 Subrack configuration with TCUMain difference between the subrack
configurations is the number ofTCU/A2SU units and numberand type of interface units