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Removal of Decaying DC Offset in Current Signals for Power System Phasor Estimation Amir A. A. Eisa, K. Ramar Multimedia University, Malaysia [email protected]  Abstract  –This paper presents a new method for the remov al of decaying dc offset from current signals in digital protective devices. The method is ba sed on the fact t hat a purely sinusoidal signal has a zero average over a full cycle or multiples of the full cycle of its fundamental frequency, whereas an exponential signal has a nonzero average over that same interval. A full cycle plus one sample of post fault data are required to calculate the parameters of the decaying dc offset in order to completely eliminate it from the current signal. Decaying dc offset removal is carried out before applying the current signal to the digital filter used for phasor estimation. The method has been tested by applying it to a fault current signal generated by computer simulati on. Results obtained indicate that the method has greatly improved the performance of the full-cycle DFT algorithm. The new method can be applied in real time on digital protective devices because of its simplicity and computational efficiency.  Index Terms  –Digital protective devices , remov al of decaying dc offset, fault currents, full-cycle DFT, phasor estimation. I. I  NTRODUCTION Most digital pro tective relay s are based on phasors. The relay is usually required to estimate the magnitude and the  phase angle of the fundamental frequency component in current and voltage signals as accurately and as quickly as  possible. The ph asor estimator is required to retain only the component of interest and reject all unwanted components such as harmonics, subharmonics, exponentially decaying dc offset, high frequency oscillations, and noise. Decaying dc offsets significantly affect the performance of digital protec tive relay s. This eff ect, however, is more  pronounced on current signals than on voltage signals. Both the initial magnitude and time constant of the decaying dc component are unpredictable because their values depend on random factors, such as fault resistance, fault location, and fault inception angle. All digit al filter algorithms, such as full-cycle DFT, half-cycle DFT, least-error-squares (LES), cosine, Walsh, and Kalman filters, are affected, to different extents, by the presence of decaying dc offset in their input signals [1]. Generally, the de caying dc of fset will cause a n initial overshoot followed by oscillations in the output of the filter. The output will eventually converge to the final value after a period of time that depends on both the algorithm used and the time consta nt of the decaying dc o ffset. The decay ing dc component therefore seriously affects the accuracy and convergence s peed of digital filter algor ithms. Such e rrors cannot be tolerated in some relay ing applications such a s high  performance rel ays and fault locators. Many techniques have been proposed to eliminate the effect of decaying dc offset on phasor es timation. Benmouyal [1] has proposed a digital mimic filtering technique to attenuate the decaying dc component. This filter , howev er, achieves its best performance once the time constant of the decaying dc component is equal to the time constant of the mimic filter. Another sho rtcoming of the mimic f ilter is that it acts as a high-pass filter that amplifies high frequency noise. Gu and Yu [2] have propos ed a method t hat applies full-cycle DFT for one cycle plus two samples to calculate and compensate fo r the dc offset. Reference [3] presents an algorithm which is based on applying weighting least error squares (L ES) technique to a three -state signal mo del. The estimator has the form of the regular r ecursive f ull-cycle DFT with additional adaptive correction for the decaying dc component. The algorithm p roposed in [4] uses three consecutive phasors computed by DFT to estimate the  parameters of the decaying dc component. The computations involved, however, are rather complex. An algo rithm that uses partial summation technique to eliminate the influence of decaying dc offset on the Fourier algorithm has been  proposed in [5]. Three simplified algorithms have also been  proposed t o compromise between computational burden and accuracy. Sidhu et al. propose d a modified D FT-based full- cycle phasor estimation algorithm that is immune to decaying dc [6]. The algorithm remo ves the dec aying dc offset f rom  phasor estimates by means of two orthogonal digital DFT filters tuned at different frequencies. This algorithm, however, requires extensive amount of computation to calculate the dec aying dc paramete rs. Balamourougan e t al. [7] improved on the technique proposed in [6] by using three off-line look-up tables in order to reduce the computational  burden. Reference [8] has implemented the technique  proposed in [6] and [7] using half-cycle LES filters. A computationally efficient method for removing the exponentially decaying dc component has been presented in [9]. The met hod exploits the pe riodicity of t he fundamental frequency component and the integer harmonics to calculate the parameters of the decaying dc offset using one cycle plus two samples. This paper proposes a new method for the removal of decaying dc off set from current sig nals. The method is based on the fact that sinusoidal signals and exponential signals have diff erent mathematical proper ties. Namely , a pu rely

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Removal of Decaying DC Offset in CurrentSignals for Power System Phasor Estimation

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7/15/2019 1_287_paper

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Removal of Decaying DC Offset in Current

Signals for Power System Phasor Estimation

Amir A. A. Eisa, K. Ramar Multimedia University, Malaysia

[email protected]

Abstract –This paper presents a new method for the removal of decaying dc offset from current signals in digital protectivedevices. The method is based on the fact that a purely sinusoidalsignal has a zero average over a full cycle or multiples of the fullcycle of its fundamental frequency, whereas an exponentialsignal has a nonzero average over that same interval. A fullcycle plus one sample of post fault data are required to calculatethe parameters of the decaying dc offset in order to completelyeliminate it from the current signal. Decaying dc offset removalis carried out before applying the current signal to the digitalfilter used for phasor estimation. The method has been tested by

applying it to a fault current signal generated by computersimulation. Results obtained indicate that the method hasgreatly improved the performance of the full-cycle DFTalgorithm. The new method can be applied in real time ondigital protective devices because of its simplicity andcomputational efficiency.

Index Terms –Digital protective devices, removal of decaying dcoffset, fault currents, full-cycle DFT, phasor estimation.

I. I NTRODUCTION

Most digital protective relays are based on phasors. The

relay is usually required to estimate the magnitude and the phase angle of the fundamental frequency component in

current and voltage signals as accurately and as quickly as

possible. The phasor estimator is required to retain only the

component of interest and reject all unwanted components

such as harmonics, subharmonics, exponentially decaying dc

offset, high frequency oscillations, and noise.

Decaying dc offsets significantly affect the performance of

digital protective relays. This effect, however, is more

pronounced on current signals than on voltage signals. Both

the initial magnitude and time constant of the decaying dc

component are unpredictable because their values depend on

random factors, such as fault resistance, fault location, and

fault inception angle. All digital filter algorithms, such as

full-cycle DFT, half-cycle DFT, least-error-squares (LES),

cosine, Walsh, and Kalman filters, are affected, to different

extents, by the presence of decaying dc offset in their input

signals [1]. Generally, the decaying dc offset will cause an

initial overshoot followed by oscillations in the output of the

filter. The output will eventually converge to the final value

after a period of time that depends on both the algorithm used

and the time constant of the decaying dc offset. The decaying

dc component therefore seriously affects the accuracy and

convergence speed of digital filter algorithms. Such errors

cannot be tolerated in some relaying applications such as high

performance relays and fault locators.

Many techniques have been proposed to eliminate the

effect of decaying dc offset on phasor estimation. Benmouyal

[1] has proposed a digital mimic filtering technique to

attenuate the decaying dc component. This filter, however,

achieves its best performance once the time constant of the

decaying dc component is equal to the time constant of the

mimic filter. Another shortcoming of the mimic filter is that

it acts as a high-pass filter that amplifies high frequency

noise. Gu and Yu [2] have proposed a method that appliesfull-cycle DFT for one cycle plus two samples to calculate

and compensate for the dc offset. Reference [3] presents an

algorithm which is based on applying weighting least error

squares (LES) technique to a three-state signal model. The

estimator has the form of the regular recursive full-cycle DFT

with additional adaptive correction for the decaying dc

component. The algorithm proposed in [4] uses three

consecutive phasors computed by DFT to estimate the

parameters of the decaying dc component. The computations

involved, however, are rather complex. An algorithm that

uses partial summation technique to eliminate the influence of

decaying dc offset on the Fourier algorithm has been proposed in [5]. Three simplified algorithms have also been

proposed to compromise between computational burden and

accuracy. Sidhu et al. proposed a modified DFT-based full-

cycle phasor estimation algorithm that is immune to decaying

dc [6]. The algorithm removes the decaying dc offset from

phasor estimates by means of two orthogonal digital DFT

filters tuned at different frequencies. This algorithm,

however, requires extensive amount of computation to

calculate the decaying dc parameters. Balamourougan et al.

[7] improved on the technique proposed in [6] by using three

off-line look-up tables in order to reduce the computational

burden. Reference [8] has implemented the technique

proposed in [6] and [7] using half-cycle LES filters. Acomputationally efficient method for removing the

exponentially decaying dc component has been presented in

[9]. The method exploits the periodicity of the fundamental

frequency component and the integer harmonics to calculate

the parameters of the decaying dc offset using one cycle plus

two samples.This paper proposes a new method for the removal of

decaying dc offset from current signals. The method is based

on the fact that sinusoidal signals and exponential signalshave different mathematical properties. Namely, a purely

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sinusoidal signal has a zero average over a full cycle or multiples of the full cycle of its fundamental frequency,whereas an exponential signal has a nonzero average over

that same interval. The removal of the dc offset is performed before applying the current signal to the digital filter used for phasor estimation.

II. PROPOSED METHOD Let the signal of interest be represented by:

∑=

−++=

M

n

nnt t n A Aet y

1

/ )cos()( φ ω τ (1)

where A magnitude of the decaying dc offset;

τ time constant of the decaying dc offset; An amplitude of the nth harmonic;

φ n phase angle of the nth

harmonic;

ω 100π rad/s.

The signal contains an exponential component in additionto a set of harmonics, which is usually limited by an anti-

aliasing filter.If we take the average value of both sides of (1) over a

complete cycle (T ) of the fundamental frequency we get:

∫ ∑∫∫=

−++=

T M

n

nn

T t

T

dt t n AT

dt eT

Adt t y

T 0 10

/

0

))cos((1

)(1

φ ω τ (2)

The average value of the sinusoidal part of the signal over acomplete cycle of the fundamental frequency is zero.

Therefore, (2) becomes:

)1()(1 /

0

−−=−

∫τ τ T

T

eT

Adt t y

T (3)

If the signal y(t) is sampled by taking N samples per cyclethen these samples can be used to numerically compute theintegral on the left-hand-side of (3). Any numerical

integration technique, such as the trapezoidal rule or Simpson’s rule, can be used here.

After computing the value of the integral we have twounknowns on the right-hand-side of (3); the initial value A

and the time constant τ of the exponential component. In

order to evaluate these two unknowns a second equation isrequired.

If the sampling interval is given by

N T t /=Δ , (4)

then we can obtain a second equation by taking the average

value of both sides of (1) over the interval [Δt , Δt + T ]. Thisresults in:

τ τ τ // )1()(1 t T

T t

t

eeT

Adt t y

T

Δ−−

Δ

−−=∫ (5)

To solve (3) and (5) for the unknowns A and τ, let:

∫=

T

dt t y

T

Avg

0

0 )(1

, (6)

∫+Δ

Δ

=

T t

t

dt t yT

Avg )(1

1 , (7)

and

τ /t e E Δ−= . (8)

Equations (3) and (5) become:

)1(0 −−= N E

T

A Avg τ , (9)

E E T

A Avg N )1(1 −−= τ . (10)

From (9) and (10) we can easily conclude that:

0

1

Avg

Avg E = (11)

)1(

)ln(0

−=

N E

E Avg N A (12)

The decaying dc offset can then be removed from samplenumber k using:

k cor AE k yk y −= )()( (13)

The steps for dc offset removal are as follows:1. Avg 0 and Avg 1 are calculated using (6) and (7), and any

numerical integration technique.

2. E and A are obtained from (11) and (12).3. The signal is corrected using (13).

Notice that a full cycle plus on sample of post fault data are

required to apply the proposed method.

The corrected signal ( ycor ) can now be used with any digitalfilter algorithm, such as the full-cycle DFT, to obtain the

magnitude and the phase angle of the fundamental frequency phasor or those of any harmonic.

III. PERFORMANCE EVALUATION

In order to test the performance of the proposed technique,

the transmission system shown in Fig. 1 is simulated using

PSCAD/EMTDC. A single line to ground solid fault is

created at a distance of 50 km from bus S. The faulted phase

current is sampled by the relay at bus S using a sampling rate

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ER ∠0°

~ ~ZS ZR

R F

ES∠δ

S R

×

Relay

230 kV, 200 km

Fig. 1. The simulated transmission system.

of 20 samples per cycle. The parameters of the simulated

system are given in Appendix A.

The fault current waveform is shown in Fig. 2. It can be

seen that the fault current contains a considerable amount of

dc offset.

The proposed dc offset removal method is applied to the

fault current waveform and the corrected signal obtained is

shown in Fig. 3. It is obvious that the dc offset has been

removed. The dc offset waveform (given by: y – ycor ) is

shown in Fig. 4.Simpson’s rule of integration has been used to numerically

evaluate the integrals in (6) and (7) because of its high

accuracy. Any other rule of integration can be used. It

should be pointed out, however, that accurate rules of

integration should be used if the sampling rate used is low.

The full-cycle DFT algorithm is used to extract the

fundamental frequency phasor of the fault current both before

and after decaying dc offset removal. The magnitude and the

phase angle of the fundamental frequency phasor before and

after decaying dc offset removal are shown in Figs. 5 and 6.

It can be seen that removing the dc offset from the current

signal has greatly improved the performance of the full-cycleDFT algorithm. The oscillations have been eliminated and

the convergence has become almost immediate.

The proposed method is computationally efficient and can

be applied in real time on protection devices. It should be

noted, however, that the technique should be applied to the

post-fault part of the signal only. Therefore, a fault detector

can be used as the triggering mechanism for the dc offset

removal procedure.

IV. CONCLUSIONS

A simple and numerically efficient method for the removal

of decaying dc offset from current signals in digital protectivedevice has been proposed. The method requires a full cycle

plus one sample of post-fault data in order to calculate the

parameters of the decaying dc offset. The removal of the dc

offset from the current signal is performed before applying

the signal to the digital filter used for phasor estimation.

The method is tested by applying it to a fault current signal

generated by PSCAD/EMTDC simulation. The results

obtained demonstrate that the method is capable of

completely eliminating the dc offset and thus greatly

improving the performance of the full-cycle DFT algorithm.

This improvement in performance is achieved by eliminating

the oscillations and speeding up convergence.

Because of its computational efficiency, the method can be

applied in real time on digital protective devices.

0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.3-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

3

time (s)

F a u l t C u r r e n t ( k A )

0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.3-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

3

time (s)

F a u l t C u r r e n t ( k A )

0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.3-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

3

time (s)

D C

O f f s e t ( k A )

Fig. 2. Fault current waveform before dc offset removal.

Fig. 3. Fault current waveform after dc offset removal.

Fig. 4. Decaying dc offset waveform.

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APPENDIX A

The parameters of the simulated transmission system are

given here:

Power system frequency = 50 Hz

Equivalent source impedances:

ZS1 = ZS0 = 52.9∠80° Ω

ZR1 = ZR0 = 52.9∠

80

°

Ω

Equivalent source voltages:

ES = ER = 230 kV

δ = 15°

Transmission line parameters:

Line length = 200 km

Transmission line tower configuration is given in Fig. 7.

Conductor and ground wire data are given in Table I.

TABLE ICONDUCTOR AND GROUND WIRE DATA

Conductors Ground Wires

Radius (m) 0.0203454 0.0055245

DC Resistance (ohm/km) 0.03206 2.8645

Sag (m) 10 10

R EFERENCES

[1] G. Benmouyal, “Removal of dc offset in current waveforms using

digital mimic filtering,” IEEE Trans. Power Delivery, vol. 10, no. 2, pp. 621–630, Apr. 1995.

[2] J. C. Gu and S. L. Yu, ‘‘Removal of DC-offset in current and voltage

signals using a novel Fourier filter algorithm,’’ IEEE Trans. Power Delivery, vol. 15, no. 1, pp. 73---79, Jan. 2000.

[3] E. Rosołowski, J. Izykowski, and B. Kasztenny, ‘‘Adaptive measuring

algorithm suppressing a decaying dc component for digital protectiverelays,’’ Electric Power Systems Research, vol. 60, pp. 99---105, 2001.

[4] Y.H. Lin and C.W. Liu, “A new dft-based phasor computationalgorithm for transmission line digital protection,” IEEE/PES

Transmission and Distribution Conference and Exhibition: Asia Pacific,vol. 3, pp.1733–1737, 2002.

[5] Y. Guo, M. Kezunovic, and D. Chen, “Simplified algorithms for removal of the effect of exponentially decaying dc-offset on the Fourier

algorithm,” IEEE Trans. Power Delivery, vol.18, no 3, pp. 711–717,Jul. 2003.

[6] T. S. Sidhu, X. Zhang, F. Albas, and M. S. Sachdev, ‘‘Discrete-Fourier-transform-based technique for removal of decaying dc offset from

phasor estimates,’’ Proc. Inst. Elect. Eng., Gen., Transm. Distrib., vol.150, no. 6, pp. 745---752, Nov. 2003.

[7] V. Balamourougan and T. S. Sidhu, “A new filtering technique toeliminate decaying dc and harmonics for power system phasor

estimation,” IEEE Power India Conference, Apr. 2006.[8] T. S. Sidhu, X. Zhang, and V. Balamourougan, ‘‘A new half-cycle

phasor estimation algorithm,’’ IEEE Trans. Power Delivery, part 2, vol.20, no. 2, pp. 1299---1305, Apr. 2005.

[9] J. F. Minambres Arguelles, M. A. Zorrozua Arrieta, J. LazaroDominguez, B. Larrea Jaurrieta, and M. Sanchez Benito, ‘‘A new

method for decaying dc offset removal for digital protective relays,’’Electric Power Systems Research , vol. 76, pp. 194---199, 2006.

G1 G2

C1 C3

C2

30 m

5 m

5 m

10 m

10 m

Tower: 3H5

Conductors: chukar

Ground Wires: 1/2" High Strength Steel

0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.30

0.2

0.4

0.6

0.8

1

1.2

1.4

time (s)

P h a s o r

M a g n i t u d e ( k A )

Before dc offset removal

After dc offset removal

0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.3-2.8

-2.6

-2.4

-2.2

-2

-1.8

-1.6

-1.4

-1.2

-1

-0.8

time (s)

P h a s o r P h a s e A n g l e ( r a d )

Before dc offset removal

After dc offset removal

Fig. 7. Transmission line tower configuration.

Fig. 5. Magnitude of the fundamental frequency phasor.

Fig. 6. Phase angle of the fundamental frequency phasor.