12 ee362l h bridge inverter spring 2009

EE362L, Power Electronics, H-Bridge Inverter Version Feb. 20, 2009

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Introduction In this experiment, you will continue your work from the previous labs and build the complete inverter. Then, you will use it to convert 35-40Vdc power (DBR or solar) to 60Hz ac. Physical Layout of Control Circuit, Firing Circuits, and H-Bridge (with Filters)

Figure 1. Physical layout of inverter

MOSFET A+

MOSFET A–

MOSFET B+

MOSFET B–

H-Bridge and Filters

Individual heat sink for each MOSFET. Do not let the heat sinks touch each other because they will be at MOSFET drain potentials.

+ Vdc

–

+

Vac (Output) –

a b

A+ Firing

A– Firing

B+ Firing

B– Firing

Control Circuit from Previous Lab

Jack for DC wall

wart

O+ O– O+ O– O+ O– O+ O–

V(A+,A–) V(B+,B–)

–12Vdc regulated

blue

blue blue violet violet

Jack for AC wall

wart

Parallel 10A fuses attached here


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Zoom-in details of the wiring and DC input filter are given in Figures 2 and 3. The capacitor across input Vdc supplies the ripple current to the inverter so that the current from the DC source can be ripple-free. It is very important to follow the wiring color code, especially on the H-bridge. Doing so will make troubleshooting much easier.

Figure 2. Input filter for Vdc

10µF, 50V, high-frequency capacitor

+

Vdc input

–

Two parallel 10A fuses attached here. One fuse feeds the A+, A− side of the inverter, and the other fuse feeds the B+, B− side. Use push-on quick disconnects on the fuse holders to avoid soldering.

Figure 3. H-Bridge wiring color scheme (using #16 stranded) (note – wire crossings are not connected)

A+ A– B+ B–

G D S G D S G D S G D S

+

Vdc

–

+

Vac

– red

orange

blue

black

Put a 10A fuse in series with each

red lead blue

blue

orange

Warning – do not make the wiring connections shown in Figure 3 until told to do so in the lab steps. • For A+ and A−, this is

done in Step 8 (pass A). • For B+ and B−, this is

done in Step 8 (pass B)


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The Experiment 1. Unplug the DC and AC wall warts. Before beginning construction, use a multimeter as an

ohmmeter to confirm that the ground of the A+ firing circuit is isolated from the ground of the A– firing circuit. Likewise for B+ and B–. Also, make sure that A– and B– grounds are the same node (i.e., zero resistance between them), and that they are isolated from the PWM control circuit ground. Finally, confirm that A+ and B+ have inverting driver chips, and A– and B– have non-inverting driver chips.

2. Build the A+ and A– MOSFET assemblies. Do not make any H-bridge connections in

Figure 3 yet! You will use #4-40, ¾” machine screws, split washers, flat washers, and hex nuts to secure the MOSFETs to their heat sinks. Connect the A+ and A– MOSFET assemblies to their isolated firing circuits.

3. Use a multimeter to measure the resistance between the MOSFET A+ source terminal and

the MOSFET A– source terminal. The resistance should correspond to an open circuit. If not, remedy now.

4. Energize your isolated firing circuits by plugging in the DC wall wart. Do not yet plug in the

AC wall wart, so that ma = 0 for now. 5. With none of the wires in Figure 3 connected yet, attach scope probe 1 (and its ground

lead) across VGS of MOSFET A+, and scope probe 2 (and its ground lead) across VGS of

MOSFET A–. You should see the waveforms shown. The difference in rise and fall times is due to the asymmetrical firing circuits. If there is any observable overlap in “on” times, it is probably due to your optocouplers, and you will need to remedy it now. Once your circuit is working properly, save a screen snapshot with simultaneous VGS of A+ and A– for

your report. Use a multimeter and compare your DC measurements of VGS for A+ and A– to those values given in the figure box below.

VGS of A+

VGS of A–

blanking time to eliminate overlap

actual MOSFET turn on

Save screen snapshot #1

Multimeter check of VGS for

A+ and A–. Expect about 4.0 to 4.5Vdc on each.


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6. Temporarily plug in the AC wall wart, and raise Vcont to the maximum. If necessary, adjust

the 1kΩ trimmer pot in the PWM control circuit so that –Vcont has the same rms magnitude as Vcont. The duty cycles of the VGS waveforms will no longer be constant because ma > 0.

Use a multimeter to check the DC values of VGS for A+ and A–. Expect about 5.3Vdc on each. Unplug the AC wall wart so that ma = 0.

7. Unplug both the DC and AC wall warts. 8. Now, connect the wires for A+ and A– shown in Figure 3. Important:

• connect the 10µF ripple control capacitor to the Vdc input, • do not yet connect B+ and B– , • do not yet mount the AC filter inductor and capacitor, • do not yet energize with 35-40Vdc.

9. Remove scope probes so that multiple grounds do not interfere with the following test.

Perform the half-bridge, no-firing, no-load test on A+ and A– as follows: with both wall warts unplugged, connect a switched off 35-40Vdc source (either DBR or solar) in series with a 10Ω power resistor to your inverter input. The resistor will limit the current to 4A if your circuit has problems. Switch on the 35-40Vdc. Using a multimeter, read the DC voltage across the 10Ω power resistor. The reading should be less than 0.005V. If not, then

• voltages in the range of 30-40V indicate a dead short in your H-bridge wiring or a

grounding error in your firing circuit, and this problem must be remedied now.

10. Keeping the 10Ω power resistor in the circuit, perform the half-bridge, firing, no-load test on A+ and A– as follows: plug in the DC wall wart to power your control and firing circuits. Use one scope probe and, one-by-one, check VGS waveforms on A+ and A– to make that their MOSFETs are receiving firing signals. The DC voltage across the 10Ω power resistor should be a small positive value (i.e., < 0.25V, corresponding to less than 25mA of idling current), indicating that the DC idling current is negligible. If not, then

• voltages in the range of 10-30V may indicate that driver chips for A+ and A– are both

inverting or non-inverting, or that you may have a control grounding problem. The problem must be remedied now.

• voltages in the range of 0.25V to a few volts indicate excessive firing overlap – proceed for now, but deal with the excessive overlap issue as described after Step 17.

11. Turn off the 35-40Vdc and unplug the DC wall wart.


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12. Temporarily disconnect the firing signals to the A+ and A– MOSFET gates to prevent A+ and A– from firing. Repeat Steps 3 through 11 for B+ and B–. Expect consistent B+, B– VGS multimeter readings with what you saw for A+, A–.

13. Leave the 35-40Vdc off for now. Re-connect the A+ and A– MOSFET gate signals so that

all four MOSFETs will fire, and plug in both wall warts. Raise Vcont to about 1.5Vrms. Use one scope probe and, one-by-one, view VGS for each of the four MOSFETs. The four waveforms should be identical and should resemble those seen previously, except that the duty cycle is varying.

14. Perform the full-bridge, firing, no-load test as follows: leaving in the 10Ω power resistor,

turn on your 35-40Vdc. Measure the DC voltage across the 10Ω power resistor. It should be positive but less than 0.5V (i.e., less than 50mA of idling current). If not, then see the bullets in Steps 9 and 10.

15. Turn off the 35-40Vdc. 16. Visually check for overlap in A+ and A– as described here. Note – you cannot

simultaneously observe VDS for both MOSFETs A+ and A– because their grounds are

different. However, you can simultaneously observe VDS of A+, and –VDS of A– as follows:

• Connect scope probe 1 (and its ground lead) across VDS of MOSFET A+

• Connect scope probe 2 (without its ground lead) to the source of MOSFET A– • Leaving in the 10Ω power resistor, turn on the 35-40Vdc. • On the scope you will observe VDS for A+, and – VDS for A–. • You should see the waveforms shown in the following figure. • Save a screen snapshot for your report. There should no overlap in “on” times.


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(Note - the noisy bursts on the waveforms becomes more pronounced as load current increases. Also, the added vertical bars show slight overlap in “on” times, but only during the transitions.)

17. Repeat Step 16 for B+ and B–. If all the above steps are OK, then you are ready to proceed with the following load tests. But, if you have an idling current problem that simply will not go away, then try the following two bulleted steps (in the order shown) to reduce idling current:

• First, use 1.5kΩ or 1.8kΩ resistors, instead of 1.2kΩ resistors, in the MOSFET firing circuits. This will increase the time it takes for the asymmetrical firing circuit to turn on the MOSFETs. Check for reduction in overlap.

• Second, double (by paralleling) the frequency control capacitor in the PWM controller, so that the inverter switching frequency is reduced by 50%. This will not reduce overlap, but it will reduce the idling current because there will be fewer overlaps per second.

+ VDS of A+

– – VDS of A–

+

A+ off

A– on

A+ on

A– off

+ VDS of B+

– – VDS of B–

+

B+ off

B– on

B+ on

B– off




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The above two modifications will make the inverter output slightly less linear, but remember that your most important goal is to have a working circuit! 18. Lower Vcont to zero. Unplug the AC and DC wall warts, and turn off the 35-40Vdc source. 19. Connect a three-headlight bank to the unfiltered output of your inverter (no AC filter

installed yet). 20. Connect scope probe 1 and its ground lead to the output of your inverter. Disconnect scope

probe 2 and its ground lead. 21. Perform the full-bridge, firing, load test as follows: leave the 10Ω power resistor in the

circuit as before, plug in the DC wall wart to re-energize your control circuit and isolated firing circuits, and keep Vcont = 0. Turn on the 35-40Vdc source. Read the DC voltage across the 10Ω power resistor. The voltage should be less than 1V, indicating a DC current less than 0.1A. If not, then

• voltages in the range of 30-40V indicate a dead short in your H-bridge wiring, a

mixup in the driver chips (e.g., drivers in either the A line or B line are swapped, but both lines are not swapped), or a grounding problem. This must be remedied now.

• voltages in the range of 1V to a few volts indicate excessive firing overlap – see previous remedies.

22. Perform the precautionary tap test by temporarily touching a short jumper wire across the

10Ω power resistor, thus shorting the resistor and effectively connecting the 35-40Vdc source directly to the inverter DC input. Neither of the two 10A inverter fuses should “blow.” If either fuse blows, you must remedy the situation now. If neither fuse blows, turn off the DBR, remove the 10Ω power resistor, connect the DBR directly to the inverter, and turn the DBR back on.

23. Plug in the AC wall wart, and gradually raise Vcont until you see the headlights “light up”

slightly. Observe unfiltered, unaveraged Vac on the scope, using 5msec/division on the time axis.


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24. Gradually raise Vcont until ma ≈ 1. Measure Vdc and Vac with ma ≈ 1. Save a screen

snapshot of unfiltered Vac for your report.

25. Use the FFT of the scope to analyze unfiltered Vac, and note the frequencies (above 60Hz) for the two clusters that has the greatest voltage magnitude (these should be clustered around 2ftri and 4 ftri). Compute these magnitudes as a percent of the fundamental 60Hz voltage.

26. Allow the inverter to operate for about 5 minutes, then turn off the 35-40Vdc, lower Vcont to

zero, and then check for “hot” heat sinks or other components. 27. With the 35-40Vdc off, connect the output AC filter inductor and capacitor as shown in the

following figure. Make sure that the inductor is in series between the H-bridge output and the filter capacitor. Otherwise, the capacitor will short the high-frequency output of the H-bridge.

The output filter has cut-off frequency of about 5kHz, which eliminates most of the high-frequency (i.e., 40kHz and 80kHz) components from the inverter output voltage, without significantly affecting the 60Hz component.



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28. Starting with Vcont = 0, turn on the 35-40Vdc. Gradually raise Vcont until ma ≈ 1. If either

fuse blows, your filter is probably not corrected properly. 29. With ma ≈ 1, use a multimeter to measure the DC component of the filtered Vac. The DC

value should be < 0.5V. If not, carefully adjust the –Vcont op amp gain to minimize the DC at the inverter output.

30. Observe the quality of the filtered, un-averaged output waveform. Save a screen snapshot of

filtered Vac for your report.


Output filter for Vac

+ Vac output –

10µF, 50V, bipolar, high-frequency capacitor

100µH, 9A or 10A inductor

Point “a” in H-bridge

Point “b” in H-bridge

a b

+ Vac output −

symbolic


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31. Check linearity as follows: Gradually lower Vcont toward zero, taking 5 or 6 sets of multimeter readings for Vcont and Vac. In your report, show a table with Vcont, Vac, Vac/Vcont.

32. Raise Vcont well into the overmodulation region and into near-saturation. Save a screen

snapshot of filtered Vac for your report. 33. Perform an FFT measurement for the near-saturation condition, but focus on 0-1000Hz.

Expect to see low-order harmonics (i.e., 3rd, 5th, 7th harmonics of 60Hz) 34. If the components are not getting too hot, use a 5Ω power resistor as a load. Gradually raise

Vcont until ma ≈ 1. Measure Vdc and Vac with ma ≈ 1. Save a screen snapshot of filtered Vac for your report.


Save screen snapshot #7 (it should have the same appearance as snapshot

#5, but with slightly reduced magnitude)


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Parts list • Three 2-terminal, 30A terminal blocks for Vdc input and Vac output and filter • Four 3-terminal, 20A terminal blocks for MOSFETs • Four MOSFETs, 100V, 31A Fairchild IRFP140A (Mouser #512-IRFP140A) • Four heat sinks for TO-218 case styles, Aavid Thermalloy, 1.65” x 1.00” x 2.00”, 4.5°C/W,

(Mouser # 532-529901B02500) • Four solderless, screw-clamp terminations (i.e., green plugs) • 100µH, 10A inductor, Vishay IH10-100 (Mouser #70-IH-10-100) • Two 10μF, 50V high-frequency bipolar capacitors • Four 2” steel corner brackets (holes not enlarged) for MOSFETs • Two fuse blocks with quick disconnect terminals for ¼” by 1¼” fuses (Cooper/Bussmann,

Mouser #504-S-8101-1) • Two ¼” by 1¼” 10A fast-acting fuses (Mouser #504-AGC-10) Extra parts for the student parts bin and screw cabinet, at least

• 5 of the dual comparators • 5 of the dual op amps • 5 of the wall wart jacks • 5 of the 500Ω square trimmer potentiometers • 5 of the 1kΩ square trimmer potentiometers • 5 of the 8-pin DIP sockets • 5 of the 14-pin DIP sockets • 5 of the 8-pin SIP sockets • 5 of the inverting drivers • 5 of the non-inverting drivers • 5 of the optocouplers • 5 of the high-speed switching diodes • 5 of the 100V MOSFETs • 5 of the green plugs • 5 of the fuse blocks • 5 of the 10A fuses

Extra parts (only for the TA parts bin), double those in the student parts bin, plus at least

• 10 of the waveform generator chips • 10 of the 2W dual output DC-DC converter chips • 10 of the single output DC-DC converter chips

Plastic bags for parts

• 6”x6”, 4mil for small parts • 8”x10”, 6mil for holding everything


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2” steel corner brackets hold the heat sinks to the wood. Mount the heat sinks so that their solder tabs are on top.

Snubber caps are no longer used in this circuit


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Fuseholders and 10A fuses for DC input not shown in this photo

12 ee362l h bridge inverter spring 2009

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