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Assalam AlaikumVLSI-2011

Gul Munir Ujjan

(Assistant Professor)

CISE Department, NEDUET Karachi

Solution – Q2 (Test#1 – VLSI – 2011)

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assign result = c ? a : b ;always @ ( * ) begina = 1;b = a;#2 c = #2 a + b;d = #1 a ^ b;#2 e = #1 b + c;#1 b = a & b;end

Assume all registers are of single bit each

T a b c d e result Description0 1 1 x x x a/b

(Either a or bbecause c=x)

Entry: Line 3,4 5 (delay only)Exec: Line 3,4 only

2 1 1 x x x a/b Entry: Line#5Exec: None

4 1 1 0 x x 1 Entry: Line#6 Exec: Line#5c = a + b = 1+1 = 10 = 0 (single bit)

5 1 1 0 0 x 1 Entry: Line#7 (delay only)Exec: Line#6

7 1 1 0 0 x 1 Entry: Line#7Exec: None

8 1 1 0 0 1 1 Entry: Line#8 (delay only)Exec: Line#7

9 1 1 0 0 1 1 Entry: Line#8,9Exec: Line#8,9

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Line #1 is a continuous assignment; will executes only when a or b or c changes.

Assuming initially a=b=c=x; Line#1 executes only in t=0,4 Because: In t=0; a and b both changes In t=4; c changes While in rest of the statements either of a or

b or c are re-assigned but not changed.

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Solution – Q2 continued

Solution – Q2 (Test#1 – VLSI – 2011)

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assign result = c ? a : b ;always @ ( * ) begina < = 1;b < = a;#2 c <= #2 a + b;d <= #1 a ^ b;#2 e <= #1 b + c;#1 b <= a & b;end

Assume all registers are of single bit each

T a b c d e result Description

0 1 x x x x a/b(Either a or bbecause c=x)

Entry: Line#3,4,5(delay only)Exec: Line 3,4

2 1 x x x x a/b Entry: Line#5,6,7(delay only)Exec: None

3 1 x x x x a/b Entry: NoneExec: Line#6d = a^b = 1^x = x

4 1 x 1 x x 1 Entry: Line#7, 8 (delay only)Exec: Line#5c = a + b = 1 + x = 1

5 1 x 1 x 1 1 Entry: Line#9Exec: Line#7,8,9

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Line #1 is a continuous assignment; will executes only when a or b or c changes.

Assuming initially a=b=c=x; Line#1 executes only in t=0,4 Because: In t=0; a changes In t=4; c changes While in rest of the statements either of a or

b or c are re-assigned but not changed.

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Solution – Q2 continued

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Wish you all:

THE BEST

Solution – Q2 (Test#1 – VLSI – 2011)