1

Warsaw University of TechnologyWarsaw University of TechnologyFaculty of Electronics and Information TechnologyFaculty of Electronics and Information Technology

Institute of Electronic SystemsInstitute of Electronic Systems

HARDWARE SIMULATOR of theHARDWARE SIMULATOR of thehigh-resolution CCD chip forhigh-resolution CCD chip for........

SŁAWOMIR STANKIEWICZ

Wilga 2006, 3.06.2006Wilga 2006, 3.06.2006

2

Device designers:Device designers:

Electronics & Software:

Sławomir Stankiewicz - Institute of Electronic Systems

supervised by:

•G. Kasprowicz - Institute of Electronic Systems

•R. Romaniuk, K. Pozniak - Institute of Electronic Systems

project coordinators:

•G.Wrochna - Soltan Institute for Nuclear Studies

•L.Mankiewicz - Center for Theoretical Physic PAS

3

OutlineOutline

1. Quick introducing to the „Pi of the Sky” cameras

2. Problems during camera developing

3. Goals of the CCD Simulator project

4. Features of the designed Simulator

5. Block diagram of the whole system (Camera+Simulator)

6. Camera’s test procedure

7. Block diagram of the CCD Simulator and how it works

8. CCD Simulator parameters

9. Current photos of the Simulator

10. Further plans

4

IntroducIntroductiontion to to the the “Pi of the Sky” “Pi of the Sky” project CCD camerasproject CCD cameras

2003 2004

2005

5

Prototyping and launching-up the camera Prototyping and launching-up the camera

• very high price of CCD chip

• first turn-on

• „high sensitivity” of the CCD for abnormal conditions: like ESD

• logical compatibility of signals given in datasheet. Tune-up of camera waveforms

• tune-up of the camera analogue part (amplifier, reset cut-off circuit)

• unexpected failures and accidents - during tests

Main tasks and problems:

6

What the CCD chip is?What the CCD chip is?

7

Primary goalsPrimary goals

• Over 20 cameras are manufactured at present stage of the project and each of them has to be tested.

•Speed up of the testing stage by automatical detection of electrical errors dangerous for the CCD:

• power supplies,

• control,

• load.

Other goalsOther goals

The Simulator can be useful during further R&D stage, ie. an analogue amplifier tune-up.

8

Features of theFeatures of the CCD CCD SSimulatorimulator

• all critical voltages and signals monitoring,  which can be dangerous for CCD sensor

• connected to the camera by original CCD Socket-plug – quick applying

• output can be short-circuited without any consequences

• source of programmable digital „image” - useful during transient analysis of different configurations of AD conversion channel

• when broken it costs much less than the new CCD

9

Block diagram of “inverBlock diagram of “invertted camera”ed camera” idea idea

Camera's CCD Socket

DUTCamera

AD CameraPC

AnalyseCCDSimulator

CCDPC

"Inverted camera"

DA

Camera

Simulators CCD Plug

5454

2 2

time

X5X3A1B1X1

Waveforms

DigitalImages

Camera's CCD Socket

DUTCamera

AD CameraPC

AnalyseCCDSimulator

CCDPC

"Inverted camera"

DA

Camera

Simulators CCD Plug

5454

2 2

time

X5X3A1B1X1

Waveforms

DigitalImages

10

Camera’s test procedureCamera’s test procedure

• optical assembly test of PCB – no CCD

• electrical test

• software response test - no CDD – only with Host PC

• final test with the CCD chip

with S

imulator

• statical test - only voltages measurements• dynamic test – overall behaviour of signals• dynamic tests – image generation

11

Block diagram of Block diagram of the devicethe device

DA2 DA1

FPGA

MCU

RAM8 MB

ADMUX's

Clock LinesConditioning

Supply Lines Conditioning

USB

RS232

LCD

Keyboard

Simulator'sCCD Plug

Video 1Video 2

DA2 DA1

FPGA

MCU

RAM8 MB

ADMUX's

Clock LinesConditioning

Supply Lines Conditioning

USB

RS232

LCD

Keyboard

Simulator'sCCD Plug

Video 1Video 2

12

Main Board of the SimulatorMain Board of the Simulator

CCD SocketConnectors

Conditioning Block

USB

RS232

MUX

DA Converters

CCD shapePlug

FPGA

MCU SDRAM

Keyboard

LCD

13

Parameters of the SimulatorParameters of the Simulator

• generation of full resolution arbitrary picture (4Mpix) using embedded 8MB SDRAM and 16bit DAC

• two independent video channels (15MHz horizontal clock rate max.)

• critical voltages measurement – results displayed on local LCD and alarmed if margins exceeded – 3 levels of alarms avalible

• fully autonomous or PC controlled work

• two simulated types of CCD chips (Fairchild, STA)

• easy connection to camera using the CCD emulator header

• embedded simple test patterns for quick tests

• noise level (??)

• RS232 and USB 2.0 (full-speed) interfaces on-board

14

SummarySummaryConstruction status:

• PCB’s assembled and checked

• FPGA, and MCU Software currently under development

Planned activities:

• PC Software (GUI)

• final tests with camera

• documentation completing

• optimalization (noise, ergonomics)

Date of planned commissioning :

• August 2006

Thank you for your attention......Thank you for your attention......Thank you for your attention......Thank you for your attention......