1 foundations of software design lecture 2: how computers work marti hearst fall 2002
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Foundations of Software Design
Lecture 2: How Computers Work Marti HearstFall 2002
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How Do Computers Work?We are going bottom-up, with digressions
Bits & Bytes Binary Numbers
Number Systems
Orders of MagnitudeGates
Boolean Logic
Circuits
CPU Machine Instructions
Assembly Language
Programming Languages
Address Space
Code vs. Data
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Boolean Logic Truth Tables
Images from http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
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XOR• TRUE only if just one of its inputs is TRUE• We can use it in computer graphics to make
objects look like they are moving.
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AND and XOR for Image Manipulation• Also called Masking
– Think of the image as a grid of pixels– Compare position (0,0) in first image to (0,0) in second– Compare position (10,3) in the first to (10,3) in the second– Etc.– The truth table tells you what to do
Images from http://www.advantage.co.nz/ur/gp4.htm
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Overlaying Images using Boolean Logic
• Say we have a sprite:
• We want to put it on this background:
• First we make a MASK in which the shape of the desired image is black and the background is white:
Images from http://www.advantage.co.nz/ur/gp4.htm
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Masking with AND• If we do an AND of the pixels, this is what happens:
• Black acts like 0, White acts like 1– ANDing Black with anything gives Black– ANDing White with anything gives that color0 AND 0 = 00 AND 1 = 01 AND 0 = 01 AND 1 = 1 (this is where masking is a bit different)
Images from http://www.advantage.co.nz/ur/gp4.htm
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Masking with XOR
• Now we want to paint the sprite into the hole• Definition of XOR:
TRUE only if just one of its inputs is TRUE0 XOR 0 = 0 If both black, leave black1 XOR 1 = 0 If both non-black, turn black0 XOR 1 = 1 If one is non-black, assign the color0 XOR 1 = 1 If one is non-black, assign the color
Images from http://www.advantage.co.nz/ur/gp4.htm
(Note: this requires that the image have a black background)
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Boolean Logic Relationships
A B
BABA
BABA
BAD
BAC
:Law sDeMorgan' C
D
Union (OR)
Intersection (AND)
Venn Diagram
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Show this in logic gates(the power of invertors/not)
BABA
BABA
:Law sDeMorgan'AB =
A
B
This is why you mainly see NAND gates in real circuits – everything is convertible.
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Chips Contain Gates & Connectors
Images from http://www.ee.ed.ac.uk/~gaa/DigilabNotes/Digilab/Components/node7.html
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LEDs (light-emitting diodes)
Images from http://www.cores.ro/electronic/Kit.html
The circuit can turn the LED on or off.
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Interactive demo of logic gates
http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Gates/index.html
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LEDs (light-emitting diodes)
Images from http://www.cores.ro/electronic/Kit.html
How are the LEDS for the digital clock controlled?
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7 Segment LEDsHow to set the digits
Images from http://www.ee.ed.ac.uk/~gaa/DigilabNotes/Digilab/Components/node7.html
Need a circuit that implements this truth table!
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7 Segment LEDsHow to turn on only one digit at a time?
Images from http://www.ee.ed.ac.uk/~gaa/DigilabNotes/Digilab/Components/node7.html
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2-bit Decoder:
Uses NOTs (invertors) to convert 2 inputsto turn on one (and only one) of 4 outputs
Images from http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
Notice where the invertors are.They look like the inputs of a truth table.
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Circuits for Addition
Images from http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
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NAND Latch Set and remember a value
Images from http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
This is tricky to understand without animation – view it online
http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
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Memory – a series of latches
Images from http://courses.cs.vt.edu/~csonline/MachineArchitecture/Lessons/Circuits/index.html
This can store a byte.
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NAND Latch: The Rules
• Both inputs are normally at logic 1 level.• Changing an input to a logic 0 level will force that
output to a logic 1. • The same logic 1 will also be applied to the second input
of the other NAND gate, allowing that output to fall to a logic 0 level (because of the rules of NAND).
• This 0 in turn feeds back to the second input of the original gate, forcing its output to remain at logic 1.
• Applying another logic 0 input to the first gate will have no further effect on this circuit.
• However, applying a logic 0 to the second gate will cause the same reaction in the other direction, thus changing the state of the latch circuit the other way.
Image from http://www.play-hookey.com/digital/rs_nand_flip-flop.html
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NAND Latch: The Problems• Small problem:
– Need to invert the inputs to make sense.• Big problem:
– If inputs change values rapidly, the one that sets the value of the latch is the last one seen.
– If both inputs go to logic 1 simultaneously, the final state of the latch cannot be determined ahead of time. This is called:
• A Race Condition: the result depends on which input got changed first.
• Nondeterministic: Not being able to predict what will happen with certainty.
– Nondeterminism is very, very badbad from the perspective of computer science (most of the time).
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Clocked D Latch
Solves both problems:
NANDs invert the input
Clock line allows the system to control when to read the inputs.
BUT only allows for one input.
Image from http://www.play-hookey.com/digital/
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Clocked R-S NAND Latch
(Partly) solves both problems:
NANDs invert the input
Clock line allows the system to control when to read the inputs.
BUT Doesn’t stop S & R from changing while the clock is activeDoesn’t stop S & R from being set to 1 simultaneously
Image from http://www.play-hookey.com/digital/
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Edge-triggered flip-flopInput Latch
Image from http://www.play-hookey.com/digital/
The invertor on the clock line ensures only 1 latch active at a time. When CLK=0, both inputs are disconnected from the input latch.When CLK becomes 1, activates input latch; disconnects output latch.When CLK falls to 0, disconnects input latch again; allows output latch to change.Then both latches are frozen.BUT still doesn’t solve the problem of both inputs going to 1 at once.
Output Latch
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Clock cycles• Logic gates introduce propagation delays as the
signal goes through them.• Therefore, a clock cycle is introduced into the circuit.• It connects up to all the circuits that need it, so they
can all be told to update at the same time.• The clock cycle can be no faster than the slowest set
of logic gates.
• The clock keeps the circuit running in a predictable fashion, by making sure every part of the circuit gets changes to input at the same time.
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This sounds familiar …
• Where have you heard about this clock before?– Cps (cycles per second): the measure of how frequently an
alternating current changes direction. This term has been replaced by the term hertz (Hz).
– gigahertz (GHz): A unit of frequency denoting 109 Hz.
• From last year’s New York Times:– http://www.nytimes.com/2001/08/28/technology/28INTE.html
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Now you know what it really means…
• “The Intel Corporation today began selling versions of its Pentium 4 chips that run at two gigahertz, or two billion cycles a second…”
• … Drew Prairie … accused Intel of ratcheting up clock speed without sharply improving the performance of the system. He said his company's fastest Athlon chips, at 1.4 gigahertz, run software as well as Intel's newest product. "They have a lead in megahertz, but in terms of raw performance I think it's neck and neck," Mr. Prairie said.
• But … what is the difference between clock speed and system performance?
From “Intel Selling Two-Gigahertz Chips”, NYTimes, Aug 28, 2001, by Chris Gaither
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The CPU
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The CPU
• Registers – Are basically rows of latches– Store values– Can be used to hold values of variables
• Some special registers – PC (program counter)– Instruction Register– Accumulator
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The CPU
• ALU (Arithmetic Logic Unit)– Made of a long series of adder units– Addition, Subtraction (Mult, Div)– Lots of gates, so often the slowest circuit in the CPU
Image from http://eleceng.ucd.ie/~rreilly/elecengnotes/LECTURE18/sld017.htm
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A key computer science concept:
Code and data can be represented in the same way.