1 fec framing and delineation frank effenberger huawei technologies, us dec. 5, 2006
TRANSCRIPT
3
Basic concepts
• We want to maintain 64b66b line code structure, to maximal degree
• We want to avoid excessive processing requirements and time for delineation
5
Overall locking time
• Proposed method of two stage locking is relatively fast– 33 (27+6) µs approximately worst case time
• In comparison, bitwise serial FEC locking takes 380 µs (30*30*66 blocks to lock)
• As good as this is, 33 µs is still too slow for burst mode– Time should be >>1 µs– It should also be more deterministic
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Fast burst mode synchronization
• To be efficient, burst mode transmissions need a leading pattern containing– A preamble to provide level and timing
• Usually a pattern with a high transition density for easier clock recovery and perfect DC balance for level recovery
– A delimiter to provide delineation• A special pattern that is searchable using a bitwise correlator• The pattern is chosen to have a large hamming distance
from any other pattern likely to be seen on the line
• The delineation part is what would give us the FEC codeword alignment
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EPON burst preamble
• EPON has no ‘special’ data patterns– Burst (from MAC control) just starts with any
ordinary data frame– PHY is receiving idle codes all the time– Data detector turns on the laser with enough
lead time to ensure good Tx
• Extending this to 10G EPON seems the likely approach– Need a way to form a burst leader
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The Leader frame
• At the beginning of the burst, MAC control sends the Leader Frame– An Ethernet frame, with all the usual header and
trailer parts– Payload is designed to provide an efficient delimiter,
and perhaps the preamble
• Signal on line would consist of– X garbled idle blocks (laser warming up)– Y clean idle blocks (should be minimized)– Leader frame (Z blocks long)
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FEC alignment
• 66b coding sublayer receives leader frame from MAC– Would align 66b codeword to start of leader frame– Could hard reset the 66b coder (this is before burst starts, after
all, so we don’t care about detailed data pattern)– Could initialize the scrambler at end of the leader frame
(important – leader frame pattern must not be scrambled!)
• FEC coding sublayer receives leader frame from 66b coding sublayer– FEC codeword could be aligned to the leader frame– Could hard reset the FEC coder, since previous data need not
be protected
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Leader payload format
• Payload would consist of– X Preamble blocks
• Maximal density pattern: 0x55• Decide how many blocks depending on PMD
– Y Delimiter blocks• Pattern would be a special Barker-like sequence• Designed to be maximally distant from all shifts of
the leader payload
• Frame could be up to ~180 blocks (1.2 µs)– Should be plenty for our needs
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Hamming Distance
• If a delimiter is 4N bits long, then a sequence can be found that has a hamming distance of 2N-1
• Such a sequence can tolerate up to N-1 errors (in N bits) and still find burst
• How many errors do we need to tolerate?– P (lost burst) = (4N)! / N! / (3N)! * BER ^ N– Assume 100Kburst/sec (very fast)
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1.00E+00
1.00E+20
1.00E+40
1.00E+60
1.00E+80
1.00E+100
16 32 64 128
Delimiter bit length
Me
an
Tim
e to
Lo
st B
urs
t (se
c)
1.00E-04
1.00E-03
Mean Time to Lost Burst
Millennium
BER
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Finding the Golden Block
• The 64 bit block that has maximal distance 31 from every shift of itself and the preamble is the ‘Golden Block’
• Found empirically, using trial and error• For a 64 bit delimiter, there are 3.6E17
delimiters that have DC balance and odd-even balance
• Initial studies have revealed many blocks with distance 29, e.g.: 254A C91F 0FE3 21B7
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Receiver processing
• Receiver would have bit-wise correlator– Received pattern XOR Golden Block– Count the number of different bits D
• For delimiter with 2X+1 distance, apply following rule– If D<=X, then delimiter found, synchronize 66b and
FEC coders at set position from this instant– If D>X, look at next position
• Using the previous example, X=14– 14 errors in 64 bits is tolerable!– 11 bits tolerance still gives MTLB ~ life of universe,
and lower false-positive rate
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Fast sync suppression
• Looking for a delimiter in random data should be avoided– False positives are much more common
• Fast locking (operation of the correlator) should be disabled once lock is achieved
• Re-enabled once lock is lost hard (that is, estimated BER~0.5)– This should happen only between bursts
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Continuous TransmissionFEC parity in 66b code
• Input is ordinary 66b coded stream
• Stream is broken into groups of X blocks
• Parity is generated for each group
• Parity is assembled into Y blocks
• Codeword is then X+Y blocks long
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Example with RS(255,239)
• Input grouped into 28 blocks of 66b each
• RS(255,239) generates 16 bytes of parity
• Parity assembled into 2 66b blocks– 66b framing bits are set arbitrarily, most likely
to preserve the standard rules
• Resulting FEC codeword is 30 66b blocks
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ReceptionFEC enabled 66b code
• Incoming stream is first delineated into 66b blocks– Using a search and locking mechanism very
similar to that used today in 10GbE
• Resulting stream of blocks is then serially searched for FEC parity– This requires 66 times less searching than
pure serial locking, a significant improvement
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Error tolerant 66b framing
• Current algorithm looks for 64 consecutive successes to declare lock, and 16 failures out of 64 to declare loss-of-lock
• Extend this algorithm such that– X successes out of Y to declare lock– W failures out of Z to declare loss-of-lock
• Exact setting of these parameters is for future study– However, it is clear that even strict locking (X=Y=64) is feasible
at BER of even 1e-3 – Locking time on the order of 66*64 blocks (27 microseconds)
with a serial technique (could be 66 times shorter with a parallel scheme)