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Page 1: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

1

Contents Reviewed

• Rabaey CH 3, 4, and 6

Page 2: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

2

Physical Structure of MOS Transistors: the NMOS

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 3: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

3

The PMOS Transistor

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 4: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

4

The CMOS Technology

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 5: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

5

Threshold Voltage Concept

n+n+

p-substrate

DSG

B

VGS

+

-

Depletion

Region

n-channel

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 6: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

6

Current-Voltage Relations

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 7: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

7

Transistor in Saturation

n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 8: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

8

2-D Representation of MOS Transistor

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 9: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

9

Switch-Level View of NMOS & PMOS

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 10: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

10

CMOS Switch

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 11: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

11

CMOS Inverter

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 12: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

12

CMOS Inverter Layout

Polysilicon

InOut

Metal1

VDD

GND

PMOS

NMOS

1.2 m=2

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 13: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

13

NMOS Switches in Series

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 14: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

14

PMOS Switches in Series

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 15: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

15

Switches in Parallel

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 16: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

16

2-Input CMOS NAND Gate: theSwitch View

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 17: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

17

2-Input CMOS NAND Gate: theCircuit View

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 18: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

18

N-input CMOS NAND Gate

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 19: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

19

4-Input NAND Gate

Out

In1 In2 In3 In4

In3

In1

In2

In4

In1 In2 In3 In4

VDD

Out

GND

VDD

In1 In2 In3 In4

Vdd

GND

Out

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 20: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

20

2-Input CMOS OR-Gate

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 21: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

21

N-Input CMOS OR-Gate

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 22: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

22

Properties of CMOS Gates

• Vdd and GND are never directly connected

• i.e. no shorting

• Output is always connected to either Vdd or GND

• i.e. it never floats

Page 23: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

23

Making Compound Gates in CMOS

F = ((A.B) + (C.D))[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 24: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

24

Key Idea in CMOS Compound Logic Gates

VDD

VSS

PUN

PDN

In1

In2

In3

F = G

In1

In2

In3

PUN and PDN are Dual Networks

PMOS Only

NMOS Only

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 25: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

25

More on CMOS Logic Style

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 26: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

26

Pull-Up and Pull-Down Circuits

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 27: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

27

CMOS Compound Gate

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 28: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

28

What is this?

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 29: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

29

How do we implement these?

• Z = (A.B.C.D)’

• Z = ((A.B) + C.(A+B))’

• Z = A.B + A’.B’• what is this?

• Z = A.B’.C’ + A’.B’.C + A’.C’.B + A.B.C• what is this?

Page 30: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

30

A 2-Input CMOS Multiplexer

Output = A.S + B.S’

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 31: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

31

How can one implement multiplexer using CMOS gates?

Page 32: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

32

Layout: the Standard Cell Approach

VDD

VSS

Well

signalsRouting Channel

metal1

polysilicon

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 33: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

33

Two versions of a.(b+c)

a c b a b c

xx

GND

VDDVDD

GND

(a) Input order {a c b} (b) Input order {a b c}

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 34: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

34

Logic Graph

VDD

c

a

x

b

ca

b

GND

x

VDDx

c

b a

i

j

i

j

PDN

PUN

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 35: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

35

Consistent Euler Path

GND

x

VDDx

c

b a

i

j

{ a b c}

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 36: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

36

Example: x = ab + cd

GND

x

a

b c

d

VDDx

GND

x

a

b c

d

VDDx

(a) Logic graphs for (ab+cd) (b) Euler Paths {a b c d}

a c d

x

VDD

GND

(c) stick diagram for ordering {a b c d}

b

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 37: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

37

Existence of Consistent Euler Paths

• May depend on the way the Boolean expression is written

• Example:• x = (A + B.C + D.E)’ has no consistent Euler paths

• But,• x = (B.C + A + D.E)’ does

Page 38: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

38

Memory & Storage in CMOS

Page 39: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

39

A CMOS Positive Level-Sensitive D Latch

[Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

Page 40: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

40

A CMOS Positive Edge-Triggered D Register

Page 41: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

41

Performance Analysisof CMOS Gates

Page 42: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

42

MOS Transistors are not “Ideal” Switches

Ron

|VGS| < |VT||VGS| > |VT|

|VGS|

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 43: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

43

CMOS Inverter: A More Detailed View

VDD

Vin Vout

CL

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 44: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

44

CMOS Inverter: Steady State Response

VDD VDD

VoutVout

Vin = VDD Vin = 0

Ron

Ron

VOH = VDD

VOL= 0

VM = Ronp) f(Ronn,

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 45: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

45

CMOS Inverter: Transient Response

VDD

Vout

Vin = VDD

Ron

CL

tpHL = f(Ron.CL)

= 0.69 RonCL

t

Vout

VDD

RonCL

1

0.5

ln(0.5)

0.36

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 46: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

46

What is the value of Ron?

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 47: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

47

Numerical Examples for 1.2m CMOS

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 48: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

48

Transistor Sizing

VDD

A

B

C

D

D

A

B C

1

2

22

6

6

12

12

F

• for symmetrical response (dc, ac)• for performance

Focus on worst-case

Input Dependent

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 49: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

49

Propagation Delay Analysis

VDDVDDVDD

CL

F CL

CL

F

F

RpRp Rp

Rp

Rp

Rn

Rn

RnRn Rn

A

AA

AA

A

B B

B

B

(a) Inverter (b) 2-input NAND (c) 2-input NOR

tp = 0.69 Ron CL

(assuming that CL dominates!)

= RON

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 50: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

50

Analysis of Propagation Delay

VDD

CL

F

Rp Rp

Rn

Rn

A

A B

B

2-input NAND

1. Assume Rn=Rp= resistance of minimum sized NMOS inverter

2. Determine “Worst Case Input” transition(Delay depends on input values)

3. Example: tpLH for 2input NAND- Worst case when only ONE PMOS Pulls

up the output node

- For 2 PMOS devices in parallel, the resistance is lower

4. Example: tpHL for 2input NAND- Worst case : TWO NMOS in series

tpLH = 0.69RpCL

tpHL = 0.69(2Rn)CL

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 51: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

51

Design for Worst Case

VDD

CL

F

A

A B

B

2

2

1 1

VDD

A

B

C

D

DA

B C

12

22

2

24

4

F

Here it is assumed that Rp = Rn

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 52: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

52

Influence of Fan-in and Fan-out on Delay

VDD

A B

A

B

C

D

C D

tp a1FI a2FI2 a3FO+ +=

Fan-Out: Number of Gates Connected2 Gate Capacitances per Fan-Out

FanIn: Quadratic Term due to:

1. Resistance Increasing2. Capacitance Increasing(tpHL)

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 53: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

53

tp as a Function of Fan-in

1 3 5 7 9fan-in

0.0

1.0

2.0

3.0

4.0

t p (

nsec

)

tpHL

tp

tpLHlinear

quadratic

AVOID LARGE FAN-IN GATES! (Typically not more than FI < 4)

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 54: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

54

Fast Complex Gates - I

• Transistor Sizing: As long as Fan-out Capacitance dominates

• Progressive Sizing:

CL

In1

InN

In3

In2

Out

C1

C2

C3

M1 > M2 > M3 > MN

M1

M2

M3

MN

Distributed RC-line

Can Reduce Delay with more than 30%!

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 55: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

55

Fast Complex gates - II

In1

In3

In2

C1

C2

CL

M1

M2

M3

In3

In1

In2

C3

C2

CL

M3

M2

M1

(a) (b)

• Transistor Ordering

critical pathcritical path

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 56: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

56

Fast Complex Gates - III

• Improved Logic Design

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 57: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

57

Fast Complex Gates - IV

• Buffering: Isolate Fan-in from Fan-out

CLCL

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 58: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

58

Example: Full Adder

VDD

VDD

VDD

VDD

A B

Ci

S

Co

X

B

A

Ci A

BBA

Ci

A B Ci

Ci

B

A

Ci

A

B

BA

Co = AB + Ci(A+B)

28 transistors

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]

Page 59: 1 Contents Reviewed Rabaey CH 3, 4, and 6. 2 Physical Structure of MOS Transistors: the NMOS [Adapted from Principles of CMOS VLSI Design by Weste & Eshraghian]

59

Revised Full Adder

VDD

Ci

A

BBA

B

A

A BKill

Generate"1"-Propagate

"0"-Propagate

VDD

Ci

A B Ci

Ci

B

A

Ci

A

BBA

VDD

SCo

24 transistors

[Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]


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