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Bhavya Bighamal09IT014

Q1- Illustrate how will you construct a 416 decoder using decoder of

type 24 and 38?

Ans- i)

Inputs OutputsG1 G2A G2B C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0

0 X X X X X 1 1 1 1 1 1 1 1

X 1 X X X X 1 1 1 1 1 1 1 1

X X 1 X X X 1 1 1 1 1 1 1 1

1 0 0 0 0 0 1 1 1 1 1 1 1 0

1 0 0 0 0 1 1 1 1 1 1 1 0 1

1 0 0 0 1 0 1 1 1 1 1 0 1 1

1 0 0 0 1 1 1 1 1 1 0 1 1 1

1 0 0 1 0 0 1 1 1 0 1 1 1 1

1 0 0 1 0 1 1 1 0 1 1 1 1 1

1 0 0 1 1 0 1 0 1 1 1 1 1 1

1 0 0 1 1 1 0 1 1 1 1 1 1 1

Table 17.1 Function Table of 74LS138, 3-to-8 Decoder

4 to 16 tree decoder can be constructed as below from 2 to 4 decoders.

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Q-2 explain concept of stack and how stack memory is shared by

processor as well as program?

Ans- Incomputer science, a stack is a last in, first out (LIFO)abstract data typeanddata

structure. A stack can have anyabstract data typeas anelement, but is characterized by

only three fundamental operations:push,pop and stack top.

The push operation adds a new item to the top of the stack, or initializes the stack if it is

empty. If the stack is full and does not contain enough space to accept the given item, the

stack is then considered to be in anoverflowstate. The pop operation removes an item

from the top of the stack.

A pop either reveals previously concealed items, or results in an empty stack, but if the

stack is empty then it goes into underflow state (It means no items are present in stack to

be removed). The stack top operation gets the data from the top-most position and returns

it to the user without deleting it. The same underflow state can also occur in stack top

operation if stack is empty.

Q-3 list the disadvantage and advantage of memory mapped i/o over

i/o mapped i/o?

Ans- Advantage- advantage is really that you reduce the amount of data copying required overtraditional methods of reading a file.
http://en.wikipedia.org/wiki/Computer_sciencehttp://en.wikipedia.org/wiki/Computer_sciencehttp://en.wikipedia.org/wiki/Computer_sciencehttp://en.wikipedia.org/wiki/LIFO_(computing)http://en.wikipedia.org/wiki/LIFO_(computing)http://en.wikipedia.org/wiki/LIFO_(computing)http://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Elementhttp://en.wikipedia.org/wiki/Elementhttp://en.wikipedia.org/wiki/Stack_overflowhttp://en.wikipedia.org/wiki/Stack_overflowhttp://en.wikipedia.org/wiki/Stack_overflowhttp://en.wikipedia.org/wiki/Stack_overflowhttp://en.wikipedia.org/wiki/Elementhttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Data_structurehttp://en.wikipedia.org/wiki/Abstract_data_typehttp://en.wikipedia.org/wiki/LIFO_(computing)http://en.wikipedia.org/wiki/Computer_science

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If your application can use the data "in place" in a memory-mapped file, it can come in without being

copied; if you use a system call (e.g. Linux's pread() ) then that typically involves the kernel copying the

data from its own buffers into user space. This extra copying not only takes time, but decreases the

effectiveness of the CPU's caches by accessing this extra copy of the data.

If the data actually have to be read from the disc (as in physical I/O), then the OS still has to read them

in, a page fault probably isn't any better performance-wise than a system call, but if they don't (i.e.

already in the OS cache), performance should in theory be much better.

On the downside, there's no asynchronous interface to memory-mapped files - if you attempt to access a

page which isn't mapped in, it generates a page fault then makes the thread wait for the I/O.

Disadvantage- The obvious disadvantage to memory mapped files is on a 32-bit OS ... I

have well over 1 million product part numbers stored in a single ... As users type a popup

window displays a listof matching product part numbers.

Q-4 illustrate operation of 3 bit Johnson counter using d flip flop?

Ans-

The goal is to design a 4-bit Johnson counter with stop control that can count bidirectional,

depending

on the setting of the control inputs RIGHT and LEFT using the schematics mode of design

entry on

Spartan 3E Board.

ISE Version: 9.2i or 10.1i

Objective

The purpose of this lab is:

1. To get familiar with the flip-flops.

2. To design an up/down Johnson counter using D flip-flops.

3. To implement the counter using Xilinx FPGA board.

4. To experimentally check the operation of the counter.

The counter has an asynchronous reset (or clear) input which brings the outputs to 0 as

soon as the

RESET signal is asserted. The counter counts at the negative edge of the clock. When the

RIGHT

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input is high, the counter counts in one direction and when LEFT input is high, it counts in

the other

direction, as shown in the state transition diagram. Counter should stop at a particular

count when

STOP input is high.

Process

1. Create project using ISE 9.2i/10.1i

2. Test behavior of the sequence detector using Xilinx ISE.

3. Configure FPGA with the sequence detector

4. Test behavior of sequence detector on the Spartan 3E starter board

Q-7 state and prove assosiative property of xor gate?

Ans- Thelogical operationexclusive disjunction, also called exclusive or(symbolizedby

the prefix operator J, or by the infix operators XOR, EOR,EXOR, is a type oflogical

disjunctionon twooperandsthat results in a value oftrueif exactly one of the operands

has a value of true. A simple way to state this is "one or the other but not both."

Truth Table of Xor gate is-

XOR Truth Table

Input

Output

A B

0 0 0

0 1 1

1 0 1

1 1 0
http://en.wikipedia.org/wiki/Logical_connectivehttp://en.wikipedia.org/wiki/Logical_connectivehttp://en.wikipedia.org/wiki/Logical_connectivehttp://en.wikipedia.org/wiki/Table_of_logic_symbolshttp://en.wikipedia.org/wiki/Table_of_logic_symbolshttp://en.wikipedia.org/wiki/Table_of_logic_symbolshttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Operandshttp://en.wikipedia.org/wiki/Operandshttp://en.wikipedia.org/wiki/Operandshttp://en.wikipedia.org/wiki/Truehttp://en.wikipedia.org/wiki/Truehttp://en.wikipedia.org/wiki/Truehttp://en.wikipedia.org/wiki/Truehttp://en.wikipedia.org/wiki/Operandshttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Table_of_logic_symbolshttp://en.wikipedia.org/wiki/Logical_connective

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Equivalencies, elimination

The excz exclusive disjunction can also be expressed in the following way:

This representation of XOR may be found useful when constructing a circuit or

network, because it has only one operation and small number

of and operations. The proof of this identity is given below:

It is sometimes useful to write in the following way:

This equivalence can be established by applyingDe Morgan's lawstwice to

the fourth line of the above proof.

The exclusive or is also equivalent to the negation of alogical biconditional,

by the rules of material implication (amaterial conditionalis equivalent to

the disjunction of the negation of itsantecedentand its consequence)

andmaterial equivalence.

In summary, we have, in mathematical and in engineering notation:

Q-9-Design a 4 bit ripple counter by jk?
http://en.wikipedia.org/wiki/De_Morgan%27s_lawshttp://en.wikipedia.org/wiki/De_Morgan%27s_lawshttp://en.wikipedia.org/wiki/De_Morgan%27s_lawshttp://en.wikipedia.org/wiki/Logical_biconditionalhttp://en.wikipedia.org/wiki/Logical_biconditionalhttp://en.wikipedia.org/wiki/Logical_biconditionalhttp://en.wikipedia.org/wiki/Material_conditionalhttp://en.wikipedia.org/wiki/Material_conditionalhttp://en.wikipedia.org/wiki/Material_conditionalhttp://en.wikipedia.org/wiki/Antecedenthttp://en.wikipedia.org/wiki/Antecedenthttp://en.wikipedia.org/wiki/If_and_only_ifhttp://en.wikipedia.org/wiki/If_and_only_ifhttp://en.wikipedia.org/wiki/If_and_only_ifhttp://en.wikipedia.org/wiki/If_and_only_ifhttp://en.wikipedia.org/wiki/Antecedenthttp://en.wikipedia.org/wiki/Material_conditionalhttp://en.wikipedia.org/wiki/Logical_biconditionalhttp://en.wikipedia.org/wiki/De_Morgan%27s_laws

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Ans-

Q-11 Modes of data transfer by parallel and serial?

Ans- Serial and parallel transmission

The transmission mode refers to the number of elementary units of information (bits)

that can be simultaneously translated by the communications channel. In fact, processors

(and therefore computers in general) never process (in the case of recent processors) a

single bit at a time; generally they are able to process several (most of the time it is 8: one

byte), and for this reason the basic connections on a computer are parallel connections.

Parallel connection

Parallel connection means simultaneous transmission ofNbits. These bits are sent

simultaneously overNdifferent channels (a channel being, for example, a wire, a cable or

any other physical medium). Theparallel connectionon PC-type computers generally

requires 10 wires.

These channels may be:

Nphysical lines: in which case each bit is sent on a physical line (which is why parallelcables are made up of several wires in a ribbon cable)

one physical line divided into several sub-channels by dividing up the bandwidth. In thiscase, each bit is sent at a different frequency...
http://en.kioskea.net/contents/pc/serie.php3http://en.kioskea.net/contents/pc/serie.php3http://en.kioskea.net/contents/pc/serie.php3

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Since the conductive wires are close to each other in the ribbon cable, interference can

occur (particularly at high speeds) and degrade the signal quality...

Serial connection

In a serial connection, the data are sent one bit at a time over the transmission channel.However, since most processors process data in parallel, the transmitter needs to

transform incoming parallel data into serial data and the receiver needs to do the opposite.

These operations are performed by a communications controller (normally

a UART(Universal Asynchronous Receiver Transmitter) chip). The communications

controller works in the following manner:

The parallel-serial transformation is performed using a shift register. The shiftregister, working together with a clock, will shift the register (containing all of the data

presented in parallel) by one position to the left, and then transmit the most significant

bit (the leftmost one) and so on:

The serial-parallel transformation is done in almost the same way using a shiftregister. The shift register shifts the register by one position to the left each time a bit is

received, and then transmits the entire register in parallel when it is full:

B)-Format of data transfer?

Ans- ACCEPT Statement - Format 1 - Data Transfer

>>-ACCEPT--identifier-1--+---------------------------------+---->

'-FROM--+-mnemonic-name---------+-'

| (1) |

'-environment-name------'
http://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1IDhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1IDhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1IDhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1MNhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1MNhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1MNhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1ENhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1ENhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1ENhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1ENhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1MNhttp://publib.boulder.ibm.com/infocenter/iadthelp/v7r0/topic/com.ibm.etools.iseries.langref.doc/c0925395332.htm#SPTACCF1ID

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