0.8㎛cmos-mixed mode designer s handbook (version 1.4) · 2019. 11. 18. · 0.8㎛analog cmos...

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0.8Analog CMOS Designer’s Handbook Version 1.4 Page 1 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT PERMISSION) 0.8㎛ CMOS-Mixed Mode Designer s Handbook (Version 1.4) 2005. 05. 05 Semiconductor Process Research Department Electronics and Telecommunications Research Institute

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Page 1: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

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0.8㎛ CMOS-Mixed ModeDesigner’s Handbook

(Version 1.4)

2005. 05. 05

Semiconductor Process Research Department

Electronics and TelecommunicationsResearch Institute

Page 2: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

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Contents

1. Scope2. Design Rule3. Process Parameters4. Electrical Parameters5. SPICE Parameters6. Appendices

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1. Scope

This Document contains information related to dimensions of the limiting

topological design rule and provides users with electrical design limits for 0.8㎛ Analog

CMOS processes.

This process contains poly Ⅰ/Ⅱ capacitors and poly Ⅱ resistors.

All of the measurements are done at room temperatures. The typical values are

inferred from measured data, while the maximum and the minimum values have been

estimated from the process limits.

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2. Design Rule

2.1 Layout Information

2.1.1 The dimensions are expressed in units of lambda and micron. The conversion

between lambda and micron is defined as :

Micron = Lambda x 0.4

2.1.2 Description of drown layers :

NWL N-Well

ACT N+ & P+ Actives

PL1 Poly Ⅰ

PL2 Poly Ⅱ

NSD N+ Implant

PSD P+ Implant

CNT Contact

ME1 Metal Ⅰ

VIA Via

ME2 Metal Ⅱ

PAD Pad

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2.2 Drawing Rules2.2.1 Table of Layer Symbols

Symbol Layer Description Pattern

NWL N-Well Defines substrate

of p-channel devices

ACT N+ & P+ Actives Defines n+/p+ diffused

and p/n-channel gate area

PL1 Poly Ⅰ Defines poly gates and

poly interconnects

PL2 Poly Ⅱ Defines poly resistors and

poly capacitors

NSD N+ Implant Defines n+ ion implant

areas

PSD P+ Implant Defines p+ ion implant

areas

CNT Contact Defines contact openings to

diffusion and poly Ⅰ, Ⅱ

ME1 Metal Ⅰ Defines first metal interconnects

VIA Via Defines openings in the insulator

between metalⅠand Metal Ⅱ

ME2 Metal Ⅱ Defines second metal

interconnects

PAD Pad Defines opening in the passivation

layer for bonding

N P

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2.2.2 General Description of the Rules

Rules Lambda(0.4㎛) ㎛ Rule # Field

Grid :

Size 0.25 0.1

NWL : DARK

Pitch 15.0 6.0

Width 10.0 4.0 NW1

Width(Resistor) 25.0 10.0 NW2

Space(same potential) 5.0 2.0 NW3

Space(diff. potential) 20.0 8.0 NW4

ACT(Align to NWL) : CLEAR

Pitch 6.0 2.4

Pitch@Contact 8.5 3.4

Width(interconnection) 2.5 1.0 AC1

Width(TR) 3.5 1.4 AC2

Space 2.5 1.0 AC3

P+ in NW to N+ in PW Space 12 4.8 AC4

NW OL of P+ 6.0 2.4 AC5

NW OL* of N+ 3.0 1.2 AC6

NW space to N+ 6.0 2.4 AC7

NW space to P+ 3.0 1.2 AC8

N+ GR** OL of NW 6.0 2.4 AC9

P+ GR OL of PW 6.0 2.4 AC10

* : overlap

** : guard ring

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Rules Lambda(0.4㎛) ㎛ Rule # Field

N+ GR space to P+ in PW 4.0 1.6 AC11

N+ GR space to P+ in PW 4.0 1.6 AC12

Extension over gate 3.5 1.4 AC13

FVT(Align to ACT) CLEAR

same as NWL

PL1(Align to ACT) CLEAR

Pitch 4.5 1.8

Pitch@Contact 8.0 3.2

Width 2.0 0.8 PO1

Space 2.5 1.0 PO2

End Cap 2.5 1.0 PO3

Space to Act 1.25 0.5 PO4

PL2(Align to ACT) CLEAR

as resistor

Pitch 4.5 1.8

Pitch@Contact 8.0 3.2

Width 2.0 0.8 PL1

Space 2.5 1.0 PL2

Space to Poly Ⅰ 2.5 1.0 PL3

Space to Act 2.0 0.8 PL4

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Rules Lambda(0.4㎛) ㎛ Rule # Field

as capacitor

1) in case of PolyⅡ is smaller than PolyⅠ

PolyⅠ OL of PolyⅡ 1.0 0.4 PL5

Space to Act 2.0 0.8 PL6

2) in case of PolyⅡ is larger than PolyⅠ

PolyⅡ OL of PolyⅠ 1.0 0.4 PL7

Space to Act 2.0 0.8 PL8

NSD(Align to ACT) : DARK

Width 5.0 2.0 NI1

Space to P+ Act 1.25 0.5 NI2

OL of PolyⅠ or PolyⅡ 1.25 0.5 NI3

OL of Act 1.25 0.5 NI4

PSD(Align to ACT) : DARK

Width 5.0 2.0 PI1

Space to P+ Act 1.25 0.5 PI2

OL of PolyⅠ or PolyⅡ 1.25 0.5 PI3

OL of Act 1.25 0.5 PI4

CNT(Align to ACT) : DARK

Pitch 4.0 1.6

Size 2.0 0.8 CO1

Space 2.0 0.8 CO2

Act OL 2.0 0.8 CO3

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Rules Lambda(0.4㎛) ㎛ Rule # Field

PolyⅠ, Ⅱ OL 2.0 0.8 CO4

ME1 OL 2.0 0.8 CO5

Space to PolyⅠ, Ⅱ 2.0 0.8 CO6

PolyⅠ Contact to Act space 3.0 1.2 CO7

PolyⅠContact to PolyⅡ

PolyⅡ capacitor 2.0 0.8 CO8

PolyⅡ resistor 4.5 1.8 CO9

Overlapping Poly Ⅰ/Ⅱ structure 2.0 0.8 CO10

PolyⅡ Contact to PolyⅠ

PolyⅠ unrelated 4.5 1.8 CO11

Overlapping PolyⅠ/Ⅱ structure 2.0 0.8 CO12

ME1(Align to ACT) : CLEAR

Width 3.0 1.2 M11

Space 2.0 1.2 M12

Space(width ≥ 6 lambda) 4.0 1.6 M13

Space(width ≥ 25 lambda) 5.0 2.0 M14

VIA(Align to ME1) DARK

Size 2.0 0.8 VI1

Space 2.0 0.8 VI2

ME1 OL 2.0 0.8 VI3

ME2 OL 2.0 0.8 VI4

Space to Contact 2.0 0.8 VI5

Space to Poly Contact 2.0 0.8 VI6

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Rules Lambda(0.4㎛) ㎛ Rule # Field

ME2(Align to ME1) : CLEAR

Width 3.0 1.2 M21

Space 2.0 1.2 M22

Space(width ≥ 6 lambda) 4.0 1.6 M23

Space(width ≥ 25 lambda) 5.0 2.0 M24

PAD(Align to ME1) : DARK

Size 250 100

Space 200 80

ME1 OL 25 10.0

Via OL 12 5.0

Me2 OL 25 10.0

Space to Active 50 20.0

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NW1 or NW2

AC5

AC1

NW3 or NW4

PO4

PO1

PO2AC6

AC7AC4

AC2

AC8

AC3PO3AC13

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AC9

AC10

AC11

AC12

PL4 PL2 PL3PL1

PL6

PL5

PL8

PL7

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NI1

NI2

NI4

NI3

PI1

PI2

PI4

PI3

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CO1

CO2CO6 M14

M13

M12

M11

CO4

CO7

CO5

CO3

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CO8 CO10

CO12

CO9

CO11

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VI4

M21

M22

VI5

VI3

VI6

VI1

VI2

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3. Process Parameters

Process Spec. (0.8㎛ Double Poly Metal Twin-tub CMOS)

Thickness (Angstroms) Capacitances

Area Periphery

(10-4 pF/㎛2) (10-4 pF/

㎛)

Gate Oxide 175±10 19.8

Field Oxide 6300±300 (as grown)

Poly Ⅰ 3800

Poly Ⅱ 2000

PolyⅠ/PolyⅡ Oxide 345 10.0 1.4

Intermediate Oxide 6000±500 (as deposited)

MetalⅠ(Ti/TiN/Ti/AlSi/TiN) 300/700/500/4000/500

MetalⅡ(Ti/AlSi/TiN) 500/8000/300

Poly1 to Sub. 4700±500 0.74 0.55

Poly2 to Sub. 3500±500 0.91 0.44

MetalⅠ to PolyⅠ 5600±500 0.62 0.61

MetalⅠ to Sub. 9500±800 0.36 0.52

MetalⅠ to Diffusion 5600±500 0.62 0.63

MetalⅡ to PolyⅠ 17600±1500 0.25 0.44

MetalⅡ to Sub. 21500±1800 0.21 0.41

MetalⅡ to Diffusion 17560±1500 0.25 0.44

MetalⅡ to MetalⅠ 11500±1000 0.39 0.52

N+/P-Well Junction Depth 0.25±0.05㎛ 3.9 3.99

P+/N-Well Junction Depth 0.30±0.05㎛ 5.93 4.57

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4. Electrical Parameters

PARMETER MIN. TYP. MAX.

NWL 700 750 800

PL1 23 28 33

PL2 45 50 55

N+ Diffusion 36 40 54

P+ Diffusion 56 62 68

ME1 (Ti/TiN/Ti/AlSi/TiN) 0.05 0.06 0.07

ME2 (Ti/AlSi/TiN) 0.02 0.03 0.04

(1) Sheet Resistance (I=2mA), Unit : Ω/sq.

PARMETER MIN. TYP. MAX.

ME1/PL1 (0.8㎛ x 0.8㎛) 5 10 20

ME1/PL2 (0.8㎛ x 0.8㎛) 10 15 25

ME1/N+ (0.8㎛ x 0.8㎛) 10 15 25

ME1/P+ (0.8㎛ x 0.8㎛) 30 50 70

ME2/ME1 (0.8㎛ x 0.8㎛, string) 1.0 1.5 2.5

(2) Contact and Via String Resistance(Kelvin Pattern), Unit : Ω/ea.

PARMETER MIN. TYP. MAX.

Gate Oxide 18.8 19.8 20.8

PL1/NWL 0.660 0.733 0.806

PL2/NWL 0.96 1.07 1.18

PL2/PL1 9.00 10.0 11.0

N+/PWL Junc., 260㎛ x 260㎛ 3.5 3.9 4.3

(3) Capacitance, Unit : 10-4 pF/㎛2

P+/NWL Junc., 260㎛ x 260㎛ 5.34 5.93 6.52

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(4) Characteristics of Transistors

Parameter 0.8㎛ Technology

NMOS

2ΔL [㎛ ]

2ΔW [㎛ ]

Vt [V]

Idsat [㎂/㎛ ]

BVDSS [V]

0.03 ± 0.12

0.7 ± 0.1

0.75 ± 0.1 (20/20)

0.70 ± 0.1 (20/0.8)

360 ± 40 (20/0.8)

≥ 10

PMOS

2ΔL [㎛ ]

2ΔW [㎛ ]

Vt [V]

Idsat [㎂/㎛ ]

BVDSS [V]

0.03 ± 0.17

0.71 ± 0.1

-1.05 ± 0.1 (20/20)

-1.05 ± 0.1 (20/0.8)

-160 ± 20 (20/0.8)

≤ -10

Field TR

Vtn [V]

BVdss [V]

Vtp [V]

BVdss [V]

≥ 10

≥ 10

≤ -10

≤ -10

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5. SPICE Parameter

5.1 0.8㎛ Analog CMOS BSIM3 parameters (NMOSFET)

** DATE: Oct 30/01 * LOT: 01-AS027 * WAF: #05 * DIE: 1 * DEV: 0.8ASIC * Temp= 27

.LIB CORRELATION

.PARAM+TOXN = 1.75E-8+VTH0N = 0.7605623+RSHN = 30+XLN = 0+XWN = -1e-07.ENDL CORRELATION

.LIB TT

.PARAM+TOXN = 1.75E-8+VTH0N = 0.7605623+RSHN = 30+XLN = 0+XWN = -1e-07.ENDL TT

.LIB SS

.PARAM+TOXN = 1.925e-08+VTH0N = 0.8366185+RSHN = 33+XLN = 8.0e-08+XWN = -2e-07.ENDL SS

.LIB FF

.PARAM+TOXN = 1.575e-08+VTH0N = 0.6845061+RSHN = 27+XLN = -8.0e-08+XWN = 0.ENDL FF

.LIB nmos

.MODEL nmos nmos ( LEVEL = 8

+VERSION = 3.2 TNOM = 27 TOX = TOXN

+XJ = 2.5E-7 NCH = 1.7E17 VTH0 = VTH0N

+K1 = 0.8698072 K2 = -0.0874746 K3 = 25.2499694

+K3B = -9.740734E-3 W0 = 3.16E-6 NLX = 4.242015E-8

+DVT0W = 0 DVT1W = 0 DVT2W = -0.032

+DVT0 = 1.3085931 DVT1 = 0.2493428 DVT2 = -0.1084465

+U0 = 709.58018 UA = 1.652201E-9 UB = 5.197043E-19

+UC = 3.942246E-11 VSAT = 9.60767E4 A0 = 0.3323353

+AGS = 0.0172207 B0 = 2.807118E-7 B1 = 1E-7

+KETA = -0.0114864 A1 = 0 A2 = 1

+RDSW = 1.492438E3 PRWG = -2.830885E-4 PRWB = -1E-3

+WR = 1 WINT = 3.275082E-7 LINT = 2.148644E-8

+XL = XLN XW = XWN DWG = -2.284798E-8

+DWB = 5.182712E-8 VOFF = -0.14 NFACTOR = 0.8461493

+CDSC = -8.730929E-4 CDSCD = 2.978865E-5 CDSCB = 0

+ETA0 = 0.07 ETAB = -0.08 DSUB = 0.5357173

+PCLM = 1.2750182 PDIBLC1 = 0.0128691 PDIBLC2 = 7.22928E-4

+PDIBLCB = -1E-3 DROUT = 0.1206813 PSCBE1 = 2.176167E8

+PSCBE2 = 1.011733E-6 PVAG = 0.2 DELTA = 1E-3

+RSH = RSHN ACM = 2 N = 1.013

+JS = 3.5E-7 JSW = 7E-13 MOBMOD = 1

+PRT = 0 UTE = -1.5 KT1 = 0

+KT1L = 0 KT2 = 0 UA1 = 4.31E-9

+UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4

+NQSMOD = 0 WL = 0 WLN = 1

+WW = 0 WWN = 1 WWL = 0

+LL = 0 LLN = 1 LW = 0

+LWN = 1 LWL = 0 CAPMOD = 2

+CGDO = 3E-10 CGSO = 3E-10 CGBO = 1.25E-10

+FC = 1 CJ = 3.9E-4 PB = 0.8

+MJ = 0.41 CJSW = 3.99E-10 PBSW = 0.7

+MJSW = 0.16 NOFF = 1 ACDE = 1

+MOIN = 15 TPB = 0 TPBSW = 0

+TPBSWG = 0 TCJ = 0 TCJSW = 0

+TCJSWG = 0 )

*

.ENDL nmos

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5.2 0.8㎛ Analog CMOS BSIM3 parameters (PMOSFET)

* * DATE: Oct 30/01 * LOT: 01-AS027 * WAF: #05 * DIE: 1 * DEV: 0.8ASIC * Temp= 27

.LIB CORRELATION

.PARAM+TOXP = 1.75E-8+VTH0P = -1.050677+RSHP = 60+XLP = 0+XWP = -1e-07.ENDL CORRELATION

.LIB TT

.PARAM+TOXP = 1.75E-8+VTH0P = -1.050677+RSHP = 60+XLP = 0+XWP = -1e-07.ENDL TT

.LIB SS

.PARAM+TOXP = 1.925e-08+VTH0P = -1.155745+RSHP = 66+XLP = 8.0e-08+XWP = -2e-07.ENDL SS

.LIB FF

.PARAM+TOXP = 1.575e-08+VTH0P = -0.9456093+RSHP = 54+XLP = -8.0e-08+XWP = 0.ENDL FF

.LIB pmos

.MODEL pmos pmos ( LEVEL = 8

+VERSION = 3.2 TNOM = 27 TOX = TOXP

+XJ = 3E-7 NCH = 5E16 VTH0 = VTH0P

+K1 = 0.5672916 K2 = -1.607077E-4 K3 = 6.7147332

+K3B = -0.3632851 W0 = 2.415558E-7 NLX = 4.017241E-8

+DVT0W = 0 DVT1W = 0 DVT2W = -0.032

+DVT0 = 1.5225968 DVT1 = 0.6176352 DVT2 = -0.1796596

+U0 = 210.4145214 UA = 1.728141E-9 UB = 2.379788E-18

+UC = -5.15849E-11 VSAT = 1.275842E5 A0 = 0.7579191

+AGS = 0.1003065 B0 = 2.807118E-7 B1 = 1E-7

+KETA = -3.6043E-3 A1 = 0 A2 = 0.909

+RDSW = 2.988385E3 PRWG = -2.912297E-5 PRWB = -1E-3

+WR = 1 WINT = 2.845986E-7 LINT = 3.593413E-8

+XL = XLP XW = XWP DWG = -2.802105E-8

+DWB = 4.34232E-8 VOFF = -0.1404518 NFACTOR = 1.3793807

+CDSC = -5.187898E-4 CDSCD = 2.978865E-5 CDSCB = 0

+ETA0 = 0.1096558 ETAB = -0.04 DSUB = 0.6483395

+PCLM = 4.5366292 PDIBLC1 = 0.3492589 PDIBLC2 = 9E-4

+PDIBLCB = 0 DROUT = 0.5492665 PSCBE1 = 9.374553E9

+PSCBE2 = 1E-8 PVAG = 5.3654134 DELTA = 0.0125296

+RSH = RSHP ACM = 2 N = 1.013

+JS = 2.5E-7 JSW = 3.5E-13 MOBMOD = 1

+PRT = 0 UTE = -1.5 KT1 = 0

+KT1L = 0 KT2 = 0 UA1 = 4.31E-9

+UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4

+NQSMOD = 0 WL = 0 WLN = 1

+WW = 0 WWN = 1 WWL = 0

+LL = 0 LLN = 1 LW = 0

+LWN = 1 LWL = 0 CAPMOD = 2

+CGDO = 3E-10 CGSO = 3E-10 CGBO = 1.12E-10

+FC = 1 CJ = 5.93E-4 PB = 0.8

+MJ = 0.47 CJSW = 4.57E-10 PBSW = 0.7

+MJSW = 0.26 NOFF = 1 ACDE = 1

+MOIN = 15 TPB = 0 TPBSW = 0

+TPBSWG = 0 TCJ = 0 TCJSW = 0

+TCJSWG = 0 )

*

.ENDL pmos

Page 22: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

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6. Appendices

A-1. nMOS Experiment vs. Simulation

A-2. pMOS Experiment vs. Simulation

Page 23: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 23

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

5.0E-6

1.0E-5

1.5E-5

2.0E-5

2.5E-5

3.0E-5

3.5E-5

4.0E-5

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

2.0E-6

4.0E-6

6.0E-6

8.0E-6

1.0E-5

1.2E-5

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

2.0E-4

4.0E-4

6.0E-4

8.0E-4

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.26V, 2.20V, 3.13V, 4.07V, 5.0VVbs=0V

1.0E+3

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+6

1.0E+7

1.5E+7

2.0E+7

2.5E+7

3.0E+7

3.5E+7

4.0E+7

4.5E+7

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

7.0E-4

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

3.0E-4

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.94V, 2.71V, 3.47V, 4.24V, 5.0VVbs=0V

1.0E+3

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+6

1.0E+7

1.5E+7

2.0E+7

2.5E+7

3.0E+7

3.5E+7

4.0E+7

4.5E+7

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation_W/L=20/20, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 24: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 24

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

3.0E-4

3.5E-4

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

9.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.21V, 2.16V, 3.11V, 4.05V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

3.0E+4

3.5E+4

4.0E+4

4.5E+4

5.0E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

9.0E-3

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.70V, 2.53V, 3.35V, 4.18V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation(계속)_W/L=20/0.7, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 25: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 25

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

3.0E-4

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

9.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.22V, 2.17V, 3.11V, 4.06V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

7.0E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.75V, 2.56V, 3.38V, 4.19V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

3.0E+4

3.5E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation(계속)_W/L=20/0.8, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 26: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 26

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.23V, 2.17V, 3.12V, 4.06V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

7.0E+4

8.0E+4

9.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

8.0E-3

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.82V, 2.62V, 3.41V, 4.21V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

3.0E+4

3.5E+4

4.0E+4

4.5E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation(계속)_W/L=20/0.9, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 27: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 27

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

3.0E-4

3.5E-4

4.0E-4

4.5E-4

5.0E-4

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-5

1.0E-4

1.5E-4

2.0E-4

2.5E-4

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.25V, 2.19V, 3.13V, 4.06V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+4

4.0E+4

6.0E+4

8.0E+4

1.0E+5

1.2E+5

1.4E+5

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E-3

2.0E-3

3.0E-3

4.0E-3

5.0E-3

6.0E-3

7.0E-3

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

4.0E-3

4.5E-3

5.0E-3

5.5E-3

6.0E-3

6.5E-3

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.84V, 2.63V, 3.42V, 4.21V, 5.0VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

7.0E+4

8.0E+4

9.0E+4

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation(계속)_W/L=20/1.1, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 28: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 28

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

5.0E-7

1.0E-6

1.5E-6

2.0E-6

2.5E-6

3.0E-6

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

1.0E-7

2.0E-7

3.0E-7

4.0E-7

5.0E-7

6.0E-7

7.0E-7

8.0E-7

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-6

1.0E-5

1.5E-5

2.0E-5

2.5E-5

3.0E-5

3.5E-5

4.0E-5

4.5E-5

5.0E-5

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=1.33V, 2.25V, 3.17V, 4.08V, 5.0VVbs=0V

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

1.0E+10

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+8

2.0E+8

3.0E+8

4.0E+8

5.0E+8

6.0E+8

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E-6

1.0E-5

1.5E-5

2.0E-5

2.5E-5

3.0E-5

3.5E-5

4.0E-5

4.5E-5

0 1 2 3 4 5V gs [V ]

Ids [

A]

Vbs=0V, -0.75V, -1.5V, -2.25V, -3VVds=0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

0 1 2 3 4 5V gs [V ]

Ids [

A]

0.0E+0

2.0E-6

4.0E-6

6.0E-6

8.0E-6

1.0E-5

1.2E-5

1.4E-5

1.6E-5

1.8E-5

2.0E-5

0 1 2 3 4 5V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-6

1.0E-5

1.5E-5

2.0E-5

2.5E-5

3.0E-5

3.5E-5

0 1 2 3 4 5V ds [V ]

Ids [

A]

Vgs=2.08V, 2.81V, 3.54V, 4.27V, 5.0VVbs=0V

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+8

2.0E+8

3.0E+8

4.0E+8

5.0E+8

6.0E+8

0 1 2 3 4 5V ds [V ]

Rds [

Ohm

]

A-1. nMOS Experiment vs. Simulation(계속)_W/L=2/20, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=5.0V)

(d). ID/VD-VG (VB=-3V)

Page 29: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 29

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

1.0E-6

2.0E-6

3.0E-6

4.0E-6

5.0E-6

6.0E-6

7.0E-6

8.0E-6

9.0E-6

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

5.0E-7

1.0E-6

1.5E-6

2.0E-6

2.5E-6

3.0E-6

3.5E-6

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

1.6E-4

1.8E-4

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.58V, -2.44V, -3.29V, -4.15V, -5VVbs=0V

1.0E+3

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+7

4.0E+7

6.0E+7

8.0E+7

1.0E+8

1.2E+8

1.4E+8

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

1.6E-4

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-5

2.0E-5

3.0E-5

4.0E-5

5.0E-5

6.0E-5

7.0E-5

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-2.19V, -2.89V, -3.6V, 4.3V, -5VVbs=0V

1.0E+3

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+7

4.0E+7

6.0E+7

8.0E+7

1.0E+8

1.2E+8

1.4E+8

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation_W/L=20/20, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)

Page 30: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 30

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

1.6E-4

1.8E-4

2.0E-4

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-5

2.0E-5

3.0E-5

4.0E-5

5.0E-5

6.0E-5

7.0E-5

8.0E-5

9.0E-5

1.0E-4

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

4.0E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.56V, -2.42V, -3.28V, -4.14V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

3.0E+4

3.5E+4

4.0E+4

4.5E+4

5.0E+4

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

4.0E-3

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

2.0E-4

4.0E-4

6.0E-4

8.0E-4

1.0E-3

1.2E-3

1.4E-3

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.99V, -2.74V, -3.5V, -4.25V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+3

1.0E+4

1.5E+4

2.0E+4

2.5E+4

3.0E+4

3.5E+4

4.0E+4

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation(계속)_W/L=20/0.7, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)

Page 31: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 31

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

1.6E-4

1.8E-4

2.0E-4

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-5

2.0E-5

3.0E-5

4.0E-5

5.0E-5

6.0E-5

7.0E-5

8.0E-5

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.57V, -2.43V, -3.28V, -4.14V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

7.0E+4

8.0E+4

9.0E+4

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

2.0E-4

4.0E-4

6.0E-4

8.0E-4

1.0E-3

1.2E-3

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-2.05V, -2.79V, -3.53V, -4.26V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation(계속)_W/L=20/0.8, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)

Page 32: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 32

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

1.6E-4

1.8E-4

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-5

2.0E-5

3.0E-5

4.0E-5

5.0E-5

6.0E-5

7.0E-5

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.58V, -2.44V, -3.29V, -4.15V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+4

4.0E+4

6.0E+4

8.0E+4

1.0E+5

1.2E+5

1.4E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

2.0E-4

4.0E-4

6.0E-4

8.0E-4

1.0E-3

1.2E-3

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-2.09V, -2.82V, -3.55V, -4.27V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

1.0E+4

2.0E+4

3.0E+4

4.0E+4

5.0E+4

6.0E+4

7.0E+4

8.0E+4

9.0E+4

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation(계속)_W/L=20/0.9, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)

Page 33: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 33

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

2.0E-5

4.0E-5

6.0E-5

8.0E-5

1.0E-4

1.2E-4

1.4E-4

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-5

2.0E-5

3.0E-5

4.0E-5

5.0E-5

6.0E-5

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.57V, -2.43V, -3.28V, -4.14V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+4

1.0E+5

1.5E+5

2.0E+5

2.5E+5

3.0E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

1E-04

1E-03

1E-02

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-4

2.0E-4

3.0E-4

4.0E-4

5.0E-4

6.0E-4

7.0E-4

8.0E-4

9.0E-4

1.0E-3

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-2.1V, -2.83V, -3.55V, -4.28V, -5VVbs=0V

1.0E+2

1.0E+3

1.0E+4

1.0E+5

1.0E+6

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

5.0E+4

1.0E+5

1.5E+5

2.0E+5

2.5E+5

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation(계속)_W/L=20/1.1, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)

Page 34: 0.8㎛CMOS-Mixed Mode Designer s Handbook (Version 1.4) · 2019. 11. 18. · 0.8㎛Analog CMOS Designer’s Handbook Version 1.4 Page 7 ETRI CONFIDENTIAL (DO NOT REPRODUCE WITHOUT

0.8㎛ Analog CMOS Designer’s Handbook Version 1.4 Page 34

ETRI CONFIDENTIAL(DO NOT REPRODUCE WITHOUT PERMISSION)

0.0E+0

1.0E-7

2.0E-7

3.0E-7

4.0E-7

5.0E-7

6.0E-7

7.0E-7

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

5.0E-8

1.0E-7

1.5E-7

2.0E-7

2.5E-7

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

2.0E-6

4.0E-6

6.0E-6

8.0E-6

1.0E-5

1.2E-5

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-1.64V, -2.48V, -3.32V, -4.16V, -5VVbs=0V

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

1.0E+10

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+8

4.0E+8

6.0E+8

8.0E+8

1.0E+9

1.2E+9

1.4E+9

1.6E+9

1.8E+9

2.0E+9

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E-6

4.0E-6

6.0E-6

8.0E-6

1.0E-5

1.2E-5

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

Vbs=0V, 0.75V, 1.5V, 2.25V, 3VVds=-0.1V

1E-11

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

0 1 2 3 4 5-V gs [V ]

-Id

s [

A]

0.0E+0

1.0E-6

2.0E-6

3.0E-6

4.0E-6

5.0E-6

6.0E-6

0 1 2 3 4 5-V gs [V ]

Gm

[m

ho]

0.0E+0

1.0E-6

2.0E-6

3.0E-6

4.0E-6

5.0E-6

6.0E-6

7.0E-6

8.0E-6

0 1 2 3 4 5-V ds [V ]

-Id

s [

A]

Vgs=-2.28V, -2.96V, -3.64V, -4.32V, -5VVbs=0V

1.0E+4

1.0E+5

1.0E+6

1.0E+7

1.0E+8

1.0E+9

1.0E+10

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

0.0E+0

2.0E+8

4.0E+8

6.0E+8

8.0E+8

1.0E+9

1.2E+9

1.4E+9

1.6E+9

1.8E+9

2.0E+9

0 1 2 3 4 5-V ds [V ]

Rds [

Ohm

]

A-2. pMOS Experiment vs. Simulation(계속)_W/L=2/20, unit=㎛Symbol : Experimental DataSolid Line : Model Results(a). ID/VG-VB (VD=-0.1V)

(b). ID/VD-VG (VB=0V)

(c). ID/VG-VB (VD=-5.0V)

(d). ID/VD-VG (VB=3V)