06063844
TRANSCRIPT
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A Grid Synchronization Method for Droop
Controlled Distributed Energy Resources ConvertersChia-Tse Lee Rui-Pei Jiang Po-Tai Cheng
CENTER FOR A DVANCED P OWER T ECHNOLOGIES DEPARTMENT OF E LECTRICAL E NGINEERING
NATIONAL T SING H UA U NIVERSITY HSINCHU TAIWAN
AbstractmdashWith the high penetration of distributed generationsystem many control methods have been widely discussed formanaging the power flows between these distributed energyresources converters in islanded or grid-connected operationmodes The grid synchronization method has been also elabo-rately discussed for single grid-connected converter However itis not often explored for the multi-converter oriented systemIn this paper a grid synchronization method for the multi-converter oriented distributed generation system is proposedThe proposed grid synchronization method can cooperate with
minus 1038389 1103925 minus 983769907317 droop controls and all the distributed energy
sources converters regulate their own phase angles and voltagemagnitude at the same speed Thus the original power flowdetermined by these droop controllers can be maintained duringthe operation of grid synchronization Its operation principle isexplained and experimental test results are presented to validatethe effectiveness of the proposed grid synchronization method
Index TermsmdashDistributed generation systems droop controlgrid synchronization Microgrid
I INTRODUCTION
With the awareness and need of low carbon emissions
renewable resources have become a significant research topic
recently Considering the generation scale and characteris-
tics of these renewable resources the concept of distributed
generation for these renewable resources have been proposedand discussed rather than conventional centralized generation
Therefore distributed generation systems (DGSs) such as
microgrids smartgrids have been developed to transform this
abstract concept into a practical application [1] [2] [3]
The control frameworks of distributed energy resources
converters (DERCs) in DGS have been explored over the past
years and the frequently discussed frameworks are master-
slave and droop controls [4] [5] [6] [7] [8] [9] The
master-slave controlled DGS must assign a converter to be the
master converter and control it as a voltage source converter
The rest of the converters in this system are controlled as
current source converters Because this master converter acts
as a virtual inertia [2] it will pick up most dynamic power
flows in DGS Therefore the power capacity of this masterconverter should be physically large to ride-through all the
transients and dynamics in this system On the other hand
the droop controlled DGS allows multiple voltage source
converters operating in DGS at the same time The transient
and dynamic power flows can be shared with these droop
controlled converters
Traditionally the real power-frequency droop ( minus1038389 droop)
control and the reactive power-voltage droop (1103925 minus 907317 droop)
are generally adopted in the droop controlled DGS [5] [6]
[7] The minus 1038389 droop control can achieve accurate real power
sharing results However the 1103925 minus 907317 droop control is highly
dependent on the line impedances seen from the converters
Therefore the 1103925minus 983769907317 droop control method has been proposed
to introduce one more dynamic relationship between the
converterrsquos reactive power and voltage magnitude [10] This
improved reactive power sharing control can be insensitive to
the unequal line impedances and improve the reactive power
sharing Furthermore it can be easily applied to converterswith different power capacities which is suitable for the rdquoplug-
and-playrdquo operation
Furthermore one of the most significant issues for DGS is
the control methods in different operation modes Many papers
have been presented for the controls of islanded mode and
grid-connected mode Another significant issue is grid syn-
chronization The grid synchronization method has been elab-
orately discussed for single grid-connected converters [11]
However it is not often explored for multi-converter oriented
systems or droop controlled DGS Reference [12] proposes
the grid synchronization control method for the conventional
minus 1038389 1103925 minus 907317 droop controlled microgrid
This paper continues from previous work exploring the grid
synchronization process for the multi-converter oriented and minus 1038389 1103925 minus
983769907317 droop controlled DGS The DERCs in DGS
achieve grid synchronization in an autonomous operation
During the transition of grid synchronization the power flows
can be controlled the same as those originally determined by
the autonomous droop controllers in islanded mode with negli-
gible transients The proposed control methods are explained
and the simulation and experimental test results are presented
to verify the effectiveness of the proposed control methods
I I DISTRIBUTED G ENERATION S YSTEM S TRUCTURE
Fig 1 shows the structure of the DGS The DGS consists of
several distributed energy resources converters (DERCs) line
impedances and load Because of the distributed location of DERCs these minus line impedances are to emulate the power
lines with different distances This DGS is connected to the
utility grid through a bypass switch As this bypass switch is
opened the distributed generation system operates in islanded
mode On the other hand it operates at grid-connected mode
as this bypass switch is closed
The overall control structure of the DGS is also shown in
Fig 1 Every DERC in DGS is controlled by its autonomous
978-1-4577-0541-011$2600 copy2011 IEEE 743
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Utility Grid
PWM
Modulatoramp Gate driver
C o m m u n i c a t i o n
U n i t s
To autonomous
controller x+1
Bypass Switch
V G G R1+jX 1
Load
R x +jX x
Distributed Generation System
V 1 1
C f
L f
V x x
C f
L f
V PCC PCC
Autonomous controller x
Voltage
amp
Current
Controller
Droop-based
Power Sharing
Controller
Grid
Synchronization
Controller
Main controller
Detection amp
Calculation of
V PCC PCC amp
V G G
Central Console
Fig 1 Distributed generation system structure
controller including three main parts voltage and current
controller droop-based power sharing controller and grid syn-
chronization controller These autonomous controllers cooper-ate with the signals from main controller which are calculated
from the terminal voltages of the bypass switch 907317 10383891038389 ang 10383891038389
and 907317 1103925ang1103925 and are transmitted by the communication units
Also the operation modes of these autonomous controllers
are controlled by the grid synchronization sequence signals
which are commanded through the central console of DGS
The detailed control block diagrams and operations of grid
synchronization method are shown as follows
III GRI D S YNCHRONIZATION M ETHOD
The main focus of this paper is to present an autonomous
grid synchronization method based on the existing minus1038389 droop
and 1103925 minus
983769907317 droop controls for the multi-converter orientedDGS The grid synchronization is achieved by changing all
DERCsrsquo operation frequencies phase angles and voltage
magnitudes at the same speed in an autonomous manner such
that the relative phase angle differences and voltage magnitude
differences between all the DERCs are maintained during the
grid synchronization process The real power and the reactive
power flows originally determined by the droop controls can
be therefore maintained at the same values with negligible
transients The control block diagrams and the operations
of proposed grid synchronization method are explained as
follows
A Main controller
Fig 2 shows the control block diagram of the main con-troller The main controller senses the feedbacked signals
907317 1103925983084907317 and 907317 10383891038389983084907317 to calculate the information required
by all the DERCrsquos autonomous controllers This required
information includes the frequency of utility grid 1103925 phase
angle difference and voltage magnitude difference 907317
between the utility grid and the point of common coupling
(PCC)
The phase-locked loops use PI controllers to control the
d-axis voltages of utility grid and PCC at 983088 [13] and the
0 25 5 75 10372
375
378
381
0 25 5 75 10
0
0 25 5 75 10100
5
10
15
103838911039251103925 [radsec]
907317 [rad]
983088983086983093
minus983088983086983093
minus
907317 [V]
[sec]
Frequency restoration engages
Fig 3 The information derived by the main controller
frequencies 1103925 and 10383891038389 are derived and used to transform
the feedbacked phase voltages into qd-axis voltages under thesynchronous reference frame The voltage magnitudes of the
utility grid and the PCC (907317 1103925 and 907317 10383891038389 ) are calculated by
these qd-axis voltages under their individual synchronous ref-
erence frames and the required voltage magnitude difference
907317 is thus derived
The phase angle difference can be derived by equa-
tion (1) which is based on the sum and difference formulas
of a trigonometric function to eliminate the sine function of
9830801103925 983083 10383891038389 983081times9830839830801103925 983083 10383891038389 983081 and to obtain the sine function
of 9830801103925 minus 10383891038389 983081times 983083 9830801103925 minus 10383891038389 983081 As a result equals
the phase angle difference 1103925 minus 10383891038389 as 10383891038389 is regulated
to the same value as 1103925
983131907317
1103925
907317 1103925
983133 983101
983131 907317 1103925 9831399831519831559830801103925 times 983083 1103925983081minus907317 1103925 9831559831459831509830801103925 times 983083 1103925983081
983133983131907317
10383891038389
907317 10383891038389
983133 983101
983131 907317 10383891038389 983139983151983155983080 10383891038389 times 983083 10383891038389 983081minus907317 10383891038389 983155983145983150983080 10383891038389 times 983083 10383891038389 983081
983133
983101 983155983145983150minus983089983131 983089
907317 1103925907317 10383891038389
983080907317 1103925 times 907317
10383891038389 minus 907317 1103925 times 907317
10383891038389 983081983133
983101 9830801103925 minus 10383891038389 983081 times 983083 9830801103925 minus 10383891038389 983081(1)
Fig 3 shows the information derived during the main con-
trollerrsquos operation The operation frequencies 1103925 and 10383891038389
is detected by the phase-locked loops and the phase angle
difference and the voltage magnitude difference 907317
can then be calculated as shown in Fig 3 Before 983101 983093 983155983141983139 the
frequency of the PCC ( 10383891038389 ) deviates from the frequency of the utility frequency (1103925) and the phase angle difference
continuously varies between minus and After the frequency
restoration is engaged and 10383891038389 is restored the same value
as 1103925 stops varying and equals to the angle difference
1103925 minus 10383891038389 as shown in equation (1) Therefore the main
controller of DGS detects these required information and then
transmits them to all the autonomous controller through the
communication units to accomplish the grid synchronization
as shown in Fig 2
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V diff
diff
G
Main controller
V PCCabc
V Gabc V G qe
V G qe
X2
V G de
V G de
X05
V G V G
V PCC qe
V PCC qe
V PCC de
V PCC de
V PCC V PCC
V diff V diff
X2
X2
X
2
X05
Voltage magnitude
difference calculation
V G qs
V G ds
V PCC qs
V PCC ds
Sin-1 diff
Phase angle
difference calculation
V G V PCC
1
abcto
qde
V PCCa
V PCCb
V PCCc
V PCC
qe
V PCC de
LPF
0 PI
2 PLL
PCC
abc
to
qde
V Ga
V Gb
V Gc
V G qe
V G de
LPF
0 PI
2 PLL
G
Fig 2 Control block diagram of main controller
B Autonomous controller
The detailed control block diagram of DERCrsquos autonomous
controller is given in Fig 4 The minus1038389 droop control and 1103925minus983769907317
droop control are implemented by equation (2) where and
are the droop coefficients 1038389 983088 983769907317 983088 and 907317 983088 are nominal
frequency nominal 983769907317 and nominal voltage magnitude respec-tively and 983088 and 1103925983088 are the real power and reactive power
set-points which are related to the power capacity of DERC
In equation (2) 1038389 and 983769907317 are added for grid synchronization
which will be explained next The frequency and 983769907317 restoration
controllers are based on equation (3) to regulate 983088 and 1103925983088
in equation (2) where and are the restoration
speed related gains and and 1103925 are the DERCrsquos power
capacity related scaling gains With the aforementioned con-
trollers in equation (2) and equation (3) the minus1038389 and 1103925minus 983769907317
droop controls can accomplish real and reactive power sharing
and the operation frequency 1038389 and 983769907317 can be regulated back
to 1038389 983088 and 983769907317 983088 respectively in an autonomous manner
1038389 lowast 983101 1038389 983088 minus sdot 983080 983088 minus 983081 983083 1038389
983769907317 lowast 983101 983769907317 983088 minus sdot 9830801103925983088 minus1103925983081 983083 983769907317
907317 lowast 983101 907317 983088 983083
int 983769907317 lowast
(2)
983088 983101 9830801038389 983088 minus 1038389 983081
1103925983088 983101 1103925983080 983769907317 983088 minus
983769907317 983081
(3)
The main focus of this paper is to present an autonomous
grid synchronization method based on the existing minus 1038389
droop and 1103925 minus 983769907317 droop controls To accomplish the grid
synchronization the voltage magnitude equalization and phase
synchronization controllers are proposed as equation (4) and
equation (5)
983769907317 983101 sdot 907317 983083
int 907317 (4)
1038389 983101 sdot 983083
int
983101
983163 if 983101 983089983084
983088 if 983101 983088983086
(5)
Islanded mode
Phase
synchronization
Grid-connected mode
Grid Synchronization Method
Bypass switch closesGS
Power management control
Frequency restoration
Voltage magnitude
equalization
V restoration
time
Fig 5 Grid synchronization sequence
The voltage magnitude equalization is designed to main-
tain 907317 to 983088 907317 transmitted from the main controller
represents the voltage magnitude difference between 907317 1103925 and
907317 10383891038389 and it can be regulated by lifting up or pulling down
all the DERCsrsquo operation voltage magnitudes at the same
speed Therefore 983769907317 in equation (4) representing the voltage
magnitude change with respect to the time variation is derived
from the PI regulation of 907317 and injected to the 1103925minus
983769907317
droop control in equation (2) to achieve the voltage magnitude
equalization In the same manner the phase synchronization is
implemented by injecting 1038389 the the PI regulation of to
the minus1038389 droop control in equation (2) Because of the voltage
magnitude equalization and phase synchronization change all
DERCsrsquo voltage magnitudes and phase angles at the same
pace the relative voltage magnitude differences and phase
angle differences between all the DERCs are maintained such
that the real power and reactive power sharing results are not
affected during these operations
To complete the grid synchronization and minimize the
transient power flows at the instant of grid-connection the
operation frequency phase angle and voltage magnitude of
907317 10383891038389 should be regulated the same value as those of 907317 1103925before the bypass switch is closed Therefore the grid syn-
chronization sequence shown as Fig 5 is commanded from
the central console to control the operation modes of the grid
synchronization process
Fig 6 and Fig 7 show the aforementioned grid synchroniza-
tion process with the computer simulation Before 983101 983092983088 983155983141983139
the bypass switch is opened the DGS is operating in islanded
mode All the DERCs are controlled by minus 1038389 1103925 minus 983769907317 droop
controls to achieve power sharing As the DERCs are operated
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Autonomous controller x
Voltage PI Controller
amp
Predictive Current
Controller
V diff
diff
G
GS V ref
MUX 1
0
diff
0 PI
GS
f S
Phase
synchronization
PS
Voltage magnitudeequalization
V diff PI V S
P-f droop P x
m x P 0x
f 0x
f x
f S f x
s
1
Q x
n x Q0x
V 0x V x
V 0x V x
V x V x
V S Q-V droop
0 V 0x K Qresx Q Rx
s
1 Q0x V x
V restoration
Frequency restoration
f 0x
f x
K Presx P Rx s
1 P 0x G
2
From Central
Console
From Main
Controller
Fig 4 Control block diagram of autonomous controller
0 10 20 30 40 50595
5975
60
6025
605
0 10 20 30 40 50minus02
minus01
0
01
02
03
0 10 20 30 40 50minus5
0
5
10
[ H z ]
[ r a d ]
[ V ]
Step load changes 1103925 983101 983089 Bypass switch closes
103838911039251103925
907317
907317
Time[sec]
Fig 6 The responses of main controller during grid synchronization process
in the 1103925 minus 983769907317 droop control where 983088 is assigned to 983769907317 983088 thereactive power sharing can be improved compared with the
reactive power sharing of 1103925 minus 907317 droop control [10] Owing
to that the operation of 1103925 minus 983769907317 droop control can result in
the output voltage variations of the DGS the engagement of
voltage magnitude equalization can regulate all the DERCsrsquo
voltage magnitudes at the same speed and thus maintain
the voltage magnitude of DGS without disturbing the power
sharing results Also the frequency restoration is activated
by assigning 1103925
983090 to 1038389 983088 to maintain the operation frequency
of PCC ( 10383891038389 983101 9830901038389 10383891038389 ) the same as that of utility
grid (1103925 983101 9830901038389 1103925) Note that a step load change from
983090983089983088983088983127 983083 983089983088983088983088 983126983105983122 to 983091983089983088983088983127 983083 983089983088983088983088 983126983105983122 occurs at
983101 983089983093 983155983141983139
To satisfy the necessity for grid-connection the phase angleof PCC ( 10383891038389 ) needs to be synchronized to the phase angle
of utility grid (1103925) At 983101 983091983088983155983141983139 DGS starts to synchronize
10383891038389 to 1103925 by transmitting the enabling signal to every
autonomous controller of DERC from the central console All
the DERCs in DGS then start to adjust their phase angles at
the same speed by 1038389 983089 and 1038389 983090 which is generated by the PI
regulation of the input variable as shown in Fig 7(a)
In the end ℎ10383891038389 can be regulated to 983088 which means
10383891038389 is aligned to 1103925 as 1038389 983089 and 1038389 983090 is backed and kept at
0 10 20 30 40 500
1000
2000
3000
0 10 20 30 40 505999
59995
60
60005
0 10 20 30 40 50minus002
0
002
004
006
[ W ]
[ H z ]
[ H z ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
1
2
1 2
Time[sec]
(a)
0 10 20 30 40 500
300
600
900
1200
0 10 20 30 40 50minus2
minus1
0
1
0 10 20 30 40 50minus5
0
5
10
0 10 20 30 40 50179
181
183
185
187
[ V A R ]
[ V s e c ]
[ V s e c ]
[
V ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
983769 1
983769 2
983769 1 983769 2
lowast
1 lowast2
Time[sec]
(b)
Fig 7 The responses of DERCs during grid synchronization process
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983088 The power sharing results are also not affected during the
operation of phase angle synchronization
After the frequency voltage magnitude and phase angle
of 907317 10383891038389 and 907317 1103925 are synchronized as shown in Fig 6 the
bypass switch is closed at 983101 983092983088983155983141983139 by transmitting an
enable signal from central console and the DGS goes into
the grid-connected mode with tolerable transients power flowsThe grid synchronization process shown in Fig 7 verify that
the operation of minus 1038389 1103925 minus 983769907317 droop controlled DGS can
be transferred from islanded mode to grid-connected mode
without affecting the original power sharing results by the
proposed grid synchronization method
IV EXPERIMENTAL T EST R ESULTS
The DGS test benches are constructed to validate the effec-
tiveness of the proposed grid synchronization control method
The system configuration is the same as shown in Fig 1 and
the detailed descriptions of this DGS are stated as follows
∙ The system voltage is 907317 minus 983101 983090983090983088 983126983154983149983155 and the
frequency is 983094983088983112983162 Two DERCs are constructed in thisDGS and their power line impedances are set as 983089 983083 983089 983101 983088983086983090 983083 983088983086983091983095983095Ω and 983090 983083 983090 983101 983088983086983090 983083 983088983086983091983095983095Ω
The total of load of 983096983088983088 983127 is applied
∙ The DERCs are three-phase hard-switched PWM con-
verters whose switching frequency 1038389 ℎ 983101 983089983088983147983112983162
output filter inductor 983101 983090983149983112 output filter capacitor
983101 983089983088 983110 The DC bus voltage of DERC is supported
by DC power supply 62024P-600-8
∙ The main controller and the autonomous controllers
are implemented with the digital signal processor
TMS320F28335 and the sampling frequency is pro-
grammed at 1038389 907317 983101 983090983088983147983112983162 The coefficients of
main controller and autonomous controllers are given in
TABLE I∙ The bypass switch in Fig 1 can be implemented with
different topologies [14] [15] and the circuit breaker-
based (CB-based) switch is adopted in this experimental
test benches
∙ The communication interfaces are implemented with RS-
232 to transmit and receive data among the central con-
sole main controller and autonomous controllers The
bandwidth of these communication units are set at about
983096983088983112983162
Fig 8 shows the experimental test results of the proposed
grid synchronization method The detected information (1103925
10383891038389 and 907317 ) in the main controller shown in
Fig 8(a) are to investigate the operations and responses of
proposed grid synchronization method As these two DERCsin DGS are connected and operated in the islanded mode the
minus 1038389 droop control in every autonomous controller works
individually and then the operation frequency of the PCC
( 10383891038389 ) is internally decided and deviated from the utility
frequency 1103925 This operation frequency difference between
10383891038389 and 1103925 results in the variation of before the
frequency restoration is activated This variation is stopped
and controlled as long as the frequency restoration is activated
and the 10383891038389 is regulated the same as 1103925 as shown in
377
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
377
0
G
PCC
diff
10V
2 DERCs
are connected
V diff
4rad
4radsec
4radsec
(a) Detected information in the main controller ( 1038389 11039251103925 X-axis 298308810383899830871103925907317Y-axis 4110392598308710383899830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 411039259830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 19830889830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 1
Q1
1
1000VAR
4radsec
4VsecV 1
2 DERCs
are connected
(b) Responses in the DERC1 ( 1 X-axis 2983088
10383899830871103925907317 Y-axis 1983088983088983088
98308711039259073171 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
1 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast1
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 2
Q2
2
1000VAR
4radsec
4VsecV 2
2 DERCs
are connected
(c) Responses in the DERC2 ( 2 X-axis 298308810383899830871103925907317 Y-axis 198308898308898308898308711039259073172 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
2 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast2
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
Fig 8 Experimental test results of grid synchronization process
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TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 2: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/2.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 27
Utility Grid
PWM
Modulatoramp Gate driver
C o m m u n i c a t i o n
U n i t s
To autonomous
controller x+1
Bypass Switch
V G G R1+jX 1
Load
R x +jX x
Distributed Generation System
V 1 1
C f
L f
V x x
C f
L f
V PCC PCC
Autonomous controller x
Voltage
amp
Current
Controller
Droop-based
Power Sharing
Controller
Grid
Synchronization
Controller
Main controller
Detection amp
Calculation of
V PCC PCC amp
V G G
Central Console
Fig 1 Distributed generation system structure
controller including three main parts voltage and current
controller droop-based power sharing controller and grid syn-
chronization controller These autonomous controllers cooper-ate with the signals from main controller which are calculated
from the terminal voltages of the bypass switch 907317 10383891038389 ang 10383891038389
and 907317 1103925ang1103925 and are transmitted by the communication units
Also the operation modes of these autonomous controllers
are controlled by the grid synchronization sequence signals
which are commanded through the central console of DGS
The detailed control block diagrams and operations of grid
synchronization method are shown as follows
III GRI D S YNCHRONIZATION M ETHOD
The main focus of this paper is to present an autonomous
grid synchronization method based on the existing minus1038389 droop
and 1103925 minus
983769907317 droop controls for the multi-converter orientedDGS The grid synchronization is achieved by changing all
DERCsrsquo operation frequencies phase angles and voltage
magnitudes at the same speed in an autonomous manner such
that the relative phase angle differences and voltage magnitude
differences between all the DERCs are maintained during the
grid synchronization process The real power and the reactive
power flows originally determined by the droop controls can
be therefore maintained at the same values with negligible
transients The control block diagrams and the operations
of proposed grid synchronization method are explained as
follows
A Main controller
Fig 2 shows the control block diagram of the main con-troller The main controller senses the feedbacked signals
907317 1103925983084907317 and 907317 10383891038389983084907317 to calculate the information required
by all the DERCrsquos autonomous controllers This required
information includes the frequency of utility grid 1103925 phase
angle difference and voltage magnitude difference 907317
between the utility grid and the point of common coupling
(PCC)
The phase-locked loops use PI controllers to control the
d-axis voltages of utility grid and PCC at 983088 [13] and the
0 25 5 75 10372
375
378
381
0 25 5 75 10
0
0 25 5 75 10100
5
10
15
103838911039251103925 [radsec]
907317 [rad]
983088983086983093
minus983088983086983093
minus
907317 [V]
[sec]
Frequency restoration engages
Fig 3 The information derived by the main controller
frequencies 1103925 and 10383891038389 are derived and used to transform
the feedbacked phase voltages into qd-axis voltages under thesynchronous reference frame The voltage magnitudes of the
utility grid and the PCC (907317 1103925 and 907317 10383891038389 ) are calculated by
these qd-axis voltages under their individual synchronous ref-
erence frames and the required voltage magnitude difference
907317 is thus derived
The phase angle difference can be derived by equa-
tion (1) which is based on the sum and difference formulas
of a trigonometric function to eliminate the sine function of
9830801103925 983083 10383891038389 983081times9830839830801103925 983083 10383891038389 983081 and to obtain the sine function
of 9830801103925 minus 10383891038389 983081times 983083 9830801103925 minus 10383891038389 983081 As a result equals
the phase angle difference 1103925 minus 10383891038389 as 10383891038389 is regulated
to the same value as 1103925
983131907317
1103925
907317 1103925
983133 983101
983131 907317 1103925 9831399831519831559830801103925 times 983083 1103925983081minus907317 1103925 9831559831459831509830801103925 times 983083 1103925983081
983133983131907317
10383891038389
907317 10383891038389
983133 983101
983131 907317 10383891038389 983139983151983155983080 10383891038389 times 983083 10383891038389 983081minus907317 10383891038389 983155983145983150983080 10383891038389 times 983083 10383891038389 983081
983133
983101 983155983145983150minus983089983131 983089
907317 1103925907317 10383891038389
983080907317 1103925 times 907317
10383891038389 minus 907317 1103925 times 907317
10383891038389 983081983133
983101 9830801103925 minus 10383891038389 983081 times 983083 9830801103925 minus 10383891038389 983081(1)
Fig 3 shows the information derived during the main con-
trollerrsquos operation The operation frequencies 1103925 and 10383891038389
is detected by the phase-locked loops and the phase angle
difference and the voltage magnitude difference 907317
can then be calculated as shown in Fig 3 Before 983101 983093 983155983141983139 the
frequency of the PCC ( 10383891038389 ) deviates from the frequency of the utility frequency (1103925) and the phase angle difference
continuously varies between minus and After the frequency
restoration is engaged and 10383891038389 is restored the same value
as 1103925 stops varying and equals to the angle difference
1103925 minus 10383891038389 as shown in equation (1) Therefore the main
controller of DGS detects these required information and then
transmits them to all the autonomous controller through the
communication units to accomplish the grid synchronization
as shown in Fig 2
744
8132019 06063844
httpslidepdfcomreaderfull06063844 37
V diff
diff
G
Main controller
V PCCabc
V Gabc V G qe
V G qe
X2
V G de
V G de
X05
V G V G
V PCC qe
V PCC qe
V PCC de
V PCC de
V PCC V PCC
V diff V diff
X2
X2
X
2
X05
Voltage magnitude
difference calculation
V G qs
V G ds
V PCC qs
V PCC ds
Sin-1 diff
Phase angle
difference calculation
V G V PCC
1
abcto
qde
V PCCa
V PCCb
V PCCc
V PCC
qe
V PCC de
LPF
0 PI
2 PLL
PCC
abc
to
qde
V Ga
V Gb
V Gc
V G qe
V G de
LPF
0 PI
2 PLL
G
Fig 2 Control block diagram of main controller
B Autonomous controller
The detailed control block diagram of DERCrsquos autonomous
controller is given in Fig 4 The minus1038389 droop control and 1103925minus983769907317
droop control are implemented by equation (2) where and
are the droop coefficients 1038389 983088 983769907317 983088 and 907317 983088 are nominal
frequency nominal 983769907317 and nominal voltage magnitude respec-tively and 983088 and 1103925983088 are the real power and reactive power
set-points which are related to the power capacity of DERC
In equation (2) 1038389 and 983769907317 are added for grid synchronization
which will be explained next The frequency and 983769907317 restoration
controllers are based on equation (3) to regulate 983088 and 1103925983088
in equation (2) where and are the restoration
speed related gains and and 1103925 are the DERCrsquos power
capacity related scaling gains With the aforementioned con-
trollers in equation (2) and equation (3) the minus1038389 and 1103925minus 983769907317
droop controls can accomplish real and reactive power sharing
and the operation frequency 1038389 and 983769907317 can be regulated back
to 1038389 983088 and 983769907317 983088 respectively in an autonomous manner
1038389 lowast 983101 1038389 983088 minus sdot 983080 983088 minus 983081 983083 1038389
983769907317 lowast 983101 983769907317 983088 minus sdot 9830801103925983088 minus1103925983081 983083 983769907317
907317 lowast 983101 907317 983088 983083
int 983769907317 lowast
(2)
983088 983101 9830801038389 983088 minus 1038389 983081
1103925983088 983101 1103925983080 983769907317 983088 minus
983769907317 983081
(3)
The main focus of this paper is to present an autonomous
grid synchronization method based on the existing minus 1038389
droop and 1103925 minus 983769907317 droop controls To accomplish the grid
synchronization the voltage magnitude equalization and phase
synchronization controllers are proposed as equation (4) and
equation (5)
983769907317 983101 sdot 907317 983083
int 907317 (4)
1038389 983101 sdot 983083
int
983101
983163 if 983101 983089983084
983088 if 983101 983088983086
(5)
Islanded mode
Phase
synchronization
Grid-connected mode
Grid Synchronization Method
Bypass switch closesGS
Power management control
Frequency restoration
Voltage magnitude
equalization
V restoration
time
Fig 5 Grid synchronization sequence
The voltage magnitude equalization is designed to main-
tain 907317 to 983088 907317 transmitted from the main controller
represents the voltage magnitude difference between 907317 1103925 and
907317 10383891038389 and it can be regulated by lifting up or pulling down
all the DERCsrsquo operation voltage magnitudes at the same
speed Therefore 983769907317 in equation (4) representing the voltage
magnitude change with respect to the time variation is derived
from the PI regulation of 907317 and injected to the 1103925minus
983769907317
droop control in equation (2) to achieve the voltage magnitude
equalization In the same manner the phase synchronization is
implemented by injecting 1038389 the the PI regulation of to
the minus1038389 droop control in equation (2) Because of the voltage
magnitude equalization and phase synchronization change all
DERCsrsquo voltage magnitudes and phase angles at the same
pace the relative voltage magnitude differences and phase
angle differences between all the DERCs are maintained such
that the real power and reactive power sharing results are not
affected during these operations
To complete the grid synchronization and minimize the
transient power flows at the instant of grid-connection the
operation frequency phase angle and voltage magnitude of
907317 10383891038389 should be regulated the same value as those of 907317 1103925before the bypass switch is closed Therefore the grid syn-
chronization sequence shown as Fig 5 is commanded from
the central console to control the operation modes of the grid
synchronization process
Fig 6 and Fig 7 show the aforementioned grid synchroniza-
tion process with the computer simulation Before 983101 983092983088 983155983141983139
the bypass switch is opened the DGS is operating in islanded
mode All the DERCs are controlled by minus 1038389 1103925 minus 983769907317 droop
controls to achieve power sharing As the DERCs are operated
745
8132019 06063844
httpslidepdfcomreaderfull06063844 47
Autonomous controller x
Voltage PI Controller
amp
Predictive Current
Controller
V diff
diff
G
GS V ref
MUX 1
0
diff
0 PI
GS
f S
Phase
synchronization
PS
Voltage magnitudeequalization
V diff PI V S
P-f droop P x
m x P 0x
f 0x
f x
f S f x
s
1
Q x
n x Q0x
V 0x V x
V 0x V x
V x V x
V S Q-V droop
0 V 0x K Qresx Q Rx
s
1 Q0x V x
V restoration
Frequency restoration
f 0x
f x
K Presx P Rx s
1 P 0x G
2
From Central
Console
From Main
Controller
Fig 4 Control block diagram of autonomous controller
0 10 20 30 40 50595
5975
60
6025
605
0 10 20 30 40 50minus02
minus01
0
01
02
03
0 10 20 30 40 50minus5
0
5
10
[ H z ]
[ r a d ]
[ V ]
Step load changes 1103925 983101 983089 Bypass switch closes
103838911039251103925
907317
907317
Time[sec]
Fig 6 The responses of main controller during grid synchronization process
in the 1103925 minus 983769907317 droop control where 983088 is assigned to 983769907317 983088 thereactive power sharing can be improved compared with the
reactive power sharing of 1103925 minus 907317 droop control [10] Owing
to that the operation of 1103925 minus 983769907317 droop control can result in
the output voltage variations of the DGS the engagement of
voltage magnitude equalization can regulate all the DERCsrsquo
voltage magnitudes at the same speed and thus maintain
the voltage magnitude of DGS without disturbing the power
sharing results Also the frequency restoration is activated
by assigning 1103925
983090 to 1038389 983088 to maintain the operation frequency
of PCC ( 10383891038389 983101 9830901038389 10383891038389 ) the same as that of utility
grid (1103925 983101 9830901038389 1103925) Note that a step load change from
983090983089983088983088983127 983083 983089983088983088983088 983126983105983122 to 983091983089983088983088983127 983083 983089983088983088983088 983126983105983122 occurs at
983101 983089983093 983155983141983139
To satisfy the necessity for grid-connection the phase angleof PCC ( 10383891038389 ) needs to be synchronized to the phase angle
of utility grid (1103925) At 983101 983091983088983155983141983139 DGS starts to synchronize
10383891038389 to 1103925 by transmitting the enabling signal to every
autonomous controller of DERC from the central console All
the DERCs in DGS then start to adjust their phase angles at
the same speed by 1038389 983089 and 1038389 983090 which is generated by the PI
regulation of the input variable as shown in Fig 7(a)
In the end ℎ10383891038389 can be regulated to 983088 which means
10383891038389 is aligned to 1103925 as 1038389 983089 and 1038389 983090 is backed and kept at
0 10 20 30 40 500
1000
2000
3000
0 10 20 30 40 505999
59995
60
60005
0 10 20 30 40 50minus002
0
002
004
006
[ W ]
[ H z ]
[ H z ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
1
2
1 2
Time[sec]
(a)
0 10 20 30 40 500
300
600
900
1200
0 10 20 30 40 50minus2
minus1
0
1
0 10 20 30 40 50minus5
0
5
10
0 10 20 30 40 50179
181
183
185
187
[ V A R ]
[ V s e c ]
[ V s e c ]
[
V ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
983769 1
983769 2
983769 1 983769 2
lowast
1 lowast2
Time[sec]
(b)
Fig 7 The responses of DERCs during grid synchronization process
746
8132019 06063844
httpslidepdfcomreaderfull06063844 57
983088 The power sharing results are also not affected during the
operation of phase angle synchronization
After the frequency voltage magnitude and phase angle
of 907317 10383891038389 and 907317 1103925 are synchronized as shown in Fig 6 the
bypass switch is closed at 983101 983092983088983155983141983139 by transmitting an
enable signal from central console and the DGS goes into
the grid-connected mode with tolerable transients power flowsThe grid synchronization process shown in Fig 7 verify that
the operation of minus 1038389 1103925 minus 983769907317 droop controlled DGS can
be transferred from islanded mode to grid-connected mode
without affecting the original power sharing results by the
proposed grid synchronization method
IV EXPERIMENTAL T EST R ESULTS
The DGS test benches are constructed to validate the effec-
tiveness of the proposed grid synchronization control method
The system configuration is the same as shown in Fig 1 and
the detailed descriptions of this DGS are stated as follows
∙ The system voltage is 907317 minus 983101 983090983090983088 983126983154983149983155 and the
frequency is 983094983088983112983162 Two DERCs are constructed in thisDGS and their power line impedances are set as 983089 983083 983089 983101 983088983086983090 983083 983088983086983091983095983095Ω and 983090 983083 983090 983101 983088983086983090 983083 983088983086983091983095983095Ω
The total of load of 983096983088983088 983127 is applied
∙ The DERCs are three-phase hard-switched PWM con-
verters whose switching frequency 1038389 ℎ 983101 983089983088983147983112983162
output filter inductor 983101 983090983149983112 output filter capacitor
983101 983089983088 983110 The DC bus voltage of DERC is supported
by DC power supply 62024P-600-8
∙ The main controller and the autonomous controllers
are implemented with the digital signal processor
TMS320F28335 and the sampling frequency is pro-
grammed at 1038389 907317 983101 983090983088983147983112983162 The coefficients of
main controller and autonomous controllers are given in
TABLE I∙ The bypass switch in Fig 1 can be implemented with
different topologies [14] [15] and the circuit breaker-
based (CB-based) switch is adopted in this experimental
test benches
∙ The communication interfaces are implemented with RS-
232 to transmit and receive data among the central con-
sole main controller and autonomous controllers The
bandwidth of these communication units are set at about
983096983088983112983162
Fig 8 shows the experimental test results of the proposed
grid synchronization method The detected information (1103925
10383891038389 and 907317 ) in the main controller shown in
Fig 8(a) are to investigate the operations and responses of
proposed grid synchronization method As these two DERCsin DGS are connected and operated in the islanded mode the
minus 1038389 droop control in every autonomous controller works
individually and then the operation frequency of the PCC
( 10383891038389 ) is internally decided and deviated from the utility
frequency 1103925 This operation frequency difference between
10383891038389 and 1103925 results in the variation of before the
frequency restoration is activated This variation is stopped
and controlled as long as the frequency restoration is activated
and the 10383891038389 is regulated the same as 1103925 as shown in
377
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
377
0
G
PCC
diff
10V
2 DERCs
are connected
V diff
4rad
4radsec
4radsec
(a) Detected information in the main controller ( 1038389 11039251103925 X-axis 298308810383899830871103925907317Y-axis 4110392598308710383899830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 411039259830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 19830889830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 1
Q1
1
1000VAR
4radsec
4VsecV 1
2 DERCs
are connected
(b) Responses in the DERC1 ( 1 X-axis 2983088
10383899830871103925907317 Y-axis 1983088983088983088
98308711039259073171 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
1 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast1
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 2
Q2
2
1000VAR
4radsec
4VsecV 2
2 DERCs
are connected
(c) Responses in the DERC2 ( 2 X-axis 298308810383899830871103925907317 Y-axis 198308898308898308898308711039259073172 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
2 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast2
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
Fig 8 Experimental test results of grid synchronization process
747
8132019 06063844
httpslidepdfcomreaderfull06063844 67
TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 3: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/3.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 37
V diff
diff
G
Main controller
V PCCabc
V Gabc V G qe
V G qe
X2
V G de
V G de
X05
V G V G
V PCC qe
V PCC qe
V PCC de
V PCC de
V PCC V PCC
V diff V diff
X2
X2
X
2
X05
Voltage magnitude
difference calculation
V G qs
V G ds
V PCC qs
V PCC ds
Sin-1 diff
Phase angle
difference calculation
V G V PCC
1
abcto
qde
V PCCa
V PCCb
V PCCc
V PCC
qe
V PCC de
LPF
0 PI
2 PLL
PCC
abc
to
qde
V Ga
V Gb
V Gc
V G qe
V G de
LPF
0 PI
2 PLL
G
Fig 2 Control block diagram of main controller
B Autonomous controller
The detailed control block diagram of DERCrsquos autonomous
controller is given in Fig 4 The minus1038389 droop control and 1103925minus983769907317
droop control are implemented by equation (2) where and
are the droop coefficients 1038389 983088 983769907317 983088 and 907317 983088 are nominal
frequency nominal 983769907317 and nominal voltage magnitude respec-tively and 983088 and 1103925983088 are the real power and reactive power
set-points which are related to the power capacity of DERC
In equation (2) 1038389 and 983769907317 are added for grid synchronization
which will be explained next The frequency and 983769907317 restoration
controllers are based on equation (3) to regulate 983088 and 1103925983088
in equation (2) where and are the restoration
speed related gains and and 1103925 are the DERCrsquos power
capacity related scaling gains With the aforementioned con-
trollers in equation (2) and equation (3) the minus1038389 and 1103925minus 983769907317
droop controls can accomplish real and reactive power sharing
and the operation frequency 1038389 and 983769907317 can be regulated back
to 1038389 983088 and 983769907317 983088 respectively in an autonomous manner
1038389 lowast 983101 1038389 983088 minus sdot 983080 983088 minus 983081 983083 1038389
983769907317 lowast 983101 983769907317 983088 minus sdot 9830801103925983088 minus1103925983081 983083 983769907317
907317 lowast 983101 907317 983088 983083
int 983769907317 lowast
(2)
983088 983101 9830801038389 983088 minus 1038389 983081
1103925983088 983101 1103925983080 983769907317 983088 minus
983769907317 983081
(3)
The main focus of this paper is to present an autonomous
grid synchronization method based on the existing minus 1038389
droop and 1103925 minus 983769907317 droop controls To accomplish the grid
synchronization the voltage magnitude equalization and phase
synchronization controllers are proposed as equation (4) and
equation (5)
983769907317 983101 sdot 907317 983083
int 907317 (4)
1038389 983101 sdot 983083
int
983101
983163 if 983101 983089983084
983088 if 983101 983088983086
(5)
Islanded mode
Phase
synchronization
Grid-connected mode
Grid Synchronization Method
Bypass switch closesGS
Power management control
Frequency restoration
Voltage magnitude
equalization
V restoration
time
Fig 5 Grid synchronization sequence
The voltage magnitude equalization is designed to main-
tain 907317 to 983088 907317 transmitted from the main controller
represents the voltage magnitude difference between 907317 1103925 and
907317 10383891038389 and it can be regulated by lifting up or pulling down
all the DERCsrsquo operation voltage magnitudes at the same
speed Therefore 983769907317 in equation (4) representing the voltage
magnitude change with respect to the time variation is derived
from the PI regulation of 907317 and injected to the 1103925minus
983769907317
droop control in equation (2) to achieve the voltage magnitude
equalization In the same manner the phase synchronization is
implemented by injecting 1038389 the the PI regulation of to
the minus1038389 droop control in equation (2) Because of the voltage
magnitude equalization and phase synchronization change all
DERCsrsquo voltage magnitudes and phase angles at the same
pace the relative voltage magnitude differences and phase
angle differences between all the DERCs are maintained such
that the real power and reactive power sharing results are not
affected during these operations
To complete the grid synchronization and minimize the
transient power flows at the instant of grid-connection the
operation frequency phase angle and voltage magnitude of
907317 10383891038389 should be regulated the same value as those of 907317 1103925before the bypass switch is closed Therefore the grid syn-
chronization sequence shown as Fig 5 is commanded from
the central console to control the operation modes of the grid
synchronization process
Fig 6 and Fig 7 show the aforementioned grid synchroniza-
tion process with the computer simulation Before 983101 983092983088 983155983141983139
the bypass switch is opened the DGS is operating in islanded
mode All the DERCs are controlled by minus 1038389 1103925 minus 983769907317 droop
controls to achieve power sharing As the DERCs are operated
745
8132019 06063844
httpslidepdfcomreaderfull06063844 47
Autonomous controller x
Voltage PI Controller
amp
Predictive Current
Controller
V diff
diff
G
GS V ref
MUX 1
0
diff
0 PI
GS
f S
Phase
synchronization
PS
Voltage magnitudeequalization
V diff PI V S
P-f droop P x
m x P 0x
f 0x
f x
f S f x
s
1
Q x
n x Q0x
V 0x V x
V 0x V x
V x V x
V S Q-V droop
0 V 0x K Qresx Q Rx
s
1 Q0x V x
V restoration
Frequency restoration
f 0x
f x
K Presx P Rx s
1 P 0x G
2
From Central
Console
From Main
Controller
Fig 4 Control block diagram of autonomous controller
0 10 20 30 40 50595
5975
60
6025
605
0 10 20 30 40 50minus02
minus01
0
01
02
03
0 10 20 30 40 50minus5
0
5
10
[ H z ]
[ r a d ]
[ V ]
Step load changes 1103925 983101 983089 Bypass switch closes
103838911039251103925
907317
907317
Time[sec]
Fig 6 The responses of main controller during grid synchronization process
in the 1103925 minus 983769907317 droop control where 983088 is assigned to 983769907317 983088 thereactive power sharing can be improved compared with the
reactive power sharing of 1103925 minus 907317 droop control [10] Owing
to that the operation of 1103925 minus 983769907317 droop control can result in
the output voltage variations of the DGS the engagement of
voltage magnitude equalization can regulate all the DERCsrsquo
voltage magnitudes at the same speed and thus maintain
the voltage magnitude of DGS without disturbing the power
sharing results Also the frequency restoration is activated
by assigning 1103925
983090 to 1038389 983088 to maintain the operation frequency
of PCC ( 10383891038389 983101 9830901038389 10383891038389 ) the same as that of utility
grid (1103925 983101 9830901038389 1103925) Note that a step load change from
983090983089983088983088983127 983083 983089983088983088983088 983126983105983122 to 983091983089983088983088983127 983083 983089983088983088983088 983126983105983122 occurs at
983101 983089983093 983155983141983139
To satisfy the necessity for grid-connection the phase angleof PCC ( 10383891038389 ) needs to be synchronized to the phase angle
of utility grid (1103925) At 983101 983091983088983155983141983139 DGS starts to synchronize
10383891038389 to 1103925 by transmitting the enabling signal to every
autonomous controller of DERC from the central console All
the DERCs in DGS then start to adjust their phase angles at
the same speed by 1038389 983089 and 1038389 983090 which is generated by the PI
regulation of the input variable as shown in Fig 7(a)
In the end ℎ10383891038389 can be regulated to 983088 which means
10383891038389 is aligned to 1103925 as 1038389 983089 and 1038389 983090 is backed and kept at
0 10 20 30 40 500
1000
2000
3000
0 10 20 30 40 505999
59995
60
60005
0 10 20 30 40 50minus002
0
002
004
006
[ W ]
[ H z ]
[ H z ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
1
2
1 2
Time[sec]
(a)
0 10 20 30 40 500
300
600
900
1200
0 10 20 30 40 50minus2
minus1
0
1
0 10 20 30 40 50minus5
0
5
10
0 10 20 30 40 50179
181
183
185
187
[ V A R ]
[ V s e c ]
[ V s e c ]
[
V ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
983769 1
983769 2
983769 1 983769 2
lowast
1 lowast2
Time[sec]
(b)
Fig 7 The responses of DERCs during grid synchronization process
746
8132019 06063844
httpslidepdfcomreaderfull06063844 57
983088 The power sharing results are also not affected during the
operation of phase angle synchronization
After the frequency voltage magnitude and phase angle
of 907317 10383891038389 and 907317 1103925 are synchronized as shown in Fig 6 the
bypass switch is closed at 983101 983092983088983155983141983139 by transmitting an
enable signal from central console and the DGS goes into
the grid-connected mode with tolerable transients power flowsThe grid synchronization process shown in Fig 7 verify that
the operation of minus 1038389 1103925 minus 983769907317 droop controlled DGS can
be transferred from islanded mode to grid-connected mode
without affecting the original power sharing results by the
proposed grid synchronization method
IV EXPERIMENTAL T EST R ESULTS
The DGS test benches are constructed to validate the effec-
tiveness of the proposed grid synchronization control method
The system configuration is the same as shown in Fig 1 and
the detailed descriptions of this DGS are stated as follows
∙ The system voltage is 907317 minus 983101 983090983090983088 983126983154983149983155 and the
frequency is 983094983088983112983162 Two DERCs are constructed in thisDGS and their power line impedances are set as 983089 983083 983089 983101 983088983086983090 983083 983088983086983091983095983095Ω and 983090 983083 983090 983101 983088983086983090 983083 983088983086983091983095983095Ω
The total of load of 983096983088983088 983127 is applied
∙ The DERCs are three-phase hard-switched PWM con-
verters whose switching frequency 1038389 ℎ 983101 983089983088983147983112983162
output filter inductor 983101 983090983149983112 output filter capacitor
983101 983089983088 983110 The DC bus voltage of DERC is supported
by DC power supply 62024P-600-8
∙ The main controller and the autonomous controllers
are implemented with the digital signal processor
TMS320F28335 and the sampling frequency is pro-
grammed at 1038389 907317 983101 983090983088983147983112983162 The coefficients of
main controller and autonomous controllers are given in
TABLE I∙ The bypass switch in Fig 1 can be implemented with
different topologies [14] [15] and the circuit breaker-
based (CB-based) switch is adopted in this experimental
test benches
∙ The communication interfaces are implemented with RS-
232 to transmit and receive data among the central con-
sole main controller and autonomous controllers The
bandwidth of these communication units are set at about
983096983088983112983162
Fig 8 shows the experimental test results of the proposed
grid synchronization method The detected information (1103925
10383891038389 and 907317 ) in the main controller shown in
Fig 8(a) are to investigate the operations and responses of
proposed grid synchronization method As these two DERCsin DGS are connected and operated in the islanded mode the
minus 1038389 droop control in every autonomous controller works
individually and then the operation frequency of the PCC
( 10383891038389 ) is internally decided and deviated from the utility
frequency 1103925 This operation frequency difference between
10383891038389 and 1103925 results in the variation of before the
frequency restoration is activated This variation is stopped
and controlled as long as the frequency restoration is activated
and the 10383891038389 is regulated the same as 1103925 as shown in
377
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
377
0
G
PCC
diff
10V
2 DERCs
are connected
V diff
4rad
4radsec
4radsec
(a) Detected information in the main controller ( 1038389 11039251103925 X-axis 298308810383899830871103925907317Y-axis 4110392598308710383899830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 411039259830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 19830889830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 1
Q1
1
1000VAR
4radsec
4VsecV 1
2 DERCs
are connected
(b) Responses in the DERC1 ( 1 X-axis 2983088
10383899830871103925907317 Y-axis 1983088983088983088
98308711039259073171 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
1 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast1
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 2
Q2
2
1000VAR
4radsec
4VsecV 2
2 DERCs
are connected
(c) Responses in the DERC2 ( 2 X-axis 298308810383899830871103925907317 Y-axis 198308898308898308898308711039259073172 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
2 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast2
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
Fig 8 Experimental test results of grid synchronization process
747
8132019 06063844
httpslidepdfcomreaderfull06063844 67
TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 4: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/4.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 47
Autonomous controller x
Voltage PI Controller
amp
Predictive Current
Controller
V diff
diff
G
GS V ref
MUX 1
0
diff
0 PI
GS
f S
Phase
synchronization
PS
Voltage magnitudeequalization
V diff PI V S
P-f droop P x
m x P 0x
f 0x
f x
f S f x
s
1
Q x
n x Q0x
V 0x V x
V 0x V x
V x V x
V S Q-V droop
0 V 0x K Qresx Q Rx
s
1 Q0x V x
V restoration
Frequency restoration
f 0x
f x
K Presx P Rx s
1 P 0x G
2
From Central
Console
From Main
Controller
Fig 4 Control block diagram of autonomous controller
0 10 20 30 40 50595
5975
60
6025
605
0 10 20 30 40 50minus02
minus01
0
01
02
03
0 10 20 30 40 50minus5
0
5
10
[ H z ]
[ r a d ]
[ V ]
Step load changes 1103925 983101 983089 Bypass switch closes
103838911039251103925
907317
907317
Time[sec]
Fig 6 The responses of main controller during grid synchronization process
in the 1103925 minus 983769907317 droop control where 983088 is assigned to 983769907317 983088 thereactive power sharing can be improved compared with the
reactive power sharing of 1103925 minus 907317 droop control [10] Owing
to that the operation of 1103925 minus 983769907317 droop control can result in
the output voltage variations of the DGS the engagement of
voltage magnitude equalization can regulate all the DERCsrsquo
voltage magnitudes at the same speed and thus maintain
the voltage magnitude of DGS without disturbing the power
sharing results Also the frequency restoration is activated
by assigning 1103925
983090 to 1038389 983088 to maintain the operation frequency
of PCC ( 10383891038389 983101 9830901038389 10383891038389 ) the same as that of utility
grid (1103925 983101 9830901038389 1103925) Note that a step load change from
983090983089983088983088983127 983083 983089983088983088983088 983126983105983122 to 983091983089983088983088983127 983083 983089983088983088983088 983126983105983122 occurs at
983101 983089983093 983155983141983139
To satisfy the necessity for grid-connection the phase angleof PCC ( 10383891038389 ) needs to be synchronized to the phase angle
of utility grid (1103925) At 983101 983091983088983155983141983139 DGS starts to synchronize
10383891038389 to 1103925 by transmitting the enabling signal to every
autonomous controller of DERC from the central console All
the DERCs in DGS then start to adjust their phase angles at
the same speed by 1038389 983089 and 1038389 983090 which is generated by the PI
regulation of the input variable as shown in Fig 7(a)
In the end ℎ10383891038389 can be regulated to 983088 which means
10383891038389 is aligned to 1103925 as 1038389 983089 and 1038389 983090 is backed and kept at
0 10 20 30 40 500
1000
2000
3000
0 10 20 30 40 505999
59995
60
60005
0 10 20 30 40 50minus002
0
002
004
006
[ W ]
[ H z ]
[ H z ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
1
2
1 2
Time[sec]
(a)
0 10 20 30 40 500
300
600
900
1200
0 10 20 30 40 50minus2
minus1
0
1
0 10 20 30 40 50minus5
0
5
10
0 10 20 30 40 50179
181
183
185
187
[ V A R ]
[ V s e c ]
[ V s e c ]
[
V ]
Step load changes 1103925 983101 983089 Bypass switch closes
1
2
983769 1
983769 2
983769 1 983769 2
lowast
1 lowast2
Time[sec]
(b)
Fig 7 The responses of DERCs during grid synchronization process
746
8132019 06063844
httpslidepdfcomreaderfull06063844 57
983088 The power sharing results are also not affected during the
operation of phase angle synchronization
After the frequency voltage magnitude and phase angle
of 907317 10383891038389 and 907317 1103925 are synchronized as shown in Fig 6 the
bypass switch is closed at 983101 983092983088983155983141983139 by transmitting an
enable signal from central console and the DGS goes into
the grid-connected mode with tolerable transients power flowsThe grid synchronization process shown in Fig 7 verify that
the operation of minus 1038389 1103925 minus 983769907317 droop controlled DGS can
be transferred from islanded mode to grid-connected mode
without affecting the original power sharing results by the
proposed grid synchronization method
IV EXPERIMENTAL T EST R ESULTS
The DGS test benches are constructed to validate the effec-
tiveness of the proposed grid synchronization control method
The system configuration is the same as shown in Fig 1 and
the detailed descriptions of this DGS are stated as follows
∙ The system voltage is 907317 minus 983101 983090983090983088 983126983154983149983155 and the
frequency is 983094983088983112983162 Two DERCs are constructed in thisDGS and their power line impedances are set as 983089 983083 983089 983101 983088983086983090 983083 983088983086983091983095983095Ω and 983090 983083 983090 983101 983088983086983090 983083 983088983086983091983095983095Ω
The total of load of 983096983088983088 983127 is applied
∙ The DERCs are three-phase hard-switched PWM con-
verters whose switching frequency 1038389 ℎ 983101 983089983088983147983112983162
output filter inductor 983101 983090983149983112 output filter capacitor
983101 983089983088 983110 The DC bus voltage of DERC is supported
by DC power supply 62024P-600-8
∙ The main controller and the autonomous controllers
are implemented with the digital signal processor
TMS320F28335 and the sampling frequency is pro-
grammed at 1038389 907317 983101 983090983088983147983112983162 The coefficients of
main controller and autonomous controllers are given in
TABLE I∙ The bypass switch in Fig 1 can be implemented with
different topologies [14] [15] and the circuit breaker-
based (CB-based) switch is adopted in this experimental
test benches
∙ The communication interfaces are implemented with RS-
232 to transmit and receive data among the central con-
sole main controller and autonomous controllers The
bandwidth of these communication units are set at about
983096983088983112983162
Fig 8 shows the experimental test results of the proposed
grid synchronization method The detected information (1103925
10383891038389 and 907317 ) in the main controller shown in
Fig 8(a) are to investigate the operations and responses of
proposed grid synchronization method As these two DERCsin DGS are connected and operated in the islanded mode the
minus 1038389 droop control in every autonomous controller works
individually and then the operation frequency of the PCC
( 10383891038389 ) is internally decided and deviated from the utility
frequency 1103925 This operation frequency difference between
10383891038389 and 1103925 results in the variation of before the
frequency restoration is activated This variation is stopped
and controlled as long as the frequency restoration is activated
and the 10383891038389 is regulated the same as 1103925 as shown in
377
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
377
0
G
PCC
diff
10V
2 DERCs
are connected
V diff
4rad
4radsec
4radsec
(a) Detected information in the main controller ( 1038389 11039251103925 X-axis 298308810383899830871103925907317Y-axis 4110392598308710383899830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 411039259830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 19830889830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 1
Q1
1
1000VAR
4radsec
4VsecV 1
2 DERCs
are connected
(b) Responses in the DERC1 ( 1 X-axis 2983088
10383899830871103925907317 Y-axis 1983088983088983088
98308711039259073171 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
1 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast1
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 2
Q2
2
1000VAR
4radsec
4VsecV 2
2 DERCs
are connected
(c) Responses in the DERC2 ( 2 X-axis 298308810383899830871103925907317 Y-axis 198308898308898308898308711039259073172 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
2 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast2
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
Fig 8 Experimental test results of grid synchronization process
747
8132019 06063844
httpslidepdfcomreaderfull06063844 67
TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 5: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/5.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 57
983088 The power sharing results are also not affected during the
operation of phase angle synchronization
After the frequency voltage magnitude and phase angle
of 907317 10383891038389 and 907317 1103925 are synchronized as shown in Fig 6 the
bypass switch is closed at 983101 983092983088983155983141983139 by transmitting an
enable signal from central console and the DGS goes into
the grid-connected mode with tolerable transients power flowsThe grid synchronization process shown in Fig 7 verify that
the operation of minus 1038389 1103925 minus 983769907317 droop controlled DGS can
be transferred from islanded mode to grid-connected mode
without affecting the original power sharing results by the
proposed grid synchronization method
IV EXPERIMENTAL T EST R ESULTS
The DGS test benches are constructed to validate the effec-
tiveness of the proposed grid synchronization control method
The system configuration is the same as shown in Fig 1 and
the detailed descriptions of this DGS are stated as follows
∙ The system voltage is 907317 minus 983101 983090983090983088 983126983154983149983155 and the
frequency is 983094983088983112983162 Two DERCs are constructed in thisDGS and their power line impedances are set as 983089 983083 983089 983101 983088983086983090 983083 983088983086983091983095983095Ω and 983090 983083 983090 983101 983088983086983090 983083 983088983086983091983095983095Ω
The total of load of 983096983088983088 983127 is applied
∙ The DERCs are three-phase hard-switched PWM con-
verters whose switching frequency 1038389 ℎ 983101 983089983088983147983112983162
output filter inductor 983101 983090983149983112 output filter capacitor
983101 983089983088 983110 The DC bus voltage of DERC is supported
by DC power supply 62024P-600-8
∙ The main controller and the autonomous controllers
are implemented with the digital signal processor
TMS320F28335 and the sampling frequency is pro-
grammed at 1038389 907317 983101 983090983088983147983112983162 The coefficients of
main controller and autonomous controllers are given in
TABLE I∙ The bypass switch in Fig 1 can be implemented with
different topologies [14] [15] and the circuit breaker-
based (CB-based) switch is adopted in this experimental
test benches
∙ The communication interfaces are implemented with RS-
232 to transmit and receive data among the central con-
sole main controller and autonomous controllers The
bandwidth of these communication units are set at about
983096983088983112983162
Fig 8 shows the experimental test results of the proposed
grid synchronization method The detected information (1103925
10383891038389 and 907317 ) in the main controller shown in
Fig 8(a) are to investigate the operations and responses of
proposed grid synchronization method As these two DERCsin DGS are connected and operated in the islanded mode the
minus 1038389 droop control in every autonomous controller works
individually and then the operation frequency of the PCC
( 10383891038389 ) is internally decided and deviated from the utility
frequency 1103925 This operation frequency difference between
10383891038389 and 1103925 results in the variation of before the
frequency restoration is activated This variation is stopped
and controlled as long as the frequency restoration is activated
and the 10383891038389 is regulated the same as 1103925 as shown in
377
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
377
0
G
PCC
diff
10V
2 DERCs
are connected
V diff
4rad
4radsec
4radsec
(a) Detected information in the main controller ( 1038389 11039251103925 X-axis 298308810383899830871103925907317Y-axis 4110392598308710383899830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 411039259830871103925907317 907317 X-axis 298308810383899830871103925907317 Y-axis 19830889830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 1
Q1
1
1000VAR
4radsec
4VsecV 1
2 DERCs
are connected
(b) Responses in the DERC1 ( 1 X-axis 2983088
10383899830871103925907317 Y-axis 1983088983088983088
98308711039259073171 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
1 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast1
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
0
020sec
Voltage magnitude equalization
Frequency
restoration
Phase angle
synchronization
Bypass switch
is closed
0
377
1000W P 2
Q2
2
1000VAR
4radsec
4VsecV 2
2 DERCs
are connected
(c) Responses in the DERC2 ( 2 X-axis 298308810383899830871103925907317 Y-axis 198308898308898308898308711039259073172 X-axis 298308810383899830871103925907317 Y-axis 1983088983088983088 9830871103925907317 lowast
2 X-axis 298308810383899830871103925907317 Y-axis
4110392598308710383899830871103925907317 983769 lowast2
X-axis 298308810383899830871103925907317 Y-axis 498308710383899830871103925907317)
Fig 8 Experimental test results of grid synchronization process
747
8132019 06063844
httpslidepdfcomreaderfull06063844 67
TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 6: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/6.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 67
TABLE IRELATED PARAMETERS OF MAIN CONTROLLER AND AUTONOMOUS
CONTROLLERS
Main controller
PLL 983101 9830889830869830882983093 983101 1
Autonomous controllers
minus droop control 1 983101 2 983101 minus983091 times 1983088minus6 983154983137983140983087983114
minus 983769 droop control 1 983101 2 983101 minus983093 times 1983088minus4 1983087983105983155983141983139
Frequency restoration 10383891 1 983101 10383892 2 983101 66666
983769 restoration 11 983101 22 983101 4983088983088
Phase angle synchronization 983101 983088983086983088983096 983101 98308898308616
Voltage magnitude equalization 983101 9830889830864 983101 983088983086983091983093
Synchronous voltage PI controller 983101 983088983086983088983091 983101 4
Predictive current controller 1103925 983101 983091983088
Fig 8(a) 907317 and can then be regulated to 983088 by the
operation of voltage magnitude equalization and phase angle
synchronization respectively Note that 10383891038389 is increased to
be higher than 1103925 by the PI-based phase angle synchronization
to reduce the phase angle difference and then 10383891038389 and1103925 are the same again after the phase angle difference
is decreased and controlled at 983088
Fig 8(b) and Fig 8(c) show the DERC1 and DERC2rsquos
output power flow ( 1103925) and their operation frequency and983769907317 commands ( 983769907317 ) individually lowast is the combination
of minus 1038389 droop controlrsquos output 9830901038389 and the phase angle
synchronizationrsquos output 9830901038389 as shown in Fig 4 and 983769907317 lowastis the combination of 1103925 minus
983769907317 droop controlrsquos output 983769907317 and
the voltage magnitude equalizationrsquos output 983769907317 As shown in
Fig 8(b) and Fig 8(c) the DERCsrsquo lowast and 983769907317 lowast can be affected
by the operation of voltage magnitude equalization and phase
angle synchronization individually and their phase angle and
voltage magnitude of output voltages are accordingly affected
However these DERCs operate these grid synchronizationcontrols at the same instant and change the phase angle and
voltage magnitude of different DERCs at the same speed
Therefore the original power sharing results of islanded
operation is not affected during these grid synchronization
operations as shown in Fig 8(b) and Fig 8(c)
After the frequencies voltage magnitudes and phase angles
of the utility grid and the PCC are regulated and synchronized
the same the central console send out the enabling signal and
the bypass switch is then closed As shown in Fig 8(b) and
Fig 8(c) the power flow of these DERCs are still maintained
after DGS is operated in the grid-connected mode and their
transient power flows are mitigated by the proposed grid
synchronization method
Fig 9 compares the line-to-line voltage of the utility gridPCC DERC1 and DERC2 at different instance Note that
only a-to-b voltages are shown in Fig 9 Before the volt-
age magnitude equalization is activated the voltage magni-
tude of utility grid and PCC are 907317 1103925983084907317 983101 983090983089983090983086983094 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983088983094983086983095 983126983154983149983155 This voltage magnitude difference
can be pull back by the voltage magnitude equalization and
these voltage magnitudes become 907317 1103925983084907317 983101 983090983089983092983086983088 983126983154983149983155 and
907317 10383891038389983084907317 983101 983090983089983093983086983088 983126983154983149983155 However the phase angle of 907317 1103925983084907317
leads that of 907317 10383891038389983084907317 at 983096983093983086983096∘ By using the phase angle
synchronization this phase angle difference is regulated and
decreased as shown in Fig 9 and then the bypass switch
is closed as the voltage magnitude and the phase angles are
synchronized
V CONCLUSION
The minus 1038389 1103925 minus 983769907317 droop controls have been proposed
and discussed for their insensitivity to the unequal line
impedances and improved power sharing capability This paper
presents the grid synchronization for minus 1038389 1103925 minus 983769907317 droop
controlled DGS The proposed grid synchronization method
allows all the minus 1038389 1103925 minus 983769907317 droop controlled DERCs to
adjust their frequencies voltage magnitudes and phase an-
gles synchronously The relative differences between DERCsrsquo
voltage magnitudes and phase angles are not affected and the
original power sharing results under islanded operation mode
can be maintained during grid synchronization process Thus
the proposed method allows the multi-converter oriented DGS
to be changed from islanded mode to grid-connected mode
with negligible transient power flows and without affecting
the original droop controlled power sharing results to achieve
a smooth mode transfer Simulation and laboratory test results
are also presented to show effectiveness of this work
ACKNOWLEDGMENT
This research is funded by the National Science Council of
Taiwan under grant NSC-98-3114-E-007-004
REFERENCES
[1] R Lasseter ldquoMicrogridsrdquo in Proc IEEE Power Engineering SocietyWinter Meeting 2002 pp 305ndash308
[2] M Barnes J Kondoh H Asano J Oyarzabal G VentakaramananR Lasseter N Hatziargyriou and T Green ldquoReal-world microgrids-
an overviewrdquo in IEEE International Conference on System of Systems Engineering 2007 pp 1ndash8[3] F Katiraei R Iravani N Hatziargyriou and A Dimeas ldquoMicrogrids
managementrdquo IEEE Power and Energy Magazine vol 6 no 3 pp54ndash65 MayJun 2008
[4] C L Chen Y Wang J S Lai Y S Lee and D Martin ldquoDesignof parallel inverters for smooth mode transfer microgrid applicationsrdquo
IEEE Transactions on Power Electronics vol 25 no 1 pp 6ndash15 Jan2010
[5] M C Chandrokar D M Divan and R Adapa ldquoControl of parallelconnected inverters in standalone ac supply systemsrdquo IEEE Transactionson Industry Applications vol 29 no 1 pp 136ndash143 JanFeb 1993
[6] M C Chandrokar D M Divan and B Banerjee ldquoControl of distributedups systemsrdquo in Proc IEEE Power Electronics Specialists Conference1994 pp 197ndash204
[7] P Piagi and R Lasseter ldquoAutonomous control of microgridsrdquo in Proc IEEE Power Engineering Society General Meeting 2006 p 8pp
[8] J M Guerrero L G de Vicuna J Matas M Castilla and J MiretldquoOutput impedance design of parallel-connected ups inverters with wire-
less load-sharing controlrdquo IEEE Transactions on Industrial Electronicsvol 52 no 4 pp 1126ndash1135 Aug 2005
[9] C K Sao and P W Lehn ldquoAutonomous load sharing of voltage sourceconvertersrdquo IEEE Transactions on Power Delivery vol 20 no 2 pp1009ndash1016 Apr 2005
[10] C T Lee C C Chu and P T Cheng ldquoA new droop control methodfor the autonomous operation of distributed energy resource interfaceconvertersrdquo in Proc IEEE Energy Conversion Congress and Exposition(ECCE) 2010 pp 702ndash709
[11] F Blaabjerg R Teodorescu M Liserre and A V Timbus ldquoOverviewof control and grid synchronization for distributed power generationsystemsrdquo IEEE Transactions on Industrial Electronics vol 53 no 5pp 1398ndash1409 Oct 2006
748
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749
![Page 7: 06063844](https://reader031.vdocuments.us/reader031/viewer/2022021323/577cd4281a28ab9e7897cec6/html5/thumbnails/7.jpg)
8132019 06063844
httpslidepdfcomreaderfull06063844 77
0
0
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
V Gab V PCCab
V DERC1ab V DERC2ab
Before voltage magnitude equalization After voltage magnitude equalization After phase angle synchronization After grid connection
Islanded mode
Phase
synchronization
Grid-connected mode
Bypass switch closes
Frequency
restoration
Voltage magnitude
equalizationtime
P-f Q-V
droop control
10msec200V
10msec200V
10msec200V
10msec200V
0
Fig 9 The variations of line-to-line voltage of the utility grid PCC DERC1 and DERC2 during the grid synchronization process ( 983084 103838911039251103925983084 1103925 1983084 1103925 2983084 X-axis 198308810383899830871103925907317 Y-axis 29830889830889830871103925907317)
[12] J M Guerrero J C Vasquez J Matas L G de Vicuna and M CastillaldquoHierarchical control of droop-controlled ac and dc microgrids-a generalapproach toward standardizationrdquo IEEE Transactions on Industrial
Electronics vol 58 no 1 pp 158ndash172 Jan 2011[13] L N Arruda S M Silva and B J C Filho ldquoPll structures for utility
connected systemsrdquo in Proc IEEE Industry Applications ConferenceThirty-Sixth IAS Annual Meeting 2001 pp 2655ndash2660
[14] B Kroposki C Pink J Lynch V John S M Dandiel E Benedict andI Vihinen ldquoDevelopement of a high-speed static switch for distributedenergy and microgrid applicationsrdquo in Power Conversion Conference -
Nagoya 2007 PCC rsquo07 Apr 2007 pp 1418ndash1423[15] Z Yang H Liao C Wu and H Xu ldquoAnalysis and selection of switch
for double modes inverter in micro-grid systemrdquo in Electrical Machinesand Systems 2008 ICEMS 2008 International Conference on Oct2008 pp 1778ndash1781
749