04/26/2006 VLSI Design & Test Seminar Series

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Phase Delay in MAC-based Analog Phase Delay in MAC-based Analog Functional Testing in Mixed-Signal Functional Testing in Mixed-Signal

SystemsSystemsJie Qin, Charles Stroud, and Foster DaiJie Qin, Charles Stroud, and Foster Dai

Dept. of Electrical and Computer EngineeringDept. of Electrical and Computer Engineering200 Broun Hall, Auburn University, AL 36849-5201200 Broun Hall, Auburn University, AL 36849-5201

emails: qinjie1/strouce/daifa01@auburn.eduemails: qinjie1/strouce/daifa01@auburn.edu

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OutlineOutlineMotivation and BackgroundMotivation and BackgroundBuilt-In Self-Test ArchitectureBuilt-In Self-Test ArchitecturePhase Delay in the MAC-based ORAPhase Delay in the MAC-based ORAExperimental ResultsExperimental ResultsConclusionsConclusions

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Motivation and BackgroundMotivation and BackgroundWhy mixed-signal BIST?Why mixed-signal BIST?The increasing cost of functionality test based The increasing cost of functionality test based

on the traditional methodology of external test on the traditional methodology of external test equipment for modern mixed-signal ICs. equipment for modern mixed-signal ICs.

The increasing difficulty to perform test on The increasing difficulty to perform test on these ICs.these ICs.With a rapidly increasing level of integration, the With a rapidly increasing level of integration, the

number of input/output (IO) pins does not increase number of input/output (IO) pins does not increase accordingly.accordingly.

The operational frequency of latest analog ICs at The operational frequency of latest analog ICs at GHz requires tester electronics very close to the GHz requires tester electronics very close to the DUT. DUT.

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Motivation and Background (cont.)Motivation and Background (cont.)What should a mixed-signal BIST be?What should a mixed-signal BIST be?It can extract the frequency spectrum information of the It can extract the frequency spectrum information of the

signal coming from the DUT.signal coming from the DUT.Linearity MeasurementLinearity MeasurementFrequency ResponseFrequency ResponseSignal-to-Noise Ratio MeasurementSignal-to-Noise Ratio Measurement

It should be implemented using simple circuitry with It should be implemented using simple circuitry with small area penalty and should not cause performance small area penalty and should not cause performance penalty to analog circuitry.penalty to analog circuitry.

The conventional way to obtain the frequency The conventional way to obtain the frequency spectrum is FFT. However, the area penalty and spectrum is FFT. However, the area penalty and power consumption introduced by a FFT power consumption introduced by a FFT processor is not what a BIST expectsprocessor is not what a BIST expects..

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Motivation and Background (cont.)Motivation and Background (cont.)The BIST approach based on the DDS-The BIST approach based on the DDS-

based TPG and MAC-based ORA was based TPG and MAC-based ORA was proposed.proposed.DDS-based TPG can generate various DDS-based TPG can generate various

waveforms which is required for the linearity, waveforms which is required for the linearity, frequency response, and SNR measurement. frequency response, and SNR measurement.

MAC-based ORA could be realized in a much MAC-based ORA could be realized in a much simpler, cheaper and more flexible circuit, simpler, cheaper and more flexible circuit, compared with the FFT-based ORA. compared with the FFT-based ORA.

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Built-In Self-Test ArchitectureBuilt-In Self-Test Architecture

Most of the BIST circuitry resides in the digital portion of the mixed-signal Most of the BIST circuitry resides in the digital portion of the mixed-signal system. In such a way, the performance penalty are minimized.system. In such a way, the performance penalty are minimized.

The number and location of the MUX inserted to the system determines the The number and location of the MUX inserted to the system determines the accuracy of the analog functional measurements.accuracy of the analog functional measurements.

Am

p

Test Controller

MU

X1

MU

X2

NCO1

NCO2

NCO3

Sin(2f1’nTclk+1)f1

’, 1

Sin(2f2’nTclk+2)f2

’, 2

f3’, 3 Sin(2f3

’nTclk+3)

DAC

DUTMU

X3

ADC

MUX4

Accm1

Accm2

DC1

DC2

MUL1

MUL2

f1(nTclk)

f2(nTclk)

f(nTclk)Test Pattern Generator (TPG)

Output Response Analyzer (ORA)

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MAC-based ORAMAC-based ORA While performing the analog functional testing, the DCWhile performing the analog functional testing, the DC11

and DCand DC22 accumulator values can be described as accumulator values can be described as

2DC ( ) sin( )clk clkn

f nT nT

1DC ( ) cos( )clk clkn

f nT nT

Then the the signal Then the the signal f(nTf(nTclkclk))’s Fourier Transform ’s Fourier Transform F(F()) can can

be expressed through DCbe expressed through DC11 and DC and DC22

( )1 2( ) ( ) ( ) ( ) ( )clkj nT j

clkn

F f nT e DC j DC A e The magnitude response The magnitude response A(A()) and the phase delay and the phase delay ΔΦΔΦ

(() ) are the two parameters widelyare the two parameters widely used much more widelused much more widely in functional measurements of analog circuits.y in functional measurements of analog circuits.

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Phase Delay in MAC-based ORAPhase Delay in MAC-based ORA How can the phase delay be evaluated?How can the phase delay be evaluated?

1 2

1

( )( )

( )

DCtg

DC

For an on-chip test, we don’t have to set up a full-length For an on-chip test, we don’t have to set up a full-length arctanarctan look-up table (LUT) to calculate look-up table (LUT) to calculate ΔΦΔΦ((). ). First the absolute phase offset First the absolute phase offset ΔΦΔΦoo(() ) need to be calculated acneed to be calculated ac

cording to the following formula:cording to the following formula:

211 2

1

111 2

2

( )( ) ( )

( )( )

( )( ) ( )

( )

o

DCtg DC DC

DC

DCtg DC DC

DC

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Phase Delay in MAC-based ORA (conPhase Delay in MAC-based ORA (cont.)t.)

Then the phase delay can be determined through the absolute phThen the phase delay can be determined through the absolute phase offset ase offset ΔΦΔΦoo(() ) according to the following table:according to the following table:

|DC1|≥| DC2| |DC1|≤| DC2|

DC1>0; DC2>0

DC1>0; DC2<0

DC1<0; DC2>0

DC1<0; DC2<0 The The arctanarctan look-up table (LUT) can be decreased by half because look-up table (LUT) can be decreased by half because

the value range of the value range of ΔΦΔΦoo(() ) varies from 0varies from 0 to 45 to 45.. when DCwhen DC22/DC/DC11 is v is v

ery small, the ery small, the arctan(arctan(DCDC22/DC/DC11) can be represented by the ratio of t) can be represented by the ratio of t

he DChe DC22/DC/DC11. So the length of the arctan look-up table (LUT) can b. So the length of the arctan look-up table (LUT) can b

e compressed further. e compressed further.

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Phase Delay in MAC-based ORA (conPhase Delay in MAC-based ORA (cont.)t.)

Once the phase delay is identified, the magnitude Once the phase delay is identified, the magnitude response response A(A()) can be calculated through the following can be calculated through the following approaches. approaches. Approach #1Approach #1

Approach #2Approach #2

Approach #3Approach #3

( )( ) ( ) ( ) cos( ( ))jclk clk

n

A F e f nT nT

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Phase Delay in MAC-based ORA (conPhase Delay in MAC-based ORA (cont.)t.)

Pros and cons of the three approaches Pros and cons of the three approaches

Approach # 1 # 2 # 3

Hardware overhead

low high high

speed low high high

constraintsIt cannot be used for SNR

Measurement.no no

propagation error

yes yes no

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Experimental Results IExperimental Results IThe phase delay introduced by the digital The phase delay introduced by the digital

portion of the BIST circuitry.portion of the BIST circuitry.

phase error due to the delay in TPGphase error due to the delay in TPG phase error with delay removedphase error with delay removed

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Experimental Results IIExperimental Results IIThe phase delay introduced by the The phase delay introduced by the

ADC/DAC pairADC/DAC pair

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Experimental Result IIIExperimental Result IIIThe resources used by the MAC-based ORA.The resources used by the MAC-based ORA.

# of input bits, N

8 12 16

# of outp

ut b

its, M

28 74 129 -

32 76 131 204

36 78 133 206

40 80 135 208

44 82 137 210

# of input bits, N

8 12 16

# of outp

ut b

its, M

28 139 244 -

32 143 248 387

36 147 252 391

40 151 256 395

44 155 260 399

Number of slices vs. MAC configurationNumber of slices vs. MAC configuration Number of LUTs vs. MAC configurationNumber of LUTs vs. MAC configuration

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Experimental Result IVExperimental Result IVThe resources used by a FFT-processorThe resources used by a FFT-processor

Type# of

slices# of 1818-bit

multiplierstransform

frequency

Pipelined 2633 12 641 kHz

Burst I/O 2743 9 313 kHz

Minimum Resources

1412 3 133 kHz

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Comparison of the MAC-based ORA Comparison of the MAC-based ORA and FFT-based ORAand FFT-based ORA

MAC-based ORA is much simpler and MAC-based ORA is much simpler and cheaper.cheaper.

MAC-based ORA is more flexible.MAC-based ORA is more flexible.the frequency resolution can be easily tuned the frequency resolution can be easily tuned

with the step size of the sweeping frequency; with the step size of the sweeping frequency; it can measure the interested spectrum it can measure the interested spectrum

information at several frequency points or in a information at several frequency points or in a narrow bandwidth easily. narrow bandwidth easily.

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ConclusionConclusionphase delay is very important to the implephase delay is very important to the imple

mentation and accuracy of the MAC-based mentation and accuracy of the MAC-based ORA. ORA.

In comparison with the FFT-based approaIn comparison with the FFT-based approach, the MAC-based ORA can be realized uch, the MAC-based ORA can be realized using much more flexible and simpler BIST sing much more flexible and simpler BIST circuitry with less area penalty, which is wcircuitry with less area penalty, which is what an ideal BIST scheme is supposed to hat an ideal BIST scheme is supposed to be. be.