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8*21(+* I02(4*4 0: @'L -.#D,5 EF* 6T/ #,,, P6*HA0+? /+010203S

" 'Q*29U*4 /FH492>3 >:? 89:B 3>H*+4

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Q>+91H W91

" G91 +>1* -R# BG91X4 RRR -,R. BG91X4

# b*Q*:?*:1 0: ["\; :01 G(4

# Z>41*+ )(41 W* >W3* 10 F>:?3* )(3VQ3* W91 +>1*4

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/+010203

"

"0::*2V0: *41>W394F)*:1 P# N>+9>:14S# c G>(? 9:91

• Z>41*+ 4*:?4 ?*4V:>V0: >??+*44 P(49:C c G91X4S

• ["\ >:4A*+45 ,Occ P,-,-,-,-S; B*HA0+? 30A GH1*; B*HA0+? F9CF GH1*

PA91F ?*49+*? ?>1> +>1*S

• Z>41*+ ?*+9N*4 W91 +>1* I+0) Q>a*+:; 4*:?4 [2F0 P9:NR d9CF GH1*S

• ["\ 4*:?4 [2F0 P9:NR b*4V:>V0: >??+*44S

Adress byte

> 300ms ~ 2s < 300ms < 20ms

5 Bit/s Fixed bit rate, chosen by ECU, detected and adopted by master

K-Line

L-Line

Keyword LSB

Sync. Byte 55h

< 20ms

Inv. Keyword MSB

Keyword MSB

< 20ms < 50ms

Inverted Adress byte

Adress byte

Tester ECU ! Tester ECU ! ECU Tester ! ECU Tester !

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• Z>41*+ 4*:?4 !"#$ &' Q>a*+: P#c )4 30A; #c )4 Q>(4*S

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•

6*HA0+? *:20?*4 4(QQ0+1*? Q+010203 N>+9>:141>B*4 N>3(*4 I+0) #,,, RR #,D- P6T/ #,,,S

Start Communication Service Request

Start Communication Service Request

> 55ms 25ms 25ms < 50ms

(w/ Keyword)

Wake Up Fixed Bit Rate 10,4 kbit/s

K-Line

L-Line

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f0+)>1 GH1*# [:20?*4 Q+*4*:2* >:? )*>:9:C 0I >??+*44 WH1*4

# 'F0+1 Q>2B*1 3*:C1F 2>: W* *:20?*? 9: I0+)>1 WH1*k 3*:C1F WH1* 1F*:

0)9a*?

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'0(+2* >??+*44

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# \Q 10 #cc GH1*

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"

"F*2B4()

# '() 0I >33 GH1*4 P)0? #ceS

0 .. 7 8 .. 15

Format byte Destination

Source Length

Payload...

... Checksum

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[++0+ F>:?39:C

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# V0: 3>H*+ 4*:?4 :*C>VN* +*Q3H

# Z>41*+ X ["\ 2>: +*>21 >220+?9:C3H

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# 8*:C1F WH1* :*N*+ 9:23(?*?

#

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# \Q 10 --, :0?*4

# OR c,,)

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H45

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EA0 49C:>3 3*N*34# 30A P?0)9:>:1S

# F9CF P+*2*449N*S

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EF* "

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# G+>:2F 39:*4 )>OR D, 2)

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W(4 3*:C1F 94 39)91*?5

ratedata

s MBit ml

/150 !"

3,5 V2,5 V1,5 V

Wire 2

Wire 1

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80A 'Q**? "3 4A9:C c p

" '9:C3* T9+* "

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G91 E9)9:C

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E/+0Q'*C; QF>4* 4*C)*:14 E/F>4*'*C-; E/F>4*'*C# P2>: W* >?>Q1*? WH

20:1+033*+ I0+ 4H:2F+0:9K>V0:S

" E'H:2'*CY E/+0Q'*C )(41 W* 30:C*+ 1F>: #O Q+0Q>C>V0: ?*3>H

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T SyncSeg=1T Q T PhaseSeg2 = max 2T Q T PropSeg=1…8T Q T PhaseSeg1=1…8T Q

Bit begins Bit endsSignal Sampled

T bit=4…19T Q

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" 'H:2F+0:9K>V0: F>QQ*:4 0: W91 3*N*3;

WH ?*1*2V:C 41>+1 W91 0I 4*:?9:C 41>V0:

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# 9R*R; )*44>C* A91F 30:C*41 m,v7Q+*UO

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0 0 0 0 0 1 0 1 1 1 0 0 1 1 0

0 1 0 1 0 1

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!

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" [N*: 9I V)* )>41*+ I>934; EE"33W>2B :0?*4

# =0?*4 20)Q*1* I0+ 1+>:4)94490: 0I +*I*+*:2* )*44>C*4

# "F04*: WH >+W91+>V0:

Next Ref. Message

Time Window 1

Time Window 2

Reference Message

Basic cycle

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V0:

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#

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# :2* Z>4B Pm-v )>+B4 +*3*N>:1 W914 9: >22*Q1>:2* 20?*S

Bit 10 9 8 7 6 5 4 3 2 1 0

Acceptance Code Reg. 0 1 1 0 1 1 1 0 0 0 0

Acceptance Mask Reg. 1 1 1 1 1 1 1 0 0 0 0

Resulting Filter Pattern 0 1 1 0 1 1 1 X X X X

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# Z*44>C* 3*:C1F

# RRR

0 7 8 15

SB

Identifier

Control Bits

Data

...

CRC

Acknowledge & End of Frame

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# 9R*R; (4>W3* ?>1> +>1* D, BG91X4

0 7 8 15

SB

Identifier

Control Bits

Data

...

CRC

Acknowledge & End of Frame

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# e ?0)9:>:1 G914 A91F :0 41(r:C

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3; ?942>+? )*44>C*

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0 1 2 3 4 5 6 7

(opt) Addl. Address

PCIhigh

PCIlow

(opt) Addl. PCI Bytes Payload

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0 1 2 3 4 5 6 7

(Address) 0 Len Payload

0 1 2 3 4 5 6 7

0 Len Payload

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0 1 2 3 4 5 6 7

(Address) 2 SN Payload

0 1 2 3 4 5 6 7

(Address) 1 Len Payload

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0 1 2 3

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# `*4Q0:4*5 ,O,,,,

# =0 +*4Q0:4* *OQ*21*?5 >31*+:>1*4 W*1A**: ,Occcc X ,O

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# ,O",5 "F>::*3 `*i(*41

# ,Ob,5 /049VN* `*4Q0:4*

#

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# 2IR E"/7/0+14

0 1 2 3 4 5 6

Dest Opcode RX ID V TX ID V App

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0 1 2 3 4 5 6

Dest 0xC0 1 TX ID 0 App

2

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• X

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&,-

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$2 &,- 6

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8/17/2019 03-proto1.pdf

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!

8@= )>41*+ 20))0:3H >340 Q>+1 0I > "C* 0+9*:1*?" =0 ?*4V:>V0: >??+*44

MasterFunction

Slave Function

Slave Function

Slave Function

$2 &,- 6

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" '3>N*4 ?0 :01 :**? 10 B:0A 42F*?(3*

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#

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Data request, sent by master

LIN Identifier

Sync Byte 55h Checksum

Data byte

Data byte

Data response, sent by slave

Sync Break " 13 bit

" 1 bit triggers Data Response Bus Idle

$2 &,- 6

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Q3(4 4() 0I >33 2>++9*4

Data request, sent by master

LIN Identifier

Sync Byte 55h Checksum

Data byte

Data byte

Data response, sent by slave

Sync Break " 13 bit

" 1 bit triggers Data Response Bus Idle

$23 &,- 678

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'>)Q3* 42F*?(3* 1>W3*

Slot Type Signal

1 Unconditional AC

2 Unconditional Rain sensor

3 Unconditional Tire pressure

4 Event triggered Power window

5 Sporadic (unused)-OR-

Fuel level

-OR-Outside temp

$23 &,- 678

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# '1>:?>+?9K*? Q+010203

#

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# @:?*Q*:?*:1 0I Q>H30>?; 8@= I+>)* Q>??*? 10 J GH1*4

# 8@= 43>N*4 F>N* 10 >340 4(QQ0+1 6T/ #,,,

# "0:1+>?9214 30A 2041 >QQ+0>2F 0I 8@=

#

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03-proto1.pdf

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