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Session P. Poster Presentations(Friday morning, September 9 -- 9:15 to 10:45 am)
Poster Session Notes:
Posters are to be mounted Wednesday morning, September 7, 2005 Posters are to be removed Friday afternoon, no later than 3 pm (the facility is
rented immediately after MAPLD) All posters have assigned panels with the locations listed below. The poster panels are set up in 19 groups of 3 panels, giving 6 poster presentations
per triplet of panels at each station.
Poster Panel Station Identification
Concorde Manned Maneuvering UnitGalileo MoonGemini Saturn
Hubble Space Telescope Saturn VInternational Space Station Skylab
Jupiter SoyuzLEM U2
Mercury VoyagerMilky Way Galaxy Wright Flyer
Mir
Session Chair:Virginia Ross, Air Force Research Laboratory
Submission 1014"FT-UNSHADES: A New System for SEU Injection, Analysis and Diagnostics over Post Synthesis Netlist"M. Aguirre1, J.N. Tombs1, F. Muñoz1, V. Baena1, A. Torralba1, A. Fernández-León2, F. Tortosa-López2
1Escuela Superior de Ingenieros Universidad de Sevilla Camino de los Descubrimientos2Data Systems Division. ESTEC/TOS-ED European Space AgencyLocation = Galileo
Submission 243"The DARPA Data Transposition Benchmark on a Reconfigurable Computer"S. Akella1, D. A. Buell1, L. E. Cordova1, and J. Hammes2
1University of South Carolina2SRC ComputersLocation = Manned Maneuvering Unit
Submission 137"A High-Performance Radix-2 FFT in ANSI C for RTL Generation"John ArdiniDraper LaboratoryLocation = Mercury
Submission 115 "Using Simulation Techniques to Guarantee Successful Backplane Design"Shahana AzizMEI/NASA Goddard Space Flight CenterLocation = U2
Submission 1024"Design of a ‘Single Event Effect’ Mitigation Technique for Reconfigurable Architectures"Sajid Baloch1,2, Tughrul Arslan1,2, Adrian Stoica1,3
1University of Edinburgh2Institute for System Level Integration, The Alba Campus, The Alba Centre3NASA Jet Propulsion LaboratoryLocation = Galileo
Submission 127"Reconfigurable Computing: Current Status and Potential for Spacecraft Computing Systems"Rod BartoNASA Office of Logic DesignLocation = Soyuz
Submission 1021"Development of a High-Speed Multi-Channel Analog Data Acquisitioning Architecture"Linda M. BjörkSouthwest Research InstituteLocation = Lunar Module
Submission 176"The Continued Evolution of Re-Configurable FPGAs for Military and Space Strategic Applications"Howard BogrowXilinx, Inc.Location = International Space Station
Submission 131"Lessons Learned (the Hard Way): Working FPGA Fails Miserably on System Board"Dave Brady Mentor Graphics Corporation Location = Moon
Submission 194"SEU Mitigation in Re-Configurable FPGAs: Picking the Right Tool for the Job"Brendan Bridgford and Carl Carmichael Xilinx Inc.Location = Saturn V
Submission 214"Using Active Module Reconfiguration to Time-Multiplex Embedded Processor Peripherals in Virtex-II and Virtex-II Pro Devices"Brendan Bridgford and Brandon BlodgetXilinx Inc.Location = Saturn V
Submission 1026"Spiraling in on Speed-Ups of Genetic Algorithm Solvers for Coupled Non-Linear ODE System Parameterization and DNA Code Word Library Synthesis"Dan Burns, Kevin May, Dr. Thomas Renz, and Virginia RossAFRL/IFTCLocation = Gemini
Submission 201"Single Event Effects Experimentation and Validation Techniques for SEU Mitigation Methods for Static Latch Based FPGAs"Carl Carmichael1, Gary Swift2, Jeffrey George3, and Sana Rezgui1
1Xilinx, Inc.2JPL/Caltech3Aerospace Corp.Location = Voyager
Submission 190"Highly-Scalable Reconfigurable Computing"Roger Chamberlain1, Steven Miller2, Jason White1, and Dan Gall2
1Exegy, Inc.2Silicon Graphics, Inc.Location = Gemini
Submission 199"High Speed Energy Efficient Architectures for Finite Ridgelet Transform"Shrutisagar Chandrasekaran and Abbes AmiraQueen’s UniversityLocation = Mercury
Submission 200"FPGA Implementation of Reduced Bit Plane Motion Estimation"Shrutisagar Chandrasekaran, Abbes Amira, and Faycal BensaaliQueen’s UniversityLocation = Mercury
Submission 231"Impact of Negative Bias Temperature Instability on FPGAs"Yuan Chen, Doug Sheldon, Ramin Roosta, Gary Burke, and Tien NguyenJet Propulsion Laboratory, California Institute of TechnologyLocation = Wright Flyer
Submission 206"A Programmable Single Chip Digital Signal Processing Engine"Paul Chiang and Pius NgMathStar, IncorporatedLocation = Concorde
Submission 233"NARC: Network-Attached Reconfigurable Computing for High-performance, Network-based Applications"C. Conger , I. Troxel, D. Espinosa, V. Aggarwal, and A. GeorgeUniversity of FloridaLocation = Hubble Space Telescope
Submission 138"High Performance, Radiation Hardened, Ultra Low Power Space Computer Leveraging COTS Microelectronics with SEE Mitigation"David R. Czajkowski, David J. Strobel, et. al.Space Micro Inc.Location = Skylab
Submission 139"SEFI Mitigation Technique for COTS Microprocessors-Proton Testing Demonstration"David R. Czajkowski, Manish Pagey, Praveen Samudrala, and David J. StrobelSpace Micro Inc.Location = Skylab
Submission 1025 (Session P)"Radiation Tolerant and Intelligent Memory for Space"T. Dargnies1, J. Herath2, T. Ng1, C. Val1, J.F. Goupy1, and J.P. David1
1 3D PLUS2 NASA Langley Research CenterLocation = Voyager
Submission 186"High-Level Implementation of VSIPL on FPGA-based Reconfigurable Computers"Malachy Devlin1, Robin Bruce2, and Stephen Marshall3
1Nallatech2Institute of System Level Integration, Alba Centre3Strathclyde UniversityLocation = International Space Station
Submission 1008"Implementation of Image Processing Kernels on Reconfigurable Computers: A Comparative Study between SRC and SGI Platforms"Esam El-Araby1, Mohamed Taher1, Tarek El-Ghazawi1, and Kris Gaj2
1The George Washington University2George Mason UniversityLocation = Gemini
Submission 239"New Burn In (BI) Methodology for Testing of Blank and Programmed Actel 0.15 µm RTAX-S FPGAs"Dan Elftmann, Solomon Wolday, and Minal SawantActel CorporationLocation = Mir
Submission 175"The Continuing Impact of Design and Process Hardening on the NSEU Sensitivity of Advanced CMOS PLD Technologies"Joe Fabula, Austin Lesea, and Ray MatteisXilinx, Inc.Location = Saturn V
Submission 182"The SMCS332SpW / SMCS116SpW SpaceWire Communication Controller ASICs"S. Fischer1, L. Stopfkuchen1, U. Liebstückel1, P. Rastetter1, L. Tunesi2
1EADS Astrium GmbH2ESA / ESTECLocation = U2
Submission 104"Silicon-On-Insulator (SOI) MOSFETs for Radiation Tolerance in Space Environments"Josh ForgioneNASA Goddard Space Flight CenterLocation = Skylab
Submission 207"Integrated Tool Suite for Post Synthesis FPGA Power Consumption Analysis"Matthew French1, Li Wang1, Tyler Anderson2, Michael Wirthlin2
1University of Southern California, Information Sciences Institute2Brigham Young UniversityLocation = International Space Station
Submission 16 3 "Hardware Implementation of 2-D Wavelet Transforms in Viva on the Starbridge Hypercomputer"Sitanshu GakkharUtah State UniversityLocation = Gemini
Submission 1027 "FPGA design using the LEON3 Fault Tolerant Processor Core"Jiri Gaisler and Sandi HabincGaisler Research ABLocation = Milky Way
Submission 1016"Development and Maintenance of User Libraries for SRC Reconfigurable Computers"Kris Gaj1, Tarek El-Ghazawi2, Paul Gage3, Dan Poznanovic3, Chang Shu1, Deapesh Misra1, Miaoqing Huang2, Esam El-Araby2, Mohamed Taher2
1George Mason University2The George Washington University3SRC Computers, Inc.Location = Manned Maneuvering Unit
Submission 110"Learning From Disaster"Jack GanssleThe Ganssle GroupLocation = Moon
Submission 129"Writing Platform Independent Code"Dan GardnerMentor GraphicsLocation = International Space Station
Submission 145"Methods to Differentiate Mil/Aero Solutions Using FPGA"Dan GardnerMentor Graphics CorporationLocation = International Space Station
Submission 1006"FPGA/ASIC Cores for Interplanetary Internet Applications"Yosef GavrielGeorge Mason UniversityLocation = Manned Maneuvering Unit
Submission 211"Initial Single-Event Effects Testing and Mitigation in the Xilinx Virtex II-Pro FPGA"J. George1, S. Rezgui2, G. Swift3, G.Allen3, C. Carmichael2
1The Aerospace Corporation2Xilinx, Inc.3Jet Propulsion Laboratory, California Institute of TechnologyLocation = Voyager
Submission 1015"Toward Single-Electron Nanonetworks and Architectures"C. Gerousis and D. BallChristopher Newport UniversityLocation = Saturn
Submission 135"The Scalable Configurable Instrument Processor"John R. HayesJohns Hopkins University / Applied Physics LaboratoryLocation = Soyuz
Submission 247"Design, Development and Validation Testing of a Versatile PLD Implementable Single-Chip Heterogeneous, Hybrid and Reconfigurable Multiprocessor Architecture"J. Robert Heath, Sridhar Hegde, Kanchan Bhide, Paul Maxwell, Xiaohui Zhao, and Venugopal DuvvuriUniversity of KentuckyLocation = Milky Way
Submission 130"An Architecture for Reconfigurable Computing in Space"Robert F. Hodson1, Kevin Somervill1, John Williams2, Neil Bergman2, Rob Jones3
1NASA LaRC2University of Queensland3ASRC AerospaceLocation = Soyuz
Submission 193"Extending FPGA Verification Through The PLI"Charlie HowardSouthwest Research InstituteLocation = Moon
Submission 132"Filtering of Telemetry Using Entropy"N. Huber, T. Carozzi, B. Popoola, and P. Gough Space Science Center, University of Sussex Location = Saturn
Submission 248"An FPGA Co-Processor for Statistical Pattern Recognition Applications"Jason C. Isaacs and Simon Y. FooFlorida A&M University - Florida State UniversityLocation = Hubble Space Telescope
Submission 249"FPGA-coprocessor Enhanced Ant Colony Systems Data Mining"Jason C. Isaacs and Simon Y. Foo FloridaFlorida A&M University - Florida State UniversityLocation = Hubble Space Telescope
Submission 1005"Operating Systems for Wireless Sensor Networks in Space"Abdul-Halim Jallad and Tanya VladimirovaUniversity of SurreyLocation = Milky Way
Submission 147"Design of a Reusable SpaceWire Link Interface for Space Avionics and Instrumentation"Mark A. Johnson, Buddy Walls, Kristian Persson, Sandra G. DykesSouthwest Research InstituteLocation = U2
Submission 177"On the Model-centric Design and Development of an FPGA-based Spaceborne Downlink Board"Rob Jones, Roman Machan, Tahsin Lin, and Ed LeventhalASRC Aerospace CorporationLocation = Lunar Module
Submission 148"Reconfigurable Floating Point Co-Processor for Atmel FPSLIC"Jiri KadlecInstitute of Information Theory and Automation, Academy of Sciences of the Czech RepublicLocation = Concorde
Submission 149"Floating Point Controller as PicoBlaze Network on Single Spartan 3 FPGA"Jiri Kadlec1 and Roger Gook2
1Institute of Information Theory and Automation, Academy of Sciences of the Czech Republic2Celoxica Ltd.Location = Mercury
Submission 213"Partial Evaluation Based Redundancy for Single Event Upset Mitigation in Combinational Circuits"Sujana Kakarla and Srinivas KatkooriUniversity of South FloridaLocation = Voyager
Submission 106"Summary of FPGA Reliability Testing"Richard B. KatzNASA Office of Logic Design Location = Mir
Submission 1020"On The Hilbert-Huang Transform Theoretical Developments"Semion Kizhner, Karin Blank, Thomas Flatley, Norden E. Huang, David Patrick and Phyllis HestnesNational Aeronautics and Space AdministrationLocation = Concorde
Submission 227"X-ray Shielding Package"Raymond Kuang, Ravenal Sampan and Lijie ZhaoActel Corp.Location = Galileo
Submission 121"Radiation Tolerant Computer Design"Anthony LaiAitech Defense Systems, IncLocation = Skylab
Submission 236"Building Integrated ARINC 429 Interfaces using an FPGA"Ian LandActel CorporationLocation = Moon
Submission 237"Verification of Intellectual Property for FPGA Designs"Ian Land
Actel CorporationLocation = Moon
Submission 255"VHDL-200X: The Future of VHDL"Jim Lewis SynthWorks Design Inc.Location = International Space Station
Submission 1022"A Plug-and-play Concept for Spacecraft"Jim Lyke1, Don Fronterhouse2, Denise Lanza3, and Tony Byers3
1Air Force Research Labs, Kirtland AFB2Scientific Simulations, Inc.3SAICLocation = U2
Submission 185"A Verified Implementation of a Control System"Alistair A. McEwan1 and J. C. P. Woodcock2
1University of Surrey2University of YorkPaper: 185_mcewan_p.pdfLocation = Mercury
Submission 168"FPGA Design of an Integrated CAN and EDAC Soft Core for Spacecraft Applications"Antonio Roldao1, Martin Unwin1 and Tanya Vladimirova2
1Surrey Satellite Technology Ltd.2Surrey Space CentreLocation = U2
Submission 141"Achieving Ultra High Quality and Reliability in Deep Sub-Micron Technologies using Metal Layer Configurable Platform ASICs"R. Madge , M. Vilgis, and V. BhideLSI Logic CorporationLocation = Mir
Submission 181Investigation into Effective SEFI Mitigation for On-Board Data Handling ArchitecturesShazia Maqbool and Craig UnderwoodSurrey Space Centre, University of SurreyLocation = Saturn V
Submission 253"Microprocessors with FPGAs: An Implementation and Workload Partitioning Study of the DARPA HPCS Integer Sort Benchmark within the SRC-6e Reconfigurable Computer"E. Allen Michalski and Duncan BuellUniversity of South CarolinaLocation = Manned Maneuvering Unit
Submission 226"Using Software Rules to Enhance FPGA Reliability"Chandru Mirchandani
Lockheed Martin Transportation and Security SolutionsLocation = Wright Flyer
Submission 228"Design Techniques for Radiation Hardened Phase Locked Loops"Anantha Nag Nemmani, Martin Vandepas, Kerem Ok, Kartikeya Mayaram, and Un-Ku MoonOregon State UniversityLocation = Wright Flyer
Submission 153"Emulated Digital CNN-UM Implementation of a 3-dimensional Ocean Model on FPGAs"Zoltán Nagy and Péter SzolgayUniversity of VeszprémLocation = Lunar Module
Submission 209"Supporting Rip-Up and Reroute in an FPGA-Based Multilayer Maze Routing Accelerator"John A. Nestor, Kavon Nasabzadeh, and Oliver BowenLafayette CollegeLocation = Moon
Submission 1003 "Availability Analysis of Xilinx FPGA on Orbit" Nozomu Nishinaga National Institute of Information and Communications Technologyocation = Skylab
Submission 1023"Digital Design Obsolescence"John O’BoyleQP SemiconductorLocation = Lunar Module
Submission 1009"A FPGA-Based Architecture for In-Flight SAR Motion Compensation in UAVs"Fernando E. Ortiz1, James P. Durbano1, John R. Humphrey1, Petersen F. Curt1, and Dennis W. Prather2
1EM Photonics, Inc.2University of DelawareLocation = Lunar Module
Submission 219"Design and Timing Closure Techniques for Managing Wide Semiconductor Timing Variations in Space Applications"Alexander Osovets1 and Michael Cuviello2
1Orbital Sciences Corporation2Michael Cuviello Muniz Engineering Inc.Location = Lunar Module
Submission 245"Reconfigurable Field Programmable Gate Arrays (FPGAs) for Space – Present and Future"Richard PadovaniXilinx, Inc.Location = Galileo
Submission 234"Analysis and Reduction of Soft Delay Errors in CMOS Circuits"Chris Papachristou, Balkaran S. Gill, Francis and G. WolffCase Western Reserve UniversityLocation = Galileo
Submission 254"Reconfigurable and Evolvable Hardware Fabric"Chris Papachristou and Frank WolffCase Western Reserve UniversityLocation = Hubble Space Telescope
Submission 146"Virtex-II Pro PowerPC SEE Characterization Test Methods and Results"David J. Petrick1, Wesley A. Powell1, Kenda S. Conklin1, Kenneth A. LaBel1 and Dr. James W. Howard2
1NASA Goddard Space Flight Center2Jackson & Tull Chartered EngineersLocation = Skylab
Submission 120"The Impact of Silicon Etch Dislocations on EEPROM Cell Data Retention Reliability"David PetryZMD AmericaLocation = Mir
Submission 161"FPGA-based Modeling of Spatio-temporal Interactive Systems"Jonathan D. Phillips, Vignesh Hariharan, and Aravind DasuUtah State UniversityLocation = Gemini
Submission 167"Automation Techniques for Fast Implementation of High Performance DSP Algorithms in FPGAs"John PorcelloL-3 Communications, Inc.Location = Concorde
Submission 156"Reducing Energy in FPGA Multipliers Through Glitch Reduction"Nathaniel Rollins and Michael J. WirthlinBrigham Young UniversityLocation = Milky Way
Submission 1004"Evaluation of Actel FPGA Products by JAXA"Yasuo Sakaide1, Norio Nemoto2, Kimiharu Kariu1, Masahiko Midorikawa1, Yoshiya Iide1, Masakazu Ichikawa1, Yoshihisa Tsuchiya1, Toshifumi Arimitsu1, Noriko Yamada2, Hiroyuki Shindou2, Satoshi Kuboyama2, Sumio Matsuda2, and Takashi Tamura2
1High-Reliability Components Corporation (HIREC)2Japan Aerospace Exploration Agency (JAXA)Location = Mir
Submission 101"Dependency of Oxide Thickness Effect on the Evolution of n-MOSFET Switching Time with Electrical Stress"C. Salame1, R. Habchi1, A. Khoury1, P. Mialhe2
1CEA-LPSE, Faculty of SciencesII, Lebanese University2LP2ALocation = Wright Flyer
Submission 196"Altera Stratix Field-Programmable Gate Array EP1S25"A.B. Sanders1, K.A. LaBel1, C. Poivey2
1NASA/Goddard Space Flight Center2NASA/Muniz Engineering Inc.Location = Voyager
Submission 1017 (Session P)"Efficient Implementation of a String Matching Algorithm for SRC and Cray Reconfigurable Computers"Esam El-Araby1, Mohamed Taher1, Tarek El-Ghazawi1, Mohamed Abouellail1, Nandakishore Sastry2, and Kris Gaj2
1 The George Washington University2 George Mason UniversityLocation = Manned Maneuvering Unit
Submission 1028"Actel A54SX-A and RTSX-SU Reliability Testing Update"Antony Wilson, Minal Sawant, and Dan ElftmannLocation = Mir
Submission 128"FPGAs Enable VXS for Software Radio and DSP"Mario SchiavonePentekLocation = Concorde
Submission 246"Layered Fault Management for HW/SW Co-design"Jason Scott, Sandeep Neema, Dolores Black, and Ted BaptyVanderbilt UniversityLocation = Saturn
Submission 144"A Fault Tolerant High Speed Network for Inter Satellite Links"Kawsu Sidibeh and Tanya VladimirovaSurrey Space Centre, University of SurreyLocation = U2
Submission 116"Reliable SW/HW Co-Design for Wireless Communication System Integrating the Spin Model Checker and Celoxica's DK Suite"Stefanos SkoulaxinosHeriot-Watt UniversityLocation = Mercury
Submission 142"Development of a Reconfigurable Sensor Network for Intrusion Detection"Andrzej Sluzek, Palaniappan AnnamalaiNanyang Technological UniversityLocation = Hubble Space Telescope
Submission 197"An Ultra Low Power Reconfigurable Task Processor for Space"Brian Smith1, Greg Alkire1, and Wes Powell2
1PicoDyne Inc.2NASA Goddard Space Flight CenterLocation = Soyuz
Submission 125"Reconfigurable Processing Module"Kevin Somervill1, Robert F. Hodson1, John Williams2, Robert Jones3
1NASA LaRC, Hampton, VA2University of Queensland, Brisbane, AU3ASRC Aerospace Corp., Greenbelt, MDLocation = Soyuz
Submission 1002"Fault Tolerant Memory In Processor - SuperComputer On a Chip"Niranjan Soundararajan1 and Arrvindh Shriraman2
1Duke University2University of RochesterLocation = Milky Way
Submission 158"Implementing Digital Signal Processing Algorithms in Actel's RT54SX-S Family"Ken StevensUniversity of Colorado, BoulderLocation = Concorde
Submission 232"Re-configurable Electronics Behavior Under Extreme Thermal Environment"Adrian Stoica, Veronica Lacayo, Ramesham Rajeshuni, Didier Keymeulen, Ricardo Zebulum, Gary Burke, and Taher DaudJet Propulsion laboratory California Institute of TechnologyLocation = Wright Flyer
Submission 103"Dynamic High-Performance Multi-Mode Architectures for AES Encryption"Eric Swankoski1 and Vijaykrishnan Narayanan2
1 Naval Research Laboratory2 The Pennsylvania State UniversityLocation = Manned Maneuvering Unit
Submission 173"Upset Susceptibility and Design Mitigation of PowerPC405 Processors Embedded in Virtex II-Pro FPGAs"Gary Swift1, Gregory Allen1, Jeffrey George2, Sana Rezgui3, and Carl Carmichael3, and Fayez Chayab4
1JPL/Caltech2The Aerospace Corporation3Xilinx Corporation4MDRoboticsLocation = Saturn V
Submission 174"Antifuse Rupture from Heavy Ions in Actel FPGAs"Gary SwiftJPL/CaltechLocation = Saturn V
Submission 1011"A High Speed and Efficient Method of Elliptic Curve Encryption Using Ancient Indian Vedic Mathematics"Himanshu Thapliyal and M.B SrinivasInternational Institute of Information TechnologyLocation = Jupiter
Submission 1012"A Beginning in the Reversible Logic Synthesis of Sequential Circuits"Himanshu Thapliyal and M.B SrinivasInternational Institute of Information TechnologyLocation = Jupiter
Submission 1013"A Novel Time- Area-Power Efficient Single Precision Floating Point Multiplier" Himanshu Thapliyal and M.B SrinivasInternational Institute of Information TechnologyLocation = Jupiter
Submission 159"Wavelet “Block Processing” for Reduced Memory Transfers"William F. Turri1 and Eric J. Balster2
1Systran Federal Corp.2Air Force Research Laboratory/IFTALocation = Saturn
Submission 160"Image 'Padding' in Limited-Memory FPGA Systems"William F. Turri1 and Eric J. Balster2
1Systran Federal Corp.2Air Force Research Laboratory/IFTALocation = Saturn
Submission 230"Characterization of 1.2GHz Phase Locked Loops and Voltage Controlled Oscillators in a Total Dose Radiation Environment"Martin Vandepas, Kerem Ok, Anantha Nag Nemmani, Merrick Brownlee, Kartikeya Mayaram, Un-Ku Moon Oregon State UniversityLocation = Wright Flyer
Submission 204"Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs"Kamakoti Veezhinathan1, Sk. Noor Mahammad1, V. Muralidaran1, Vijaykrishnan Narayanan2, and Vikram Chandrasekhar1
1Indian Institute of Technology2Pennsylvania State UniversityLocation = Voyager
Submission 195"High Performance Low Power Single Chip Reconfigurable Supercomputer for High-end Aerospace Applications"N. Venkateswaran, M. Arvind, C. Karthik, G. Karthik, V. Vishwanath, and K. ViswanathWaran Research FoundationLocation = Milky Way
Submission 251"A Fast FPGA Implementation of a Unique Multi-level Tree-based Image Classifier"Geoffrey Wall1, Faizal Iqbal1, Xiuwen Liu2, and Simon Foo1
1Florida A&M University - Florida State University2Florida State UniversityLocation = Hubble Space Telescope
Submission 169"Applying Particle Swarm Optimization to a Discrete Variable Problem on an FPGA-based Architecture"B. Earl Wells1, Clint Patrick2, Luis Trevino2, John Weir2 and Jim Steincamp2
1The University of Alabama in Huntsville2NASA Marshall Space Flight CenterLocation = Gemini
Submission 1001"A Linux-based Software Platform for the Reconfigurable Scalable Computing Project"John A. Williams1, Neil W. Bergmann1, and Robert F. Hodson2
1The University of Queensland2NASA Langley Research CenterLocation = Soyuz
Submission 223"MEMS-based Reconfigurable Manifold Update"Warren Wilson1, James Lyke1 and Glenn Forman2
1Air Force Research Laboratory, Space Vehicles Directorate2GE Global Research