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Accredited by NAAC

KG Reddy College of Engineering &Technology (Approved by AICTE, New Delhi, Affiliated to JNTUH, Hyderabad)

Chilkur (Village), Moinabad (Handal), R. R Dist, TS-501504

Department of

Electronics and Communication Engineering

Report Of Expert Lecture

On

VLSI Design

Organized by

Department of Electronics and Communication Engineering

At

T-408

DATE: 04/11 /2019

Submitted by

Mr.Vikram S Kamadal

Assistant professor

ECE Department

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RESOURCE PERSON Accredited by NAAC

Mr. Bavusaheb B Kunchanur is currently working as assistant professor in Dept. of ECE, KGRCET, Hyderabad. He received his M.Tech in VLSI design and embedded systems from VTU Belagavi in 2016 and has been working in teaching profession since his graduation. Prior to joining KGRCET he worked in IT industry. He have working knowledge of Arduino family and Raspberry pi. He have 9 international publications and attended several FDP. He is active review member of two international journal JETIR and IJCRT.

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accredited by NAAC REPORT ON VLSI DESIGN EXPERT LECTURE

The resource person Mr.Bavusaheb B.K took over the session at 01:30PM discussing

overview, Introduction to ICs, recent trends and applications of ICs, Small signal model and

design of Analog ICs for future developments. He started the lecture from invention of the

ICs, introduced how Moore's law satisfied the present scenario of IC fabrications. He

discussed briefly about advancements in microelectronics towards Analog IC design and its

modeling. He briefly discussed the different examples for analog integrated circuit designs

such as power management circuits, operational amplifiers, and sensors that are used with

continuous signals for performing the functions such as active filtering, power distributing for

components with in chip, mixing, and so on.

He focused on circuit design and the techniques used to minimize capacitive and

inductive noise. He also introduced how to integrate analog circuits on large digital chips

presents significant challenges, primarily due to substrate noise coupling. He differentiated a

strategy for making analog circuits less sensitive to substrate bounce. He also swnmari~ed

that CMOS processes move into the nanoscale—that is, less-than-100-nmrange, it becomes

increasingly difficult to maintain the energy efficiency for medium- to high-accuracy analog

circuits, Accuracies may decrease as the technology scales down. Analog-chip designers can

improve energy efficiency using different approaches, from selecting the optimum CMOS

technology to clever system-level design.

Finally he focused on data-converter performance has been steadily increasing over

the years. Advancements in scaling and design techniques exploit the high density and speed

of modern process technology. More intelligence is being put into data converters. Managing

more system functions, converters will simplify programming software, shrink, and become

less complex and mare cost effective with digital enhancement. Adaptive power management

and sensor integration and enhancement are here, with more to come, eliminating the analog-

circuit designer's messy task of signal conditioning the sensor and keeping the sensor,

conditioning, and data-conversion chips as close as possible

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Explaining about the Fabrication Process

Active participation of students

Accredited by NAAC

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Accredited by NAAC

Expenditure:

Registration. Fee : NA

Accommodation Charges : NA

Transportation Charges : NA

Other Charges : NA

Total :NIL

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KG Reddy College of Engineering &Technology (Approved by AICTE, New Delhi, Affiliated to JNTUH, Hyderabad)

Chilkur (Village), Moinabad (Mandal), R. R Dist, TS-501504

Circular No: KGRCET/2019-20/sem-1/Expert Lecture/VLSI

CIRCULAR

Accredited by NAAC

DATE: 02/11/2019

All the students are here by informed that, The Expert lecture for IV year students on "VLSI Design" is scheduled on 04/11/2019. Students should attend actively to make it successful.

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