© 2009 acehub vista sdn. bhd. 1 1. introduction to arm ® processors

© 2009 Acehub Vista Sdn. Bhd. 1

1. Introduction to ARM® Processors


Processors Market

In 2007:

• 13 billion microprocessors were shipped.

• 3 billion are based on the ARM architecture embedded processor.

• 150 million are for the PC, notebook, and workstation.

By February 2008:

• 10 billion ARM-based processors have been produced.


Originally conceived to be a processor for the

desktop system (Acorn®)

• now entrenched in embedded markets

First well-known product

• Apple®’s Newton™ PDA (1993)

based on an ARM6 core

Significant breakthrough

• Apple®’s iPod® (2001)

based on an ARM7 core

A Bit of ARM History


Processor Architecture

ARM stands for “Advanced RISC Machine”.

• based on Reduced Instruction Set Computer (RISC) architecture

– trading simpler hardware circuitry with software complexity (& size)

– but latest ARM processors utilize more than 100 instructions


ARM Processor

By having relatively simpler hardware, the ARM processor is targeted for applications that demand:

•low power consumption

– i.e. battery powered devices, mobile devices

Biggest market for the ARM processor:

•mobile phones and smart phones


ARM Partners

The ARM processor is not sold as a processor chip but as a hardware IP license.

Licensees add their own logic and customized peripherals and then manufacture the silicon processor chip.

•typically sold as ASIC/SOC for embedded applications

Some of the present and past licensees (ARM calls them Partners) include:

•Texas Instruments, Philips, Analog Devices, Qualcomm

•Intel (StrongARM® and XScale®)

•Atmel – its processor is used on the ARM9 board


ARM Processor Main Features

Typical ARM processors:

• run at a relatively slow clock cycle (few hundred MHz).

[But new and upcoming family, like the dual-core Cortex™-A9 Osprey is capable of achieving up to 2 GHz clock.]

• 32-bit instructions, with extension to support 16-bit Thumb® & Thumb-2 instructions.

• single unified memory address space (i.e. all peripherals and I/O are accessed like normal memory, at certain specific memory locations).

• relatively low power consumption.


ARM Processor Families

a) ARM7TDMI family (E.g. NXP’s ARM7)

• Based on ARMv4T architecture with 3-stage pipeline

• supports the 16-bit Thumb instruction set

• supports the JTAG Debugger

• includes a fast Multiplier to support DSP algorithm

• supports the In-Circuit Emulation interface

b) ARM9TDMI family (E.g. Atmel’s ARM9)

• Based on ARMv4T with Harvard cache architecture

• 5-stage pipeline

• ARM920T is based on ARM9TDMI with a memory management unit (MMU)


ARM Processor Families (cont’d)

c) ARM9E family (E.g. Intel’s XScale)

• Based on ARMv5E architecture

• Enhanced with DSP instructions

• Hardware support of Java™ bytecodes execution

d) ARM10 family

Based on ARMv5E with MMU

e) ARM11 family

• Based on ARMv6 architecture

• Supports SIMD instructions


ARM Processor Families (cont’d)

f) Cortex families

• Based on ARMv7 architecture

• Supports the new Thumb-2 instruction set

• Cortex-A: For complex OS based applications

• Cortex-R: For real-time embedded applications

• Cortex-M: For deeply embedded, microcontroller type cost sensitive applications

• Only executes Thumb-2 codes


Processor General Concepts


Basic Processor-Based System

Reg

iste

rs Processor core

Cache/SRAM memory

Mainmemory

Storagememory

I/O Interface

Address bus, data bus, and bus control signals


System Components

The basic components:

a) Processor with its associate temporary memory (registers

and cache if available) for code execution

b) Main memory and secondary memory where code and

data are temporary and permanently stored

c) Input and output modules that provide interface between

the processor and the user

Connected through an interface bus consists of

Address, Data, and Control signals

• e.g. AMBA bus for the ARM-based processor


Memory Hierarchy

A typical processor is supported by:

• on-board main memory (e.g. SDRAM up to GB)

• on-chip or on-die cache memory (e.g. SRAM KB to MB)

• on-die registers

Some processors also provide general purpose on-chip

• SRAM (e.g. embedded processor) which may be configured as SRAM/Cache combination (e.g. TI’s DSP)

Typically, a processor also utilizes secondary non-volatile memory

• for permanent code and data storage like Flash-based memory and hard disk


Address Space

Address space of a processor depends on its address decoding mechanism

•size will depend on the number of address bit used

Depending on the processor design, there may be two types of address space

•one is used by normal memory access

•another one is reserved for I/O peripheral registers (control, status, and data)

•need extra control signal or special means of accessing the alternate address space


I/O Reg

I/O Reg

Memory

Processor

0x00000000

Refer to the range of address that can be accessed by the processor determined by the number of address bit utilized in the processor architecture.

Some processor families (e.g. ARM) utilize only one address space for both memory and I/O devices

•i.e. everything is mapped in the same address space

0xFFFFFFFF

I/O

Data

Code

Address Space (cont’d)


Memory Mapped vs I/O Mapped

Memory Address Space

Processor

0x00000000

Some processor families have two address spaces.E.g. For the x86 processor, memory and I/O devices can be mapped in two different address spaces:

•memory address space and I/O address space

0xFFFFFFFF

0x0000

0xFFFF

I/O Address Space

I/O Reg

I/O RegData

Code

Data

Code


Memory System Architectures

Two types of information are found in a typical program

code:

i) Instruction codes for execution

ii)Data that is used by the instruction codes

Two classes of memory system design to store these information:

i. von Neumann architecture

ii.Harvard architecture


0000h

FFFFh

Code

Data

Code

Data Table

Data

Processor

Single path (bus) for both Code & Data

The von Neumann architecture utilizes only one memory bus

for both instruction fetching and data access

•simplifies the hardware and

glue logic design

•code and data located

in the same address space

von Neumann Architecture

© 2009 acehub vista sdn. bhd. 1 1. introduction to arm ® processors

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